MIMXRT595S

ACMP: Analog Comparator Driver

void ACMP_Init(CMP_Type *base, const acmp_config_t *config)

Initializes the ACMP.

The default configuration can be got by calling ACMP_GetDefaultConfig().

Parameters:

base – ACMP peripheral base address.
config – Pointer to ACMP configuration structure.

void ACMP_Deinit(CMP_Type *base)

Deinitializes the ACMP.

Parameters:

base – ACMP peripheral base address.

void ACMP_GetDefaultConfig(acmp_config_t *config)

Gets the default configuration for ACMP.

This function initializes the user configuration structure to default value. The default value are:

Example:

config->enableHighSpeed = false;
config->enableInvertOutput = false;
config->useUnfilteredOutput = false;
config->enablePinOut = false;
config->enableHysteresisBothDirections = false;
config->hysteresisMode = kACMP_hysteresisMode0;

Parameters:

config – Pointer to ACMP configuration structure.

void ACMP_Enable(CMP_Type *base, bool enable)

Enables or disables the ACMP.

Parameters:

base – ACMP peripheral base address.
enable – True to enable the ACMP.

void ACMP_EnableLinkToDAC(CMP_Type *base, bool enable)

Enables the link from CMP to DAC enable.

When this bit is set, the DAC enable/disable is controlled by the bit CMP_C0[EN] instead of CMP_C1[DACEN].

Parameters:

base – ACMP peripheral base address.
enable – Enable the feature or not.

void ACMP_SetChannelConfig(CMP_Type *base, const acmp_channel_config_t *config)

Sets the channel configuration.

Note that the plus/minus mux’s setting is only valid when the positive/negative port’s input isn’t from DAC but from channel mux.

Example:

acmp_channel_config_t configStruct = {0};
configStruct.positivePortInput = kACMP_PortInputFromDAC;
configStruct.negativePortInput = kACMP_PortInputFromMux;
configStruct.minusMuxInput = 1U;
ACMP_SetChannelConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to channel configuration structure.

void ACMP_EnableDMA(CMP_Type *base, bool enable)

Enables or disables DMA.

Parameters:

base – ACMP peripheral base address.
enable – True to enable DMA.

void ACMP_EnableWindowMode(CMP_Type *base, bool enable)

Enables or disables window mode.

Parameters:

base – ACMP peripheral base address.
enable – True to enable window mode.

void ACMP_SetFilterConfig(CMP_Type *base, const acmp_filter_config_t *config)

Configures the filter.

The filter can be enabled when the filter count is bigger than 1, the filter period is greater than 0 and the sample clock is from divided bus clock or the filter is bigger than 1 and the sample clock is from external clock. Detailed usage can be got from the reference manual.

Example:

acmp_filter_config_t configStruct = {0};
configStruct.filterCount = 5U;
configStruct.filterPeriod = 200U;
configStruct.enableSample = false;
ACMP_SetFilterConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to filter configuration structure.

void ACMP_SetDACConfig(CMP_Type *base, const acmp_dac_config_t *config)

Configures the internal DAC.

Example:

acmp_dac_config_t configStruct = {0};
configStruct.referenceVoltageSource = kACMP_VrefSourceVin1;
configStruct.DACValue = 20U;
configStruct.enableOutput = false;
configStruct.workMode = kACMP_DACWorkLowSpeedMode;
ACMP_SetDACConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to DAC configuration structure. “NULL” is for disabling the feature.

void ACMP_SetRoundRobinConfig(CMP_Type *base, const acmp_round_robin_config_t *config)

Configures the round robin mode.

Example:

acmp_round_robin_config_t configStruct = {0};
configStruct.fixedPort = kACMP_FixedPlusPort;
configStruct.fixedChannelNumber = 3U;
configStruct.checkerChannelMask = 0xF7U;
configStruct.sampleClockCount = 0U;
configStruct.delayModulus = 0U;
ACMP_SetRoundRobinConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to round robin mode configuration structure. “NULL” is for disabling the feature.

void ACMP_SetRoundRobinPreState(CMP_Type *base, uint32_t mask)

Defines the pre-set state of channels in round robin mode.

Note: The pre-state has different circuit with get-round-robin-result in the SOC even though they are same bits. So get-round-robin-result can’t return the same value as the value are set by pre-state.

Parameters:

base – ACMP peripheral base address.
mask – Mask of round robin channel index. Available range is channel0:0x01 to channel7:0x80.

static inline uint32_t ACMP_GetRoundRobinStatusFlags(CMP_Type *base)

Gets the channel input changed flags in round robin mode.

Parameters:

base – ACMP peripheral base address.

Returns:

Mask of channel input changed asserted flags. Available range is channel0:0x01 to channel7:0x80.

void ACMP_ClearRoundRobinStatusFlags(CMP_Type *base, uint32_t mask)

Clears the channel input changed flags in round robin mode.

Parameters:

base – ACMP peripheral base address.
mask – Mask of channel index. Available range is channel0:0x01 to channel7:0x80.

static inline uint32_t ACMP_GetRoundRobinResult(CMP_Type *base)

Gets the round robin result.

Note that the set-pre-state has different circuit with get-round-robin-result in the SOC even though they are same bits. So ACMP_GetRoundRobinResult() can’t return the same value as the value are set by ACMP_SetRoundRobinPreState.

Parameters:

base – ACMP peripheral base address.

Returns:

Mask of round robin channel result. Available range is channel0:0x01 to channel7:0x80.

void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask)

Enables interrupts.

Parameters:

base – ACMP peripheral base address.
mask – Interrupts mask. See “_acmp_interrupt_enable”.

void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask)

Disables interrupts.

Parameters:

base – ACMP peripheral base address.
mask – Interrupts mask. See “_acmp_interrupt_enable”.

uint32_t ACMP_GetStatusFlags(CMP_Type *base)

Gets status flags.

Parameters:

base – ACMP peripheral base address.

Returns:

Status flags asserted mask. See “_acmp_status_flags”.

void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask)

Clears status flags.

Parameters:

base – ACMP peripheral base address.
mask – Status flags mask. See “_acmp_status_flags”.

void ACMP_SetDiscreteModeConfig(CMP_Type *base, const acmp_discrete_mode_config_t *config)

Configure the discrete mode.

Configure the discrete mode when supporting 3V domain with 1.8V core.

Parameters:

base – ACMP peripheral base address.
config – Pointer to configuration structure. See “acmp_discrete_mode_config_t”.

void ACMP_GetDefaultDiscreteModeConfig(acmp_discrete_mode_config_t *config)

Get the default configuration for discrete mode setting.

Parameters:

config – Pointer to configuration structure to be restored with the setting values.

FSL_ACMP_DRIVER_VERSION: ACMP driver version 2.3.0.

enum _acmp_interrupt_enable

Interrupt enable/disable mask.

Values:

enumerator kACMP_OutputRisingInterruptEnable: Enable the interrupt when comparator outputs rising.

enumerator kACMP_OutputFallingInterruptEnable: Enable the interrupt when comparator outputs falling.

enumerator kACMP_RoundRobinInterruptEnable: Enable the Round-Robin interrupt.

enum _acmp_status_flags

Status flag mask.

Values:

enumerator kACMP_OutputRisingEventFlag: Rising-edge on compare output has occurred.

enumerator kACMP_OutputFallingEventFlag: Falling-edge on compare output has occurred.

enumerator kACMP_OutputAssertEventFlag: Return the current value of the analog comparator output.

enum _acmp_offset_mode

Comparator hard block offset control.

If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port input in the positive direction (or negative port input crossing positive port input in the negative direction). Hysteresis still exists for positive port input crossing negative port input in the falling direction. If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.

Values:

enumerator kACMP_OffsetLevel0: The comparator hard block output has level 0 offset internally.

enumerator kACMP_OffsetLevel1: The comparator hard block output has level 1 offset internally.

enum _acmp_hysteresis_mode

Comparator hard block hysteresis control.

See chip data sheet to get the actual hysteresis value with each level.

Values:

enumerator kACMP_HysteresisLevel0: Offset is level 0 and Hysteresis is level 0.

enumerator kACMP_HysteresisLevel1: Offset is level 0 and Hysteresis is level 1.

enumerator kACMP_HysteresisLevel2: Offset is level 0 and Hysteresis is level 2.

enumerator kACMP_HysteresisLevel3: Offset is level 0 and Hysteresis is level 3.

enum _acmp_reference_voltage_source

CMP Voltage Reference source.

Values:

enumerator kACMP_VrefSourceVin1: Vin1 is selected as resistor ladder network supply reference Vin.

enumerator kACMP_VrefSourceVin2: Vin2 is selected as resistor ladder network supply reference Vin.

enum _acmp_port_input

Port input source.

Values:

enumerator kACMP_PortInputFromDAC: Port input from the 8-bit DAC output.

enumerator kACMP_PortInputFromMux: Port input from the analog 8-1 mux.

enum _acmp_fixed_port

Fixed mux port.

Values:

enumerator kACMP_FixedPlusPort: Only the inputs to the Minus port are swept in each round.

enumerator kACMP_FixedMinusPort: Only the inputs to the Plus port are swept in each round.

enum _acmp_dac_work_mode

Internal DAC’s work mode.

Values:

enumerator kACMP_DACWorkLowSpeedMode: DAC is selected to work in low speed and low power mode.

enumerator kACMP_DACWorkHighSpeedMode: DAC is selected to work in high speed high power mode.

typedef enum _acmp_offset_mode acmp_offset_mode_t

Comparator hard block offset control.

If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port input in the positive direction (or negative port input crossing positive port input in the negative direction). Hysteresis still exists for positive port input crossing negative port input in the falling direction. If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.

typedef enum _acmp_hysteresis_mode acmp_hysteresis_mode_t

Comparator hard block hysteresis control.

See chip data sheet to get the actual hysteresis value with each level.

typedef enum _acmp_reference_voltage_source acmp_reference_voltage_source_t: CMP Voltage Reference source.

typedef enum _acmp_port_input acmp_port_input_t: Port input source.

typedef enum _acmp_fixed_port acmp_fixed_port_t: Fixed mux port.

typedef enum _acmp_dac_work_mode acmp_dac_work_mode_t: Internal DAC’s work mode.

typedef struct _acmp_config acmp_config_t: Configuration for ACMP.

typedef struct _acmp_channel_config acmp_channel_config_t

Configuration for channel.

The comparator’s port can be input from channel mux or DAC. If port input is from channel mux, detailed channel number for the mux should be configured.

typedef struct _acmp_filter_config acmp_filter_config_t: Configuration for filter.

typedef struct _acmp_dac_config acmp_dac_config_t: Configuration for DAC.

typedef struct _acmp_round_robin_config acmp_round_robin_config_t: Configuration for round robin mode.

typedef struct _acmp_discrete_mode_config acmp_discrete_mode_config_t: Configuration for discrete mode.

CMP_C0_CFx_MASK: The mask of status flags cleared by writing 1.

CMP_C1_CHNn_MASK

CMP_C2_CHnF_MASK

struct _acmp_config

#include <fsl_acmp.h>

Configuration for ACMP.

Public Members

acmp_offset_mode_t offsetMode: Offset mode.

acmp_hysteresis_mode_t hysteresisMode: Hysteresis mode.

bool enableHighSpeed: Enable High Speed (HS) comparison mode.

bool enableInvertOutput: Enable inverted comparator output.

bool useUnfilteredOutput: Set compare output(COUT) to equal COUTA(true) or COUT(false).

bool enablePinOut: The comparator output is available on the associated pin.

struct _acmp_channel_config

#include <fsl_acmp.h>

Configuration for channel.

The comparator’s port can be input from channel mux or DAC. If port input is from channel mux, detailed channel number for the mux should be configured.

Public Members

acmp_port_input_t positivePortInput: Input source of the comparator’s positive port.

uint32_t plusMuxInput: Plus mux input channel(0~7).

acmp_port_input_t negativePortInput: Input source of the comparator’s negative port.

uint32_t minusMuxInput: Minus mux input channel(0~7).

struct _acmp_filter_config

#include <fsl_acmp.h>

Configuration for filter.

Public Members

bool enableSample: Using external SAMPLE as sampling clock input, or using divided bus clock.

uint32_t filterCount: Filter Sample Count. Available range is 1-7, 0 would cause the filter disabled.

uint32_t filterPeriod: Filter Sample Period. The divider to bus clock. Available range is 0-255.

struct _acmp_dac_config

#include <fsl_acmp.h>

Configuration for DAC.

Public Members

acmp_reference_voltage_source_t referenceVoltageSource: Supply voltage reference source.

uint32_t DACValue: Value for DAC Output Voltage. Available range is 0-255.

bool enableOutput: Enable the DAC output.

struct _acmp_round_robin_config

#include <fsl_acmp.h>

Configuration for round robin mode.

Public Members

acmp_fixed_port_t fixedPort: Fixed mux port.

uint32_t fixedChannelNumber: Indicates which channel is fixed in the fixed mux port.

uint32_t checkerChannelMask: Mask of checker channel index. Available range is channel0:0x01 to channel7:0x80 for round-robin checker.

uint32_t sampleClockCount: Specifies how many round-robin clock cycles(0~3) later the sample takes place.

uint32_t delayModulus: Comparator and DAC initialization delay modulus.

struct _acmp_discrete_mode_config

#include <fsl_acmp.h>

Configuration for discrete mode.

Public Members

bool enablePositiveChannelDiscreteMode: Positive Channel Continuous Mode Enable. By default, the continuous mode is used.

bool enableNegativeChannelDiscreteMode: Negative Channel Continuous Mode Enable. By default, the continuous mode is used.

CACHE: CACHE Memory Controller

uint32_t CACHE64_GetInstance(CACHE64_POLSEL_Type *base)

Returns an instance number given peripheral base address.

Parameters:

base – The peripheral base address.

Returns:

CACHE64_POLSEL instance number starting from 0.

uint32_t CACHE64_GetInstanceByAddr(uint32_t address)

brief Returns an instance number given physical memory address.

param address The physical memory address.

Returns:: CACHE64_CTRL instance number starting from 0.

status_t CACHE64_Init(CACHE64_POLSEL_Type *base, const cache64_config_t *config)

Initializes an CACHE64 instance with the user configuration structure.

This function configures the CACHE64 module with user-defined settings. Call the CACHE64_GetDefaultConfig() function to configure the configuration structure and get the default configuration.

Parameters:

base – CACHE64_POLSEL peripheral base address.
config – Pointer to a user-defined configuration structure.

Return values:

kStatus_Success – CACHE64 initialize succeed

void CACHE64_GetDefaultConfig(cache64_config_t *config)

Gets the default configuration structure.

This function initializes the CACHE64 configuration structure to a default value. The default values are first region covers whole cacheable area, and policy set to write back.

Parameters:

config – Pointer to a configuration structure.

void CACHE64_EnableCache(CACHE64_CTRL_Type *base)

Enables the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_DisableCache(CACHE64_CTRL_Type *base)

Disables the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_InvalidateCache(CACHE64_CTRL_Type *base)

Invalidates the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_InvalidateCacheByRange(uint32_t address, uint32_t size_byte)

Invalidates cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be invalidated, should be larger than 0.

void CACHE64_CleanCache(CACHE64_CTRL_Type *base)

Cleans the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_CleanCacheByRange(uint32_t address, uint32_t size_byte)

Cleans cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be cleaned, should be larger than 0.

void CACHE64_CleanInvalidateCache(CACHE64_CTRL_Type *base)

Cleans and invalidates the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_CleanInvalidateCacheByRange(uint32_t address, uint32_t size_byte)

Cleans and invalidate cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be Cleaned and Invalidated, should be larger than 0.

void CACHE64_EnableWriteBuffer(CACHE64_CTRL_Type *base, bool enable)

Enables/disables the write buffer.

Parameters:

base – CACHE64_CTRL peripheral base address.
enable – The enable or disable flag. true - enable the write buffer. false - disable the write buffer.

static inline void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates instruction cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated, should be larger than 0.

static inline void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated, should be larger than 0.

static inline void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte)

Clean data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be cleaned, should be larger than 0.

static inline void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte)

Cleans and Invalidates data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be Cleaned and Invalidated, should be larger than 0.

FSL_CACHE_DRIVER_VERSION: cache driver version.

enum _cache64_policy

Level 2 cache controller way size.

Values:

enumerator kCACHE64_PolicyNonCacheable: Non-cacheable

enumerator kCACHE64_PolicyWriteThrough: Write through

enumerator kCACHE64_PolicyWriteBack: Write back

typedef enum _cache64_policy cache64_policy_t: Level 2 cache controller way size.

typedef struct _cache64_config cache64_config_t: CACHE64 configuration structure.

CACHE64_LINESIZE_BYTE: cache line size.

CACHE64_REGION_NUM: cache region number.

CACHE64_REGION_ALIGNMENT: cache region alignment.

struct _cache64_config

#include <fsl_cache.h>

CACHE64 configuration structure.

Public Members

uint32_t boundaryAddr[(3U) - 1]: < The cache controller can divide whole memory into 3 regions. Boundary address is the FlexSPI internal address (start from 0) instead of system address (start from FlexSPI AMBA base) to split adjacent regions and must be 1KB aligned. The boundary address itself locates in upper region. Cacheable policy for each region.

casper_driver

FSL_CASPER_DRIVER_VERSION

CASPER driver version. Version 2.2.4.

Current version: 2.2.4

Change log:

Version 2.0.0
- Initial version
Version 2.0.1
- Bug fix KPSDK-24531 double_scalar_multiplication() result may be all zeroes for some specific input
Version 2.0.2
- Bug fix KPSDK-25015 CASPER_MEMCPY hard-fault on LPC55xx when both source and destination buffers are outside of CASPER_RAM
Version 2.0.3
- Bug fix KPSDK-28107 RSUB, FILL and ZERO operations not implemented in enum _casper_operation.
Version 2.0.4
- For GCC compiler, enforce O1 optimize level, specifically to remove strict-aliasing option. This driver is very specific and requires -fno-strict-aliasing.
Version 2.0.5
- Fix sign-compare warning.
Version 2.0.6
- Fix IAR Pa082 warning.
Version 2.0.7
- Fix MISRA-C 2012 issue.
Version 2.0.8
- Add feature macro for CASPER_RAM_OFFSET.
Version 2.0.9
- Remove unused function Jac_oncurve().
- Fix ECC384 build.
Version 2.0.10
- Fix MISRA-C 2012 issue.
Version 2.1.0
- Add ECC NIST P-521 elliptic curve.
Version 2.2.0
- Rework driver to support multiple curves at once.
Version 2.2.1
- Fix MISRA-C 2012 issue.
Version 2.2.2
- Enable hardware interleaving to RAMX0 and RAMX1 for CASPER by feature macro FSL_FEATURE_CASPER_RAM_HW_INTERLEAVE
Version 2.2.3
- Added macro into CASPER_Init and CASPER_Deinit to support devices without clock and reset control.
Version 2.2.4
- Fix MISRA-C 2012 issue.

enum _casper_operation

CASPER operation.

Values:

enumerator kCASPER_OpMul6464NoSum

enumerator kCASPER_OpMul6464Sum: Walking 1 or more of J loop, doing r=a*b using 64x64=128

enumerator kCASPER_OpMul6464FullSum: Walking 1 or more of J loop, doing c,r=r+a*b using 64x64=128, but assume inner j loop

enumerator kCASPER_OpMul6464Reduce: Walking 1 or more of J loop, doing c,r=r+a*b using 64x64=128, but sum all of w.

enumerator kCASPER_OpAdd64: Walking 1 or more of J loop, doing c,r[-1]=r+a*b using 64x64=128, but skip 1st write

enumerator kCASPER_OpSub64: Walking add with off_AB, and in/out off_RES doing c,r=r+a+c using 64+64=65

enumerator kCASPER_OpDouble64: Walking subtract with off_AB, and in/out off_RES doing r=r-a using 64-64=64, with last borrow implicit if any

enumerator kCASPER_OpXor64: Walking add to self with off_RES doing c,r=r+r+c using 64+64=65

enumerator kCASPER_OpRSub64: Walking XOR with off_AB, and in/out off_RES doing r=r^a using 64^64=64

enumerator kCASPER_OpShiftLeft32: Walking subtract with off_AB, and in/out off_RES using r=a-r

enumerator kCASPER_OpShiftRight32: Walking shift left doing r1,r=(b*D)|r1, where D is 2^amt and is loaded by app (off_CD not used)

enumerator kCASPER_OpCopy: Walking shift right doing r,r1=(b*D)|r1, where D is 2^(32-amt) and is loaded by app (off_CD not used) and off_RES starts at MSW

enumerator kCASPER_OpRemask: Copy from ABoff to resoff, 64b at a time

enumerator kCASPER_OpFill: Copy and mask from ABoff to resoff, 64b at a time

enumerator kCASPER_OpZero: Fill RESOFF using 64 bits at a time with value in A and B

enumerator kCASPER_OpCompare: Fill RESOFF using 64 bits at a time of 0s

enumerator kCASPER_OpCompareFast: Compare two arrays, running all the way to the end

enum _casper_algo_t

Algorithm used for CASPER operation.

Values:

enumerator kCASPER_ECC_P256: ECC_P256

enumerator kCASPER_ECC_P384: ECC_P384

enumerator kCASPER_ECC_P521: ECC_P521

Values:

enumerator kCASPER_RamOffset_Result

enumerator kCASPER_RamOffset_Base

enumerator kCASPER_RamOffset_TempBase

enumerator kCASPER_RamOffset_Modulus

enumerator kCASPER_RamOffset_M64

typedef enum _casper_operation casper_operation_t: CASPER operation.

typedef enum _casper_algo_t casper_algo_t: Algorithm used for CASPER operation.

void CASPER_Init(CASPER_Type *base)

Enables clock and disables reset for CASPER peripheral.

Enable clock and disable reset for CASPER.

Parameters:

base – CASPER base address

void CASPER_Deinit(CASPER_Type *base)

Disables clock for CASPER peripheral.

Disable clock and enable reset.

Parameters:

base – CASPER base address

CASPER_CP

CASPER_CP_CTRL0

CASPER_CP_CTRL1

CASPER_CP_LOADER

CASPER_CP_STATUS

CASPER_CP_INTENSET

CASPER_CP_INTENCLR

CASPER_CP_INTSTAT

CASPER_CP_AREG

CASPER_CP_BREG

CASPER_CP_CREG

CASPER_CP_DREG

CASPER_CP_RES0

CASPER_CP_RES1

CASPER_CP_RES2

CASPER_CP_RES3

CASPER_CP_MASK

CASPER_CP_REMASK

CASPER_CP_LOCK

CASPER_CP_ID

CASPER_Wr32b(value, off)

CASPER_Wr64b(value, off)

CASPER_Rd32b(off)

N_wordlen_max

casper_driver_pkha

void CASPER_ModExp(CASPER_Type *base, const uint8_t *signature, const uint8_t *pubN, size_t wordLen, uint32_t pubE, uint8_t *plaintext)

Performs modular exponentiation - (A^E) mod N.

This function performs modular exponentiation.

Parameters:

base – CASPER base address
signature – first addend (in little endian format)
pubN – modulus (in little endian format)
wordLen – Size of pubN in bytes
pubE – exponent
plaintext – [out] Output array to store result of operation (in little endian format)

void CASPER_ecc_init(casper_algo_t curve)

Initialize prime modulus mod in Casper memory .

Set the prime modulus mod in Casper memory and set N_wordlen according to selected algorithm.

Parameters:

curve – elliptic curve algoritm

void CASPER_ECC_SECP256R1_Mul(CASPER_Type *base, uint32_t resX[8], uint32_t resY[8], uint32_t X[8], uint32_t Y[8], uint32_t scalar[8])

Performs ECC secp256r1 point single scalar multiplication.

This function performs ECC secp256r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP256R1_MulAdd(CASPER_Type *base, uint32_t resX[8], uint32_t resY[8], uint32_t X1[8], uint32_t Y1[8], uint32_t scalar1[8], uint32_t X2[8], uint32_t Y2[8], uint32_t scalar2[8])

Performs ECC secp256r1 point double scalar multiplication.

This function performs ECC secp256r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_SECP384R1_Mul(CASPER_Type *base, uint32_t resX[12], uint32_t resY[12], uint32_t X[12], uint32_t Y[12], uint32_t scalar[12])

Performs ECC secp384r1 point single scalar multiplication.

This function performs ECC secp384r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP384R1_MulAdd(CASPER_Type *base, uint32_t resX[12], uint32_t resY[12], uint32_t X1[12], uint32_t Y1[12], uint32_t scalar1[12], uint32_t X2[12], uint32_t Y2[12], uint32_t scalar2[12])

Performs ECC secp384r1 point double scalar multiplication.

This function performs ECC secp384r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_SECP521R1_Mul(CASPER_Type *base, uint32_t resX[18], uint32_t resY[18], uint32_t X[18], uint32_t Y[18], uint32_t scalar[18])

Performs ECC secp521r1 point single scalar multiplication.

This function performs ECC secp521r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP521R1_MulAdd(CASPER_Type *base, uint32_t resX[18], uint32_t resY[18], uint32_t X1[18], uint32_t Y1[18], uint32_t scalar1[18], uint32_t X2[18], uint32_t Y2[18], uint32_t scalar2[18])

Performs ECC secp521r1 point double scalar multiplication.

This function performs ECC secp521r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_equal(int *res, uint32_t *op1, uint32_t *op2)

void CASPER_ECC_equal_to_zero(int *res, uint32_t *op1)

Clock Driver

enum _clock_ip_name

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

Values:

enumerator kCLOCK_IpInvalid: Invalid Ip Name.

enumerator kCLOCK_Dsp: Clock gate name: Dsp

enumerator kCLOCK_RomCtrlr: Clock gate name: RomCtrlr

enumerator kCLOCK_AxiSwitch: Clock gate name: AxiSwitch

enumerator kCLOCK_AxiCtrl: Clock gate name: AxiCtrl

enumerator kCLOCK_PowerQuad: Clock gate name: PowerQuad

enumerator kCLOCK_Casper: Clock gate name: Casper

enumerator kCLOCK_HashCrypt: Clock gate name: HashCrypt

enumerator kCLOCK_Puf: Clock gate name: Puf

enumerator kCLOCK_Rng: Clock gate name: Rng

enumerator kCLOCK_Flexspi0: Clock gate name: Flexspi0

enumerator kCLOCK_OtpCtrl: Clock gate name: OtpCtrl

enumerator kCLOCK_Flexspi1: Clock gate name: Flexspi1

enumerator kCLOCK_UsbhsPhy: Clock gate name: UsbhsPhy

enumerator kCLOCK_UsbhsDevice: Clock gate name: UsbhsDevice

enumerator kCLOCK_UsbhsHost: Clock gate name: UsbhsHost

enumerator kCLOCK_UsbhsSram: Clock gate name: UsbhsSram

enumerator kCLOCK_Sct: Clock gate name: Sct

enumerator kCLOCK_Gpu: Clock gate name: Gpu

enumerator kCLOCK_DisplayCtrl: Clock gate name: DisplayCtrl

enumerator kCLOCK_MipiDsiCtrl: Clock gate name: MipiDsiCtrl

enumerator kCLOCK_Smartdma: Clock gate name: Smartdma

enumerator kCLOCK_Sdio0: Clock gate name: Sdio0

enumerator kCLOCK_Sdio1: Clock gate name: Sdio1

enumerator kCLOCK_Acmp0: Clock gate name: Acmp0

enumerator kCLOCK_Adc0: Clock gate name: Adc0

enumerator kCLOCK_ShsGpio0: Clock gate name: ShsGpio0

enumerator kCLOCK_Utick0: Clock gate name: Utick0

enumerator kCLOCK_Wwdt0: Clock gate name: Wwdt0

enumerator kCLOCK_Pmc: Clock gate name: Pmc

enumerator kCLOCK_Flexcomm0: Clock gate name: Flexcomm0

enumerator kCLOCK_Flexcomm1: Clock gate name: Flexcomm1

enumerator kCLOCK_Flexcomm2: Clock gate name: Flexcomm2

enumerator kCLOCK_Flexcomm3: Clock gate name: Flexcomm3

enumerator kCLOCK_Flexcomm4: Clock gate name: Flexcomm4

enumerator kCLOCK_Flexcomm5: Clock gate name: Flexcomm5

enumerator kCLOCK_Flexcomm6: Clock gate name: Flexcomm6

enumerator kCLOCK_Flexcomm7: Clock gate name: Flexcomm7

enumerator kCLOCK_Flexcomm8: Clock gate name: Flexcomm8

enumerator kCLOCK_Flexcomm9: Clock gate name: Flexcomm9

enumerator kCLOCK_Flexcomm10: Clock gate name: Flexcomm10

enumerator kCLOCK_Flexcomm11: Clock gate name: Flexcomm11

enumerator kCLOCK_Flexcomm12: Clock gate name: Flexcomm12

enumerator kCLOCK_Flexcomm13: Clock gate name: Flexcomm13

enumerator kCLOCK_Flexcomm14: Clock gate name: Flexcomm14

enumerator kCLOCK_Flexcomm15: Clock gate name: Flexcomm15

enumerator kCLOCK_Flexcomm16: Clock gate name: Flexcomm16

enumerator kCLOCK_Usart0: Clock gate name: Usart0

enumerator kCLOCK_Usart1: Clock gate name: Usart1

enumerator kCLOCK_Usart2: Clock gate name: Usart2

enumerator kCLOCK_Usart3: Clock gate name: Usart3

enumerator kCLOCK_Usart4: Clock gate name: Usart4

enumerator kCLOCK_Usart5: Clock gate name: Usart5

enumerator kCLOCK_Usart6: Clock gate name: Usart6

enumerator kCLOCK_Usart7: Clock gate name: Usart7

enumerator kCLOCK_Usart8: Clock gate name: Usart8

enumerator kCLOCK_Usart9: Clock gate name: Usart9

enumerator kCLOCK_Usart10: Clock gate name: Usart10

enumerator kCLOCK_Usart11: Clock gate name: Usart11

enumerator kCLOCK_Usart12: Clock gate name: Usart12

enumerator kCLOCK_Usart13: Clock gate name: Usart13

enumerator kCLOCK_I2s0: Clock gate name: I2s0

enumerator kCLOCK_I2s1: Clock gate name: I2s1

enumerator kCLOCK_I2s2: Clock gate name: I2s2

enumerator kCLOCK_I2s3: Clock gate name: I2s3

enumerator kCLOCK_I2s4: Clock gate name: I2s4

enumerator kCLOCK_I2s5: Clock gate name: I2s5

enumerator kCLOCK_I2s6: Clock gate name: I2s6

enumerator kCLOCK_I2s7: Clock gate name: I2s7

enumerator kCLOCK_I2s8: Clock gate name: I2s8

enumerator kCLOCK_I2s9: Clock gate name: I2s9

enumerator kCLOCK_I2s10: Clock gate name: I2s10

enumerator kCLOCK_I2s11: Clock gate name: I2s11

enumerator kCLOCK_I2s12: Clock gate name: I2s12

enumerator kCLOCK_I2s13: Clock gate name: I2s13

enumerator kCLOCK_I2c0: Clock gate name: I2c0

enumerator kCLOCK_I2c1: Clock gate name: I2c1

enumerator kCLOCK_I2c2: Clock gate name: I2c2

enumerator kCLOCK_I2c3: Clock gate name: I2c3

enumerator kCLOCK_I2c4: Clock gate name: I2c4

enumerator kCLOCK_I2c5: Clock gate name: I2c5

enumerator kCLOCK_I2c6: Clock gate name: I2c6

enumerator kCLOCK_I2c7: Clock gate name: I2c7

enumerator kCLOCK_I2c8: Clock gate name: I2c8

enumerator kCLOCK_I2c9: Clock gate name: I2c9

enumerator kCLOCK_I2c10: Clock gate name: I2c10

enumerator kCLOCK_I2c11: Clock gate name: I2c11

enumerator kCLOCK_I2c12: Clock gate name: I2c12

enumerator kCLOCK_I2c13: Clock gate name: I2c13

enumerator kCLOCK_I2c15: Clock gate name: I2c15

enumerator kCLOCK_Spi0: Clock gate name: Spi0

enumerator kCLOCK_Spi1: Clock gate name: Spi1

enumerator kCLOCK_Spi2: Clock gate name: Spi2

enumerator kCLOCK_Spi3: Clock gate name: Spi3

enumerator kCLOCK_Spi4: Clock gate name: Spi4

enumerator kCLOCK_Spi5: Clock gate name: Spi5

enumerator kCLOCK_Spi6: Clock gate name: Spi6

enumerator kCLOCK_Spi7: Clock gate name: Spi7

enumerator kCLOCK_Spi8: Clock gate name: Spi8

enumerator kCLOCK_Spi9: Clock gate name: Spi9

enumerator kCLOCK_Spi10: Clock gate name: Spi10

enumerator kCLOCK_Spi11: Clock gate name: Spi11

enumerator kCLOCK_Spi12: Clock gate name: Spi12

enumerator kCLOCK_Spi13: Clock gate name: Spi13

enumerator kCLOCK_Spi14: Clock gate name: Spi14

enumerator kCLOCK_Spi16: Clock gate name: Spi16

enumerator kCLOCK_Dmic0: Clock gate name: Dmic0

enumerator kCLOCK_OsEventTimer: Clock gate name: OsEventTimer

enumerator kCLOCK_Flexio: Clock gate name: Flexio

enumerator kCLOCK_HsGpio0: Clock gate name: HsGpio0

enumerator kCLOCK_HsGpio1: Clock gate name: HsGpio1

enumerator kCLOCK_HsGpio2: Clock gate name: HsGpio2

enumerator kCLOCK_HsGpio3: Clock gate name: HsGpio3

enumerator kCLOCK_HsGpio4: Clock gate name: HsGpio4

enumerator kCLOCK_HsGpio5: Clock gate name: HsGpio5

enumerator kCLOCK_HsGpio6: Clock gate name: HsGpio6

enumerator kCLOCK_HsGpio7: Clock gate name: HsGpio7

enumerator kCLOCK_Crc: Clock gate name: Crc

enumerator kCLOCK_Dmac0: Clock gate name: Dmac0

enumerator kCLOCK_Dmac1: Clock gate name: Dmac1

enumerator kCLOCK_Mu: Clock gate name: Mu

enumerator kCLOCK_Sema: Clock gate name: Sema

enumerator kCLOCK_Freqme: Clock gate name: Freqme

enumerator kCLOCK_Ct32b0: Clock gate name: Ct32b0

enumerator kCLOCK_Ct32b1: Clock gate name: Ct32b1

enumerator kCLOCK_Ct32b2: Clock gate name: Ct32b2

enumerator kCLOCK_Ct32b3: Clock gate name: Ct32b3

enumerator kCLOCK_Ct32b4: Clock gate name: Ct32b4

enumerator kCLOCK_Rtc: Clock gate name: Rtc

enumerator kCLOCK_Mrt0: Clock gate name: Mrt0

enumerator kCLOCK_Wwdt1: Clock gate name: Wwdt1

enumerator kCLOCK_I3c0: Clock gate name: I3c0

enumerator kCLOCK_I3c1: Clock gate name: I3c1

enumerator kCLOCK_Pint: Clock gate name: Pint

enumerator kCLOCK_InputMux: Clock gate name: InputMux.

enum _clock_name

Clock name used to get clock frequency.

Values:

enumerator kCLOCK_CoreSysClk: Core clock (aka HCLK)

enumerator kCLOCK_BusClk: Bus clock (AHB/APB clock, aka HCLK)

enumerator kCLOCK_MclkClk: MCLK, to MCLK pin

enumerator kCLOCK_ClockOutClk: CLOCKOUT

enumerator kCLOCK_AdcClk: ADC

enumerator kCLOCK_Flexspi0Clk: FlexSpi0

enumerator kCLOCK_Flexspi1Clk: FlexSpi1

enumerator kCLOCK_SctClk: SCT

enumerator kCLOCK_Wdt0Clk: Watchdog0

enumerator kCLOCK_Wdt1Clk: Watchdog1

enumerator kCLOCK_SystickClk: Systick

enumerator kCLOCK_Sdio0Clk: SDIO0

enumerator kCLOCK_Sdio1Clk: SDIO1

enumerator kCLOCK_I3cClk: I3C0 and I3C1

enumerator kCLOCK_UsbClk: USB0

enumerator kCLOCK_DmicClk: Digital Mic clock

enumerator kCLOCK_DspCpuClk: DSP clock

enumerator kCLOCK_AcmpClk: Acmp clock

enumerator kCLOCK_Flexcomm0Clk: Flexcomm0Clock

enumerator kCLOCK_Flexcomm1Clk: Flexcomm1Clock

enumerator kCLOCK_Flexcomm2Clk: Flexcomm2Clock

enumerator kCLOCK_Flexcomm3Clk: Flexcomm3Clock

enumerator kCLOCK_Flexcomm4Clk: Flexcomm4Clock

enumerator kCLOCK_Flexcomm5Clk: Flexcomm5Clock

enumerator kCLOCK_Flexcomm6Clk: Flexcomm6Clock

enumerator kCLOCK_Flexcomm7Clk: Flexcomm7Clock

enumerator kCLOCK_Flexcomm8Clk: Flexcomm8Clock

enumerator kCLOCK_Flexcomm9Clk: Flexcomm9Clock

enumerator kCLOCK_Flexcomm10Clk: Flexcomm10Clock

enumerator kCLOCK_Flexcomm11Clk: Flexcomm11Clock

enumerator kCLOCK_Flexcomm12Clk: Flexcomm12Clock

enumerator kCLOCK_Flexcomm13Clk: Flexcomm13Clock

enumerator kCLOCK_Flexcomm14Clk: Flexcomm14Clock

enumerator kCLOCK_Flexcomm15Clk: Flexcomm15Clock

enumerator kCLOCK_Flexcomm16Clk: Flexcomm16Clock

enumerator kCLOCK_FlexioClk: FlexIO

enumerator kCLOCK_GpuClk: GPU Core

enumerator kCLOCK_DcPixelClk: DCNano Pixel Clock

enumerator kCLOCK_MipiDphyClk: MIPI D-PHY Bit Clock

enumerator kCLOCK_MipiDphyEscRxClk: MIPI D-PHY RX Clock

enumerator kCLOCK_MipiDphyEscTxClk: MIPI D-PHY TX Clock

enum _clock_pfd

PLL PFD clock name.

Values:

enumerator kCLOCK_Pfd0: PLL PFD0

enumerator kCLOCK_Pfd1: PLL PFD1

enumerator kCLOCK_Pfd2: PLL PFD2

enumerator kCLOCK_Pfd3: PLL PFD3

enum _clock_attach_id

The enumerator of clock attach Id.

Values:

enumerator kFRO_DIV8_to_SYS_PLL: Attach FRO_DIV8 to SYS_PLL.

enumerator kOSC_CLK_to_SYS_PLL: Attach OSC_CLK to SYS_PLL.

enumerator kNONE_to_SYS_PLL: Attach NONE to SYS_PLL.

enumerator kFRO_DIV8_to_AUDIO_PLL: Attach FRO_DIV8 to AUDIO_PLL.

enumerator kOSC_CLK_to_AUDIO_PLL: Attach OSC_CLK to AUDIO_PLL.

enumerator kNONE_to_AUDIO_PLL: Attach NONE to AUDIO_PLL.

enumerator kLPOSC_to_MAIN_CLK: Attach LPOSC to MAIN_CLK.

enumerator kFRO_DIV2_to_MAIN_CLK: Attach Fro_DIV2 to MAIN_CLK.

enumerator kFRO_DIV4_to_MAIN_CLK: Attach Fro_DIV4 to MAIN_CLK.

enumerator kFRO_DIV8_to_MAIN_CLK: Attach Fro_DIV8 to MAIN_CLK.

enumerator kFRO_DIV16_to_MAIN_CLK: Attach Fro_DIV16 to MAIN_CLK.

enumerator kOSC_CLK_to_MAIN_CLK: Attach OSC_CLK to MAIN_CLK.

enumerator kFRO_DIV1_to_MAIN_CLK: Attach FRO_DIV1 to MAIN_CLK.

enumerator kMAIN_PLL_to_MAIN_CLK: Attach MAIN_PLL to MAIN_CLK.

enumerator kOSC32K_to_MAIN_CLK: Attach OSC32K to MAIN_CLK.

enumerator kFRO_DIV1_to_DSP_MAIN_CLK: Attach Fro_DIV1 to DSP_MAIN_CLK.

enumerator kOSC_CLK_to_DSP_MAIN_CLK: Attach OSC_CLK to DSP_MAIN_CLK.

enumerator kLPOSC_to_DSP_MAIN_CLK: Attach LPOSC to DSP_MAIN_CLK.

enumerator kMAIN_PLL_to_DSP_MAIN_CLK: Attach MAIN_PLL to DSP_MAIN_CLK.

enumerator kDSP_PLL_to_DSP_MAIN_CLK: Attach DSP_PLL to DSP_MAIN_CLK.

enumerator kOSC32K_to_DSP_MAIN_CLK: Attach OSC32K to DSP_MAIN_CLK.

enumerator kLPOSC_to_UTICK_CLK: Attach LPOSC to UTICK_CLK.

enumerator kNONE_to_UTICK_CLK: Attach NONE to UTICK_CLK.

enumerator kLPOSC_to_WDT0_CLK: Attach LPOSC to WDT0_CLK.

enumerator kNONE_to_WDT0_CLK: Attach NONE to WDT0_CLK.

enumerator kLPOSC_to_WDT1_CLK: Attach LPOSC to WDT1_CLK.

enumerator kNONE_to_WDT1_CLK: Attach NONE to WDT1_CLK.

enumerator kOSC32K_to_32KHZWAKE_CLK: Attach OSC32K to 32KHZWAKE_CLK.

enumerator kLPOSC_DIV32_to_32KHZWAKE_CLK: Attach LPOSC_DIV32 to 32KHZWAKE_CLK.

enumerator kNONE_to_32KHZWAKE_CLK: Attach NONE to 32KHZWAKE_CLK.

enumerator kMAIN_CLK_DIV_to_SYSTICK_CLK: Attach MAIN_CLK_DIV to SYSTICK_CLK.

enumerator kLPOSC_to_SYSTICK_CLK: Attach LPOSC to SYSTICK_CLK.

enumerator kOSC32K_to_SYSTICK_CLK: Attach OSC32K to SYSTICK_CLK.

enumerator kNONE_to_SYSTICK_CLK: Attach NONE to SYSTICK_CLK.

enumerator kMAIN_CLK_to_SDIO0_CLK: Attach MAIN_CLK to SDIO0_CLK.

enumerator kMAIN_PLL_to_SDIO0_CLK: Attach MAIN_PLL to SDIO0_CLK.

enumerator kAUX0_PLL_to_SDIO0_CLK: Attach AUX0_PLL to SDIO0_CLK.

enumerator kFRO_DIV2_to_SDIO0_CLK: Attach FRO_DIV2 to SDIO0_CLK.

enumerator kAUX1_PLL_to_SDIO0_CLK: Attach AUX1_PLL to SDIO0_CLK.

enumerator kNONE_to_SDIO0_CLK: Attach NONE to SDIO0_CLK.

enumerator kMAIN_CLK_to_SDIO1_CLK: Attach MAIN_CLK to SDIO1_CLK.

enumerator kMAIN_PLL_to_SDIO1_CLK: Attach MAIN_PLL to SDIO1_CLK.

enumerator kAUX0_PLL_to_SDIO1_CLK: Attach AUX0_PLL to SDIO1_CLK.

enumerator kFRO_DIV2_to_SDIO1_CLK: Attach FRO_DIV2 to SDIO1_CLK.

enumerator kAUX1_PLL_to_SDIO1_CLK: Attach AUX1_PLL to SDIO1_CLK.

enumerator kNONE_to_SDIO1_CLK: Attach NONE to SDIO1_CLK.

enumerator kMAIN_CLK_to_CTIMER0: Attach MAIN_CLK to CTIMER0.

enumerator kFRO_DIV1_to_CTIMER0: Attach FRO_DIV1 to CTIMER0.

enumerator kAUDIO_PLL_to_CTIMER0: Attach AUDIO_PLL to CTIMER0.

enumerator kMASTER_CLK_to_CTIMER0: Attach MASTER_CLK to CTIMER0.

enumerator k32K_WAKE_CLK_to_CTIMER0: Attach 32K_WAKE_CLK to CTIMER0.

enumerator kNONE_to_CTIMER0: Attach NONE to CTIMER0.

enumerator kMAIN_CLK_to_CTIMER1: Attach MAIN_CLK to CTIMER1.

enumerator kFRO_DIV1_to_CTIMER1: Attach FRO_DIV1 to CTIMER1.

enumerator kAUDIO_PLL_to_CTIMER1: Attach AUDIO_PLL to CTIMER1.

enumerator kMASTER_CLK_to_CTIMER1: Attach MASTER_CLK to CTIMER1.

enumerator k32K_WAKE_CLK_to_CTIMER1: Attach 32K_WAKE_CLK to CTIMER1.

enumerator kNONE_to_CTIMER1: Attach NONE to CTIMER1.

enumerator kMAIN_CLK_to_CTIMER2: Attach MAIN_CLK to CTIMER2.

enumerator kFRO_DIV1_to_CTIMER2: Attach FRO_DIV1 to CTIMER2.

enumerator kAUDIO_PLL_to_CTIMER2: Attach AUDIO_PLL to CTIMER2.

enumerator kMASTER_CLK_to_CTIMER2: Attach MASTER_CLK to CTIMER2.

enumerator k32K_WAKE_CLK_to_CTIMER2: Attach 32K_WAKE_CLK to CTIMER2.

enumerator kNONE_to_CTIMER2: Attach NONE to CTIMER2.

enumerator kMAIN_CLK_to_CTIMER3: Attach MAIN_CLK to CTIMER3.

enumerator kFRO_DIV1_to_CTIMER3: Attach FRO_DIV1 to CTIMER3.

enumerator kAUDIO_PLL_to_CTIMER3: Attach AUDIO_PLL to CTIMER3.

enumerator kMASTER_CLK_to_CTIMER3: Attach MASTER_CLK to CTIMER3.

enumerator k32K_WAKE_CLK_to_CTIMER3: Attach 32K_WAKE_CLK to CTIMER3.

enumerator kNONE_to_CTIMER3: Attach NONE to CTIMER3.

enumerator kMAIN_CLK_to_CTIMER4: Attach MAIN_CLK to CTIMER4.

enumerator kFRO_DIV1_to_CTIMER4: Attach FRO_DIV1 to CTIMER4.

enumerator kAUDIO_PLL_to_CTIMER4: Attach AUDIO_PLL to CTIMER4.

enumerator kMASTER_CLK_to_CTIMER4: Attach MASTER_CLK to CTIMER4.

enumerator k32K_WAKE_CLK_to_CTIMER4: Attach 32K_WAKE_CLK to CTIMER4.

enumerator kNONE_to_CTIMER4: Attach NONE to CTIMER4.

enumerator kMAIN_CLK_to_FLEXSPI0_CLK: Attach MAIN_CLK to FLEXSPI0_CLK.

enumerator kMAIN_PLL_to_FLEXSPI0_CLK: Attach MAIN_PLL to FLEXSPI0_CLK.

enumerator kAUX0_PLL_to_FLEXSPI0_CLK: Attach AUX0_PLL to FLEXSPI0_CLK.

enumerator kFRO_DIV1_to_FLEXSPI0_CLK: Attach FRO_DIV1 to FLEXSPI0_CLK.

enumerator kAUX1_PLL_to_FLEXSPI0_CLK: Attach AUX1_PLL to FLEXSPI0_CLK.

enumerator kFRO_DIV4_to_FLEXSPI0_CLK: Attach FRO_DIV4 to FLEXSPI0_CLK.

enumerator kFRO_DIV8_to_FLEXSPI0_CLK: Attach FRO_DIV8 to FLEXSPI0_CLK.

enumerator kNONE_to_FLEXSPI0_CLK: Attach NONE to FLEXSPI0_CLK.

enumerator kMAIN_CLK_to_FLEXSPI1_CLK: Attach MAIN_CLK to FLEXSPI1_CLK.

enumerator kMAIN_PLL_to_FLEXSPI1_CLK: Attach MAIN_PLL to FLEXSPI1_CLK.

enumerator kAUX0_PLL_to_FLEXSPI1_CLK: Attach AUX0_PLL to FLEXSPI1_CLK.

enumerator kFRO_DIV1_to_FLEXSPI1_CLK: Attach FRO_DIV1 to FLEXSPI1_CLK.

enumerator kAUX1_PLL_to_FLEXSPI1_CLK: Attach AUX1_PLL to FLEXSPI1_CLK.

enumerator kNONE_to_FLEXSPI1_CLK: Attach NONE to FLEXSPI1_CLK.

enumerator kOSC_CLK_to_USB_CLK: Attach OSC_CLK to USB_CLK.

enumerator kMAIN_CLK_to_USB_CLK: Attach MAIN_CLK to USB_CLK.

enumerator kAUX0_PLL_to_USB_CLK: Attach AUX0_PLL to USB_CLK.

enumerator kNONE_to_USB_CLK: Attach NONE to USB_CLK.

enumerator kMAIN_CLK_to_SCT_CLK: Attach MAIN_CLK to SCT_CLK.

enumerator kMAIN_PLL_to_SCT_CLK: Attach MAIN_PLL to SCT_CLK.

enumerator kAUX0_PLL_to_SCT_CLK: Attach AUX0_PLL to SCT_CLK.

enumerator kFRO_DIV1_to_SCT_CLK: Attach FRO_DIV1 to SCT_CLK.

enumerator kAUX1_PLL_to_SCT_CLK: Attach AUX1_PLL to SCT_CLK.

enumerator kAUDIO_PLL_to_SCT_CLK: Attach AUDIO_PLL to SCT_CLK.

enumerator kNONE_to_SCT_CLK: Attach NONE to SCT_CLK.

enumerator kLPOSC_to_OSTIMER_CLK: Attach LPOSC to OSTIMER_CLK.

enumerator kOSC32K_to_OSTIMER_CLK: Attach OSC32K to OSTIMER_CLK.

enumerator kHCLK_to_OSTIMER_CLK: Attach HCLK to OSTIMER_CLK.

enumerator kNONE_to_OSTIMER_CLK: Attach NONE to OSTIMER_CLK.

enumerator kFRO_DIV8_to_MCLK_CLK: Attach FRO_DIV8 to MCLK_CLK.

enumerator kAUDIO_PLL_to_MCLK_CLK: Attach AUDIO_PLL to MCLK_CLK.

enumerator kNONE_to_MCLK_CLK: Attach NONE to MCLK_CLK.

enumerator kFRO_DIV4_to_DMIC: Attach FRO_DIV4 to DMIC.

enumerator kAUDIO_PLL_to_DMIC: Attach AUDIO_PLL to DMIC.

enumerator kMASTER_CLK_to_DMIC: Attach MASTER_CLK to DMIC.

enumerator kLPOSC_to_DMIC: Attach LPOSC to DMIC.

enumerator k32K_WAKE_CLK_to_DMIC: Attach 32K_WAKE_CLK to DMIC.

enumerator kNONE_to_DMIC: Attach NONE to DMIC.

enumerator kFRO_DIV4_to_FLEXCOMM0: Attach FRO_DIV4 to FLEXCOMM0.

enumerator kAUDIO_PLL_to_FLEXCOMM0: Attach AUDIO_PLL to FLEXCOMM0.

enumerator kMASTER_CLK_to_FLEXCOMM0: Attach MASTER_CLK to FLEXCOMM0.

enumerator kFRG_to_FLEXCOMM0: Attach FRG to FLEXCOMM0.

enumerator kNONE_to_FLEXCOMM0: Attach NONE to FLEXCOMM0.

enumerator kFRO_DIV4_to_FLEXCOMM1: Attach FRO_DIV4 to FLEXCOMM1.

enumerator kAUDIO_PLL_to_FLEXCOMM1: Attach AUDIO_PLL to FLEXCOMM1.

enumerator kMASTER_CLK_to_FLEXCOMM1: Attach MASTER_CLK to FLEXCOMM1.

enumerator kFRG_to_FLEXCOMM1: Attach FRG to FLEXCOMM1.

enumerator kNONE_to_FLEXCOMM1: Attach NONE to FLEXCOMM1.

enumerator kFRO_DIV4_to_FLEXCOMM2: Attach FRO_DIV4 to FLEXCOMM2.

enumerator kAUDIO_PLL_to_FLEXCOMM2: Attach AUDIO_PLL to FLEXCOMM2.

enumerator kMASTER_CLK_to_FLEXCOMM2: Attach MASTER_CLK to FLEXCOMM2.

enumerator kFRG_to_FLEXCOMM2: Attach FRG to FLEXCOMM2.

enumerator kNONE_to_FLEXCOMM2: Attach NONE to FLEXCOMM2.

enumerator kFRO_DIV4_to_FLEXCOMM3: Attach FRO_DIV4 to FLEXCOMM3.

enumerator kAUDIO_PLL_to_FLEXCOMM3: Attach AUDIO_PLL to FLEXCOMM3.

enumerator kMASTER_CLK_to_FLEXCOMM3: Attach MASTER_CLK to FLEXCOMM3.

enumerator kFRG_to_FLEXCOMM3: Attach FRG to FLEXCOMM3.

enumerator kNONE_to_FLEXCOMM3: Attach NONE to FLEXCOMM3.

enumerator kFRO_DIV4_to_FLEXCOMM4: Attach FRO_DIV4 to FLEXCOMM4.

enumerator kAUDIO_PLL_to_FLEXCOMM4: Attach AUDIO_PLL to FLEXCOMM4.

enumerator kMASTER_CLK_to_FLEXCOMM4: Attach MASTER_CLK to FLEXCOMM4.

enumerator kFRG_to_FLEXCOMM4: Attach FRG to FLEXCOMM4.

enumerator kNONE_to_FLEXCOMM4: Attach NONE to FLEXCOMM4.

enumerator kFRO_DIV4_to_FLEXCOMM5: Attach FRO_DIV4 to FLEXCOMM5.

enumerator kAUDIO_PLL_to_FLEXCOMM5: Attach AUDIO_PLL to FLEXCOMM5.

enumerator kMASTER_CLK_to_FLEXCOMM5: Attach MASTER_CLK to FLEXCOMM5.

enumerator kFRG_to_FLEXCOMM5: Attach FRG to FLEXCOMM5.

enumerator kNONE_to_FLEXCOMM5: Attach NONE to FLEXCOMM5.

enumerator kFRO_DIV4_to_FLEXCOMM6: Attach FRO_DIV4 to FLEXCOMM6.

enumerator kAUDIO_PLL_to_FLEXCOMM6: Attach AUDIO_PLL to FLEXCOMM6.

enumerator kMASTER_CLK_to_FLEXCOMM6: Attach MASTER_CLK to FLEXCOMM6.

enumerator kFRG_to_FLEXCOMM6: Attach FRG to FLEXCOMM6.

enumerator kNONE_to_FLEXCOMM6: Attach NONE to FLEXCOMM6.

enumerator kFRO_DIV4_to_FLEXCOMM7: Attach FRO_DIV4 to FLEXCOMM7.

enumerator kAUDIO_PLL_to_FLEXCOMM7: Attach AUDIO_PLL to FLEXCOMM7.

enumerator kMASTER_CLK_to_FLEXCOMM7: Attach MASTER_CLK to FLEXCOMM7.

enumerator kFRG_to_FLEXCOMM7: Attach FRG to FLEXCOMM7.

enumerator kNONE_to_FLEXCOMM7: Attach NONE to FLEXCOMM7.

enumerator kFRO_DIV4_to_FLEXCOMM8: Attach FRO_DIV4 to FLEXCOMM8.

enumerator kAUDIO_PLL_to_FLEXCOMM8: Attach AUDIO_PLL to FLEXCOMM8.

enumerator kMASTER_CLK_to_FLEXCOMM8: Attach MASTER_CLK to FLEXCOMM8.

enumerator kFRG_to_FLEXCOMM8: Attach FRG to FLEXCOMM8.

enumerator kNONE_to_FLEXCOMM8: Attach NONE to FLEXCOMM8.

enumerator kFRO_DIV4_to_FLEXCOMM9: Attach FRO_DIV4 to FLEXCOMM9.

enumerator kAUDIO_PLL_to_FLEXCOMM9: Attach AUDIO_PLL to FLEXCOMM9.

enumerator kMASTER_CLK_to_FLEXCOMM9: Attach MASTER_CLK to FLEXCOMM9.

enumerator kFRG_to_FLEXCOMM9: Attach FRG to FLEXCOMM9.

enumerator kNONE_to_FLEXCOMM9: Attach NONE to FLEXCOMM9.

enumerator kFRO_DIV4_to_FLEXCOMM10: Attach FRO_DIV4 to FLEXCOMM10.

enumerator kAUDIO_PLL_to_FLEXCOMM10: Attach AUDIO_PLL to FLEXCOMM10.

enumerator kMASTER_CLK_to_FLEXCOMM10: Attach MASTER_CLK to FLEXCOMM10.

enumerator kFRG_to_FLEXCOMM10: Attach FRG to FLEXCOMM10.

enumerator kNONE_to_FLEXCOMM10: Attach NONE to FLEXCOMM10.

enumerator kFRO_DIV4_to_FLEXCOMM11: Attach FRO_DIV4 to FLEXCOMM11.

enumerator kAUDIO_PLL_to_FLEXCOMM11: Attach AUDIO_PLL to FLEXCOMM11.

enumerator kMASTER_CLK_to_FLEXCOMM11: Attach MASTER_CLK to FLEXCOMM11.

enumerator kFRG_to_FLEXCOMM11: Attach FRG to FLEXCOMM11.

enumerator kNONE_to_FLEXCOMM11: Attach NONE to FLEXCOMM11.

enumerator kFRO_DIV4_to_FLEXCOMM12: Attach FRO_DIV4 to FLEXCOMM12.

enumerator kAUDIO_PLL_to_FLEXCOMM12: Attach AUDIO_PLL to FLEXCOMM12.

enumerator kMASTER_CLK_to_FLEXCOMM12: Attach MASTER_CLK to FLEXCOMM12.

enumerator kFRG_to_FLEXCOMM12: Attach FRG to FLEXCOMM12.

enumerator kNONE_to_FLEXCOMM12: Attach NONE to FLEXCOMM12.

enumerator kFRO_DIV4_to_FLEXCOMM13: Attach FRO_DIV4 to FLEXCOMM13.

enumerator kAUDIO_PLL_to_FLEXCOMM13: Attach AUDIO_PLL to FLEXCOMM13.

enumerator kMASTER_CLK_to_FLEXCOMM13: Attach MASTER_CLK to FLEXCOMM13.

enumerator kFRG_to_FLEXCOMM13: Attach FRG to FLEXCOMM13.

enumerator kNONE_to_FLEXCOMM13: Attach NONE to FLEXCOMM13.

enumerator kFRO_DIV4_to_FLEXCOMM14: Attach FRO_DIV4 to FLEXCOMM14.

enumerator kAUDIO_PLL_to_FLEXCOMM14: Attach AUDIO_PLL to FLEXCOMM14.

enumerator kMASTER_CLK_to_FLEXCOMM14: Attach MASTER_CLK to FLEXCOMM14.

enumerator kFRG_to_FLEXCOMM14: Attach FRG to FLEXCOMM14.

enumerator kNONE_to_FLEXCOMM14: Attach NONE to FLEXCOMM14.

enumerator kFRO_DIV4_to_FLEXCOMM15: Attach FRO_DIV4 to FLEXCOMM15.

enumerator kAUDIO_PLL_to_FLEXCOMM15: Attach AUDIO_PLL to FLEXCOMM15.

enumerator kMASTER_CLK_to_FLEXCOMM15: Attach MASTER_CLK to FLEXCOMM15.

enumerator kFRG_to_FLEXCOMM15: Attach FRG to FLEXCOMM15.

enumerator kNONE_to_FLEXCOMM15: Attach NONE to FLEXCOMM15.

enumerator kFRO_DIV4_to_FLEXCOMM16: Attach FRO_DIV4 to FLEXCOMM16.

enumerator kAUDIO_PLL_to_FLEXCOMM16: Attach AUDIO_PLL to FLEXCOMM16.

enumerator kMASTER_CLK_to_FLEXCOMM16: Attach MASTER_CLK to FLEXCOMM16.

enumerator kFRG_to_FLEXCOMM16: Attach FRG to FLEXCOMM16.

enumerator kNONE_to_FLEXCOMM16: Attach NONE to FLEXCOMM16.

enumerator kFRO_DIV2_to_FLEXIO: Attach FRO_DIV2 to FLEXIO.

enumerator kAUDIO_PLL_to_FLEXIO: Attach AUDIO_PLL to FLEXIO.

enumerator kMASTER_CLK_to_FLEXIO: Attach MASTER_CLK to FLEXIO.

enumerator kFRG_to_FLEXIO: Attach FRG to FLEXIO.

enumerator kNONE_to_FLEXIO: Attach NONE to FLEXIO.

enumerator kMAIN_CLK_to_I3C_CLK: Attach MAIN_CLK to I3C_CLK.

enumerator kFRO_DIV8_to_I3C_CLK: Attach FRO_DIV8 to I3C_CLK.

enumerator kNONE_to_I3C_CLK: Attach NONE to I3C_CLK.

enumerator kI3C_CLK_to_I3C_TC_CLK: Attach I3C_CLK to I3C_TC_CLK.

enumerator kLPOSC_to_I3C_TC_CLK: Attach LPOSC to I3C_TC_CLK.

enumerator kNONE_to_I3C_TC_CLK: Attach NONE to I3C_TC_CLK.

enumerator kMAIN_CLK_to_ACMP_CLK: Attach MAIN_CLK to ACMP_CLK.

enumerator kFRO_DIV4_to_ACMP_CLK: Attach FRO_DIV4 to ACMP_CLK.

enumerator kAUX0_PLL_to_ACMP_CLK: Attach AUX0_PLL to ACMP_CLK.

enumerator kAUX1_PLL_to_ACMP_CLK: Attach AUX1_PLL to ACMP_CLK.

enumerator kNONE_to_ACMP_CLK: Attach NONE to ACMP_CLK.

enumerator kOSC_CLK_to_ADC_CLK: Attach OSC_CLK to ADC_CLK.

enumerator kLPOSC_to_ADC_CLK: Attach LPOSC to ADC_CLK.

enumerator kFRO_DIV4_to_ADC_CLK: Attach FRO_DIV4 to ADC_CLK.

enumerator kMAIN_PLL_to_ADC_CLK: Attach MAIN_PLL to ADC_CLK.

enumerator kAUX0_PLL_to_ADC_CLK: Attach AUX0_PLL to ADC_CLK.

enumerator kAUX1_PLL_to_ADC_CLK: Attach AUX1_PLL to ADC_CLK.

enumerator kOSC_CLK_to_CLKOUT: Attach OSC_CLK to CLKOUT.

enumerator kLPOSC_to_CLKOUT: Attach LPOSC to CLKOUT.

enumerator kFRO_DIV2_to_CLKOUT: Attach FRO_DIV2 to CLKOUT.

enumerator kMAIN_CLK_to_CLKOUT: Attach MAIN_CLK to CLKOUT.

enumerator kDSP_MAIN_to_CLKOUT: Attach DSP_MAIN to CLKOUT.

enumerator kMAIN_PLL_to_CLKOUT: Attach MAIN_PLL to CLKOUT.

enumerator kAUX0_PLL_to_CLKOUT: Attach AUX0_PLL to CLKOUT.

enumerator kDSP_PLL_to_CLKOUT: Attach DSP_PLL to CLKOUT.

enumerator kAUX1_PLL_to_CLKOUT: Attach AUX1_PLL to CLKOUT.

enumerator kAUDIO_PLL_to_CLKOUT: Attach AUDIO_PLL to CLKOUT.

enumerator kOSC32K_to_CLKOUT: Attach OSC32K to CLKOUT.

enumerator kNONE_to_CLKOUT: Attach NONE to CLKOUT.

enumerator kMAIN_CLK_to_GPU_CLK: Attach MAIN_CLK to GPU_CLK.

enumerator kFRO_DIV1_to_GPU_CLK: Attach FRO_DIV1 to GPU_CLK.

enumerator kMAIN_PLL_to_GPU_CLK: Attach MAIN_PLL to GPU_CLK.

enumerator kAUX0_PLL_to_GPU_CLK: Attach AUX0_PLL to GPU_CLK.

enumerator kAUX1_PLL_to_GPU_CLK: Attach AUX1_PLL to GPU_CLK.

enumerator kNONE_to_GPU_CLK: Attach NONE to GPU_CLK.

enumerator kFRO_DIV1_to_MIPI_DPHY_CLK: Attach FRO_DIV1 to MIPI_DPHY_CLK.

enumerator kMAIN_PLL_to_MIPI_DPHY_CLK: Attach MAIN_PLL to MIPI_DPHY_CLK.

enumerator kAUX0_PLL_to_MIPI_DPHY_CLK: Attach AUX0_PLL to MIPI_DPHY_CLK.

enumerator kAUX1_PLL_to_MIPI_DPHY_CLK: Attach AUX1_PLL to MIPI_DPHY_CLK.

enumerator kNONE_to_MIPI_DPHY_CLK: Attach NONE to MIPI_DPHY_CLK.

enumerator kFRO_DIV1_to_MIPI_DPHYESC_CLK: Attach FRO_DIV1 to MIPI_DPHYESC_CLK.

enumerator kFRO_DIV16_to_MIPI_DPHYESC_CLK: Attach FRO_DIV16 to MIPI_DPHYESC_CLK.

enumerator kAUX0_PLL_to_MIPI_DPHYESC_CLK: Attach AUX0_PLL to MIPI_DPHYESC_CLK.

enumerator kAUX1_PLL_to_MIPI_DPHYESC_CLK: Attach AUX1_PLL to MIPI_DPHYESC_CLK.

enumerator kMIPI_DPHY_CLK_to_DCPIXEL_CLK: Attach MIPI_DPHY_CLK to DCPIXEL_CLK.

enumerator kMAIN_CLK_to_DCPIXEL_CLK: Attach MAIN_CLK to DCPIXEL_CLK.

enumerator kFRO_DIV1_to_DCPIXEL_CLK: Attach FRO_DIV1 to DCPIXEL_CLK.

enumerator kMAIN_PLL_to_DCPIXEL_CLK: Attach MAIN_PLL to DCPIXEL_CLK.

enumerator kAUX0_PLL_to_DCPIXEL_CLK: Attach AUX0_PLL to DCPIXEL_CLK.

enumerator kAUX1_PLL_to_DCPIXEL_CLK: Attach AUX1_PLL to DCPIXEL_CLK.

enumerator kNONE_to_DCPIXEL_CLK: Attach NONE to DCPIXEL_CLK.

enum _clock_div_name

Clock dividers.

Values:

enumerator kCLOCK_DivAudioPllClk: Audio Pll Clk Divider.

enumerator kCLOCK_DivMainPllClk: Main Pll Clk Divider.

enumerator kCLOCK_DivDspPllClk: Dsp Pll Clk Divider.

enumerator kCLOCK_DivAux0PllClk: Aux0 Pll Clk Divider.

enumerator kCLOCK_DivAux1PllClk: Aux1 Pll Clk Divider.

enumerator kCLOCK_DivPfc0Clk: Pfc0 Clk Divider.

enumerator kCLOCK_DivPfc1Clk: Pfc1 Clk Divider.

enumerator kCLOCK_DivSysCpuAhbClk: Sys Cpu Ahb Clk Divider.

enumerator kCLOCK_Div32KhzWakeClk: Khz Wake Clk Divider.

enumerator kCLOCK_DivSystickClk: Systick Clk Divider.

enumerator kCLOCK_DivSdio0Clk: Sdio0 Clk Divider.

enumerator kCLOCK_DivSdio1Clk: Sdio1 Clk Divider.

enumerator kCLOCK_DivFlexspi0Clk: Flexspi0 Clk Divider.

enumerator kCLOCK_DivFlexspi1Clk: Flexspi1 Clk Divider.

enumerator kCLOCK_DivUsbHsFclk: Usb Hs Fclk Divider.

enumerator kCLOCK_DivSctClk: Sct Clk Divider.

enumerator kCLOCK_DivMclkClk: Mclk Clk Divider.

enumerator kCLOCK_DivDmicClk: Dmic Clk Divider.

enumerator kCLOCK_DivPLLFRGClk: P L L F R G Clk Divider.

enumerator kCLOCK_DivFlexioClk: Flexio Clk Divider.

enumerator kCLOCK_DivI3cClk: I3c Clk Divider.

enumerator kCLOCK_DivI3cTcClk: I3c Tc Clk Divider.

enumerator kCLOCK_DivI3cSlowClk: I3c Slow Clk Divider.

enumerator kCLOCK_DivDspCpuClk: Dsp Cpu Clk Divider.

enumerator kCLOCK_DivAcmpClk: Acmp Clk Divider.

enumerator kCLOCK_DivAdcClk: Adc Clk Divider.

enumerator kCLOCK_DivLowFreqClk: Low Freq Clk Divider.

enumerator kCLOCK_DivClockOut: Clock Out Divider.

enumerator kCLOCK_DivGpuClk: Gpu Clk Divider.

enumerator kCLOCK_DivDcPixelClk: Dc Pixel Clk Divider.

enumerator kCLOCK_DivDphyClk: Dphy Clk Divider.

enumerator kCLOCK_DivDphyEscRxClk: Dphy Esc Rx Clk Divider.

enumerator kCLOCK_DivDphyEscTxClk: Dphy Esc Tx Clk Divider.

enum _sys_pll_src

SysPLL Reference Input Clock Source.

Values:

enumerator kCLOCK_SysPllFroDiv8Clk: FRO_DIV8 clock

enumerator kCLOCK_SysPllXtalIn: OSC clock

enumerator kCLOCK_SysPllNone: Gated to reduce power

enum _sys_pll_mult

SysPLL Multiplication Factor.

Values:

enumerator kCLOCK_SysPllMult16: Divide by 16

enumerator kCLOCK_SysPllMult17: Divide by 17

enumerator kCLOCK_SysPllMult18: Divide by 18

enumerator kCLOCK_SysPllMult19: Divide by 19

enumerator kCLOCK_SysPllMult20: Divide by 20

enumerator kCLOCK_SysPllMult21: Divide by 21

enumerator kCLOCK_SysPllMult22: Divide by 22

enum _audio_pll_src

AudioPll Reference Input Clock Source.

Values:

enumerator kCLOCK_AudioPllFroDiv8Clk: FRO_DIV8 clock

enumerator kCLOCK_AudioPllXtalIn: OSC clock

enumerator kCLOCK_AudioPllNone: Gated to reduce power

enum _audio_pll_mult

AudioPll Multiplication Factor.

Values:

enumerator kCLOCK_AudioPllMult16: Divide by 16

enumerator kCLOCK_AudioPllMult17: Divide by 17

enumerator kCLOCK_AudioPllMult18: Divide by 18

enumerator kCLOCK_AudioPllMult19: Divide by 19

enumerator kCLOCK_AudioPllMult20: Divide by 20

enumerator kCLOCK_AudioPllMult21: Divide by 21

enumerator kCLOCK_AudioPllMult22: Divide by 22

enum _clock_fro_output_en

FRO output enable.

Values:

enumerator kCLOCK_FroDiv1OutEn: Enable Fro Div1 output.

enumerator kCLOCK_FroDiv2OutEn: Enable Fro Div2 output.

enumerator kCLOCK_FroDiv4OutEn: Enable Fro Div4 output.

enumerator kCLOCK_FroDiv8OutEn: Enable Fro Div8 output.

enumerator kCLOCK_FroDiv16OutEn: Enable Fro Div16 output.

enumerator kCLOCK_FroAllOutEn

enum _clock_fro_freq

FRO frequence configuration.

Values:

enumerator kCLOCK_Fro192M: 192MHz FRO clock.

enumerator kCLOCK_Fro96M: 96MHz FRO clock.

typedef enum _clock_ip_name clock_ip_name_t: Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

typedef enum _clock_name clock_name_t: Clock name used to get clock frequency.

typedef enum _clock_pfd clock_pfd_t: PLL PFD clock name.

typedef enum _clock_attach_id clock_attach_id_t: The enumerator of clock attach Id.

typedef enum _clock_div_name clock_div_name_t: Clock dividers.

typedef enum _sys_pll_src sys_pll_src_t: SysPLL Reference Input Clock Source.

typedef enum _sys_pll_mult sys_pll_mult_t: SysPLL Multiplication Factor.

typedef struct _clock_sys_pll_config clock_sys_pll_config_t: PLL configuration for SYSPLL.

typedef enum _audio_pll_src audio_pll_src_t: AudioPll Reference Input Clock Source.

typedef enum _audio_pll_mult audio_pll_mult_t: AudioPll Multiplication Factor.

typedef struct _clock_audio_pll_config clock_audio_pll_config_t: PLL configuration for SYSPLL.

typedef struct _clock_frg_clk_config clock_frg_clk_config_t: PLL configuration for FRG.

typedef enum _clock_fro_output_en clock_fro_output_en_t: FRO output enable.

typedef enum _clock_fro_freq clock_fro_freq_t: FRO frequence configuration.

volatile uint32_t g_xtalFreq

External XTAL (SYSOSC) clock frequency.

The XTAL (YSOSC) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetXtalFreq to set the value in to clock driver. For example, if XTAL is 16MHz,

CLOCK_SetXtalFreq(160000000);

volatile uint32_t g_clkinFreq

External CLK_IN pin clock frequency (clkin) clock frequency.

The CLK_IN pin (clkin) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetClkinFreq to set the value in to clock driver. For example, if CLK_IN is 16MHz,

CLOCK_SetClkinFreq(160000000);

volatile uint32_t g_mclkFreq

External MCLK IN clock frequency.

The MCLK IN clock frequency in Hz, when the clock is setup, use the function CLOCK_SetMclkFreq to set the value in to clock driver. For example, if MCLK IN is 16MHz,

CLOCK_SetMclkFreq(160000000);

static inline void CLOCK_EnableClock(clock_ip_name_t clk)

static inline void CLOCK_DisableClock(clock_ip_name_t clk)

void CLOCK_AttachClk(clock_attach_id_t connection)

Configure the clock selection muxes.

Parameters:

connection – : Clock to be configured.

Returns:

Nothing

void CLOCK_SetClkDiv(clock_div_name_t div_name, uint32_t divider)

Setup peripheral clock dividers.

Parameters:

div_name – : Clock divider name
divider – : Value to be divided. Divided clock frequency = Undivided clock frequency / divider.

Returns:

Nothing

uint32_t CLOCK_GetFreq(clock_name_t clockName)

Return Frequency of selected clock.

Returns:: Frequency of selected clock

uint32_t CLOCK_GetFRGClock(uint32_t id)

Return Input frequency for the Fractional baud rate generator.

Returns:: Input Frequency for FRG

void CLOCK_SetFRGClock(const clock_frg_clk_config_t *config)

Set output of the Fractional baud rate generator.

Parameters:

config – : Configuration to set to FRGn clock.

uint32_t CLOCK_GetSysPllFreq(void)

Return Frequency of SYSPLL.

Returns:: Frequency of SYSPLL

uint32_t CLOCK_GetSysPfdFreq(clock_pfd_t pfd)

Get current output frequency of specific System PLL PFD.

Parameters:

pfd – : pfd name to get frequency.

Returns:

Frequency of SYSPLL PFD.

uint32_t CLOCK_GetAudioPllFreq(void)

Return Frequency of AUDIO PLL.

Returns:: Frequency of AUDIO PLL

uint32_t CLOCK_GetAudioPfdFreq(clock_pfd_t pfd)

Get current output frequency of specific Audio PLL PFD.

Parameters:

pfd – : pfd name to get frequency.

Returns:

Frequency of AUDIO PLL PFD.

uint32_t CLOCK_GetMainClkFreq(void)

Return Frequency of main clk.

Returns:: Frequency of main clk

uint32_t CLOCK_GetDspMainClkFreq(void)

Return Frequency of DSP main clk.

Returns:: Frequency of DSP main clk

uint32_t CLOCK_GetAcmpClkFreq(void)

Return Frequency of ACMP clk.

Returns:: Frequency of ACMP clk

uint32_t CLOCK_GetDmicClkFreq(void)

Return Frequency of DMIC clk.

Returns:: Frequency of DMIC clk

uint32_t CLOCK_GetUsbClkFreq(void)

Return Frequency of USB clk.

Returns:: Frequency of USB clk

uint32_t CLOCK_GetSdioClkFreq(uint32_t id)

Return Frequency of SDIO clk.

Parameters:

id – : SDIO index to get frequency.

Returns:

Frequency of SDIO clk

uint32_t CLOCK_GetI3cClkFreq(void)

Return Frequency of I3C clk.

Returns:: Frequency of I3C clk

uint32_t CLOCK_GetSystickClkFreq(void)

Return Frequency of systick clk.

Returns:: Frequency of systick clk

uint32_t CLOCK_GetWdtClkFreq(uint32_t id)

Return Frequency of WDT clk.

Parameters:

id – : WDT index to get frequency.

Returns:

Frequency of WDT clk

uint32_t CLOCK_GetMclkClkFreq(void)

Return output Frequency of mclk.

Returns:: Frequency of mclk output clk

uint32_t CLOCK_GetSctClkFreq(void)

Return Frequency of sct.

Returns:: Frequency of sct clk

void CLOCK_EnableSysOscClk(bool enable, bool enableLowPower, uint32_t delay_us)

Enable/Disable sys osc clock from external crystal clock.

Parameters:

enable – : true to enable system osc clock, false to bypass system osc.
enableLowPower – : true to enable low power mode, false to enable high gain mode.
delay_us – : Delay time after OSC power up.

void CLOCK_EnableFroClk(uint32_t divOutEnable)

Enable/Disable FRO clock output.

Parameters:

divOutEnable – : Or’ed value of clock_fro_output_en_t to enable certain clock freq output.

void CLOCK_EnableFroClkFreq(uint32_t targetFreq, uint32_t divOutEnable)

Enable/Disable FRO clock output with specified frequency using the FRO Tuner.

Parameters:

targetFreq – target fro frequency.
divOutEnable – Or’ed value of clock_fro_output_en_t to enable certain clock freq output.

void CLOCK_EnableFroClkRange(clock_fro_freq_t froFreq, uint32_t divOutEnable)

Enable/Disable FRO192M or FRO96M clock output.

Parameters:

froFreq – : target fro frequency.
divOutEnable – : Or’ed value of clock_fro_output_en_t to enable certain clock freq output.

void CLOCK_EnableLpOscClk(void): Enable LPOSC 1MHz clock.

static inline uint32_t CLOCK_GetXtalInClkFreq(void)

Return Frequency of sys osc Clock.

Returns:: Frequency of sys osc Clock. Or CLK_IN pin frequency.

static inline uint32_t CLOCK_GetMclkInClkFreq(void)

Return Frequency of MCLK Input Clock.

Returns:: Frequency of MCLK input Clock.

static inline uint32_t CLOCK_GetLpOscFreq(void)

Return Frequency of Lower power osc.

Returns:: Frequency of LPOSC

static inline uint32_t CLOCK_GetOsc32KFreq(void)

Return Frequency of 32kHz osc.

Returns:: Frequency of 32kHz osc

static inline void CLOCK_EnableOsc32K(bool enable)

Enables and disables 32kHz osc.

Parameters:

enable – : true to enable 32k osc clock, false to disable clock

static inline uint32_t CLOCK_GetWakeClk32KFreq(void)

Return Frequency of 32khz wake clk.

Returns:: Frequency of 32kHz wake clk

static inline void CLOCK_SetXtalFreq(uint32_t freq)

Set the XTALIN (system OSC) frequency based on board setting.

Parameters:

freq – : The XTAL input clock frequency in Hz.

static inline void CLOCK_SetClkinFreq(uint32_t freq)

Set the CLKIN (CLKIN pin) frequency based on board setting.

Parameters:

freq – : The CLK_IN pin input clock frequency in Hz.

static inline void CLOCK_SetMclkFreq(uint32_t freq)

Set the MCLK IN frequency based on board setting.

Parameters:

freq – : The MCLK input clock frequency in Hz.

uint32_t CLOCK_GetFlexcommClkFreq(uint32_t id)

Return Frequency of Flexcomm functional Clock.

Parameters:

id – : flexcomm index to get frequency.

Returns:

Frequency of Flexcomm functional Clock

uint32_t CLOCK_GetFlexioClkFreq(void)

Return Frequency of Flexio functional Clock.

Returns:: Frequency of Flexcomm functional Clock

uint32_t CLOCK_GetCtimerClkFreq(uint32_t id)

Return Frequency of Ctimer Clock.

Parameters:

id – : ctimer index to get frequency.

Returns:

Frequency of Ctimer Clock

uint32_t CLOCK_GetClockOutClkFreq(void)

Return Frequency of ClockOut.

Returns:: Frequency of ClockOut

uint32_t CLOCK_GetAdcClkFreq(void)

Return Frequency of Adc Clock.

Returns:: Frequency of Adc Clock.

uint32_t CLOCK_GetFlexspiClkFreq(uint32_t id)

Return Frequency of FLEXSPI Clock.

Parameters:

id – : flexspi index to get frequency.

Returns:

Frequency of Flexspi.

uint32_t CLOCK_GetGpuClkFreq(void)

Return Frequency of GPU functional Clock.

Returns:: Frequency of GPU functional Clock

uint32_t CLOCK_GetDcPixelClkFreq(void)

Return Frequency of DCNano Pixel functional Clock.

Returns:: Frequency of DCNano pixel functional Clock

uint32_t CLOCK_GetMipiDphyClkFreq(void)

Return Frequency of MIPI DPHY functional Clock.

Returns:: Frequency of MIPI DPHY functional Clock

uint32_t CLOCK_GetMipiDphyEscRxClkFreq(void)

Return Frequency of MIPI DPHY Esc RX functional Clock.

Returns:: Frequency of MIPI DPHY Esc RX functional Clock

uint32_t CLOCK_GetMipiDphyEscTxClkFreq(void)

Return Frequency of MIPI DPHY Esc Tx functional Clock.

Returns:: Frequency of MIPI DPHY Esc Tx functional Clock

void CLOCK_InitSysPll(const clock_sys_pll_config_t *config)

Initialize the System PLL.

Parameters:

config – : Configuration to set to PLL.

static inline void CLOCK_DeinitSysPll(void): brief Deinit the System PLL. param none.

status_t CLOCK_InitSysPfd(clock_pfd_t pfd, uint8_t divider)

Initialize the System PLL PFD.

Note

It is recommended that PFD settings are kept between 12-35.

Parameters:

pfd – : Which PFD clock to enable.
divider – : The PFD divider value.

Returns:

kStatus_Success if successfully, kStatus_Timeout if timeout happen.

static inline void CLOCK_DeinitSysPfd(clock_pfd_t pfd): brief Disable the audio PLL PFD. param pfd : Which PFD clock to disable.

void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config)

Initialize the audio PLL.

Parameters:

config – : Configuration to set to PLL.

static inline void CLOCK_DeinitAudioPll(void): brief Deinit the Audio PLL. param none.

status_t CLOCK_InitAudioPfd(clock_pfd_t pfd, uint8_t divider)

Initialize the audio PLL PFD.

Note

It is recommended that PFD settings are kept between 12-35.

Parameters:

pfd – : Which PFD clock to enable.
divider – : The PFD divider value.

Returns:

kStatus_Success if successfully, kStatus_Timeout if timeout happen.

static inline void CLOCK_DeinitAudioPfd(uint32_t pfd): brief Disable the audio PLL PFD. param pfd : Which PFD clock to disable.

status_t CLOCK_FroTuneToFreq(uint32_t targetFreq)

Tune the FRO to the specified frequency.

Note

This API can be used to tune the FRO to an accurate frequency periodicly using the reference clock(crystal

oscillator). Make sure the reference clock is enabled before calling this API and the reference clock can be disabled after this API call.

Parameters:

targetFreq – The target frequency.

Return values:

true – The FRO is tuned successfully.
false – The FRO is not tuned to the target frequency.

void CLOCK_EnableFroTuning(bool enable): Enable/Disable FRO tuning. On enable, the function will wait until FRO is close to the target frequency.

void CLOCK_EnableUsbHs0DeviceClock(clock_attach_id_t src, uint8_t divider)

Enable USB HS device clock.

This function enables USB HS device clock.

void CLOCK_DisableUsbHs0DeviceClock(void)

Disable USB HS device clock.

This function disables USB HS device clock.

void CLOCK_EnableUsbHs0HostClock(clock_attach_id_t src, uint8_t divider)

Enable USB HS host clock.

This function enables USB HS host clock.

void CLOCK_DisableUsbHs0HostClock(void)

Disable USB HS host clock.

This function disables USB HS host clock.

bool CLOCK_EnableUsbHs0PhyPllClock(clock_attach_id_t src, uint32_t freq)

brief Enable USB hs0PhyPll clock.

param src USB HS clock source. param freq The frequency specified by src. retval true The clock is set successfully. retval false The clock source is invalid to get proper USB HS clock.

void CLOCK_DisableUsbHs0PhyPllClock(void)

Disable USB hs0PhyPll clock.

This function disables USB hs0PhyPll clock.

FSL_CLOCK_DRIVER_VERSION: CLOCK driver version 2.7.1.

SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY

CLOCK_GetFlexCommClkFreq

CLOCK_GetCTimerClkFreq

MIPI_DSI_HOST_CLOCKS: Clock ip name array for MIPI DSI.

LCDIF_CLOCKS: Clock ip name array for LCDIF.

SCT_CLOCKS: Clock ip name array for SCT.

USBD_CLOCKS: Clock ip name array for USBD.

FLEXSPI_CLOCKS: Clock ip name array for FlexSPI.

CACHE64_CLOCKS: Clock ip name array for Cache64.

TRNG_CLOCKS: Clock ip name array for RNG.

PUF_CLOCKS: Clock ip name array for PUF.

HASHCRYPT_CLOCKS: Clock ip name array for HashCrypt.

CASPER_CLOCKS: Clock ip name array for Casper.

POWERQUAD_CLOCKS: Clock ip name array for Powerquad.

LPADC_CLOCKS: Clock ip name array for ADC.

CMP_CLOCKS: Clock ip name array for ACMP.

USDHC_CLOCKS: Clock ip name array for uSDHC.

WWDT_CLOCKS: Clock ip name array for WWDT.

UTICK_CLOCKS: Clock ip name array for UTICK.

FLEXIO_CLOCKS: Clock ip name array for FlexIO.

OSTIMER_CLOCKS: Clock ip name array for OSTimer.

FLEXCOMM_CLOCKS: Clock ip name array for FLEXCOMM.

USART_CLOCKS: Clock ip name array for LPUART.

I2C_CLOCKS: Clock ip name array for I2C.

SPI_CLOCKS: Clock ip name array for SPI.

I2S_CLOCKS: Clock ip name array for FLEXI2S.

DMIC_CLOCKS: Clock ip name array for DMIC.

SEMA42_CLOCKS: Clock ip name array for SEMA.

MU_CLOCKS: Clock ip name array for MUA.

DMA_CLOCKS: Clock ip name array for DMA.

CRC_CLOCKS: Clock ip name array for CRC.

GPIO_CLOCKS: Clock ip name array for GPIO.

PINT_CLOCKS: Clock ip name array for PINT.

I3C_CLOCKS: Clock ip name array for I3C.

MRT_CLOCKS: Clock ip name array for MRT.

RTC_CLOCKS: Clock ip name array for RTC.

CTIMER_CLOCKS: Clock ip name array for CT32B.

CLK_GATE_REG_OFFSET_SHIFT: Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

CLK_GATE_REG_OFFSET_MASK

CLK_GATE_BIT_SHIFT_SHIFT

CLK_GATE_BIT_SHIFT_MASK

CLK_GATE_DEFINE(reg_offset, bit_shift)

CLK_GATE_ABSTRACT_REG_OFFSET(x)

CLK_GATE_ABSTRACT_BITS_SHIFT(x)

CLK_CTL0_PSCCTL0

CLK_CTL0_PSCCTL1

CLK_CTL0_PSCCTL2

CLK_CTL1_PSCCTL0

CLK_CTL1_PSCCTL1

CLK_CTL1_PSCCTL2

SYSPLL0CLKSEL_OFFSET

Clock Mux Switches The encoding is as follows each connection identified is 32bits wide starting from LSB upwards.

[ 31 30 29:28 27:25 24:14 13:11 10:0 ] [CLKCTL index]:[FRODIVSEL onoff]:[FRODIVSEL]:[MUXB choice]:[MUXB offset]:[MUXA choice]:[MUXA offset] FRODIVSEL onoff ‘1’ means need to set FRODIVSEL. MUX offset 0 means end of descriptor.

MAINCLKSELA_OFFSET

MAINCLKSELB_OFFSET

FLEXSPI0FCLKSEL_OFFSET

FLEXSPI1FCLKSEL_OFFSET

SCTFCLKSEL_OFFSET

USBHSFCLKSEL_OFFSET

SDIO0FCLKSEL_OFFSET

SDIO1FCLKSEL_OFFSET

ADC0FCLKSEL0_OFFSET

ADC0FCLKSEL1_OFFSET

UTICKFCLKSEL_OFFSET

WDT0FCLKSEL_OFFSET

A32KHZWAKECLKSEL_OFFSET

SYSTICKFCLKSEL_OFFSET

DPHYCLKSEL_OFFSET

DPHYESCCLKSEL_OFFSET

GPUCLKSEL_OFFSET

DCPIXELCLKSEL_OFFSET

AUDIOPLL0CLKSEL_OFFSET

DSPCPUCLKSELA_OFFSET

DSPCPUCLKSELB_OFFSET

OSEVENTTFCLKSEL_OFFSET

FC0FCLKSEL_OFFSET

FC1FCLKSEL_OFFSET

FC2FCLKSEL_OFFSET

FC3FCLKSEL_OFFSET

FC4FCLKSEL_OFFSET

FC5FCLKSEL_OFFSET

FC6FCLKSEL_OFFSET

FC7FCLKSEL_OFFSET

FC8FCLKSEL_OFFSET

FC9FCLKSEL_OFFSET

FC10FCLKSEL_OFFSET

FC11FCLKSEL_OFFSET

FC12FCLKSEL_OFFSET

FC13FCLKSEL_OFFSET

FC14FCLKSEL_OFFSET

FC15FCLKSEL_OFFSET

FC16FCLKSEL_OFFSET

FLEXIOCLKSEL_OFFSET

DMIC0FCLKSEL_OFFSET

CT32BIT0FCLKSEL_OFFSET

CT32BIT1FCLKSEL_OFFSET

CT32BIT2FCLKSEL_OFFSET

CT32BIT3FCLKSEL_OFFSET

CT32BIT4FCLKSEL_OFFSET

AUDIOMCLKSEL_OFFSET

CLKOUTSEL0_OFFSET

CLKOUTSEL1_OFFSET

I3C01FCLKSEL_OFFSET

I3C01FCLKSTCSEL_OFFSET

I3C01FCLKSTSTCLKSEL_OFFSET

WDT1FCLKSEL_OFFSET

ACMP0FCLKSEL_OFFSET

LOWFREQCLKDIV_OFFSET

MAINPLLCLKDIV_OFFSET

DSPPLLCLKDIV_OFFSET

AUX0PLLCLKDIV_OFFSET

AUX1PLLCLKDIV_OFFSET

SYSCPUAHBCLKDIV_OFFSET

PFC0CLKDIV_OFFSET

PFC1CLKDIV_OFFSET

FLEXSPI0FCLKDIV_OFFSET

FLEXSPI1FCLKDIV_OFFSET

SCTFCLKDIV_OFFSET

USBHSFCLKDIV_OFFSET

SDIO0FCLKDIV_OFFSET

SDIO1FCLKDIV_OFFSET

ADC0FCLKDIV_OFFSET

A32KHZWAKECLKDIV_OFFSET

SYSTICKFCLKDIV_OFFSET

DPHYCLKDIV_OFFSET

DPHYESCRXCLKDIV_OFFSET

DPHYESCTXCLKDIV_OFFSET

GPUCLKDIV_OFFSET

DCPIXELCLKDIV_OFFSET

AUDIOPLLCLKDIV_OFFSET

DSPCPUCLKDIV_OFFSET

FLEXIOCLKDIV_OFFSET

FRGPLLCLKDIV_OFFSET

DMIC0FCLKDIV_OFFSET

AUDIOMCLKDIV_OFFSET

CLKOUTFCLKDIV_OFFSET

I3C01FCLKSTCDIV_OFFSET

I3C01FCLKSDIV_OFFSET

I3C01FCLKDIV_OFFSET

ACMP0FCLKDIV_OFFSET

CLKCTL0_TUPLE_MUXA(reg, choice)

CLKCTL0_TUPLE_MUXB(reg, choice)

CLKCTL1_TUPLE_MUXA(reg, choice)

CLKCTL1_TUPLE_MUXB(reg, choice)

CLKCTL_TUPLE_FRODIVSEL(choice)

CLKCTL_TUPLE_REG(base, tuple)

CLKCTL_TUPLE_SEL(tuple)

Values:

enumerator kCLOCK_FrgMainClk: Main System clock

enumerator kCLOCK_FrgPllDiv: Main pll clock divider

enumerator kCLOCK_FrgFroDiv4: FRO_DIV4

sys_pll_src_t sys_pll_src: Reference Input Clock Source

uint32_t numerator: 30 bit numerator of fractional loop divider.

uint32_t denominator: 30 bit numerator of fractional loop divider.

sys_pll_mult_t sys_pll_mult: Multiplication Factor

audio_pll_src_t audio_pll_src: Reference Input Clock Source

uint32_t numerator: 30 bit numerator of fractional loop divider.

uint32_t denominator: 30 bit numerator of fractional loop divider.

audio_pll_mult_t audio_pll_mult: Multiplication Factor

uint8_t num: FRG clock, [0 - 16]: Flexcomm, [17]: Flexio

enum _clock_frg_clk_config sfg_clock_src

uint8_t divider: Denominator of the fractional divider.

uint8_t mult: Numerator of the fractional divider.

struct _clock_sys_pll_config: #include <fsl_clock.h>

PLL configuration for SYSPLL.

struct _clock_audio_pll_config: #include <fsl_clock.h>

PLL configuration for SYSPLL.

struct _clock_frg_clk_config: #include <fsl_clock.h>

PLL configuration for FRG.

CRC: Cyclic Redundancy Check Driver

FSL_CRC_DRIVER_VERSION

CRC driver version. Version 2.1.1.

Current version: 2.1.1

Change log:

Version 2.0.0
- initial version
Version 2.0.1
- add explicit type cast when writing to WR_DATA
Version 2.0.2
- Fix MISRA issue
Version 2.1.0
- Add CRC_WriteSeed function
Version 2.1.1
- Fix MISRA issue

enum _crc_polynomial

CRC polynomials to use.

Values:

enumerator kCRC_Polynomial_CRC_CCITT: x^16+x^12+x^5+1

enumerator kCRC_Polynomial_CRC_16: x^16+x^15+x^2+1

enumerator kCRC_Polynomial_CRC_32: x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1

typedef enum _crc_polynomial crc_polynomial_t: CRC polynomials to use.

typedef struct _crc_config crc_config_t

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

void CRC_Init(CRC_Type *base, const crc_config_t *config)

Enables and configures the CRC peripheral module.

This functions enables the CRC peripheral clock in the LPC SYSCON block. It also configures the CRC engine and starts checksum computation by writing the seed.

Parameters:

base – CRC peripheral address.
config – CRC module configuration structure.

static inline void CRC_Deinit(CRC_Type *base)

Disables the CRC peripheral module.

This functions disables the CRC peripheral clock in the LPC SYSCON block.

Parameters:

base – CRC peripheral address.

void CRC_Reset(CRC_Type *base)

resets CRC peripheral module.

Parameters:

base – CRC peripheral address.

void CRC_WriteSeed(CRC_Type *base, uint32_t seed)

Write seed to CRC peripheral module.

Parameters:

base – CRC peripheral address.
seed – CRC Seed value.

void CRC_GetDefaultConfig(crc_config_t *config)

Loads default values to CRC protocol configuration structure.

Loads default values to CRC protocol configuration structure. The default values are:

config->polynomial = kCRC_Polynomial_CRC_CCITT;
config->reverseIn = false;
config->complementIn = false;
config->reverseOut = false;
config->complementOut = false;
config->seed = 0xFFFFU;

Parameters:

config – CRC protocol configuration structure

void CRC_GetConfig(CRC_Type *base, crc_config_t *config)

Loads actual values configured in CRC peripheral to CRC protocol configuration structure.

The values, including seed, can be used to resume CRC calculation later.

Parameters:

base – CRC peripheral address.
config – CRC protocol configuration structure

void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)

Writes data to the CRC module.

Writes input data buffer bytes to CRC data register.

Parameters:

base – CRC peripheral address.
data – Input data stream, MSByte in data[0].
dataSize – Size of the input data buffer in bytes.

static inline uint32_t CRC_Get32bitResult(CRC_Type *base)

Reads 32-bit checksum from the CRC module.

Reads CRC data register.

Parameters:

base – CRC peripheral address.

Returns:

final 32-bit checksum, after configured bit reverse and complement operations.

static inline uint16_t CRC_Get16bitResult(CRC_Type *base)

Reads 16-bit checksum from the CRC module.

Reads CRC data register.

Parameters:

base – CRC peripheral address.

Returns:

final 16-bit checksum, after configured bit reverse and complement operations.

CRC_DRIVER_USE_CRC16_CCITT_FALSE_AS_DEFAULT: Default configuration structure filled by CRC_GetDefaultConfig(). Uses CRC-16/CCITT-FALSE as default.

struct _crc_config

#include <fsl_crc.h>

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

Public Members

crc_polynomial_t polynomial: CRC polynomial.

bool reverseIn: Reverse bits on input.

bool complementIn: Perform 1’s complement on input.

bool reverseOut: Reverse bits on output.

bool complementOut: Perform 1’s complement on output.

uint32_t seed: Starting checksum value.

CTIMER: Standard counter/timers

void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config)

Ungates the clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application before using the driver.

Parameters:

base – Ctimer peripheral base address
config – Pointer to the user configuration structure.

void CTIMER_Deinit(CTIMER_Type *base)

Gates the timer clock.

Parameters:

base – Ctimer peripheral base address

void CTIMER_GetDefaultConfig(ctimer_config_t *config)

Fills in the timers configuration structure with the default settings.

The default values are:

config->mode = kCTIMER_TimerMode;
config->input = kCTIMER_Capture_0;
config->prescale = 0;

Parameters:

config – Pointer to the user configuration structure.

status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint32_t pwmPeriod, uint32_t pulsePeriod, bool enableInt)

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM period

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
pwmPeriod – PWM period match value
pulsePeriod – Pulse width match value
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

Returns:

kStatus_Success on success kStatus_Fail If matchChannel is equal to pwmPeriodChannel; this channel is reserved to set the PWM cycle If PWM pulse width register value is larger than 0xFFFFFFFF.

status_t CTIMER_SetupPwm(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, bool enableInt)

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – PWM pulse width; the value should be between 0 to 100
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – Timer counter clock in Hz
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)

Updates the pulse period of an active PWM signal.

Parameters:

base – Ctimer peripheral base address
matchChannel – Match pin to be used to output the PWM signal
pulsePeriod – New PWM pulse width match value

status_t CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent)

Updates the duty cycle of an active PWM signal.

Note

Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution. This function can manually assign the specified channel to set the PWM cycle.

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – New PWM pulse width; the value should be between 0 to 100

Returns:

kStatus_Success on success kStatus_Fail If PWM pulse width register value is larger than 0xFFFFFFFF.

static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)

Enables the selected Timer interrupts.

Parameters:

base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)

Disables the selected Timer interrupts.

Parameters:

base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)

Gets the enabled Timer interrupts.

Parameters:

base – Ctimer peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)

Gets the Timer status flags.

Parameters:

base – Ctimer peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)

Clears the Timer status flags.

Parameters:

base – Ctimer peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_StartTimer(CTIMER_Type *base)

Starts the Timer counter.

Parameters:

base – Ctimer peripheral base address

static inline void CTIMER_StopTimer(CTIMER_Type *base)

Stops the Timer counter.

Parameters:

base – Ctimer peripheral base address

FSL_CTIMER_DRIVER_VERSION: Version 2.3.3

enum _ctimer_capture_channel

List of Timer capture channels.

Values:

enumerator kCTIMER_Capture_0: Timer capture channel 0

enumerator kCTIMER_Capture_1: Timer capture channel 1

enumerator kCTIMER_Capture_3: Timer capture channel 3

enum _ctimer_capture_edge

List of capture edge options.

Values:

enumerator kCTIMER_Capture_RiseEdge: Capture on rising edge

enumerator kCTIMER_Capture_FallEdge: Capture on falling edge

enumerator kCTIMER_Capture_BothEdge: Capture on rising and falling edge

enum _ctimer_match

List of Timer match registers.

Values:

enumerator kCTIMER_Match_0: Timer match register 0

enumerator kCTIMER_Match_1: Timer match register 1

enumerator kCTIMER_Match_2: Timer match register 2

enumerator kCTIMER_Match_3: Timer match register 3

enum _ctimer_external_match

List of external match.

Values:

enumerator kCTIMER_External_Match_0: External match 0

enumerator kCTIMER_External_Match_1: External match 1

enumerator kCTIMER_External_Match_2: External match 2

enumerator kCTIMER_External_Match_3: External match 3

enum _ctimer_match_output_control

List of output control options.

Values:

enumerator kCTIMER_Output_NoAction: No action is taken

enumerator kCTIMER_Output_Clear: Clear the EM bit/output to 0

enumerator kCTIMER_Output_Set: Set the EM bit/output to 1

enumerator kCTIMER_Output_Toggle: Toggle the EM bit/output

enum _ctimer_timer_mode

List of Timer modes.

Values:

enumerator kCTIMER_TimerMode

enumerator kCTIMER_IncreaseOnRiseEdge

enumerator kCTIMER_IncreaseOnFallEdge

enumerator kCTIMER_IncreaseOnBothEdge

enum _ctimer_interrupt_enable

List of Timer interrupts.

Values:

enumerator kCTIMER_Match0InterruptEnable: Match 0 interrupt

enumerator kCTIMER_Match1InterruptEnable: Match 1 interrupt

enumerator kCTIMER_Match2InterruptEnable: Match 2 interrupt

enumerator kCTIMER_Match3InterruptEnable: Match 3 interrupt

enum _ctimer_status_flags

List of Timer flags.

Values:

enumerator kCTIMER_Match0Flag: Match 0 interrupt flag

enumerator kCTIMER_Match1Flag: Match 1 interrupt flag

enumerator kCTIMER_Match2Flag: Match 2 interrupt flag

enumerator kCTIMER_Match3Flag: Match 3 interrupt flag

enum ctimer_callback_type_t

Callback type when registering for a callback. When registering a callback an array of function pointers is passed the size could be 1 or 8, the callback type will tell that.

Values:

enumerator kCTIMER_SingleCallback: Single Callback type where there is only one callback for the timer. based on the status flags different channels needs to be handled differently

enumerator kCTIMER_MultipleCallback: Multiple Callback type where there can be 8 valid callbacks, one per channel. for both match/capture

typedef enum _ctimer_capture_channel ctimer_capture_channel_t: List of Timer capture channels.

typedef enum _ctimer_capture_edge ctimer_capture_edge_t: List of capture edge options.

typedef enum _ctimer_match ctimer_match_t: List of Timer match registers.

typedef enum _ctimer_external_match ctimer_external_match_t: List of external match.

typedef enum _ctimer_match_output_control ctimer_match_output_control_t: List of output control options.

typedef enum _ctimer_timer_mode ctimer_timer_mode_t: List of Timer modes.

typedef enum _ctimer_interrupt_enable ctimer_interrupt_enable_t: List of Timer interrupts.

typedef enum _ctimer_status_flags ctimer_status_flags_t: List of Timer flags.

typedef void (*ctimer_callback_t)(uint32_t flags)

typedef struct _ctimer_match_config ctimer_match_config_t

Match configuration.

This structure holds the configuration settings for each match register.

typedef struct _ctimer_config ctimer_config_t

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config)

Setup the match register.

User configuration is used to setup the match value and action to be taken when a match occurs.

Parameters:

base – Ctimer peripheral base address
matchChannel – Match register to configure
config – Pointer to the match configuration structure

uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel)

Get the status of output match.

This function gets the status of output MAT, whether or not this output is connected to a pin. This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.

Parameters:

base – Ctimer peripheral base address
matchChannel – External match channel, user can obtain the status of multiple match channels at the same time by using the logic of “|” enumeration ctimer_external_match_t

Returns:

The mask of external match channel status flags. Users need to use the _ctimer_external_match type to decode the return variables.

void CTIMER_SetupCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, ctimer_capture_edge_t edge, bool enableInt)

Setup the capture.

Parameters:

base – Ctimer peripheral base address
capture – Capture channel to configure
edge – Edge on the channel that will trigger a capture
enableInt – Flag to enable channel interrupts, if enabled then the registered call back is called upon capture

static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)

Get the timer count value from TC register.

Parameters:

base – Ctimer peripheral base address.

Returns:

return the timer count value.

void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type)

Register callback.

Parameters:

base – Ctimer peripheral base address
cb_func – callback function
cb_type – callback function type, singular or multiple

static inline void CTIMER_Reset(CTIMER_Type *base)

Reset the counter.

The timer counter and prescale counter are reset on the next positive edge of the APB clock.

Parameters:

base – Ctimer peripheral base address

static inline void CTIMER_SetPrescale(CTIMER_Type *base, uint32_t prescale)

Setup the timer prescale value.

Specifies the maximum value for the Prescale Counter.

Parameters:

base – Ctimer peripheral base address
prescale – Prescale value

static inline uint32_t CTIMER_GetCaptureValue(CTIMER_Type *base, ctimer_capture_channel_t capture)

Get capture channel value.

Get the counter/timer value on the corresponding capture channel.

Parameters:

base – Ctimer peripheral base address
capture – Select capture channel

Returns:

The timer count capture value.

static inline void CTIMER_EnableResetMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable reset match channel.

Set the specified match channel reset operation.

Parameters:

base – Ctimer peripheral base address
match – match channel used
enable – Enable match channel reset operation.

static inline void CTIMER_EnableStopMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable stop match channel.

Set the specified match channel stop operation.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
enable – Enable match channel stop operation.

static inline void CTIMER_EnableMatchChannelReload(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable reload channel falling edge.

Enable the specified match channel reload match shadow value.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
enable – Enable .

static inline void CTIMER_EnableRisingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)

Enable capture channel rising edge.

Sets the specified capture channel for rising edge capture.

Parameters:

base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable rising edge capture.

static inline void CTIMER_EnableFallingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)

Enable capture channel falling edge.

Sets the specified capture channel for falling edge capture.

Parameters:

base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable falling edge capture.

static inline void CTIMER_SetShadowValue(CTIMER_Type *base, ctimer_match_t match, uint32_t matchvalue)

Set the specified match shadow channel.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
matchvalue – Reload the value of the corresponding match register.

struct _ctimer_match_config

#include <fsl_ctimer.h>

Match configuration.

This structure holds the configuration settings for each match register.

Public Members

uint32_t matchValue: This is stored in the match register

bool enableCounterReset: true: Match will reset the counter false: Match will not reser the counter

bool enableCounterStop: true: Match will stop the counter false: Match will not stop the counter

ctimer_match_output_control_t outControl: Action to be taken on a match on the EM bit/output

bool outPinInitState: Initial value of the EM bit/output

bool enableInterrupt: true: Generate interrupt upon match false: Do not generate interrupt on match

struct _ctimer_config

#include <fsl_ctimer.h>

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Public Members

ctimer_timer_mode_t mode: Timer mode

ctimer_capture_channel_t input: Input channel to increment the timer, used only in timer modes that rely on this input signal to increment TC

uint32_t prescale: Prescale value

DMA: Direct Memory Access Controller Driver

void DMA_Init(DMA_Type *base)

Initializes DMA peripheral.

This function enable the DMA clock, set descriptor table and enable DMA peripheral.

Parameters:

base – DMA peripheral base address.

void DMA_Deinit(DMA_Type *base)

Deinitializes DMA peripheral.

This function gates the DMA clock.

Parameters:

base – DMA peripheral base address.

void DMA_InstallDescriptorMemory(DMA_Type *base, void *addr)

Install DMA descriptor memory.

This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, althrough current DMA driver has a default DMA descriptor buffer, but it support one DMA descriptor for one channel only.

Parameters:

base – DMA base address.
addr – DMA descriptor address

static inline bool DMA_ChannelIsActive(DMA_Type *base, uint32_t channel)

Return whether DMA channel is processing transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for active state, false otherwise.

static inline bool DMA_ChannelIsBusy(DMA_Type *base, uint32_t channel)

Return whether DMA channel is busy.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for busy state, false otherwise.

static inline void DMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel)

Enables the interrupt source for the DMA transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel)

Disables the interrupt source for the DMA transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_EnableChannel(DMA_Type *base, uint32_t channel)

Enable DMA channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannel(DMA_Type *base, uint32_t channel)

Disable DMA channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_EnableChannelPeriphRq(DMA_Type *base, uint32_t channel)

Set PERIPHREQEN of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannelPeriphRq(DMA_Type *base, uint32_t channel)

Get PERIPHREQEN value of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for enabled PeriphRq, false for disabled.

void DMA_ConfigureChannelTrigger(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger)

Set trigger settings of DMA channel.

Deprecated:: Do not use this function. It has been superceded by DMA_SetChannelConfig.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
trigger – trigger configuration.

void DMA_SetChannelConfig(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger, bool isPeriph)

set channel config.

This function provide a interface to configure channel configuration reisters.

Parameters:

base – DMA base address.
channel – DMA channel number.
trigger – channel configurations structure.
isPeriph – true is periph request, false is not.

static inline uint32_t DMA_SetChannelXferConfig(bool reload, bool clrTrig, bool intA, bool intB, uint8_t width, uint8_t srcInc, uint8_t dstInc, uint32_t bytes)

DMA channel xfer transfer configurations.

Parameters:

reload – true is reload link descriptor after current exhaust, false is not
clrTrig – true is clear trigger status, wait software trigger, false is not
intA – enable interruptA
intB – enable interruptB
width – transfer width
srcInc – source address interleave size
dstInc – destination address interleave size
bytes – transfer bytes

Returns:

The vaule of xfer config

uint32_t DMA_GetRemainingBytes(DMA_Type *base, uint32_t channel)

Gets the remaining bytes of the current DMA descriptor transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

The number of bytes which have not been transferred yet.

static inline void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority)

Set priority of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
priority – Channel priority value.

static inline dma_priority_t DMA_GetChannelPriority(DMA_Type *base, uint32_t channel)

Get priority of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

Channel priority value.

static inline void DMA_SetChannelConfigValid(DMA_Type *base, uint32_t channel)

Set channel configuration valid.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DoChannelSoftwareTrigger(DMA_Type *base, uint32_t channel)

Do software trigger for the channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_LoadChannelTransferConfig(DMA_Type *base, uint32_t channel, uint32_t xfer)

Load channel transfer configurations.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
xfer – transfer configurations.

void DMA_CreateDescriptor(dma_descriptor_t *desc, dma_xfercfg_t *xfercfg, void *srcAddr, void *dstAddr, void *nextDesc)

Create application specific DMA descriptor to be used in a chain in transfer.

Deprecated:: Do not use this function. It has been superceded by DMA_SetupDescriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcAddr – Address of last item to transmit
dstAddr – Address of last item to receive.
nextDesc – Address of next descriptor in chain.

void DMA_SetupDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)

setup dma descriptor

Note: This function do not support configure wrap descriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.

void DMA_SetupChannelDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc, dma_burst_wrap_t wrapType, uint32_t burstSize)

setup dma channel descriptor

Note: This function support configure wrap descriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.
wrapType – burst wrap type.
burstSize – burst size, reference _dma_burst_size.

void DMA_LoadChannelDescriptor(DMA_Type *base, uint32_t channel, dma_descriptor_t *descriptor)

load channel transfer decriptor.

This function can be used to load desscriptor to driver internal channel descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

for the polling transfer, application can allocate a local descriptor memory table to prepare a descriptor firstly and then call this api to load the configured descriptor to driver descriptor table.

DMA_Init(DMA0);
DMA_EnableChannel(DMA0, DEMO_DMA_CHANNEL);
DMA_SetupDescriptor(desc, xferCfg, s_srcBuffer, &s_destBuffer[0], NULL);
DMA_LoadChannelDescriptor(DMA0, DEMO_DMA_CHANNEL, (dma_descriptor_t *)desc);
DMA_DoChannelSoftwareTrigger(DMA0, DEMO_DMA_CHANNEL);
while(DMA_ChannelIsBusy(DMA0, DEMO_DMA_CHANNEL))
{}

Parameters:

base – DMA base address.
channel – DMA channel.
descriptor – configured DMA descriptor.

void DMA_AbortTransfer(dma_handle_t *handle)

Abort running transfer by handle.

This function aborts DMA transfer specified by handle.

Parameters:

handle – DMA handle pointer.

void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel)

Creates the DMA handle.

This function is called if using transaction API for DMA. This function initializes the internal state of DMA handle.

Parameters:

handle – DMA handle pointer. The DMA handle stores callback function and parameters.
base – DMA peripheral base address.
channel – DMA channel number.

void DMA_SetCallback(dma_handle_t *handle, dma_callback callback, void *userData)

Installs a callback function for the DMA transfer.

This callback is called in DMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:

handle – DMA handle pointer.
callback – DMA callback function pointer.
userData – Parameter for callback function.

void DMA_PrepareTransfer(dma_transfer_config_t *config, void *srcAddr, void *dstAddr, uint32_t byteWidth, uint32_t transferBytes, dma_transfer_type_t type, void *nextDesc)

Prepares the DMA transfer structure.

Deprecated:: Do not use this function. It has been superceded by DMA_PrepareChannelTransfer. This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, so the source address must be 4 bytes aligned, or it shall result in source address error(SAE).

Parameters:

config – The user configuration structure of type dma_transfer_t.
srcAddr – DMA transfer source address.
dstAddr – DMA transfer destination address.
byteWidth – DMA transfer destination address width(bytes).
transferBytes – DMA transfer bytes to be transferred.
type – DMA transfer type.
nextDesc – Chain custom descriptor to transfer.

void DMA_PrepareChannelTransfer(dma_channel_config_t *config, void *srcStartAddr, void *dstStartAddr, uint32_t xferCfg, dma_transfer_type_t type, dma_channel_trigger_t *trigger, void *nextDesc)

Prepare channel transfer configurations.

This function used to prepare channel transfer configurations.

Parameters:

config – Pointer to DMA channel transfer configuration structure.
srcStartAddr – source start address.
dstStartAddr – destination start address.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
type – transfer type.
trigger – DMA channel trigger configurations.
nextDesc – address of next descriptor.

status_t DMA_SubmitTransfer(dma_handle_t *handle, dma_transfer_config_t *config)

Submits the DMA transfer request.

Deprecated:: Do not use this function. It has been superceded by DMA_SubmitChannelTransfer.

This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.

Parameters:

handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.

Return values:

kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_SubmitChannelTransferParameter(dma_handle_t *handle, uint32_t xferCfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)

Submit channel transfer paramter directly.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
bytes), srcStartAddr, dstStartAddr, NULL);
   DMA_StartTransfer(handle)

for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[3]);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc2);
   DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, NULL);
   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
bytes), srcStartAddr, dstStartAddr, nextDesc0);
   DMA_StartTransfer(handle);

Parameters:

handle – Pointer to DMA handle.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
srcStartAddr – source start address.
dstStartAddr – destination start address.
nextDesc – address of next descriptor.

void DMA_SubmitChannelDescriptor(dma_handle_t *handle, dma_descriptor_t *descriptor)

Submit channel descriptor.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, this functiono is typical for the ping pong case:

for the ping pong case, application should responsible for the descriptor, for example, application should prepare two descriptor table with macro.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[2]);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc0);
   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelDescriptor(handle,  nextDesc0);
   DMA_StartTransfer(handle);

Parameters:

handle – Pointer to DMA handle.
descriptor – descriptor to submit.

status_t DMA_SubmitChannelTransfer(dma_handle_t *handle, dma_channel_config_t *config)

Submits the DMA channel transfer request.

This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time. It is used for the case:

for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

DMA_CreateHandle(handle, base, channel)
DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,NULL);
DMA_SubmitChannelTransfer(handle, config)
DMA_StartTransfer(handle)

for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);
   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc2);
   DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, NULL);
   DMA_CreateHandle(handle, base, channel)
   DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
   DMA_SubmitChannelTransfer(handle, config)
   DMA_StartTransfer(handle)

for the ping pong case, application should responsible for link descriptor, for example, application should prepare two descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc0);
   DMA_CreateHandle(handle, base, channel)
   DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
   DMA_SubmitChannelTransfer(handle, config)
   DMA_StartTransfer(handle)

Parameters:

handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.

Return values:

kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_StartTransfer(dma_handle_t *handle)

DMA start transfer.

This function enables the channel request. User can call this function after submitting the transfer request It will trigger transfer start with software trigger only when hardware trigger is not used.

Parameters:

handle – DMA handle pointer.

void DMA_IRQHandle(DMA_Type *base)

DMA IRQ handler for descriptor transfer complete.

This function clears the channel major interrupt flag and call the callback function if it is not NULL.

Parameters:

base – DMA base address.

FSL_DMA_DRIVER_VERSION

DMA driver version.

Version 2.5.3.

_dma_transfer_status DMA transfer status

Values:

enumerator kStatus_DMA_Busy: Channel is busy and can’t handle the transfer request.

_dma_addr_interleave_size dma address interleave size

Values:

enumerator kDMA_AddressInterleave0xWidth: dma source/destination address no interleave

enumerator kDMA_AddressInterleave1xWidth: dma source/destination address interleave 1xwidth

enumerator kDMA_AddressInterleave2xWidth: dma source/destination address interleave 2xwidth

enumerator kDMA_AddressInterleave4xWidth: dma source/destination address interleave 3xwidth

_dma_transfer_width dma transfer width

Values:

enumerator kDMA_Transfer8BitWidth: dma channel transfer bit width is 8 bit

enumerator kDMA_Transfer16BitWidth: dma channel transfer bit width is 16 bit

enumerator kDMA_Transfer32BitWidth: dma channel transfer bit width is 32 bit

enum _dma_priority

DMA channel priority.

Values:

enumerator kDMA_ChannelPriority0: Highest channel priority - priority 0

enumerator kDMA_ChannelPriority1: Channel priority 1

enumerator kDMA_ChannelPriority2: Channel priority 2

enumerator kDMA_ChannelPriority3: Channel priority 3

enumerator kDMA_ChannelPriority4: Channel priority 4

enumerator kDMA_ChannelPriority5: Channel priority 5

enumerator kDMA_ChannelPriority6: Channel priority 6

enumerator kDMA_ChannelPriority7: Lowest channel priority - priority 7

enum _dma_int

DMA interrupt flags.

Values:

enumerator kDMA_IntA: DMA interrupt flag A

enumerator kDMA_IntB: DMA interrupt flag B

enumerator kDMA_IntError: DMA interrupt flag error

enum _dma_trigger_type

DMA trigger type.

Values:

enumerator kDMA_NoTrigger: Trigger is disabled

enumerator kDMA_LowLevelTrigger: Low level active trigger

enumerator kDMA_HighLevelTrigger: High level active trigger

enumerator kDMA_FallingEdgeTrigger: Falling edge active trigger

enumerator kDMA_RisingEdgeTrigger: Rising edge active trigger

_dma_burst_size DMA burst size

Values:

enumerator kDMA_BurstSize1: burst size 1 transfer

enumerator kDMA_BurstSize2: burst size 2 transfer

enumerator kDMA_BurstSize4: burst size 4 transfer

enumerator kDMA_BurstSize8: burst size 8 transfer

enumerator kDMA_BurstSize16: burst size 16 transfer

enumerator kDMA_BurstSize32: burst size 32 transfer

enumerator kDMA_BurstSize64: burst size 64 transfer

enumerator kDMA_BurstSize128: burst size 128 transfer

enumerator kDMA_BurstSize256: burst size 256 transfer

enumerator kDMA_BurstSize512: burst size 512 transfer

enumerator kDMA_BurstSize1024: burst size 1024 transfer

enum _dma_trigger_burst

DMA trigger burst.

Values:

enumerator kDMA_SingleTransfer: Single transfer

enumerator kDMA_LevelBurstTransfer: Burst transfer driven by level trigger

enumerator kDMA_EdgeBurstTransfer1: Perform 1 transfer by edge trigger

enumerator kDMA_EdgeBurstTransfer2: Perform 2 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer4: Perform 4 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer8: Perform 8 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer16: Perform 16 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer32: Perform 32 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer64: Perform 64 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer128: Perform 128 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer256: Perform 256 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer512: Perform 512 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer1024: Perform 1024 transfers by edge trigger

enum _dma_burst_wrap

DMA burst wrapping.

Values:

enumerator kDMA_NoWrap: Wrapping is disabled

enumerator kDMA_SrcWrap: Wrapping is enabled for source

enumerator kDMA_DstWrap: Wrapping is enabled for destination

enumerator kDMA_SrcAndDstWrap: Wrapping is enabled for source and destination

enum _dma_transfer_type

DMA transfer type.

Values:

enumerator kDMA_MemoryToMemory: Transfer from memory to memory (increment source and destination)

enumerator kDMA_PeripheralToMemory: Transfer from peripheral to memory (increment only destination)

enumerator kDMA_MemoryToPeripheral: Transfer from memory to peripheral (increment only source)

enumerator kDMA_StaticToStatic: Peripheral to static memory (do not increment source or destination)

typedef struct _dma_descriptor dma_descriptor_t: DMA descriptor structure.

typedef struct _dma_xfercfg dma_xfercfg_t: DMA transfer configuration.

typedef enum _dma_priority dma_priority_t: DMA channel priority.

typedef enum _dma_int dma_irq_t: DMA interrupt flags.

typedef enum _dma_trigger_type dma_trigger_type_t: DMA trigger type.

typedef enum _dma_trigger_burst dma_trigger_burst_t: DMA trigger burst.

typedef enum _dma_burst_wrap dma_burst_wrap_t: DMA burst wrapping.

typedef enum _dma_transfer_type dma_transfer_type_t: DMA transfer type.

typedef struct _dma_channel_trigger dma_channel_trigger_t: DMA channel trigger.

typedef struct _dma_channel_config dma_channel_config_t: DMA channel trigger.

typedef struct _dma_transfer_config dma_transfer_config_t: DMA transfer configuration.

typedef void (*dma_callback)(struct _dma_handle *handle, void *userData, bool transferDone, uint32_t intmode): Define Callback function for DMA.

typedef struct _dma_handle dma_handle_t: DMA transfer handle structure.

DMA_MAX_TRANSFER_COUNT: DMA max transfer size.

FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE

DMA channel numbers.

DMA head link descriptor table align size

DMA_ALLOCATE_HEAD_DESCRIPTORS(name, number)

DMA head descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_HEAD_DESCRIPTORS_AT_NONCACHEABLE(name, number)

DMA head descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS(name, number)

DMA link descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS_AT_NONCACHEABLE(name, number)

DMA link descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_DATA_TRANSFER_BUFFER(name, width): DMA transfer buffer address need to align with the transfer width.

DMA_CHANNEL_GROUP(channel)

DMA_CHANNEL_INDEX(base, channel)

DMA_COMMON_REG_GET(base, channel, reg): DMA linked descriptor address algin size.

DMA_COMMON_CONST_REG_GET(base, channel, reg)

DMA_COMMON_REG_SET(base, channel, reg, value)

DMA_DESCRIPTOR_END_ADDRESS(start, inc, bytes, width)

DMA descriptor end address calculate.

Parameters:

start – start address
inc – address interleave size
bytes – transfer bytes
width – transfer width

DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes)

struct _dma_descriptor

#include <fsl_dma.h>

DMA descriptor structure.

Public Members

volatile uint32_t xfercfg: Transfer configuration

void *srcEndAddr: Last source address of DMA transfer

void *dstEndAddr: Last destination address of DMA transfer

void *linkToNextDesc: Address of next DMA descriptor in chain

struct _dma_xfercfg

#include <fsl_dma.h>

DMA transfer configuration.

Public Members

bool valid: Descriptor is ready to transfer

bool reload: Reload channel configuration register after current descriptor is exhausted

bool swtrig: Perform software trigger. Transfer if fired when ‘valid’ is set

bool clrtrig: Clear trigger

bool intA: Raises IRQ when transfer is done and set IRQA status register flag

bool intB: Raises IRQ when transfer is done and set IRQB status register flag

uint8_t byteWidth: Byte width of data to transfer

uint8_t srcInc: Increment source address by ‘srcInc’ x ‘byteWidth’

uint8_t dstInc: Increment destination address by ‘dstInc’ x ‘byteWidth’

uint16_t transferCount: Number of transfers

struct _dma_channel_trigger

#include <fsl_dma.h>

DMA channel trigger.

Public Members

dma_trigger_type_t type: Select hardware trigger as edge triggered or level triggered.

dma_trigger_burst_t burst: Select whether hardware triggers cause a single or burst transfer.

dma_burst_wrap_t wrap: Select wrap type, source wrap or dest wrap, or both.

struct _dma_channel_config

#include <fsl_dma.h>

DMA channel trigger.

Public Members

void *srcStartAddr: Source data address

void *dstStartAddr: Destination data address

void *nextDesc: Chain custom descriptor

uint32_t xferCfg: channel transfer configurations

dma_channel_trigger_t *trigger: DMA trigger type

bool isPeriph: select the request type

struct _dma_transfer_config

#include <fsl_dma.h>

DMA transfer configuration.

Public Members

uint8_t *srcAddr: Source data address

uint8_t *dstAddr: Destination data address

uint8_t *nextDesc: Chain custom descriptor

dma_xfercfg_t xfercfg: Transfer options

bool isPeriph: DMA transfer is driven by peripheral

struct _dma_handle

#include <fsl_dma.h>

DMA transfer handle structure.

Public Members

dma_callback callback: Callback function. Invoked when transfer of descriptor with interrupt flag finishes

void *userData: Callback function parameter

DMA_Type *base: DMA peripheral base address

uint8_t channel: DMA channel number

DMIC: Digital Microphone

DMIC DMA Driver

status_t DMIC_TransferCreateHandleDMA(DMIC_Type *base, dmic_dma_handle_t *handle, dmic_dma_transfer_callback_t callback, void *userData, dma_handle_t *rxDmaHandle)

Initializes the DMIC handle which is used in transactional functions.

Parameters:

base – DMIC peripheral base address.
handle – Pointer to dmic_dma_handle_t structure.
callback – Callback function.
userData – User data.
rxDmaHandle – User-requested DMA handle for RX DMA transfer.

status_t DMIC_TransferReceiveDMA(DMIC_Type *base, dmic_dma_handle_t *handle, dmic_transfer_t *xfer, uint32_t channel)

Receives data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – DMIC DMA transfer structure. See dmic_transfer_t.
channel – DMIC start channel number.

Return values:

kStatus_Success –

void DMIC_TransferAbortReceiveDMA(DMIC_Type *base, dmic_dma_handle_t *handle)

Aborts the received data using DMA.

This function aborts the received data using DMA.

Parameters:

base – DMIC peripheral base address
handle – Pointer to dmic_dma_handle_t structure

status_t DMIC_TransferGetReceiveCountDMA(DMIC_Type *base, dmic_dma_handle_t *handle, uint32_t *count)

Get the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:

base – DMIC peripheral base address.
handle – DMIC handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

void DMIC_InstallDMADescriptorMemory(dmic_dma_handle_t *handle, void *linkAddr, size_t linkNum)

Install DMA descriptor memory.

This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, it should be called after DMIC_TransferCreateHandleDMA. User should be take care about the address of DMA descriptor pool which required align with 16BYTE at least.

Parameters:

handle – Pointer to DMA channel transfer handle.
linkAddr – DMA link descriptor address.
linkNum – DMA link descriptor number.

FSL_DMIC_DMA_DRIVER_VERSION: DMIC DMA driver version 2.4.0.

typedef struct _dmic_transfer dmic_transfer_t: DMIC transfer structure.

typedef struct _dmic_dma_handle dmic_dma_handle_t

typedef void (*dmic_dma_transfer_callback_t)(DMIC_Type *base, dmic_dma_handle_t *handle, status_t status, void *userData): DMIC transfer callback function.

struct _dmic_transfer

#include <fsl_dmic_dma.h>

DMIC transfer structure.

Public Members

void *data: The buffer of data to be transfer.

uint8_t dataWidth: DMIC support 16bit/32bit

size_t dataSize: The byte count to be transfer.

uint8_t dataAddrInterleaveSize: destination address interleave size

struct _dmic_transfer *linkTransfer: use to support link transfer

struct _dmic_dma_handle

#include <fsl_dmic_dma.h>

DMIC DMA handle.

Public Members

DMIC_Type *base: DMIC peripheral base address.

dma_handle_t *rxDmaHandle: The DMA RX channel used.

dmic_dma_transfer_callback_t callback: Callback function.

void *userData: DMIC callback function parameter.

size_t transferSize: Size of the data to receive.

volatile uint8_t state: Internal state of DMIC DMA transfer

uint32_t channel: DMIC channel used.

bool isChannelValid: DMIC channel initialization flag

dma_descriptor_t *desLink: descriptor pool pointer

size_t linkNum: number of descriptor in descriptors pool

DMIC Driver

uint32_t DMIC_GetInstance(DMIC_Type *base)

Get the DMIC instance from peripheral base address.

Parameters:

base – DMIC peripheral base address.

Returns:

DMIC instance.

void DMIC_Init(DMIC_Type *base)

Turns DMIC Clock on.

Parameters:

base – : DMIC base

Returns:

Nothing

void DMIC_DeInit(DMIC_Type *base)

Turns DMIC Clock off.

Parameters:

base – : DMIC base

Returns:

Nothing

void DMIC_SetOperationMode(DMIC_Type *base, operation_mode_t mode)

Set DMIC operating mode.

Deprecated:: Do not use this function. It has been superceded by DMIC_EnableChannelInterrupt, DMIC_EnableChannelDma.

Parameters:

base – : The base address of DMIC interface
mode – : DMIC mode

Returns:

Nothing

void DMIC_Use2fs(DMIC_Type *base, bool use2fs)

Configure Clock scaling.

Parameters:

base – : The base address of DMIC interface
use2fs – : clock scaling

Returns:

Nothing

void DMIC_CfgChannelDc(DMIC_Type *base, dmic_channel_t channel, dc_removal_t dc_cut_level, uint32_t post_dc_gain_reduce, bool saturate16bit)

Configure DMIC channel.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
dc_cut_level – : dc_removal_t, Cut off Frequency
post_dc_gain_reduce – : Fine gain adjustment in the form of a number of bits to downshift.
saturate16bit – : If selects 16-bit saturation.

static inline void DMIC_EnableChannelSignExtend(DMIC_Type *base, dmic_channel_t channel, bool enable)

Enbale channel sign extend which allows processing of 24bit audio data on 32bit machines.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
enable – : true is enable sign extend, false is disable sign extend

void DMIC_ConfigChannel(DMIC_Type *base, dmic_channel_t channel, stereo_side_t side, dmic_channel_config_t *channel_config)

Configure DMIC channel.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
side – : stereo_side_t, choice of left or right
channel_config – : Channel configuration

Returns:

Nothing

void DMIC_EnableChannnel(DMIC_Type *base, uint32_t channelmask)

Enable a particualr channel.

Parameters:

base – : The base address of DMIC interface
channelmask – reference _dmic_channel_mask

Returns:

Nothing

void DMIC_FifoChannel(DMIC_Type *base, uint32_t channel, uint32_t trig_level, uint32_t enable, uint32_t resetn)

Configure fifo settings for DMIC channel.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
trig_level – : FIFO trigger level
enable – : FIFO level
resetn – : FIFO reset

Returns:

Nothing

static inline void DMIC_EnableChannelInterrupt(DMIC_Type *base, dmic_channel_t channel, bool enable)

Enable a particualr channel interrupt request.

Parameters:

base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable

static inline void DMIC_EnableChannelDma(DMIC_Type *base, dmic_channel_t channel, bool enable)

Enable a particualr channel dma request.

Parameters:

base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable

static inline void DMIC_EnableChannelFifo(DMIC_Type *base, dmic_channel_t channel, bool enable)

Enable a particualr channel fifo.

Parameters:

base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable

static inline void DMIC_DoFifoReset(DMIC_Type *base, dmic_channel_t channel)

Channel fifo reset.

Parameters:

base – : The base address of DMIC interface
channel – : Channel selection

static inline uint32_t DMIC_FifoGetStatus(DMIC_Type *base, uint32_t channel)

Get FIFO status.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel

Returns:

FIFO status

static inline void DMIC_FifoClearStatus(DMIC_Type *base, uint32_t channel, uint32_t mask)

Clear FIFO status.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
mask – : Bits to be cleared

Returns:

FIFO status

static inline uint32_t DMIC_FifoGetData(DMIC_Type *base, uint32_t channel)

Get FIFO data.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel

Returns:

FIFO data

static inline uint32_t DMIC_FifoGetAddress(DMIC_Type *base, uint32_t channel)

Get FIFO address.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel

Returns:

FIFO data

void DMIC_ResetChannelDecimator(DMIC_Type *base, uint32_t channelMask, bool reset)

DMIC channel Decimator reset.

Parameters:

base – : The base address of DMIC interface
channelMask – : DMIC channel mask, reference _dmic_channel_mask
reset – : true is reset decimator, false is release decimator.

static inline void DMIC_EnableChannelGlobalSync(DMIC_Type *base, uint32_t channelMask, uint32_t syncCounter)

Enable DMIC channel global sync function.

Parameters:

base – : The base address of DMIC interface
channelMask – : DMIC channel mask, reference _dmic_channel_mask
syncCounter – :sync counter will trigger a pulse whenever count reaches CCOUNTVAL. If CCOUNTVAL is set to 0, there will be a pulse on every cycle

static inline void DMIC_DisableChannelGlobalSync(DMIC_Type *base, uint32_t channelMask)

Disbale DMIC channel global sync function.

Parameters:

base – : The base address of DMIC interface
channelMask – : DMIC channel mask, reference _dmic_channel_mask

void DMIC_EnableIntCallback(DMIC_Type *base, dmic_callback_t cb)

Enable callback.

This function enables the interrupt for the selected DMIC peripheral. The callback function is not enabled until this function is called.

Parameters:

base – Base address of the DMIC peripheral.
cb – callback Pointer to store callback function.

Return values:

None. –

void DMIC_DisableIntCallback(DMIC_Type *base, dmic_callback_t cb)

Disable callback.

This function disables the interrupt for the selected DMIC peripheral.

Parameters:

base – Base address of the DMIC peripheral.
cb – callback Pointer to store callback function..

Return values:

None. –

static inline void DMIC_SetGainNoiseEstHwvad(DMIC_Type *base, uint32_t value)

Sets the gain value for the noise estimator.

Parameters:

base – DMIC base pointer
value – gain value for the noise estimator.

Return values:

None. –

static inline void DMIC_SetGainSignalEstHwvad(DMIC_Type *base, uint32_t value)

Sets the gain value for the signal estimator.

Parameters:

base – DMIC base pointer
value – gain value for the signal estimator.

Return values:

None. –

static inline void DMIC_SetFilterCtrlHwvad(DMIC_Type *base, uint32_t value)

Sets the hwvad filter cutoff frequency parameter.

Parameters:

base – DMIC base pointer
value – cut off frequency value.

Return values:

None. –

static inline void DMIC_SetInputGainHwvad(DMIC_Type *base, uint32_t value)

Sets the input gain of hwvad.

Parameters:

base – DMIC base pointer
value – input gain value for hwvad.

Return values:

None. –

static inline void DMIC_CtrlClrIntrHwvad(DMIC_Type *base, bool st10)

Clears hwvad internal interrupt flag.

Parameters:

base – DMIC base pointer
st10 – bit value.

Return values:

None. –

static inline void DMIC_FilterResetHwvad(DMIC_Type *base, bool rstt)

Resets hwvad filters.

Parameters:

base – DMIC base pointer
rstt – Reset bit value.

Return values:

None. –

static inline uint16_t DMIC_GetNoiseEnvlpEst(DMIC_Type *base)

Gets the value from output of the filter z7.

Parameters:

base – DMIC base pointer

Return values:

output – of filter z7.

void DMIC_HwvadEnableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb)

Enable hwvad callback.

This function enables the hwvad interrupt for the selected DMIC peripheral. The callback function is not enabled until this function is called.

Parameters:

base – Base address of the DMIC peripheral.
vadcb – callback Pointer to store callback function.

Return values:

None. –

void DMIC_HwvadDisableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb)

Disable callback.

This function disables the hwvad interrupt for the selected DMIC peripheral.

Parameters:

base – Base address of the DMIC peripheral.
vadcb – callback Pointer to store callback function..

Return values:

None. –

FSL_DMIC_DRIVER_VERSION: DMIC driver version 2.3.2.

_dmic_status DMIC transfer status.

Values:

enumerator kStatus_DMIC_Busy: DMIC is busy

enumerator kStatus_DMIC_Idle: DMIC is idle

enumerator kStatus_DMIC_OverRunError: DMIC over run Error

enumerator kStatus_DMIC_UnderRunError: DMIC under run Error

enum _operation_mode

DMIC different operation modes.

Values:

enumerator kDMIC_OperationModeInterrupt: Interrupt mode

enumerator kDMIC_OperationModeDma: DMA mode

enum _stereo_side

DMIC left/right values.

Values:

enumerator kDMIC_Left: Left Stereo channel

enumerator kDMIC_Right: Right Stereo channel

enum pdm_div_t

DMIC Clock pre-divider values.

Values:

enumerator kDMIC_PdmDiv1: DMIC pre-divider set in divide by 1

enumerator kDMIC_PdmDiv2: DMIC pre-divider set in divide by 2

enumerator kDMIC_PdmDiv3: DMIC pre-divider set in divide by 3

enumerator kDMIC_PdmDiv4: DMIC pre-divider set in divide by 4

enumerator kDMIC_PdmDiv6: DMIC pre-divider set in divide by 6

enumerator kDMIC_PdmDiv8: DMIC pre-divider set in divide by 8

enumerator kDMIC_PdmDiv12: DMIC pre-divider set in divide by 12

enumerator kDMIC_PdmDiv16: DMIC pre-divider set in divide by 16

enumerator kDMIC_PdmDiv24: DMIC pre-divider set in divide by 24

enumerator kDMIC_PdmDiv32: DMIC pre-divider set in divide by 32

enumerator kDMIC_PdmDiv48: DMIC pre-divider set in divide by 48

enumerator kDMIC_PdmDiv64: DMIC pre-divider set in divide by 64

enumerator kDMIC_PdmDiv96: DMIC pre-divider set in divide by 96

enumerator kDMIC_PdmDiv128: DMIC pre-divider set in divide by 128

enum _compensation

Pre-emphasis Filter coefficient value for 2FS and 4FS modes.

Values:

enumerator kDMIC_CompValueZero: Compensation 0

enumerator kDMIC_CompValueNegativePoint16: Compensation -0.16

enumerator kDMIC_CompValueNegativePoint15: Compensation -0.15

enumerator kDMIC_CompValueNegativePoint13: Compensation -0.13

enum _dc_removal

DMIC DC filter control values.

Values:

enumerator kDMIC_DcNoRemove: Flat response no filter

enumerator kDMIC_DcCut155: Cut off Frequency is 155 Hz

enumerator kDMIC_DcCut78: Cut off Frequency is 78 Hz

enumerator kDMIC_DcCut39: Cut off Frequency is 39 Hz

enum _dmic_channel

DMIC Channel number.

Values:

enumerator kDMIC_Channel0: DMIC channel 0

enumerator kDMIC_Channel1: DMIC channel 1

_dmic_channel_mask DMIC Channel mask.

Values:

enumerator kDMIC_EnableChannel0: DMIC channel 0 mask

enumerator kDMIC_EnableChannel1: DMIC channel 1 mask

enum _dmic_phy_sample_rate

DMIC and decimator sample rates.

Values:

enumerator kDMIC_PhyFullSpeed: Decimator gets one sample per each chosen clock edge of PDM interface

enumerator kDMIC_PhyHalfSpeed: PDM clock to Microphone is halved, decimator receives each sample twice

typedef enum _operation_mode operation_mode_t: DMIC different operation modes.

typedef enum _stereo_side stereo_side_t: DMIC left/right values.

typedef enum _compensation compensation_t: Pre-emphasis Filter coefficient value for 2FS and 4FS modes.

typedef enum _dc_removal dc_removal_t: DMIC DC filter control values.

typedef enum _dmic_channel dmic_channel_t: DMIC Channel number.

typedef enum _dmic_phy_sample_rate dmic_phy_sample_rate_t: DMIC and decimator sample rates.

typedef struct _dmic_channel_config dmic_channel_config_t: DMIC Channel configuration structure.

typedef void (*dmic_callback_t)(void): DMIC Callback function.

typedef void (*dmic_hwvad_callback_t)(void): HWVAD Callback function.

struct _dmic_channel_config

#include <fsl_dmic.h>

DMIC Channel configuration structure.

Public Members

pdm_div_t divhfclk: DMIC Clock pre-divider values

uint32_t osr: oversampling rate(CIC decimation rate) for PCM

int32_t gainshft: 4FS PCM data gain control

compensation_t preac2coef: Pre-emphasis Filter coefficient value for 2FS

compensation_t preac4coef: Pre-emphasis Filter coefficient value for 4FS

dc_removal_t dc_cut_level: DMIC DC filter control values.

uint32_t post_dc_gain_reduce: Fine gain adjustment in the form of a number of bits to downshift

dmic_phy_sample_rate_t sample_rate: DMIC and decimator sample rates

bool saturate16bit: Selects 16-bit saturation. 0 means results roll over if out range and do not saturate. 1 means if the result overflows, it saturates at 0xFFFF for positive overflow and 0x8000 for negative overflow.

bool enableSignExtend: sign extend feature which allows processing of 24bit audio data on 32bit machine

DSP Driver

enum _dsp_static_vec_sel

Fusion DSP vector table select.

Values:

enumerator kDSP_StatVecSelPrimary

enumerator kDSP_StatVecSelAlternate

typedef enum _dsp_static_vec_sel dsp_static_vec_sel_t: Fusion DSP vector table select.

typedef struct _dsp_copy_image dsp_copy_image_t

Structure for DSP copy image to destination address.

Defines start and destination address for copying image with given size.

void DSP_Init(void)

Initializing DSP core.

Power up DSP Enable DSP clock Reset DSP peripheral

static inline void DSP_SetVecRemap(dsp_static_vec_sel_t statVecSel, uint32_t remap)

Set Fusion DSP static vector table remap.

Parameters:

statVecSel – static vector base address selection
remap – static vector remap, valid value from 0x0U to 0xFFFU

void DSP_CopyImage(dsp_copy_image_t *dspCopyImage)

Copy DSP image to destination address.

Copy DSP image from source address to destination address with given size.

Parameters:

dspCopyImage – Structure contains information for DSP copy image to destination address.

void DSP_Deinit(void): Deinitializing DSP core.

static inline void DSP_Start(void): Start DSP core.

static inline void DSP_Stop(void): Stop DSP core.

FSL_DSP_DRIVER_VERSION: dsp driver version 2.0.1.

uint32_t *srcAddr

uint32_t *destAddr

uint32_t size

struct _dsp_copy_image

#include <fsl_dsp.h>

Structure for DSP copy image to destination address.

Defines start and destination address for copying image with given size.

FLEXCOMM: FLEXCOMM Driver

FLEXCOMM Driver

FSL_FLEXCOMM_DRIVER_VERSION: FlexCOMM driver version 2.0.2.

enum FLEXCOMM_PERIPH_T

FLEXCOMM peripheral modes.

Values:

enumerator FLEXCOMM_PERIPH_NONE: No peripheral

enumerator FLEXCOMM_PERIPH_USART: USART peripheral

enumerator FLEXCOMM_PERIPH_SPI: SPI Peripheral

enumerator FLEXCOMM_PERIPH_I2C: I2C Peripheral

enumerator FLEXCOMM_PERIPH_I2S_TX: I2S TX Peripheral

enumerator FLEXCOMM_PERIPH_I2S_RX: I2S RX Peripheral

typedef void (*flexcomm_irq_handler_t)(void *base, void *handle): Typedef for interrupt handler.

IRQn_Type const kFlexcommIrqs[]: Array with IRQ number for each FLEXCOMM module.

uint32_t FLEXCOMM_GetInstance(void *base): Returns instance number for FLEXCOMM module with given base address.

status_t FLEXCOMM_Init(void *base, FLEXCOMM_PERIPH_T periph): Initializes FLEXCOMM and selects peripheral mode according to the second parameter.

void FLEXCOMM_SetIRQHandler(void *base, flexcomm_irq_handler_t handler, void *flexcommHandle): Sets IRQ handler for given FLEXCOMM module. It is used by drivers register IRQ handler according to FLEXCOMM mode.

FlexIO: FlexIO Driver

FlexIO Driver

void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig)

Gets the default configuration to configure the FlexIO module. The configuration can used directly to call the FLEXIO_Configure().

Example:

flexio_config_t config;
FLEXIO_GetDefaultConfig(&config);

Parameters:

userConfig – pointer to flexio_config_t structure

void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig)

Configures the FlexIO with a FlexIO configuration. The configuration structure can be filled by the user or be set with default values by FLEXIO_GetDefaultConfig().

Example

flexio_config_t config = {
.enableFlexio = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false
};
FLEXIO_Configure(base, &config);

Parameters:

base – FlexIO peripheral base address
userConfig – pointer to flexio_config_t structure

void FLEXIO_Deinit(FLEXIO_Type *base)

Gates the FlexIO clock. Call this API to stop the FlexIO clock.

Note

After calling this API, call the FLEXO_Init to use the FlexIO module.

Parameters:

base – FlexIO peripheral base address

uint32_t FLEXIO_GetInstance(FLEXIO_Type *base)

Get instance number for FLEXIO module.

Parameters:

base – FLEXIO peripheral base address.

void FLEXIO_Reset(FLEXIO_Type *base)

Resets the FlexIO module.

Parameters:

base – FlexIO peripheral base address

static inline void FLEXIO_Enable(FLEXIO_Type *base, bool enable)

Enables the FlexIO module operation.

Parameters:

base – FlexIO peripheral base address
enable – true to enable, false to disable.

static inline uint32_t FLEXIO_ReadPinInput(FLEXIO_Type *base)

Reads the input data on each of the FlexIO pins.

Parameters:

base – FlexIO peripheral base address

Returns:

FlexIO pin input data

static inline uint8_t FLEXIO_GetShifterState(FLEXIO_Type *base)

Gets the current state pointer for state mode use.

Parameters:

base – FlexIO peripheral base address

Returns:

current State pointer

void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig)

Configures the shifter with the shifter configuration. The configuration structure covers both the SHIFTCTL and SHIFTCFG registers. To configure the shifter to the proper mode, select which timer controls the shifter to shift, whether to generate start bit/stop bit, and the polarity of start bit and stop bit.

Example

flexio_shifter_config_t config = {
.timerSelect = 0,
.timerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinPolarity = kFLEXIO_PinActiveLow,
.shifterMode = kFLEXIO_ShifterModeTransmit,
.inputSource = kFLEXIO_ShifterInputFromPin,
.shifterStop = kFLEXIO_ShifterStopBitHigh,
.shifterStart = kFLEXIO_ShifterStartBitLow
};
FLEXIO_SetShifterConfig(base, &config);

Parameters:

base – FlexIO peripheral base address
index – Shifter index
shifterConfig – Pointer to flexio_shifter_config_t structure

void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig)

Configures the timer with the timer configuration. The configuration structure covers both the TIMCTL and TIMCFG registers. To configure the timer to the proper mode, select trigger source for timer and the timer pin output and the timing for timer.

Example

flexio_timer_config_t config = {
.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow,
.triggerSource = kFLEXIO_TimerTriggerSourceInternal,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinSelect = 0,
.pinPolarity = kFLEXIO_PinActiveHigh,
.timerMode = kFLEXIO_TimerModeDual8BitBaudBit,
.timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset,
.timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput,
.timerReset = kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput,
.timerDisable = kFLEXIO_TimerDisableOnTimerCompare,
.timerEnable = kFLEXIO_TimerEnableOnTriggerHigh,
.timerStop = kFLEXIO_TimerStopBitEnableOnTimerDisable,
.timerStart = kFLEXIO_TimerStartBitEnabled
};
FLEXIO_SetTimerConfig(base, &config);

Parameters:

base – FlexIO peripheral base address
index – Timer index
timerConfig – Pointer to the flexio_timer_config_t structure

static inline void FLEXIO_SetClockMode(FLEXIO_Type *base, uint8_t index, flexio_timer_decrement_source_t clocksource)

This function set the value of the prescaler on flexio channels.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.
index – Timer index
clocksource – Set clock value

static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the shifter status interrupt. The interrupt generates when the corresponding SSF is set.

Note

For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the shifter status interrupt. The interrupt won’t generate when the corresponding SSF is set.

Note

For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the shifter error interrupt. The interrupt generates when the corresponding SEF is set.

Note

For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the shifter error interrupt. The interrupt won’t generate when the corresponding SEF is set.

Note

For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the timer status interrupt. The interrupt generates when the corresponding SSF is set.

Note

For multiple timer status interrupt enable, for example, two timer status enable, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline void FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the timer status interrupt. The interrupt won’t generate when the corresponding SSF is set.

Note

For multiple timer status interrupt enable, for example, two timer status enable, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline uint32_t FLEXIO_GetShifterStatusFlags(FLEXIO_Type *base)

Gets the shifter status flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Shifter status flags

static inline void FLEXIO_ClearShifterStatusFlags(FLEXIO_Type *base, uint32_t mask)

Clears the shifter status flags.

Note

For clearing multiple shifter status flags, for example, two shifter status flags, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline uint32_t FLEXIO_GetShifterErrorFlags(FLEXIO_Type *base)

Gets the shifter error flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Shifter error flags

static inline void FLEXIO_ClearShifterErrorFlags(FLEXIO_Type *base, uint32_t mask)

Clears the shifter error flags.

Note

For clearing multiple shifter error flags, for example, two shifter error flags, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline uint32_t FLEXIO_GetTimerStatusFlags(FLEXIO_Type *base)

Gets the timer status flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Timer status flags

static inline void FLEXIO_ClearTimerStatusFlags(FLEXIO_Type *base, uint32_t mask)

Clears the timer status flags.

Note

For clearing multiple timer status flags, for example, two timer status flags, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline void FLEXIO_EnableShifterStatusDMA(FLEXIO_Type *base, uint32_t mask, bool enable)

Enables/disables the shifter status DMA. The DMA request generates when the corresponding SSF is set.

Note

For multiple shifter status DMA enables, for example, calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)
enable – True to enable, false to disable.

uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index)

Gets the shifter buffer address for the DMA transfer usage.

Parameters:

base – FlexIO peripheral base address
type – Shifter type of flexio_shifter_buffer_type_t
index – Shifter index

Returns:

Corresponding shifter buffer index

status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr)

Registers the handle and the interrupt handler for the FlexIO-simulated peripheral.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.
handle – Pointer to the handler for FlexIO simulated peripheral.
isr – FlexIO simulated peripheral interrupt handler.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_UnregisterHandleIRQ(void *base)

Unregisters the handle and the interrupt handler for the FlexIO-simulated peripheral.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

static inline void FLEXIO_ClearPortOutput(FLEXIO_Type *base, uint32_t mask)

Sets the output level of the multiple FLEXIO pins to the logic 0.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_SetPortOutput(FLEXIO_Type *base, uint32_t mask)

Sets the output level of the multiple FLEXIO pins to the logic 1.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_TogglePortOutput(FLEXIO_Type *base, uint32_t mask)

Reverses the current output logic of the multiple FLEXIO pins.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_PinWrite(FLEXIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the FLEXIO pins to the logic 1 or 0.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.
output – FLEXIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline void FLEXIO_EnablePinOutput(FLEXIO_Type *base, uint32_t pin)

Enables the FLEXIO output pin function.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

static inline uint32_t FLEXIO_PinRead(FLEXIO_Type *base, uint32_t pin)

Reads the current input value of the FLEXIO pin.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

Return values:

FLEXIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

static inline uint32_t FLEXIO_GetPinStatus(FLEXIO_Type *base, uint32_t pin)

Gets the FLEXIO input pin status.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

Return values:

FLEXIO – port input status

0: corresponding pin input capture no status.
1: corresponding pin input capture rising or falling edge.

static inline void FLEXIO_ClearPortStatus(FLEXIO_Type *base, uint32_t mask)

Clears the multiple FLEXIO input pins status.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

FSL_FLEXIO_DRIVER_VERSION: FlexIO driver version.

enum _flexio_timer_trigger_polarity

Define time of timer trigger polarity.

Values:

enumerator kFLEXIO_TimerTriggerPolarityActiveHigh: Active high.

enumerator kFLEXIO_TimerTriggerPolarityActiveLow: Active low.

enum _flexio_timer_trigger_source

Define type of timer trigger source.

Values:

enumerator kFLEXIO_TimerTriggerSourceExternal: External trigger selected.

enumerator kFLEXIO_TimerTriggerSourceInternal: Internal trigger selected.

enum _flexio_pin_config

Define type of timer/shifter pin configuration.

Values:

enumerator kFLEXIO_PinConfigOutputDisabled: Pin output disabled.

enumerator kFLEXIO_PinConfigOpenDrainOrBidirection: Pin open drain or bidirectional output enable.

enumerator kFLEXIO_PinConfigBidirectionOutputData: Pin bidirectional output data.

enumerator kFLEXIO_PinConfigOutput: Pin output.

enum _flexio_pin_polarity

Definition of pin polarity.

Values:

enumerator kFLEXIO_PinActiveHigh: Active high.

enumerator kFLEXIO_PinActiveLow: Active low.

enum _flexio_timer_mode

Define type of timer work mode.

Values:

enumerator kFLEXIO_TimerModeDisabled: Timer Disabled.

enumerator kFLEXIO_TimerModeDual8BitBaudBit: Dual 8-bit counters baud/bit mode.

enumerator kFLEXIO_TimerModeDual8BitPWM: Dual 8-bit counters PWM mode.

enumerator kFLEXIO_TimerModeSingle16Bit: Single 16-bit counter mode.

enum _flexio_timer_output

Define type of timer initial output or timer reset condition.

Values:

enumerator kFLEXIO_TimerOutputOneNotAffectedByReset: Logic one when enabled and is not affected by timer reset.

enumerator kFLEXIO_TimerOutputZeroNotAffectedByReset: Logic zero when enabled and is not affected by timer reset.

enumerator kFLEXIO_TimerOutputOneAffectedByReset: Logic one when enabled and on timer reset.

enumerator kFLEXIO_TimerOutputZeroAffectedByReset: Logic zero when enabled and on timer reset.

enum _flexio_timer_decrement_source

Define type of timer decrement.

Values:

enumerator kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput: Decrement counter on FlexIO clock, Shift clock equals Timer output.

enumerator kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput: Decrement counter on Trigger input (both edges), Shift clock equals Timer output.

enumerator kFLEXIO_TimerDecSrcOnPinInputShiftPinInput: Decrement counter on Pin input (both edges), Shift clock equals Pin input.

enumerator kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput: Decrement counter on Trigger input (both edges), Shift clock equals Trigger input.

enum _flexio_timer_reset_condition

Define type of timer reset condition.

Values:

enumerator kFLEXIO_TimerResetNever: Timer never reset.

enumerator kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput: Timer reset on Timer Pin equal to Timer Output.

enumerator kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput: Timer reset on Timer Trigger equal to Timer Output.

enumerator kFLEXIO_TimerResetOnTimerPinRisingEdge: Timer reset on Timer Pin rising edge.

enumerator kFLEXIO_TimerResetOnTimerTriggerRisingEdge: Timer reset on Trigger rising edge.

enumerator kFLEXIO_TimerResetOnTimerTriggerBothEdge: Timer reset on Trigger rising or falling edge.

enum _flexio_timer_disable_condition

Define type of timer disable condition.

Values:

enumerator kFLEXIO_TimerDisableNever: Timer never disabled.

enumerator kFLEXIO_TimerDisableOnPreTimerDisable: Timer disabled on Timer N-1 disable.

enumerator kFLEXIO_TimerDisableOnTimerCompare: Timer disabled on Timer compare.

enumerator kFLEXIO_TimerDisableOnTimerCompareTriggerLow: Timer disabled on Timer compare and Trigger Low.

enumerator kFLEXIO_TimerDisableOnPinBothEdge: Timer disabled on Pin rising or falling edge.

enumerator kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh: Timer disabled on Pin rising or falling edge provided Trigger is high.

enumerator kFLEXIO_TimerDisableOnTriggerFallingEdge: Timer disabled on Trigger falling edge.

enum _flexio_timer_enable_condition

Define type of timer enable condition.

Values:

enumerator kFLEXIO_TimerEnabledAlways: Timer always enabled.

enumerator kFLEXIO_TimerEnableOnPrevTimerEnable: Timer enabled on Timer N-1 enable.

enumerator kFLEXIO_TimerEnableOnTriggerHigh: Timer enabled on Trigger high.

enumerator kFLEXIO_TimerEnableOnTriggerHighPinHigh: Timer enabled on Trigger high and Pin high.

enumerator kFLEXIO_TimerEnableOnPinRisingEdge: Timer enabled on Pin rising edge.

enumerator kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh: Timer enabled on Pin rising edge and Trigger high.

enumerator kFLEXIO_TimerEnableOnTriggerRisingEdge: Timer enabled on Trigger rising edge.

enumerator kFLEXIO_TimerEnableOnTriggerBothEdge: Timer enabled on Trigger rising or falling edge.

enum _flexio_timer_stop_bit_condition

Define type of timer stop bit generate condition.

Values:

enumerator kFLEXIO_TimerStopBitDisabled: Stop bit disabled.

enumerator kFLEXIO_TimerStopBitEnableOnTimerCompare: Stop bit is enabled on timer compare.

enumerator kFLEXIO_TimerStopBitEnableOnTimerDisable: Stop bit is enabled on timer disable.

enumerator kFLEXIO_TimerStopBitEnableOnTimerCompareDisable: Stop bit is enabled on timer compare and timer disable.

enum _flexio_timer_start_bit_condition

Define type of timer start bit generate condition.

Values:

enumerator kFLEXIO_TimerStartBitDisabled: Start bit disabled.

enumerator kFLEXIO_TimerStartBitEnabled: Start bit enabled.

enum _flexio_timer_output_state

FlexIO as PWM channel output state.

Values:

enumerator kFLEXIO_PwmLow: The output state of PWM channel is low

enumerator kFLEXIO_PwmHigh: The output state of PWM channel is high

enum _flexio_shifter_timer_polarity

Define type of timer polarity for shifter control.

Values:

enumerator kFLEXIO_ShifterTimerPolarityOnPositive: Shift on positive edge of shift clock.

enumerator kFLEXIO_ShifterTimerPolarityOnNegitive: Shift on negative edge of shift clock.

enum _flexio_shifter_mode

Define type of shifter working mode.

Values:

enumerator kFLEXIO_ShifterDisabled: Shifter is disabled.

enumerator kFLEXIO_ShifterModeReceive: Receive mode.

enumerator kFLEXIO_ShifterModeTransmit: Transmit mode.

enumerator kFLEXIO_ShifterModeMatchStore: Match store mode.

enumerator kFLEXIO_ShifterModeMatchContinuous: Match continuous mode.

enumerator kFLEXIO_ShifterModeState: SHIFTBUF contents are used for storing programmable state attributes.

enumerator kFLEXIO_ShifterModeLogic: SHIFTBUF contents are used for implementing programmable logic look up table.

enum _flexio_shifter_input_source

Define type of shifter input source.

Values:

enumerator kFLEXIO_ShifterInputFromPin: Shifter input from pin.

enumerator kFLEXIO_ShifterInputFromNextShifterOutput: Shifter input from Shifter N+1.

enum _flexio_shifter_stop_bit

Define of STOP bit configuration.

Values:

enumerator kFLEXIO_ShifterStopBitDisable: Disable shifter stop bit.

enumerator kFLEXIO_ShifterStopBitLow: Set shifter stop bit to logic low level.

enumerator kFLEXIO_ShifterStopBitHigh: Set shifter stop bit to logic high level.

enum _flexio_shifter_start_bit

Define type of START bit configuration.

Values:

enumerator kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable: Disable shifter start bit, transmitter loads data on enable.

enumerator kFLEXIO_ShifterStartBitDisabledLoadDataOnShift: Disable shifter start bit, transmitter loads data on first shift.

enumerator kFLEXIO_ShifterStartBitLow: Set shifter start bit to logic low level.

enumerator kFLEXIO_ShifterStartBitHigh: Set shifter start bit to logic high level.

enum _flexio_shifter_buffer_type

Define FlexIO shifter buffer type.

Values:

enumerator kFLEXIO_ShifterBuffer: Shifter Buffer N Register.

enumerator kFLEXIO_ShifterBufferBitSwapped: Shifter Buffer N Bit Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferByteSwapped: Shifter Buffer N Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferBitByteSwapped: Shifter Buffer N Bit Swapped Register.

enumerator kFLEXIO_ShifterBufferNibbleByteSwapped: Shifter Buffer N Nibble Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferHalfWordSwapped: Shifter Buffer N Half Word Swapped Register.

enumerator kFLEXIO_ShifterBufferNibbleSwapped: Shifter Buffer N Nibble Swapped Register.

enum _flexio_gpio_direction

FLEXIO gpio direction definition.

Values:

enumerator kFLEXIO_DigitalInput: Set current pin as digital input

enumerator kFLEXIO_DigitalOutput: Set current pin as digital output

enum _flexio_pin_input_config

FLEXIO gpio input config.

Values:

enumerator kFLEXIO_InputInterruptDisabled: Interrupt request is disabled.

enumerator kFLEXIO_InputInterruptEnable: Interrupt request is enable.

enumerator kFLEXIO_FlagRisingEdgeEnable: Input pin flag on rising edge.

enumerator kFLEXIO_FlagFallingEdgeEnable: Input pin flag on falling edge.

typedef enum _flexio_timer_trigger_polarity flexio_timer_trigger_polarity_t: Define time of timer trigger polarity.

typedef enum _flexio_timer_trigger_source flexio_timer_trigger_source_t: Define type of timer trigger source.

typedef enum _flexio_pin_config flexio_pin_config_t: Define type of timer/shifter pin configuration.

typedef enum _flexio_pin_polarity flexio_pin_polarity_t: Definition of pin polarity.

typedef enum _flexio_timer_mode flexio_timer_mode_t: Define type of timer work mode.

typedef enum _flexio_timer_output flexio_timer_output_t: Define type of timer initial output or timer reset condition.

typedef enum _flexio_timer_decrement_source flexio_timer_decrement_source_t: Define type of timer decrement.

typedef enum _flexio_timer_reset_condition flexio_timer_reset_condition_t: Define type of timer reset condition.

typedef enum _flexio_timer_disable_condition flexio_timer_disable_condition_t: Define type of timer disable condition.

typedef enum _flexio_timer_enable_condition flexio_timer_enable_condition_t: Define type of timer enable condition.

typedef enum _flexio_timer_stop_bit_condition flexio_timer_stop_bit_condition_t: Define type of timer stop bit generate condition.

typedef enum _flexio_timer_start_bit_condition flexio_timer_start_bit_condition_t: Define type of timer start bit generate condition.

typedef enum _flexio_timer_output_state flexio_timer_output_state_t: FlexIO as PWM channel output state.

typedef enum _flexio_shifter_timer_polarity flexio_shifter_timer_polarity_t: Define type of timer polarity for shifter control.

typedef enum _flexio_shifter_mode flexio_shifter_mode_t: Define type of shifter working mode.

typedef enum _flexio_shifter_input_source flexio_shifter_input_source_t: Define type of shifter input source.

typedef enum _flexio_shifter_stop_bit flexio_shifter_stop_bit_t: Define of STOP bit configuration.

typedef enum _flexio_shifter_start_bit flexio_shifter_start_bit_t: Define type of START bit configuration.

typedef enum _flexio_shifter_buffer_type flexio_shifter_buffer_type_t: Define FlexIO shifter buffer type.

typedef struct _flexio_config_ flexio_config_t: Define FlexIO user configuration structure.

typedef struct _flexio_timer_config flexio_timer_config_t: Define FlexIO timer configuration structure.

typedef struct _flexio_shifter_config flexio_shifter_config_t: Define FlexIO shifter configuration structure.

typedef enum _flexio_gpio_direction flexio_gpio_direction_t: FLEXIO gpio direction definition.

typedef enum _flexio_pin_input_config flexio_pin_input_config_t: FLEXIO gpio input config.

typedef struct _flexio_gpio_config flexio_gpio_config_t

The FLEXIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, use inputConfig param. If configured as an output pin, use outputLogic.

typedef void (*flexio_isr_t)(void *base, void *handle): typedef for FlexIO simulated driver interrupt handler.

FLEXIO_Type *const s_flexioBases[]: Pointers to flexio bases for each instance.

const clock_ip_name_t s_flexioClocks[]: Pointers to flexio clocks for each instance.

void FLEXIO_SetPinConfig(FLEXIO_Type *base, uint32_t pin, flexio_gpio_config_t *config)

Configure a FLEXIO pin used by the board.

To Config the FLEXIO PIN, define a pin configuration, as either input or output, in the user file. Then, call the FLEXIO_SetPinConfig() function.

This is an example to define an input pin or an output pin configuration.

Define a digital input pin configuration,
flexio_gpio_config_t config =
{
  kFLEXIO_DigitalInput,
  0U,
  kFLEXIO_FlagRisingEdgeEnable | kFLEXIO_InputInterruptEnable,
}
Define a digital output pin configuration,
flexio_gpio_config_t config =
{
  kFLEXIO_DigitalOutput,
  0U,
  0U
}

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.
config – FLEXIO pin configuration pointer.

FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x): Calculate FlexIO timer trigger.

FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(x)

FLEXIO_TIMER_TRIGGER_SEL_TIMn(x)

struct _flexio_config_

#include <fsl_flexio.h>

Define FlexIO user configuration structure.

Public Members

bool enableFlexio: Enable/disable FlexIO module

bool enableInDoze: Enable/disable FlexIO operation in doze mode

bool enableInDebug: Enable/disable FlexIO operation in debug mode

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

struct _flexio_timer_config

#include <fsl_flexio.h>

Define FlexIO timer configuration structure.

Public Members

uint32_t triggerSelect: The internal trigger selection number using MACROs.

flexio_timer_trigger_polarity_t triggerPolarity: Trigger Polarity.

flexio_timer_trigger_source_t triggerSource: Trigger Source, internal (see ‘trgsel’) or external.

flexio_pin_config_t pinConfig: Timer Pin Configuration.

uint32_t pinSelect: Timer Pin number Select.

flexio_pin_polarity_t pinPolarity: Timer Pin Polarity.

flexio_timer_mode_t timerMode: Timer work Mode.

flexio_timer_output_t timerOutput: Configures the initial state of the Timer Output and whether it is affected by the Timer reset.

flexio_timer_decrement_source_t timerDecrement: Configures the source of the Timer decrement and the source of the Shift clock.

flexio_timer_reset_condition_t timerReset: Configures the condition that causes the timer counter (and optionally the timer output) to be reset.

flexio_timer_disable_condition_t timerDisable: Configures the condition that causes the Timer to be disabled and stop decrementing.

flexio_timer_enable_condition_t timerEnable: Configures the condition that causes the Timer to be enabled and start decrementing.

flexio_timer_stop_bit_condition_t timerStop: Timer STOP Bit generation.

flexio_timer_start_bit_condition_t timerStart: Timer STRAT Bit generation.

uint32_t timerCompare: Value for Timer Compare N Register.

struct _flexio_shifter_config

#include <fsl_flexio.h>

Define FlexIO shifter configuration structure.

Public Members

uint32_t timerSelect: Selects which Timer is used for controlling the logic/shift register and generating the Shift clock.

flexio_shifter_timer_polarity_t timerPolarity: Timer Polarity.

flexio_pin_config_t pinConfig: Shifter Pin Configuration.

uint32_t pinSelect: Shifter Pin number Select.

flexio_pin_polarity_t pinPolarity: Shifter Pin Polarity.

flexio_shifter_mode_t shifterMode: Configures the mode of the Shifter.

uint32_t parallelWidth: Configures the parallel width when using parallel mode.

flexio_shifter_input_source_t inputSource: Selects the input source for the shifter.

flexio_shifter_stop_bit_t shifterStop: Shifter STOP bit.

flexio_shifter_start_bit_t shifterStart: Shifter START bit.

struct _flexio_gpio_config

#include <fsl_flexio.h>

The FLEXIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, use inputConfig param. If configured as an output pin, use outputLogic.

Public Members

flexio_gpio_direction_t pinDirection: FLEXIO pin direction, input or output

uint8_t outputLogic: Set a default output logic, which has no use in input

uint8_t inputConfig: Set an input config

FlexIO I2C Master Driver

status_t FLEXIO_I2C_CheckForBusyBus(FLEXIO_I2C_Type *base)

Make sure the bus isn’t already pulled down.

Check the FLEXIO pin status to see whether either of SDA and SCL pin is pulled down.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure..

Return values:

kStatus_Success –
kStatus_FLEXIO_I2C_Busy –

status_t FLEXIO_I2C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, and configures the FlexIO I2C hardware configuration.

Example

FLEXIO_I2C_Type base = {
.flexioBase = FLEXIO,
.SDAPinIndex = 0,
.SCLPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_i2c_master_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 100000
};
FLEXIO_I2C_MasterInit(base, &config, srcClock_Hz);

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
masterConfig – Pointer to flexio_i2c_master_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

Return values:

kStatus_Success – Initialization successful
kStatus_InvalidArgument – The source clock exceed upper range limitation

void FLEXIO_I2C_MasterDeinit(FLEXIO_I2C_Type *base)

De-initializes the FlexIO I2C master peripheral. Calling this API Resets the FlexIO I2C master shifer and timer config, module can’t work unless the FLEXIO_I2C_MasterInit is called.

Parameters:

base – pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterGetDefaultConfig(flexio_i2c_master_config_t *masterConfig)

Gets the default configuration to configure the FlexIO module. The configuration can be used directly for calling the FLEXIO_I2C_MasterInit().

Example:

flexio_i2c_master_config_t config;
FLEXIO_I2C_MasterGetDefaultConfig(&config);

Parameters:

masterConfig – Pointer to flexio_i2c_master_config_t structure.

static inline void FLEXIO_I2C_MasterEnable(FLEXIO_I2C_Type *base, bool enable)

Enables/disables the FlexIO module operation.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
enable – Pass true to enable module, false does not have any effect.

uint32_t FLEXIO_I2C_MasterGetStatusFlags(FLEXIO_I2C_Type *base)

Gets the FlexIO I2C master status flags.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure

Returns:

Status flag, use status flag to AND _flexio_i2c_master_status_flags can get the related status.

void FLEXIO_I2C_MasterClearStatusFlags(FLEXIO_I2C_Type *base, uint32_t mask)

Clears the FlexIO I2C master status flags.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Status flag. The parameter can be any combination of the following values:
- kFLEXIO_I2C_RxFullFlag
- kFLEXIO_I2C_ReceiveNakFlag

void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)

Enables the FlexIO i2c master interrupt requests.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Interrupt source. Currently only one interrupt request source:
- kFLEXIO_I2C_TransferCompleteInterruptEnable

void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)

Disables the FlexIO I2C master interrupt requests.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Interrupt source.

void FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the FlexIO I2C master transfer baudrate.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
baudRate_Bps – the baud rate value in HZ
srcClock_Hz – source clock in HZ

void FLEXIO_I2C_MasterStart(FLEXIO_I2C_Type *base, uint8_t address, flexio_i2c_direction_t direction)

Sends START + 7-bit address to the bus.

Note

This API should be called when the transfer configuration is ready to send a START signal and 7-bit address to the bus. This is a non-blocking API, which returns directly after the address is put into the data register but the address transfer is not finished on the bus. Ensure that the kFLEXIO_I2C_RxFullFlag status is asserted before calling this API.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
address – 7-bit address.
direction – transfer direction. This parameter is one of the values in flexio_i2c_direction_t:
- kFLEXIO_I2C_Write: Transmit
- kFLEXIO_I2C_Read: Receive

void FLEXIO_I2C_MasterStop(FLEXIO_I2C_Type *base)

Sends the stop signal on the bus.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterRepeatedStart(FLEXIO_I2C_Type *base)

Sends the repeated start signal on the bus.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterAbortStop(FLEXIO_I2C_Type *base)

Sends the stop signal when transfer is still on-going.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterEnableAck(FLEXIO_I2C_Type *base, bool enable)

Configures the sent ACK/NAK for the following byte.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
enable – True to configure send ACK, false configure to send NAK.

status_t FLEXIO_I2C_MasterSetTransferCount(FLEXIO_I2C_Type *base, uint16_t count)

Sets the number of bytes to be transferred from a start signal to a stop signal.

Note

Call this API before a transfer begins because the timer generates a number of clocks according to the number of bytes that need to be transferred.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
count – Number of bytes need to be transferred from a start signal to a re-start/stop signal

Return values:

kStatus_Success – Successfully configured the count.
kStatus_InvalidArgument – Input argument is invalid.

static inline void FLEXIO_I2C_MasterWriteByte(FLEXIO_I2C_Type *base, uint32_t data)

Writes one byte of data to the I2C bus.

Note

This is a non-blocking API, which returns directly after the data is put into the data register but the data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
data – a byte of data.

static inline uint8_t FLEXIO_I2C_MasterReadByte(FLEXIO_I2C_Type *base)

Reads one byte of data from the I2C bus.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the data is ready in the register.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

Returns:

data byte read.

status_t FLEXIO_I2C_MasterWriteBlocking(FLEXIO_I2C_Type *base, const uint8_t *txBuff, uint8_t txSize)

Sends a buffer of data in bytes.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
txBuff – The data bytes to send.
txSize – The number of data bytes to send.

Return values:

kStatus_Success – Successfully write data.
kStatus_FLEXIO_I2C_Nak – Receive NAK during writing data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

status_t FLEXIO_I2C_MasterReadBlocking(FLEXIO_I2C_Type *base, uint8_t *rxBuff, uint8_t rxSize)

Receives a buffer of bytes.

Note

This function blocks via polling until all bytes have been received.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
rxBuff – The buffer to store the received bytes.
rxSize – The number of data bytes to be received.

Return values:

kStatus_Success – Successfully read data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

status_t FLEXIO_I2C_MasterTransferBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_transfer_t *xfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to receiving NAK.

Parameters:

base – pointer to FLEXIO_I2C_Type structure.
xfer – pointer to flexio_i2c_master_transfer_t structure.

Returns:

status of status_t.

status_t FLEXIO_I2C_MasterTransferCreateHandle(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_callback_t callback, void *userData)

Initializes the I2C handle which is used in transactional functions.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
handle – Pointer to flexio_i2c_master_handle_t structure to store the transfer state.
callback – Pointer to user callback function.
userData – User param passed to the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/isr table out of range.

status_t FLEXIO_I2C_MasterTransferNonBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_t *xfer)

Performs a master interrupt non-blocking transfer on the I2C bus.

Note

The API returns immediately after the transfer initiates. Call FLEXIO_I2C_MasterTransferGetCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_FLEXIO_I2C_Busy, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state
xfer – pointer to flexio_i2c_master_transfer_t structure

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_FLEXIO_I2C_Busy – FlexIO I2C is not idle, is running another transfer.

status_t FLEXIO_I2C_MasterTransferGetCount(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, size_t *count)

Gets the master transfer status during a interrupt non-blocking transfer.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.
kStatus_Success – Successfully return the count.

void FLEXIO_I2C_MasterTransferAbort(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle)

Aborts an interrupt non-blocking transfer early.

Note

This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state

void FLEXIO_I2C_MasterTransferHandleIRQ(void *i2cType, void *i2cHandle)

Master interrupt handler.

Parameters:

i2cType – Pointer to FLEXIO_I2C_Type structure
i2cHandle – Pointer to flexio_i2c_master_transfer_t structure

FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION

FlexIO I2C transfer status.

Values:

enumerator kStatus_FLEXIO_I2C_Busy: I2C is busy doing transfer.

enumerator kStatus_FLEXIO_I2C_Idle: I2C is busy doing transfer.

enumerator kStatus_FLEXIO_I2C_Nak: NAK received during transfer.

enumerator kStatus_FLEXIO_I2C_Timeout: Timeout polling status flags.

enum _flexio_i2c_master_interrupt

Define FlexIO I2C master interrupt mask.

Values:

enumerator kFLEXIO_I2C_TxEmptyInterruptEnable: Tx buffer empty interrupt enable.

enumerator kFLEXIO_I2C_RxFullInterruptEnable: Rx buffer full interrupt enable.

enum _flexio_i2c_master_status_flags

Define FlexIO I2C master status mask.

Values:

enumerator kFLEXIO_I2C_TxEmptyFlag: Tx shifter empty flag.

enumerator kFLEXIO_I2C_RxFullFlag: Rx shifter full/Transfer complete flag.

enumerator kFLEXIO_I2C_ReceiveNakFlag: Receive NAK flag.

enum _flexio_i2c_direction

Direction of master transfer.

Values:

enumerator kFLEXIO_I2C_Write: Master send to slave.

enumerator kFLEXIO_I2C_Read: Master receive from slave.

typedef enum _flexio_i2c_direction flexio_i2c_direction_t: Direction of master transfer.

typedef struct _flexio_i2c_type FLEXIO_I2C_Type: Define FlexIO I2C master access structure typedef.

typedef struct _flexio_i2c_master_config flexio_i2c_master_config_t: Define FlexIO I2C master user configuration structure.

typedef struct _flexio_i2c_master_transfer flexio_i2c_master_transfer_t: Define FlexIO I2C master transfer structure.

typedef struct _flexio_i2c_master_handle flexio_i2c_master_handle_t: FlexIO I2C master handle typedef.

typedef void (*flexio_i2c_master_transfer_callback_t)(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, status_t status, void *userData): FlexIO I2C master transfer callback typedef.

I2C_RETRY_TIMES: Retry times for waiting flag.

struct _flexio_i2c_type

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t SDAPinIndex: Pin select for I2C SDA.

uint8_t SCLPinIndex: Pin select for I2C SCL.

uint8_t shifterIndex[2]: Shifter index used in FlexIO I2C.

uint8_t timerIndex[3]: Timer index used in FlexIO I2C.

uint32_t baudrate: Master transfer baudrate, used to calculate delay time.

struct _flexio_i2c_master_config

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master user configuration structure.

Public Members

bool enableMaster: Enables the FlexIO I2C peripheral at initialization time.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

struct _flexio_i2c_master_transfer

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master transfer structure.

Public Members

uint32_t flags: Transfer flag which controls the transfer, reserved for FlexIO I2C.

uint8_t slaveAddress: 7-bit slave address.

flexio_i2c_direction_t direction: Transfer direction, read or write.

uint32_t subaddress: Sub address. Transferred MSB first.

uint8_t subaddressSize: Size of command buffer.

uint8_t volatile *data: Transfer buffer.

volatile size_t dataSize: Transfer size.

struct _flexio_i2c_master_handle

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master handle structure.

Public Members

flexio_i2c_master_transfer_t transfer: FlexIO I2C master transfer copy.

size_t transferSize: Total bytes to be transferred.

uint8_t state: Transfer state maintained during transfer.

flexio_i2c_master_transfer_callback_t completionCallback: Callback function called at transfer event. Callback function called at transfer event.

void *userData: Callback parameter passed to callback function.

bool needRestart: Whether master needs to send re-start signal.

FlexIO I2S Driver

void FLEXIO_I2S_Init(FLEXIO_I2S_Type *base, const flexio_i2s_config_t *config)

Initializes the FlexIO I2S.

This API configures FlexIO pins and shifter to I2S and configures the FlexIO I2S with a configuration structure. The configuration structure can be filled by the user, or be set with default values by FLEXIO_I2S_GetDefaultConfig().

Note

This API should be called at the beginning of the application to use the FlexIO I2S driver. Otherwise, any access to the FlexIO I2S module can cause hard fault because the clock is not enabled.

Parameters:

base – FlexIO I2S base pointer
config – FlexIO I2S configure structure.

void FLEXIO_I2S_GetDefaultConfig(flexio_i2s_config_t *config)

Sets the FlexIO I2S configuration structure to default values.

The purpose of this API is to get the configuration structure initialized for use in FLEXIO_I2S_Init(). Users may use the initialized structure unchanged in FLEXIO_I2S_Init() or modify some fields of the structure before calling FLEXIO_I2S_Init().

Parameters:

config – pointer to master configuration structure

void FLEXIO_I2S_Deinit(FLEXIO_I2S_Type *base)

De-initializes the FlexIO I2S.

Calling this API resets the FlexIO I2S shifter and timer config. After calling this API, call the FLEXO_I2S_Init to use the FlexIO I2S module.

Parameters:

base – FlexIO I2S base pointer

static inline void FLEXIO_I2S_Enable(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S module operation.

Parameters:

base – Pointer to FLEXIO_I2S_Type
enable – True to enable, false dose not have any effect.

uint32_t FLEXIO_I2S_GetStatusFlags(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S status flags.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

Status flag, which are ORed by the enumerators in the _flexio_i2s_status_flags.

void FLEXIO_I2S_EnableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)

Enables the FlexIO I2S interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
mask – interrupt source

void FLEXIO_I2S_DisableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)

Disables the FlexIO I2S interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – pointer to FLEXIO_I2S_Type structure
mask – interrupt source

static inline void FLEXIO_I2S_TxEnableDMA(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S Tx DMA requests.

Parameters:

base – FlexIO I2S base pointer
enable – True means enable DMA, false means disable DMA.

static inline void FLEXIO_I2S_RxEnableDMA(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S Rx DMA requests.

Parameters:

base – FlexIO I2S base pointer
enable – True means enable DMA, false means disable DMA.

static inline uint32_t FLEXIO_I2S_TxGetDataRegisterAddress(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S send data register address.

This function returns the I2S data register address, mainly used by DMA/eDMA.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

FlexIO i2s send data register address.

static inline uint32_t FLEXIO_I2S_RxGetDataRegisterAddress(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S receive data register address.

This function returns the I2S data register address, mainly used by DMA/eDMA.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

FlexIO i2s receive data register address.

void FLEXIO_I2S_MasterSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S audio format in master mode.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
format – Pointer to FlexIO I2S audio data format structure.
srcClock_Hz – I2S master clock source frequency in Hz.

void FLEXIO_I2S_SlaveSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format)

Configures the FlexIO I2S audio format in slave mode.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
format – Pointer to FlexIO I2S audio data format structure.

status_t FLEXIO_I2S_WriteBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *txData, size_t size)

Sends data using a blocking method.

Note

This function blocks via polling until data is ready to be sent.

Parameters:

base – FlexIO I2S base pointer.
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
txData – Pointer to the data to be written.
size – Bytes to be written.

Return values:

kStatus_Success – Successfully write data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

static inline void FLEXIO_I2S_WriteData(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint32_t data)

Writes data into a data register.

Parameters:

base – FlexIO I2S base pointer.
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
data – Data to be written.

status_t FLEXIO_I2S_ReadBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *rxData, size_t size)

Receives a piece of data using a blocking method.

Note

This function blocks via polling until data is ready to be sent.

Parameters:

base – FlexIO I2S base pointer
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
rxData – Pointer to the data to be read.
size – Bytes to be read.

Return values:

kStatus_Success – Successfully read data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

static inline uint32_t FLEXIO_I2S_ReadData(FLEXIO_I2S_Type *base)

Reads a data from the data register.

Parameters:

base – FlexIO I2S base pointer

Returns:

Data read from data register.

void FLEXIO_I2S_TransferTxCreateHandle(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_callback_t callback, void *userData)

Initializes the FlexIO I2S handle.

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs. Call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
handle – Pointer to flexio_i2s_handle_t structure to store the transfer state.
callback – FlexIO I2S callback function, which is called while finished a block.
userData – User parameter for the FlexIO I2S callback.

void FLEXIO_I2S_TransferSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S audio format.

Audio format can be changed at run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – FlexIO I2S handle pointer.
format – Pointer to audio data format structure.
srcClock_Hz – FlexIO I2S bit clock source frequency in Hz. This parameter should be 0 while in slave mode.

void FLEXIO_I2S_TransferRxCreateHandle(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_callback_t callback, void *userData)

Initializes the FlexIO I2S receive handle.

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs. Call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure to store the transfer state.
callback – FlexIO I2S callback function, which is called while finished a block.
userData – User parameter for the FlexIO I2S callback.

status_t FLEXIO_I2S_TransferSendNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs an interrupt non-blocking send transfer on FlexIO I2S.

Note

The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status and check whether the transfer is finished. If the return status is 0, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
xfer – Pointer to flexio_i2s_transfer_t structure

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_FLEXIO_I2S_TxBusy – Previous transmission still not finished, data not all written to TX register yet.
kStatus_InvalidArgument – The input parameter is invalid.

status_t FLEXIO_I2S_TransferReceiveNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs an interrupt non-blocking receive transfer on FlexIO I2S.

Note

The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status to check whether the transfer is finished. If the return status is 0, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
xfer – Pointer to flexio_i2s_transfer_t structure

Return values:

kStatus_Success – Successfully start the data receive.
kStatus_FLEXIO_I2S_RxBusy – Previous receive still not finished.
kStatus_InvalidArgument – The input parameter is invalid.

void FLEXIO_I2S_TransferAbortSend(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)

Aborts the current send.

Note

This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer in a early time.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state

void FLEXIO_I2S_TransferAbortReceive(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)

Aborts the current receive.

Note

This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer in a early time.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state

status_t FLEXIO_I2S_TransferGetSendCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)

Gets the remaining bytes to be sent.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
count – Bytes sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)

Gets the remaining bytes to be received.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
count – Bytes recieved.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

Returns:

count Bytes received.

void FLEXIO_I2S_TransferTxHandleIRQ(void *i2sBase, void *i2sHandle)

Tx interrupt handler.

Parameters:

i2sBase – Pointer to FLEXIO_I2S_Type structure.
i2sHandle – Pointer to flexio_i2s_handle_t structure

void FLEXIO_I2S_TransferRxHandleIRQ(void *i2sBase, void *i2sHandle)

Rx interrupt handler.

Parameters:

i2sBase – Pointer to FLEXIO_I2S_Type structure.
i2sHandle – Pointer to flexio_i2s_handle_t structure.

FSL_FLEXIO_I2S_DRIVER_VERSION: FlexIO I2S driver version 2.2.0.

FlexIO I2S transfer status.

Values:

enumerator kStatus_FLEXIO_I2S_Idle: FlexIO I2S is in idle state

enumerator kStatus_FLEXIO_I2S_TxBusy: FlexIO I2S Tx is busy

enumerator kStatus_FLEXIO_I2S_RxBusy: FlexIO I2S Tx is busy

enumerator kStatus_FLEXIO_I2S_Error: FlexIO I2S error occurred

enumerator kStatus_FLEXIO_I2S_QueueFull: FlexIO I2S transfer queue is full.

enumerator kStatus_FLEXIO_I2S_Timeout: FlexIO I2S timeout polling status flags.

enum _flexio_i2s_master_slave

Master or slave mode.

Values:

enumerator kFLEXIO_I2S_Master: Master mode

enumerator kFLEXIO_I2S_Slave: Slave mode

_flexio_i2s_interrupt_enable Define FlexIO FlexIO I2S interrupt mask.

Values:

enumerator kFLEXIO_I2S_TxDataRegEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_I2S_RxDataRegFullInterruptEnable: Receive buffer full interrupt enable.

_flexio_i2s_status_flags Define FlexIO FlexIO I2S status mask.

Values:

enumerator kFLEXIO_I2S_TxDataRegEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_I2S_RxDataRegFullFlag: Receive buffer full flag.

enum _flexio_i2s_sample_rate

Audio sample rate.

Values:

enumerator kFLEXIO_I2S_SampleRate8KHz: Sample rate 8000Hz

enumerator kFLEXIO_I2S_SampleRate11025Hz: Sample rate 11025Hz

enumerator kFLEXIO_I2S_SampleRate12KHz: Sample rate 12000Hz

enumerator kFLEXIO_I2S_SampleRate16KHz: Sample rate 16000Hz

enumerator kFLEXIO_I2S_SampleRate22050Hz: Sample rate 22050Hz

enumerator kFLEXIO_I2S_SampleRate24KHz: Sample rate 24000Hz

enumerator kFLEXIO_I2S_SampleRate32KHz: Sample rate 32000Hz

enumerator kFLEXIO_I2S_SampleRate44100Hz: Sample rate 44100Hz

enumerator kFLEXIO_I2S_SampleRate48KHz: Sample rate 48000Hz

enumerator kFLEXIO_I2S_SampleRate96KHz: Sample rate 96000Hz

enum _flexio_i2s_word_width

Audio word width.

Values:

enumerator kFLEXIO_I2S_WordWidth8bits: Audio data width 8 bits

enumerator kFLEXIO_I2S_WordWidth16bits: Audio data width 16 bits

enumerator kFLEXIO_I2S_WordWidth24bits: Audio data width 24 bits

enumerator kFLEXIO_I2S_WordWidth32bits: Audio data width 32 bits

typedef struct _flexio_i2s_type FLEXIO_I2S_Type: Define FlexIO I2S access structure typedef.

typedef enum _flexio_i2s_master_slave flexio_i2s_master_slave_t: Master or slave mode.

typedef struct _flexio_i2s_config flexio_i2s_config_t: FlexIO I2S configure structure.

typedef struct _flexio_i2s_format flexio_i2s_format_t: FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx.

typedef enum _flexio_i2s_sample_rate flexio_i2s_sample_rate_t: Audio sample rate.

typedef enum _flexio_i2s_word_width flexio_i2s_word_width_t: Audio word width.

typedef struct _flexio_i2s_transfer flexio_i2s_transfer_t: Define FlexIO I2S transfer structure.

typedef struct _flexio_i2s_handle flexio_i2s_handle_t

typedef void (*flexio_i2s_callback_t)(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, status_t status, void *userData): FlexIO I2S xfer callback prototype.

I2S_RETRY_TIMES: Retry times for waiting flag.

FLEXIO_I2S_XFER_QUEUE_SIZE: FlexIO I2S transfer queue size, user can refine it according to use case.

struct _flexio_i2s_type

#include <fsl_flexio_i2s.h>

Define FlexIO I2S access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer

uint8_t txPinIndex: Tx data pin index in FlexIO pins

uint8_t rxPinIndex: Rx data pin index

uint8_t bclkPinIndex: Bit clock pin index

uint8_t fsPinIndex: Frame sync pin index

uint8_t txShifterIndex: Tx data shifter index

uint8_t rxShifterIndex: Rx data shifter index

uint8_t bclkTimerIndex: Bit clock timer index

uint8_t fsTimerIndex: Frame sync timer index

struct _flexio_i2s_config

#include <fsl_flexio_i2s.h>

FlexIO I2S configure structure.

Public Members

bool enableI2S: Enable FlexIO I2S

flexio_i2s_master_slave_t masterSlave: Master or slave

flexio_pin_polarity_t txPinPolarity: Tx data pin polarity, active high or low

flexio_pin_polarity_t rxPinPolarity: Rx data pin polarity

flexio_pin_polarity_t bclkPinPolarity: Bit clock pin polarity

flexio_pin_polarity_t fsPinPolarity: Frame sync pin polarity

flexio_shifter_timer_polarity_t txTimerPolarity: Tx data valid on bclk rising or falling edge

flexio_shifter_timer_polarity_t rxTimerPolarity: Rx data valid on bclk rising or falling edge

struct _flexio_i2s_format

#include <fsl_flexio_i2s.h>

FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx.

Public Members

uint8_t bitWidth: Bit width of audio data, always 8/16/24/32 bits

uint32_t sampleRate_Hz: Sample rate of the audio data

struct _flexio_i2s_transfer

#include <fsl_flexio_i2s.h>

Define FlexIO I2S transfer structure.

Public Members

uint8_t *data: Data buffer start pointer

size_t dataSize: Bytes to be transferred.

struct _flexio_i2s_handle

#include <fsl_flexio_i2s.h>

Define FlexIO I2S handle structure.

Public Members

uint32_t state: Internal state

flexio_i2s_callback_t callback: Callback function called at transfer event

void *userData: Callback parameter passed to callback function

uint8_t bitWidth: Bit width for transfer, 8/16/24/32bits

flexio_i2s_transfer_t queue[(4U)]: Transfer queue storing queued transfer

size_t transferSize[(4U)]: Data bytes need to transfer

volatile uint8_t queueUser: Index for user to queue transfer

volatile uint8_t queueDriver: Index for driver to get the transfer data and size

FlexIO SPI Driver

void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI master hardware, and configures the FlexIO SPI with FlexIO SPI master configuration. The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_MasterGetDefaultConfig().

Example

FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_spi_master_config_t config = {
.enableMaster = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 500000,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz);

Note

1.FlexIO SPI master only support CPOL = 0, which means clock inactive low. 2.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time is 2.5 clock cycles. So if FlexIO SPI master communicates with other spi IPs, the maximum baud rate is FlexIO clock frequency divided by 2*2=4. If FlexIO SPI master communicates with FlexIO SPI slave, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
masterConfig – Pointer to the flexio_spi_master_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base)

Resets the FlexIO SPI timer and shifter config.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig)

Gets the default configuration to configure the FlexIO SPI master. The configuration can be used directly by calling the FLEXIO_SPI_MasterConfigure(). Example:

flexio_spi_master_config_t masterConfig;
FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig);

Parameters:

masterConfig – Pointer to the flexio_spi_master_config_t structure.

void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig)

Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration. The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_SlaveGetDefaultConfig().

Note

1.Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored. 2.FlexIO SPI slave only support CPOL = 0, which means clock inactive low. 3.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time is 2.5 clock cycles. So if FlexIO SPI slave communicates with other spi IPs, the maximum baud rate is FlexIO clock frequency divided by 3*2=6. If FlexIO SPI slave communicates with FlexIO SPI master, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8. Example

FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0}
};
flexio_spi_slave_config_t config = {
.enableSlave = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_SlaveInit(&spiDev, &config);

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
slaveConfig – Pointer to the flexio_spi_slave_config_t structure.

void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base)

Gates the FlexIO clock.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig)

Gets the default configuration to configure the FlexIO SPI slave. The configuration can be used directly for calling the FLEXIO_SPI_SlaveConfigure(). Example:

flexio_spi_slave_config_t slaveConfig;
FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters:

slaveConfig – Pointer to the flexio_spi_slave_config_t structure.

uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base)

Gets FlexIO SPI status flags.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.

Returns:

status flag; Use the status flag to AND the following flag mask and get the status.

kFLEXIO_SPI_TxEmptyFlag
kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask)

Clears FlexIO SPI status flags.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – status flag The parameter can be any combination of the following values:
- kFLEXIO_SPI_TxEmptyFlag
- kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)

Enables the FlexIO SPI interrupt.

This function enables the FlexIO SPI interrupt.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – interrupt source. The parameter can be any combination of the following values:
- kFLEXIO_SPI_RxFullInterruptEnable
- kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)

Disables the FlexIO SPI interrupt.

This function disables the FlexIO SPI interrupt.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – interrupt source The parameter can be any combination of the following values:
- kFLEXIO_SPI_RxFullInterruptEnable
- kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable)

Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA, which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – SPI DMA source.
enable – True means enable DMA, false means disable DMA.

static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Gets the FlexIO SPI transmit data register address for MSB first transfer.

This function returns the SPI data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

FlexIO SPI transmit data register address.

static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Gets the FlexIO SPI receive data register address for the MSB first transfer.

This function returns the SPI data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

FlexIO SPI receive data register address.

static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable)

Enables/disables the FlexIO SPI module operation.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.
enable – True to enable, false does not have any effect.

void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz)

Sets baud rate for the FlexIO SPI transfer, which is only used for the master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
baudRate_Bps – Baud Rate needed in Hz.
srcClockHz – SPI source clock frequency in Hz.

static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint32_t data)

Writes one byte of data, which is sent using the MSB method.

Note

This is a non-blocking API, which returns directly after the data is put into the data register but the data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
data – 8/16/32 bit data.

static inline uint32_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Reads 8 bit/16 bit data.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the RxFullFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

8 bit/16 bit data received.

status_t FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, const uint8_t *buffer, size_t size)

Sends a buffer of data bytes.

Note

This function blocks using the polling method until all bytes have been sent.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
buffer – The data bytes to send.
size – The number of data bytes to send.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

status_t FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint8_t *buffer, size_t size)

Receives a buffer of bytes.

Note

This function blocks using the polling method until all bytes have been received.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
buffer – The buffer to store the received bytes.
size – The number of data bytes to be received.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

status_t FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer)

Receives a buffer of bytes.

Note

This function blocks via polling until all bytes have been received.

Parameters:

base – pointer to FLEXIO_SPI_Type structure
xfer – FlexIO SPI transfer structure, see flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

void FLEXIO_SPI_FlushShifters(FLEXIO_SPI_Type *base)

Flush tx/rx shifters.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.

status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_master_transfer_callback_t callback, void *userData)

Initializes the FlexIO SPI Master handle, which is used in transactional functions.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_transfer_t *xfer)

Master transfer data using IRQ.

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, the callback function is called.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
xfer – FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle)

Aborts the master data transfer, which used IRQ.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count)

Gets the data transfer status which used IRQ.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle)

FlexIO SPI master IRQ handler function.

Parameters:

spiType – Pointer to the FLEXIO_SPI_Type structure.
spiHandle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_slave_transfer_callback_t callback, void *userData)

Initializes the FlexIO SPI Slave handle, which is used in transactional functions.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_transfer_t *xfer)

Slave transfer data using IRQ.

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, the callback function is called.

Parameters:

handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
base – Pointer to the FLEXIO_SPI_Type structure.
xfer – FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – SPI is not idle; it is running another transfer.

static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle)

Aborts the slave data transfer which used IRQ, share same API with master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, size_t *count)

Gets the data transfer status which used IRQ, share same API with master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle)

FlexIO SPI slave IRQ handler function.

Parameters:

spiType – Pointer to the FLEXIO_SPI_Type structure.
spiHandle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

FSL_FLEXIO_SPI_DRIVER_VERSION: FlexIO SPI driver version.

Error codes for the FlexIO SPI driver.

Values:

enumerator kStatus_FLEXIO_SPI_Busy: FlexIO SPI is busy.

enumerator kStatus_FLEXIO_SPI_Idle: SPI is idle

enumerator kStatus_FLEXIO_SPI_Error: FlexIO SPI error.

enumerator kStatus_FLEXIO_SPI_Timeout: FlexIO SPI timeout polling status flags.

enum _flexio_spi_clock_phase

FlexIO SPI clock phase configuration.

Values:

enumerator kFLEXIO_SPI_ClockPhaseFirstEdge: First edge on SPSCK occurs at the middle of the first cycle of a data transfer.

enumerator kFLEXIO_SPI_ClockPhaseSecondEdge: First edge on SPSCK occurs at the start of the first cycle of a data transfer.

enum _flexio_spi_shift_direction

FlexIO SPI data shifter direction options.

Values:

enumerator kFLEXIO_SPI_MsbFirst: Data transfers start with most significant bit.

enumerator kFLEXIO_SPI_LsbFirst: Data transfers start with least significant bit.

enum _flexio_spi_data_bitcount_mode

FlexIO SPI data length mode options.

Values:

enumerator kFLEXIO_SPI_8BitMode: 8-bit data transmission mode.

enumerator kFLEXIO_SPI_16BitMode: 16-bit data transmission mode.

enumerator kFLEXIO_SPI_32BitMode: 32-bit data transmission mode.

enum _flexio_spi_interrupt_enable

Define FlexIO SPI interrupt mask.

Values:

enumerator kFLEXIO_SPI_TxEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_SPI_RxFullInterruptEnable: Receive buffer full interrupt enable.

enum _flexio_spi_status_flags

Define FlexIO SPI status mask.

Values:

enumerator kFLEXIO_SPI_TxBufferEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_SPI_RxBufferFullFlag: Receive buffer full flag.

enum _flexio_spi_dma_enable

Define FlexIO SPI DMA mask.

Values:

enumerator kFLEXIO_SPI_TxDmaEnable: Tx DMA request source

enumerator kFLEXIO_SPI_RxDmaEnable: Rx DMA request source

enumerator kFLEXIO_SPI_DmaAllEnable: All DMA request source

enum _flexio_spi_transfer_flags

Define FlexIO SPI transfer flags.

Note

Use kFLEXIO_SPI_csContinuous and one of the other flags to OR together to form the transfer flag.

Values:

enumerator kFLEXIO_SPI_8bitMsb: FlexIO SPI 8-bit MSB first

enumerator kFLEXIO_SPI_8bitLsb: FlexIO SPI 8-bit LSB first

enumerator kFLEXIO_SPI_16bitMsb: FlexIO SPI 16-bit MSB first

enumerator kFLEXIO_SPI_16bitLsb: FlexIO SPI 16-bit LSB first

enumerator kFLEXIO_SPI_32bitMsb: FlexIO SPI 32-bit MSB first

enumerator kFLEXIO_SPI_32bitLsb: FlexIO SPI 32-bit LSB first

enumerator kFLEXIO_SPI_csContinuous: Enable the CS signal continuous mode

typedef enum _flexio_spi_clock_phase flexio_spi_clock_phase_t: FlexIO SPI clock phase configuration.

typedef enum _flexio_spi_shift_direction flexio_spi_shift_direction_t: FlexIO SPI data shifter direction options.

typedef enum _flexio_spi_data_bitcount_mode flexio_spi_data_bitcount_mode_t: FlexIO SPI data length mode options.

typedef struct _flexio_spi_type FLEXIO_SPI_Type: Define FlexIO SPI access structure typedef.

typedef struct _flexio_spi_master_config flexio_spi_master_config_t: Define FlexIO SPI master configuration structure.

typedef struct _flexio_spi_slave_config flexio_spi_slave_config_t: Define FlexIO SPI slave configuration structure.

typedef struct _flexio_spi_transfer flexio_spi_transfer_t: Define FlexIO SPI transfer structure.

typedef struct _flexio_spi_master_handle flexio_spi_master_handle_t: typedef for flexio_spi_master_handle_t in advance.

typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t: Slave handle is the same with master handle.

typedef void (*flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, status_t status, void *userData): FlexIO SPI master callback for finished transmit.

typedef void (*flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, status_t status, void *userData): FlexIO SPI slave callback for finished transmit.

FLEXIO_SPI_DUMMYDATA: FlexIO SPI dummy transfer data, the data is sent while txData is NULL.

SPI_RETRY_TIMES: Retry times for waiting flag.

FLEXIO_SPI_XFER_DATA_FORMAT(flag): Get the transfer data format of width and bit order.

struct _flexio_spi_type

#include <fsl_flexio_spi.h>

Define FlexIO SPI access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t SDOPinIndex: Pin select for data output. To set SDO pin in Hi-Z state, user needs to mux the pin as GPIO input and disable all pull up/down in application.

uint8_t SDIPinIndex: Pin select for data input.

uint8_t SCKPinIndex: Pin select for clock.

uint8_t CSnPinIndex: Pin select for enable.

uint8_t shifterIndex[2]: Shifter index used in FlexIO SPI.

uint8_t timerIndex[2]: Timer index used in FlexIO SPI.

struct _flexio_spi_master_config

#include <fsl_flexio_spi.h>

Define FlexIO SPI master configuration structure.

Public Members

bool enableMaster: Enable/disable FlexIO SPI master after configuration.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

flexio_spi_clock_phase_t phase: Clock phase.

flexio_spi_data_bitcount_mode_t dataMode: 8bit or 16bit mode.

struct _flexio_spi_slave_config

#include <fsl_flexio_spi.h>

Define FlexIO SPI slave configuration structure.

Public Members

bool enableSlave: Enable/disable FlexIO SPI slave after configuration.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

flexio_spi_clock_phase_t phase: Clock phase.

flexio_spi_data_bitcount_mode_t dataMode: 8bit or 16bit mode.

struct _flexio_spi_transfer

#include <fsl_flexio_spi.h>

Define FlexIO SPI transfer structure.

Public Members

const uint8_t *txData: Send buffer.

uint8_t *rxData: Receive buffer.

size_t dataSize: Transfer bytes.

uint8_t flags: FlexIO SPI control flag, MSB first or LSB first.

struct _flexio_spi_master_handle

#include <fsl_flexio_spi.h>

Define FlexIO SPI handle structure.

Public Members

const uint8_t *txData: Transfer buffer.

uint8_t *rxData: Receive buffer.

size_t transferSize: Total bytes to be transferred.

volatile size_t txRemainingBytes: Send data remaining in bytes.

volatile size_t rxRemainingBytes: Receive data remaining in bytes.

volatile uint32_t state: FlexIO SPI internal state.

uint8_t bytePerFrame: SPI mode, 2bytes or 1byte in a frame

flexio_spi_shift_direction_t direction: Shift direction.

flexio_spi_master_transfer_callback_t callback: FlexIO SPI callback.

void *userData: Callback parameter.

FlexIO UART Driver

status_t FLEXIO_UART_Init(FLEXIO_UART_Type *base, const flexio_uart_config_t *userConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, configures FlexIO UART hardware, and configures the FlexIO UART with FlexIO UART configuration. The configuration structure can be filled by the user or be set with default values by FLEXIO_UART_GetDefaultConfig().

Example

FLEXIO_UART_Type base = {
.flexioBase = FLEXIO,
.TxPinIndex = 0,
.RxPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_uart_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 115200U,
.bitCountPerChar = 8
};
FLEXIO_UART_Init(base, &config, srcClock_Hz);

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
userConfig – Pointer to the flexio_uart_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

Return values:

kStatus_Success – Configuration success.
kStatus_FLEXIO_UART_BaudrateNotSupport – Baudrate is not supported for current clock source frequency.

void FLEXIO_UART_Deinit(FLEXIO_UART_Type *base)

Resets the FlexIO UART shifter and timer config.

Note

After calling this API, call the FLEXO_UART_Init to use the FlexIO UART module.

Parameters:

base – Pointer to FLEXIO_UART_Type structure

void FLEXIO_UART_GetDefaultConfig(flexio_uart_config_t *userConfig)

Gets the default configuration to configure the FlexIO UART. The configuration can be used directly for calling the FLEXIO_UART_Init(). Example:

flexio_uart_config_t config;
FLEXIO_UART_GetDefaultConfig(&userConfig);

Parameters:

userConfig – Pointer to the flexio_uart_config_t structure.

uint32_t FLEXIO_UART_GetStatusFlags(FLEXIO_UART_Type *base)

Gets the FlexIO UART status flags.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART status flags.

void FLEXIO_UART_ClearStatusFlags(FLEXIO_UART_Type *base, uint32_t mask)

Gets the FlexIO UART status flags.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Status flag. The parameter can be any combination of the following values:
- kFLEXIO_UART_TxDataRegEmptyFlag
- kFLEXIO_UART_RxEmptyFlag
- kFLEXIO_UART_RxOverRunFlag

void FLEXIO_UART_EnableInterrupts(FLEXIO_UART_Type *base, uint32_t mask)

Enables the FlexIO UART interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Interrupt source.

void FLEXIO_UART_DisableInterrupts(FLEXIO_UART_Type *base, uint32_t mask)

Disables the FlexIO UART interrupt.

This function disables the FlexIO UART interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Interrupt source.

static inline uint32_t FLEXIO_UART_GetTxDataRegisterAddress(FLEXIO_UART_Type *base)

Gets the FlexIO UARt transmit data register address.

This function returns the UART data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART transmit data register address.

static inline uint32_t FLEXIO_UART_GetRxDataRegisterAddress(FLEXIO_UART_Type *base)

Gets the FlexIO UART receive data register address.

This function returns the UART data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART receive data register address.

static inline void FLEXIO_UART_EnableTxDMA(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART transmit DMA. This function enables/disables the FlexIO UART Tx DMA, which means asserting the kFLEXIO_UART_TxDataRegEmptyFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
enable – True to enable, false to disable.

static inline void FLEXIO_UART_EnableRxDMA(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART receive DMA. This function enables/disables the FlexIO UART Rx DMA, which means asserting kFLEXIO_UART_RxDataRegFullFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
enable – True to enable, false to disable.

static inline void FLEXIO_UART_Enable(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART module operation.

Parameters:

base – Pointer to the FLEXIO_UART_Type.
enable – True to enable, false does not have any effect.

static inline void FLEXIO_UART_WriteByte(FLEXIO_UART_Type *base, const uint8_t *buffer)

Writes one byte of data.

Note

This is a non-blocking API, which returns directly after the data is put into the data register. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
buffer – The data bytes to send.

static inline void FLEXIO_UART_ReadByte(FLEXIO_UART_Type *base, uint8_t *buffer)

Reads one byte of data.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the RxFullFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
buffer – The buffer to store the received bytes.

status_t FLEXIO_UART_WriteBlocking(FLEXIO_UART_Type *base, const uint8_t *txData, size_t txSize)

Sends a buffer of data bytes.

Note

This function blocks using the polling method until all bytes have been sent.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
txData – The data bytes to send.
txSize – The number of data bytes to send.

Return values:

kStatus_FLEXIO_UART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully wrote all data.

status_t FLEXIO_UART_ReadBlocking(FLEXIO_UART_Type *base, uint8_t *rxData, size_t rxSize)

Receives a buffer of bytes.

Note

This function blocks using the polling method until all bytes have been received.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
rxData – The buffer to store the received bytes.
rxSize – The number of data bytes to be received.

Return values:

kStatus_FLEXIO_UART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

status_t FLEXIO_UART_TransferCreateHandle(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_callback_t callback, void *userData)

Initializes the UART handle.

This function initializes the FlexIO UART handle, which can be used for other FlexIO UART transactional APIs. Call this API once to get the initialized handle.

The UART driver supports the “background” receiving, which means that users can set up a RX ring buffer optionally. Data received is stored into the ring buffer even when the user doesn’t call the FLEXIO_UART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, users can get the received data from the ring buffer directly. The ring buffer is disabled if passing NULL as ringBuffer.

Parameters:

base – to FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

void FLEXIO_UART_TransferStartRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific UART handle.

When the RX ring buffer is used, data received is stored into the ring buffer even when the user doesn’t call the UART_ReceiveNonBlocking() API. If there is already data received in the ring buffer, users can get the received data from the ring buffer directly.

Note

When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, only 31 bytes are used for saving data.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
ringBuffer – Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – Size of the ring buffer.

void FLEXIO_UART_TransferStopRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferSendNonBlocking(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in ISR, the FlexIO UART driver calls the callback function and passes the kStatus_FLEXIO_UART_TxIdle as status parameter.

Note

The kStatus_FLEXIO_UART_TxIdle is passed to the upper layer when all data is written to the TX register. However, it does not ensure that all data is sent out.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
xfer – FlexIO UART transfer structure. See flexio_uart_transfer_t.

Return values:

kStatus_Success – Successfully starts the data transmission.
kStatus_UART_TxBusy – Previous transmission still not finished, data not written to the TX register.

void FLEXIO_UART_TransferAbortSend(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt-driven data sending. Get the remainBytes to find out how many bytes are still not sent out.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetSendCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count)

Gets the number of bytes sent.

This function gets the number of bytes sent driven by interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
count – Number of bytes sent so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

status_t FLEXIO_UART_TransferReceiveNonBlocking(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using the interrupt method.

This function receives data using the interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in ring buffer is not enough to read, the receive request is saved by the UART driver. When new data arrives, the receive request is serviced first. When all data is received, the UART driver notifies the upper layer through a callback function and passes the status parameter kStatus_UART_RxIdle. For example, if the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer, the 5 bytes are copied to xfer->data. This function returns with the parameter receivedBytes set to 5. For the last 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the UART driver notifies upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
xfer – UART transfer structure. See flexio_uart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.

Return values:

kStatus_Success – Successfully queue the transfer into the transmit queue.
kStatus_FLEXIO_UART_RxBusy – Previous receive request is not finished.

void FLEXIO_UART_TransferAbortReceive(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the receive data which was using IRQ.

This function aborts the receive data which was using IRQ.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetReceiveCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count)

Gets the number of bytes received.

This function gets the number of bytes received driven by interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
count – Number of bytes received so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

void FLEXIO_UART_TransferHandleIRQ(void *uartType, void *uartHandle)

FlexIO UART IRQ handler function.

This function processes the FlexIO UART transmit and receives the IRQ request.

Parameters:

uartType – Pointer to the FLEXIO_UART_Type structure.
uartHandle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

void FLEXIO_UART_FlushShifters(FLEXIO_UART_Type *base)

Flush tx/rx shifters.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

FSL_FLEXIO_UART_DRIVER_VERSION: FlexIO UART driver version.

Error codes for the UART driver.

Values:

enumerator kStatus_FLEXIO_UART_TxBusy: Transmitter is busy.

enumerator kStatus_FLEXIO_UART_RxBusy: Receiver is busy.

enumerator kStatus_FLEXIO_UART_TxIdle: UART transmitter is idle.

enumerator kStatus_FLEXIO_UART_RxIdle: UART receiver is idle.

enumerator kStatus_FLEXIO_UART_ERROR: ERROR happens on UART.

enumerator kStatus_FLEXIO_UART_RxRingBufferOverrun: UART RX software ring buffer overrun.

enumerator kStatus_FLEXIO_UART_RxHardwareOverrun: UART RX receiver overrun.

enumerator kStatus_FLEXIO_UART_Timeout: UART times out.

enumerator kStatus_FLEXIO_UART_BaudrateNotSupport: Baudrate is not supported in current clock source

enum _flexio_uart_bit_count_per_char

FlexIO UART bit count per char.

Values:

enumerator kFLEXIO_UART_7BitsPerChar: 7-bit data characters

enumerator kFLEXIO_UART_8BitsPerChar: 8-bit data characters

enumerator kFLEXIO_UART_9BitsPerChar: 9-bit data characters

enum _flexio_uart_interrupt_enable

Define FlexIO UART interrupt mask.

Values:

enumerator kFLEXIO_UART_TxDataRegEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_UART_RxDataRegFullInterruptEnable: Receive buffer full interrupt enable.

enum _flexio_uart_status_flags

Define FlexIO UART status mask.

Values:

enumerator kFLEXIO_UART_TxDataRegEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_UART_RxDataRegFullFlag: Receive buffer full flag.

enumerator kFLEXIO_UART_RxOverRunFlag: Receive buffer over run flag.

typedef enum _flexio_uart_bit_count_per_char flexio_uart_bit_count_per_char_t: FlexIO UART bit count per char.

typedef struct _flexio_uart_type FLEXIO_UART_Type: Define FlexIO UART access structure typedef.

typedef struct _flexio_uart_config flexio_uart_config_t: Define FlexIO UART user configuration structure.

typedef struct _flexio_uart_transfer flexio_uart_transfer_t: Define FlexIO UART transfer structure.

typedef struct _flexio_uart_handle flexio_uart_handle_t

typedef void (*flexio_uart_transfer_callback_t)(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, status_t status, void *userData): FlexIO UART transfer callback function.

UART_RETRY_TIMES: Retry times for waiting flag.

struct _flexio_uart_type

#include <fsl_flexio_uart.h>

Define FlexIO UART access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t TxPinIndex: Pin select for UART_Tx.

uint8_t RxPinIndex: Pin select for UART_Rx.

uint8_t shifterIndex[2]: Shifter index used in FlexIO UART.

uint8_t timerIndex[2]: Timer index used in FlexIO UART.

struct _flexio_uart_config

#include <fsl_flexio_uart.h>

Define FlexIO UART user configuration structure.

Public Members

bool enableUart: Enable/disable FlexIO UART TX & RX.

bool enableInDoze: Enable/disable FlexIO operation in doze mode

bool enableInDebug: Enable/disable FlexIO operation in debug mode

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

flexio_uart_bit_count_per_char_t bitCountPerChar: number of bits, 7/8/9 -bit

struct _flexio_uart_transfer

#include <fsl_flexio_uart.h>

Define FlexIO UART transfer structure.

Public Members

size_t dataSize: Transfer size

struct _flexio_uart_handle

#include <fsl_flexio_uart.h>

Define FLEXIO UART handle structure.

Public Members

const uint8_t *volatile txData: Address of remaining data to send.

volatile size_t txDataSize: Size of the remaining data to send.

uint8_t *volatile rxData: Address of remaining data to receive.

volatile size_t rxDataSize: Size of the remaining data to receive.

size_t txDataSizeAll: Total bytes to be sent.

size_t rxDataSizeAll: Total bytes to be received.

uint8_t *rxRingBuffer: Start address of the receiver ring buffer.

size_t rxRingBufferSize: Size of the ring buffer.

volatile uint16_t rxRingBufferHead: Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail: Index for the user to get data from the ring buffer.

flexio_uart_transfer_callback_t callback: Callback function.

void *userData: UART callback function parameter.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

union __unnamed77__

Public Members

uint8_t *data: The buffer of data to be transfer.

uint8_t *rxData: The buffer to receive data.

const uint8_t *txData: The buffer of data to be sent.

FLEXSPI: Flexible Serial Peripheral Interface Driver

uint32_t FLEXSPI_GetInstance(FLEXSPI_Type *base)

Get the instance number for FLEXSPI.

Parameters:

base – FLEXSPI base pointer.

status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status)

Check and clear IP command execution errors.

Parameters:

base – FLEXSPI base pointer.
status – interrupt status.

void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config)

Initializes the FLEXSPI module and internal state.

This function enables the clock for FLEXSPI and also configures the FLEXSPI with the input configure parameters. Users should call this function before any FLEXSPI operations.

Parameters:

base – FLEXSPI peripheral base address.
config – FLEXSPI configure structure.

void FLEXSPI_GetDefaultConfig(flexspi_config_t *config)

Gets default settings for FLEXSPI.

Parameters:

config – FLEXSPI configuration structure.

void FLEXSPI_Deinit(FLEXSPI_Type *base)

Deinitializes the FLEXSPI module.

Clears the FLEXSPI state and FLEXSPI module registers.

Parameters:

base – FLEXSPI peripheral base address.

void FLEXSPI_UpdateDllValue(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port)

Update FLEXSPI DLL value depending on currently flexspi root clock.

Parameters:

base – FLEXSPI peripheral base address.
config – Flash configuration parameters.
port – FLEXSPI Operation port.

void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port)

Configures the connected device parameter.

This function configures the connected device relevant parameters, such as the size, command, and so on. The flash configuration value cannot have a default value. The user needs to configure it according to the connected device.

Parameters:

base – FLEXSPI peripheral base address.
config – Flash configuration parameters.
port – FLEXSPI Operation port.

void FLEXSPI_SoftwareReset(FLEXSPI_Type *base)

Software reset for the FLEXSPI logic.

This function sets the software reset flags for both AHB and buffer domain and resets both AHB buffer and also IP FIFOs.

Parameters:

base – FLEXSPI peripheral base address.

static inline void FLEXSPI_Enable(FLEXSPI_Type *base, bool enable)

Enables or disables the FLEXSPI module.

Parameters:

base – FLEXSPI peripheral base address.
enable – True means enable FLEXSPI, false means disable.

static inline void FLEXSPI_EnableInterrupts(FLEXSPI_Type *base, uint32_t mask)

Enables the FLEXSPI interrupts.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_DisableInterrupts(FLEXSPI_Type *base, uint32_t mask)

Disable the FLEXSPI interrupts.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_EnableTxDMA(FLEXSPI_Type *base, bool enable)

Enables or disables FLEXSPI IP Tx FIFO DMA requests.

Parameters:

base – FLEXSPI peripheral base address.
enable – Enable flag for transmit DMA request. Pass true for enable, false for disable.

static inline void FLEXSPI_EnableRxDMA(FLEXSPI_Type *base, bool enable)

Enables or disables FLEXSPI IP Rx FIFO DMA requests.

Parameters:

base – FLEXSPI peripheral base address.
enable – Enable flag for receive DMA request. Pass true for enable, false for disable.

static inline uint32_t FLEXSPI_GetTxFifoAddress(FLEXSPI_Type *base)

Gets FLEXSPI IP tx fifo address for DMA transfer.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

The – tx fifo address.

static inline uint32_t FLEXSPI_GetRxFifoAddress(FLEXSPI_Type *base)

Gets FLEXSPI IP rx fifo address for DMA transfer.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

The – rx fifo address.

static inline void FLEXSPI_ResetFifos(FLEXSPI_Type *base, bool txFifo, bool rxFifo)

Clears the FLEXSPI IP FIFO logic.

Parameters:

base – FLEXSPI peripheral base address.
txFifo – Pass true to reset TX FIFO.
rxFifo – Pass true to reset RX FIFO.

static inline void FLEXSPI_GetFifoCounts(FLEXSPI_Type *base, size_t *txCount, size_t *rxCount)

Gets the valid data entries in the FLEXSPI FIFOs.

Parameters:

base – FLEXSPI peripheral base address.
txCount – [out] Pointer through which the current number of bytes in the transmit FIFO is returned. Pass NULL if this value is not required.
rxCount – [out] Pointer through which the current number of bytes in the receive FIFO is returned. Pass NULL if this value is not required.

static inline uint32_t FLEXSPI_GetInterruptStatusFlags(FLEXSPI_Type *base)

Get the FLEXSPI interrupt status flags.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

interrupt – status flag, use status flag to AND flexspi_flags_t could get the related status.

static inline void FLEXSPI_ClearInterruptStatusFlags(FLEXSPI_Type *base, uint32_t mask)

Get the FLEXSPI interrupt status flags.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_GetDataLearningPhase(FLEXSPI_Type *base, uint8_t *portAPhase, uint8_t *portBPhase)

Gets the sampling clock phase selection after Data Learning.

Parameters:

base – FLEXSPI peripheral base address.
portAPhase – Pointer to a uint8_t type variable to receive the selected clock phase on PORTA.
portBPhase – Pointer to a uint8_t type variable to receive the selected clock phase on PORTB.

static inline flexspi_arb_command_source_t FLEXSPI_GetArbitratorCommandSource(FLEXSPI_Type *base)

Gets the trigger source of current command sequence granted by arbitrator.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

trigger – source of current command sequence.

static inline flexspi_ip_error_code_t FLEXSPI_GetIPCommandErrorCode(FLEXSPI_Type *base, uint8_t *index)

Gets the error code when IP command error detected.

Parameters:

base – FLEXSPI peripheral base address.
index – Pointer to a uint8_t type variable to receive the sequence index when error detected.

Return values:

error – code when IP command error detected.

static inline flexspi_ahb_error_code_t FLEXSPI_GetAHBCommandErrorCode(FLEXSPI_Type *base, uint8_t *index)

Gets the error code when AHB command error detected.

Parameters:

base – FLEXSPI peripheral base address.
index – Pointer to a uint8_t type variable to receive the sequence index when error detected.

Return values:

error – code when AHB command error detected.

static inline bool FLEXSPI_GetBusIdleStatus(FLEXSPI_Type *base)

Returns whether the bus is idle.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

true – Bus is idle.
false – Bus is busy.

void FLEXSPI_UpdateRxSampleClock(FLEXSPI_Type *base, flexspi_read_sample_clock_t clockSource)

Update read sample clock source.

Parameters:

base – FLEXSPI peripheral base address.
clockSource – clockSource of type flexspi_read_sample_clock_t

void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count)

Updates the LUT table.

Parameters:

base – FLEXSPI peripheral base address.
index – From which index start to update. It could be any index of the LUT table, which also allows user to update command content inside a command. Each command consists of up to 8 instructions and occupy 4*32-bit memory.
cmd – Command sequence array.
count – Number of sequences.

static inline void FLEXSPI_WriteData(FLEXSPI_Type *base, uint32_t data, uint8_t fifoIndex)

Writes data into FIFO.

Parameters:

base – FLEXSPI peripheral base address
data – The data bytes to send
fifoIndex – Destination fifo index.

static inline uint32_t FLEXSPI_ReadData(FLEXSPI_Type *base, uint8_t fifoIndex)

Receives data from data FIFO.

Parameters:

base – FLEXSPI peripheral base address
fifoIndex – Source fifo index.

Returns:

The data in the FIFO.

status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base, uint8_t *buffer, size_t size)

Sends a buffer of data bytes using blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – FLEXSPI peripheral base address
buffer – The data bytes to send
size – The number of data bytes to send

Return values:

kStatus_Success – write success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequence error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base, uint8_t *buffer, size_t size)

Receives a buffer of data bytes using a blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – FLEXSPI peripheral base address
buffer – The data bytes to send
size – The number of data bytes to receive

Return values:

kStatus_Success – read success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequencen error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

status_t FLEXSPI_TransferBlocking(FLEXSPI_Type *base, flexspi_transfer_t *xfer)

Execute command to transfer a buffer data bytes using a blocking method.

Parameters:

base – FLEXSPI peripheral base address
xfer – pointer to the transfer structure.

Return values:

kStatus_Success – command transfer success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequence error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

void FLEXSPI_TransferCreateHandle(FLEXSPI_Type *base, flexspi_handle_t *handle, flexspi_transfer_callback_t callback, void *userData)

Initializes the FLEXSPI handle which is used in transactional functions.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure to store the transfer state.
callback – pointer to user callback function.
userData – user parameter passed to the callback function.

status_t FLEXSPI_TransferNonBlocking(FLEXSPI_Type *base, flexspi_handle_t *handle, flexspi_transfer_t *xfer)

Performs a interrupt non-blocking transfer on the FLEXSPI bus.

Note

Calling the API returns immediately after transfer initiates. The user needs to call FLEXSPI_GetTransferCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_FLEXSPI_Busy, the transfer is finished. For FLEXSPI_Read, the dataSize should be multiple of rx watermark level, or FLEXSPI could not read data properly.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state.
xfer – pointer to flexspi_transfer_t structure.

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_FLEXSPI_Busy – Previous transmission still not finished.

status_t FLEXSPI_TransferGetCount(FLEXSPI_Type *base, flexspi_handle_t *handle, size_t *count)

Gets the master transfer status during a interrupt non-blocking transfer.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXSPI_TransferAbort(FLEXSPI_Type *base, flexspi_handle_t *handle)

Aborts an interrupt non-blocking transfer early.

Note

This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state

void FLEXSPI_TransferHandleIRQ(FLEXSPI_Type *base, flexspi_handle_t *handle)

Master interrupt handler.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure.

FSL_FLEXSPI_DRIVER_VERSION: FLEXSPI driver version.

Status structure of FLEXSPI.

Values:

enumerator kStatus_FLEXSPI_Busy: FLEXSPI is busy

enumerator kStatus_FLEXSPI_SequenceExecutionTimeout: Sequence execution timeout error occurred during FLEXSPI transfer.

enumerator kStatus_FLEXSPI_IpCommandSequenceError: IP command Sequence execution timeout error occurred during FLEXSPI transfer.

enumerator kStatus_FLEXSPI_IpCommandGrantTimeout: IP command grant timeout error occurred during FLEXSPI transfer.

CMD definition of FLEXSPI, use to form LUT instruction, _flexspi_command.

Values:

enumerator kFLEXSPI_Command_STOP: Stop execution, deassert CS.

enumerator kFLEXSPI_Command_SDR: Transmit Command code to Flash, using SDR mode.

enumerator kFLEXSPI_Command_RADDR_SDR: Transmit Row Address to Flash, using SDR mode.

enumerator kFLEXSPI_Command_CADDR_SDR: Transmit Column Address to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE1_SDR: Transmit 1-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE2_SDR: Transmit 2-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE4_SDR: Transmit 4-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE8_SDR: Transmit 8-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_WRITE_SDR: Transmit Programming Data to Flash, using SDR mode.

enumerator kFLEXSPI_Command_READ_SDR: Receive Read Data from Flash, using SDR mode.

enumerator kFLEXSPI_Command_LEARN_SDR: Receive Read Data or Preamble bit from Flash, SDR mode.

enumerator kFLEXSPI_Command_DATSZ_SDR: Transmit Read/Program Data size (byte) to Flash, SDR mode.

enumerator kFLEXSPI_Command_DUMMY_SDR: Leave data lines undriven by FlexSPI controller.

enumerator kFLEXSPI_Command_DUMMY_RWDS_SDR: Leave data lines undriven by FlexSPI controller, dummy cycles decided by RWDS.

enumerator kFLEXSPI_Command_DDR: Transmit Command code to Flash, using DDR mode.

enumerator kFLEXSPI_Command_RADDR_DDR: Transmit Row Address to Flash, using DDR mode.

enumerator kFLEXSPI_Command_CADDR_DDR: Transmit Column Address to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE1_DDR: Transmit 1-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE2_DDR: Transmit 2-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE4_DDR: Transmit 4-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE8_DDR: Transmit 8-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_WRITE_DDR: Transmit Programming Data to Flash, using DDR mode.

enumerator kFLEXSPI_Command_READ_DDR: Receive Read Data from Flash, using DDR mode.

enumerator kFLEXSPI_Command_LEARN_DDR: Receive Read Data or Preamble bit from Flash, DDR mode.

enumerator kFLEXSPI_Command_DATSZ_DDR: Transmit Read/Program Data size (byte) to Flash, DDR mode.

enumerator kFLEXSPI_Command_DUMMY_DDR: Leave data lines undriven by FlexSPI controller.

enumerator kFLEXSPI_Command_DUMMY_RWDS_DDR: Leave data lines undriven by FlexSPI controller, dummy cycles decided by RWDS.

enumerator kFLEXSPI_Command_JUMP_ON_CS: Stop execution, deassert CS and save operand[7:0] as the instruction start pointer for next sequence

enum _flexspi_pad

pad definition of FLEXSPI, use to form LUT instruction.

Values:

enumerator kFLEXSPI_1PAD: Transmit command/address and transmit/receive data only through DATA0/DATA1.

enumerator kFLEXSPI_2PAD: Transmit command/address and transmit/receive data only through DATA[1:0].

enumerator kFLEXSPI_4PAD: Transmit command/address and transmit/receive data only through DATA[3:0].

enumerator kFLEXSPI_8PAD: Transmit command/address and transmit/receive data only through DATA[7:0].

enum _flexspi_flags

FLEXSPI interrupt status flags.

Values:

enumerator kFLEXSPI_SequenceExecutionTimeoutFlag: Sequence execution timeout.

enumerator kFLEXSPI_AhbBusTimeoutFlag: AHB Bus timeout.

enumerator kFLEXSPI_SckStoppedBecauseTxEmptyFlag: SCK is stopped during command sequence because Async TX FIFO empty.

enumerator kFLEXSPI_SckStoppedBecauseRxFullFlag: SCK is stopped during command sequence because Async RX FIFO full.

enumerator kFLEXSPI_DataLearningFailedFlag: Data learning failed.

enumerator kFLEXSPI_IpTxFifoWatermarkEmptyFlag: IP TX FIFO WaterMark empty.

enumerator kFLEXSPI_IpRxFifoWatermarkAvailableFlag: IP RX FIFO WaterMark available.

enumerator kFLEXSPI_AhbCommandSequenceErrorFlag: AHB triggered Command Sequences Error.

enumerator kFLEXSPI_IpCommandSequenceErrorFlag: IP triggered Command Sequences Error.

enumerator kFLEXSPI_AhbCommandGrantTimeoutFlag: AHB triggered Command Sequences Grant Timeout.

enumerator kFLEXSPI_IpCommandGrantTimeoutFlag: IP triggered Command Sequences Grant Timeout.

enumerator kFLEXSPI_IpCommandExecutionDoneFlag: IP triggered Command Sequences Execution finished.

enumerator kFLEXSPI_AllInterruptFlags: All flags.

enum _flexspi_read_sample_clock

FLEXSPI sample clock source selection for Flash Reading.

Values:

enumerator kFLEXSPI_ReadSampleClkLoopbackInternally: Dummy Read strobe generated by FlexSPI Controller and loopback internally.

enumerator kFLEXSPI_ReadSampleClkLoopbackFromDqsPad: Dummy Read strobe generated by FlexSPI Controller and loopback from DQS pad.

enumerator kFLEXSPI_ReadSampleClkLoopbackFromSckPad: SCK output clock and loopback from SCK pad.

enumerator kFLEXSPI_ReadSampleClkExternalInputFromDqsPad: Flash provided Read strobe and input from DQS pad.

enum _flexspi_cs_interval_cycle_unit

FLEXSPI interval unit for flash device select.

Values:

enumerator kFLEXSPI_CsIntervalUnit1SckCycle: Chip selection interval: CSINTERVAL * 1 serial clock cycle.

enumerator kFLEXSPI_CsIntervalUnit256SckCycle: Chip selection interval: CSINTERVAL * 256 serial clock cycle.

enum _flexspi_ahb_write_wait_unit

FLEXSPI AHB wait interval unit for writing.

Values:

enumerator kFLEXSPI_AhbWriteWaitUnit2AhbCycle: AWRWAIT unit is 2 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit8AhbCycle: AWRWAIT unit is 8 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit32AhbCycle: AWRWAIT unit is 32 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit128AhbCycle: AWRWAIT unit is 128 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit512AhbCycle: AWRWAIT unit is 512 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit2048AhbCycle: AWRWAIT unit is 2048 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit8192AhbCycle: AWRWAIT unit is 8192 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit32768AhbCycle: AWRWAIT unit is 32768 ahb clock cycle.

enum _flexspi_ip_error_code

Error Code when IP command Error detected.

Values:

enumerator kFLEXSPI_IpCmdErrorNoError: No error.

enumerator kFLEXSPI_IpCmdErrorJumpOnCsInIpCmd: IP command with JMP_ON_CS instruction used.

enumerator kFLEXSPI_IpCmdErrorUnknownOpCode: Unknown instruction opcode in the sequence.

enumerator kFLEXSPI_IpCmdErrorSdrDummyInDdrSequence: Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence.

enumerator kFLEXSPI_IpCmdErrorDdrDummyInSdrSequence: Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence.

enumerator kFLEXSPI_IpCmdErrorInvalidAddress: Flash access start address exceed the whole flash address range (A1/A2/B1/B2).

enumerator kFLEXSPI_IpCmdErrorSequenceExecutionTimeout: Sequence execution timeout.

enumerator kFLEXSPI_IpCmdErrorFlashBoundaryAcrosss: Flash boundary crossed.

enum _flexspi_ahb_error_code

Error Code when AHB command Error detected.

Values:

enumerator kFLEXSPI_AhbCmdErrorNoError: No error.

enumerator kFLEXSPI_AhbCmdErrorJumpOnCsInWriteCmd: AHB Write command with JMP_ON_CS instruction used in the sequence.

enumerator kFLEXSPI_AhbCmdErrorUnknownOpCode: Unknown instruction opcode in the sequence.

enumerator kFLEXSPI_AhbCmdErrorSdrDummyInDdrSequence: Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence.

enumerator kFLEXSPI_AhbCmdErrorDdrDummyInSdrSequence: Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence.

enumerator kFLEXSPI_AhbCmdSequenceExecutionTimeout: Sequence execution timeout.

enum _flexspi_port

FLEXSPI operation port select.

Values:

enumerator kFLEXSPI_PortA1: Access flash on A1 port.

enumerator kFLEXSPI_PortA2: Access flash on A2 port.

enumerator kFLEXSPI_PortB1: Access flash on B1 port.

enumerator kFLEXSPI_PortB2: Access flash on B2 port.

enumerator kFLEXSPI_PortCount

enum _flexspi_arb_command_source

Trigger source of current command sequence granted by arbitrator.

Values:

enumerator kFLEXSPI_AhbReadCommand

enumerator kFLEXSPI_AhbWriteCommand

enumerator kFLEXSPI_IpCommand

enumerator kFLEXSPI_SuspendedCommand

enum _flexspi_command_type

Command type.

Values:

enumerator kFLEXSPI_Command: FlexSPI operation: Only command, both TX and Rx buffer are ignored.

enumerator kFLEXSPI_Config: FlexSPI operation: Configure device mode, the TX fifo size is fixed in LUT.

enumerator kFLEXSPI_Read

enumerator kFLEXSPI_Write

typedef enum _flexspi_pad flexspi_pad_t: pad definition of FLEXSPI, use to form LUT instruction.

typedef enum _flexspi_flags flexspi_flags_t: FLEXSPI interrupt status flags.

typedef enum _flexspi_read_sample_clock flexspi_read_sample_clock_t: FLEXSPI sample clock source selection for Flash Reading.

typedef enum _flexspi_cs_interval_cycle_unit flexspi_cs_interval_cycle_unit_t: FLEXSPI interval unit for flash device select.

typedef enum _flexspi_ahb_write_wait_unit flexspi_ahb_write_wait_unit_t: FLEXSPI AHB wait interval unit for writing.

typedef enum _flexspi_ip_error_code flexspi_ip_error_code_t: Error Code when IP command Error detected.

typedef enum _flexspi_ahb_error_code flexspi_ahb_error_code_t: Error Code when AHB command Error detected.

typedef enum _flexspi_port flexspi_port_t: FLEXSPI operation port select.

typedef enum _flexspi_arb_command_source flexspi_arb_command_source_t: Trigger source of current command sequence granted by arbitrator.

typedef enum _flexspi_command_type flexspi_command_type_t: Command type.

typedef struct _flexspi_ahbBuffer_config flexspi_ahbBuffer_config_t

typedef struct _flexspi_config flexspi_config_t: FLEXSPI configuration structure.

typedef struct _flexspi_device_config flexspi_device_config_t: External device configuration items.

typedef struct _flexspi_transfer flexspi_transfer_t: Transfer structure for FLEXSPI.

typedef struct _flexspi_handle flexspi_handle_t

typedef void (*flexspi_transfer_callback_t)(FLEXSPI_Type *base, flexspi_handle_t *handle, status_t status, void *userData): FLEXSPI transfer callback function.

FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT

FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1): Formula to form FLEXSPI instructions in LUT table.

struct _flexspi_ahbBuffer_config

#include <fsl_flexspi.h>

Public Members

uint8_t priority: This priority for AHB Master Read which this AHB RX Buffer is assigned.

uint8_t masterIndex: AHB Master ID the AHB RX Buffer is assigned.

uint16_t bufferSize: AHB buffer size in byte.

bool enablePrefetch: AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master, allows prefetch disable/enable separately for each master.

struct _flexspi_config

#include <fsl_flexspi.h>

FLEXSPI configuration structure.

Public Members

flexspi_read_sample_clock_t rxSampleClock: Sample Clock source selection for Flash Reading.

bool enableSckFreeRunning: Enable/disable SCK output free-running.

bool enableDoze: Enable/disable doze mode support.

bool enableHalfSpeedAccess: Enable/disable divide by 2 of the clock for half speed commands.

bool enableSameConfigForAll: Enable/disable same configuration for all connected devices when enabled, same configuration in FLASHA1CRx is applied to all.

uint16_t seqTimeoutCycle: Timeout wait cycle for command sequence execution, timeout after ahbGrantTimeoutCyle*1024 serial root clock cycles.

uint8_t ipGrantTimeoutCycle: Timeout wait cycle for IP command grant, timeout after ipGrantTimeoutCycle*1024 AHB clock cycles.

uint8_t txWatermark: FLEXSPI IP transmit watermark value.

uint8_t rxWatermark: FLEXSPI receive watermark value.

struct _flexspi_device_config

#include <fsl_flexspi.h>

External device configuration items.

Public Members

uint32_t flexspiRootClk: FLEXSPI serial root clock.

bool isSck2Enabled: FLEXSPI use SCK2.

uint32_t flashSize: Flash size in KByte.

bool addressShift: Address shift.

flexspi_cs_interval_cycle_unit_t CSIntervalUnit: CS interval unit, 1 or 256 cycle.

uint16_t CSInterval: CS line assert interval, multiply CS interval unit to get the CS line assert interval cycles.

uint8_t CSHoldTime: CS line hold time.

uint8_t CSSetupTime: CS line setup time.

uint8_t dataValidTime: Data valid time for external device.

uint8_t columnspace: Column space size.

bool enableWordAddress: If enable word address.

uint8_t AWRSeqIndex: Sequence ID for AHB write command.

uint8_t AWRSeqNumber: Sequence number for AHB write command.

uint8_t ARDSeqIndex: Sequence ID for AHB read command.

uint8_t ARDSeqNumber: Sequence number for AHB read command.

flexspi_ahb_write_wait_unit_t AHBWriteWaitUnit: AHB write wait unit.

uint16_t AHBWriteWaitInterval: AHB write wait interval, multiply AHB write interval unit to get the AHB write wait cycles.

bool enableWriteMask: Enable/Disable FLEXSPI drive DQS pin as write mask when writing to external device.

bool isFroClockSource: Is FRO clock source or not.

struct _flexspi_transfer

#include <fsl_flexspi.h>

Transfer structure for FLEXSPI.

Public Members

uint32_t deviceAddress: Operation device address.

flexspi_port_t port: Operation port.

flexspi_command_type_t cmdType: Execution command type.

uint8_t seqIndex: Sequence ID for command.

uint8_t SeqNumber: Sequence number for command.

uint32_t *data: Data buffer.

size_t dataSize: Data size in bytes.

struct _flexspi_handle

#include <fsl_flexspi.h>

Transfer handle structure for FLEXSPI.

Public Members

uint32_t state: Internal state for FLEXSPI transfer

uint8_t *data: Data buffer.

size_t dataSize: Remaining Data size in bytes.

size_t transferTotalSize: Total Data size in bytes.

flexspi_transfer_callback_t completionCallback: Callback for users while transfer finish or error occurred

void *userData: FLEXSPI callback function parameter.

struct ahbConfig

Public Members

uint8_t ahbGrantTimeoutCycle: Timeout wait cycle for AHB command grant, timeout after ahbGrantTimeoutCyle*1024 AHB clock cycles.

uint16_t ahbBusTimeoutCycle: Timeout wait cycle for AHB read/write access, timeout after ahbBusTimeoutCycle*1024 AHB clock cycles.

uint8_t resumeWaitCycle: Wait cycle for idle state before suspended command sequence resume, timeout after ahbBusTimeoutCycle AHB clock cycles.

flexspi_ahbBuffer_config_t buffer[FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNTn(0)]: AHB buffer size.

bool enableClearAHBBufferOpt: Enable/disable automatically clean AHB RX Buffer and TX Buffer when FLEXSPI returns STOP mode ACK.

bool enableReadAddressOpt: Enable/disable remove AHB read burst start address alignment limitation. when enable, there is no AHB read burst start address alignment limitation.

bool enableAHBPrefetch: Enable/disable AHB read prefetch feature, when enabled, FLEXSPI will fetch more data than current AHB burst.

bool enableAHBBufferable: Enable/disable AHB bufferable write access support, when enabled, FLEXSPI return before waiting for command execution finished.

bool enableAHBCachable: Enable AHB bus cachable read access support.

FLEXSPI DMA Driver

void FLEXSPI_TransferCreateHandleDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, flexspi_dma_callback_t callback, void *userData, dma_handle_t *txDmaHandle, dma_handle_t *rxDmaHandle)

Initializes the FLEXSPI handle for transfer which is used in transactional functions and set the callback.

Parameters:

base – FLEXSPI peripheral base address
handle – Pointer to flexspi_dma_handle_t structure
callback – FLEXSPI callback, NULL means no callback.
userData – User callback function data.
txDmaHandle – User requested DMA handle for TX DMA transfer.
rxDmaHandle – User requested DMA handle for RX DMA transfer.

void FLEXSPI_TransferUpdateSizeDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, flexspi_dma_transfer_nsize_t nsize)

Update FLEXSPI DMA transfer source data transfer size(SSIZE) and destination data transfer size(DSIZE).

See also

flexspi_dma_transfer_nsize_t .

Parameters:

base – FLEXSPI peripheral base address
handle – Pointer to flexspi_dma_handle_t structure
nsize – FLEXSPI DMA transfer data transfer size(SSIZE/DSIZE), by default the size is kFLEXPSI_DMAnSize1Bytes(one byte).

status_t FLEXSPI_TransferDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, flexspi_transfer_t *xfer)

Transfers FLEXSPI data using an dma non-blocking method.

This function writes/receives data to/from the FLEXSPI transmit/receive FIFO. This function is non-blocking.

Parameters:

base – FLEXSPI peripheral base address.
handle – Pointer to flexspi_dma_handle_t structure
xfer – FLEXSPI transfer structure.

Return values:

kStatus_FLEXSPI_Busy – FLEXSPI is busy transfer.
kStatus_InvalidArgument – The watermark configuration is invalid, the watermark should be power of 2 to do successfully DMA transfer.
kStatus_Success – FLEXSPI successfully start dma transfer.

void FLEXSPI_TransferAbortDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle)

Aborts the transfer data using dma.

This function aborts the transfer data using dma.

Parameters:

base – FLEXSPI peripheral base address.
handle – Pointer to flexspi_dma_handle_t structure

status_t FLEXSPI_TransferGetTransferCountDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, size_t *count)

Gets the transferred counts of transfer.

Parameters:

base – FLEXSPI peripheral base address.
handle – Pointer to flexspi_dma_handle_t structure.
count – Bytes transfer.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

FSL_FLEXSPI_DMA_DRIVER_VERSION: FLEXSPI DMA driver version 2.2.1.

enum _flexspi_dma_ntransfer_size

dma transfer configuration

Values:

enumerator kFLEXPSI_DMAnSize1Bytes: Source/Destination data transfer size is 1 byte every time

enumerator kFLEXPSI_DMAnSize2Bytes: Source/Destination data transfer size is 2 bytes every time

enumerator kFLEXPSI_DMAnSize4Bytes: Source/Destination data transfer size is 4 bytes every time

typedef struct _flexspi_dma_handle flexspi_dma_handle_t

typedef void (*flexspi_dma_callback_t)(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, status_t status, void *userData): FLEXSPI dma transfer callback function for finish and error.

typedef enum _flexspi_dma_ntransfer_size flexspi_dma_transfer_nsize_t: dma transfer configuration

struct _flexspi_dma_handle

#include <fsl_flexspi_dma.h>

FLEXSPI DMA transfer handle, users should not touch the content of the handle.

Public Members

dma_handle_t *txDmaHandle: dma handler for FLEXSPI Tx.

dma_handle_t *rxDmaHandle: dma handler for FLEXSPI Rx.

size_t transferSize: Bytes need to transfer.

flexspi_dma_transfer_nsize_t nsize: dma SSIZE/DSIZE in each transfer.

uint8_t nbytes: dma minor byte transfer count initially configured.

uint8_t count: The transfer data count in a DMA request.

uint32_t state: Internal state for FLEXSPI dma transfer.

flexspi_dma_callback_t completionCallback: A callback function called after the dma transfer is finished.

void *userData: User callback parameter

FMEAS: Frequency Measure Driver

static inline void FMEAS_StartMeasure(FMEAS_SYSCON_Type *base)

Starts a frequency measurement cycle.

Parameters:

base – : SYSCON peripheral base address.

static inline bool FMEAS_IsMeasureComplete(FMEAS_SYSCON_Type *base)

Indicates when a frequency measurement cycle is complete.

Parameters:

base – : SYSCON peripheral base address.

Returns:

true if a measurement cycle is active, otherwise false.

uint32_t FMEAS_GetFrequency(FMEAS_SYSCON_Type *base, uint32_t refClockRate)

Returns the computed value for a frequency measurement cycle.

Parameters:

base – : SYSCON peripheral base address.
refClockRate – : Reference clock rate used during the frequency measurement cycle.

Returns:

Frequency in Hz.

FSL_FMEAS_DRIVER_VERSION: Defines LPC Frequency Measure driver version 2.1.1.

typedef FREQME_Type FMEAS_SYSCON_Type

FMEAS_SYSCON_FREQMECTRL_CAPVAL_MASK

FMEAS_SYSCON_FREQMECTRL_CAPVAL_SHIFT

FMEAS_SYSCON_FREQMECTRL_CAPVAL

FMEAS_SYSCON_FREQMECTRL_PROG_MASK

FMEAS_SYSCON_FREQMECTRL_PROG_SHIFT

FMEAS_SYSCON_FREQMECTRL_PROG

Hashcrypt: The Cryptographic Accelerator

Hashcrypt Background HASH

void HASHCRYPT_SHA_SetCallback(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, hashcrypt_callback_t callback, void *userData)

Initializes the HASHCRYPT handle for background hashing.

This function initializes the hash context for background hashing (Non-blocking) APIs. This is less typical interface to hash function, but can be used for parallel processing, when main CPU has something else to do. Example is digital signature RSASSA-PKCS1-V1_5-VERIFY((n,e),M,S) algorithm, where background hashing of M can be started, then CPU can compute S^e mod n (in parallel with background hashing) and once the digest becomes available, CPU can proceed to comparison of EM with EM’.

Parameters:

base – HASHCRYPT peripheral base address.
ctx – [out] Hash context.
callback – Callback function.
userData – User data (to be passed as an argument to callback function, once callback is invoked from isr).

status_t HASHCRYPT_SHA_UpdateNonBlocking(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, const uint8_t *input, size_t inputSize)

Create running hash on given data.

Configures the HASHCRYPT to compute new running hash as AHB master and returns immediately. HASHCRYPT AHB Master mode supports only aligned input address and can be called only once per continuous block of data. Every call to this function must be preceded with HASHCRYPT_SHA_Init() and finished with HASHCRYPT_SHA_Finish(). Once callback function is invoked by HASHCRYPT isr, it should set a flag for the main application to finalize the hashing (padding) and to read out the final digest by calling HASHCRYPT_SHA_Finish().

Parameters:

base – HASHCRYPT peripheral base address
ctx – Specifies callback. Last incomplete 512-bit block of the input is copied into clear buffer for padding.
input – 32-bit word aligned pointer to Input data.
inputSize – Size of input data in bytes (must be word aligned)

Returns:

Status of the hash update operation.

Hashcrypt common functions

FSL_HASHCRYPT_DRIVER_VERSION

HASHCRYPT driver version. Version 2.2.16.

Current version: 2.2.16

Change log:

Version 2.0.0
- Initial version
Version 2.0.1
- Support loading AES key from unaligned address
Version 2.0.2
- Support loading AES key from unaligned address for different compiler and core variants
Version 2.0.3
- Remove SHA512 and AES ICB algorithm definitions
Version 2.0.4
- Add SHA context switch support
Version 2.1.0
- Update the register name and macro to align with new header.
Version 2.1.1
- Fix MISRA C-2012.
Version 2.1.2
- Support loading AES input data from unaligned address.
Version 2.1.3
- Fix MISRA C-2012.
Version 2.1.4
- Fix context switch cannot work when switching from AES.
Version 2.1.5
- Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() to prevent possible optimization issue.
Version 2.2.0
- Add AES-OFB and AES-CFB mixed IP/SW modes.
Version 2.2.1
- Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() prevent compiler from reordering memory write when -O2 or higher is used.
Version 2.2.2
- Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() to fix optimization issue
Version 2.2.3
- Added check for size in hashcrypt_aes_one_block to prevent overflowing COUNT field in MEMCTRL register, if its bigger than COUNT field do a multiple runs.
Version 2.2.4
- In all HASHCRYPT_AES_xx functions have been added setting CTRL_MODE bitfield to 0 after processing data, which decreases power consumption.
Version 2.2.5
- Add data synchronization barrier and instruction synchronization barrier inside hashcrypt_sha_process_message_data() to fix optimization issue
Version 2.2.6
- Add data synchronization barrier inside HASHCRYPT_SHA_Update() and hashcrypt_get_data() function to fix optimization issue on MDK and ARMGCC release targets
Version 2.2.7
- Add data synchronization barrier inside HASHCRYPT_SHA_Update() to fix optimization issue on MCUX IDE release target
Version 2.2.8
- Unify hashcrypt hashing behavior between aligned and unaligned input data
Version 2.2.9
- Add handling of set ERROR bit in the STATUS register
Version 2.2.10
- Fix missing error statement in hashcrypt_save_running_hash()
Version 2.2.11
- Fix incorrect SHA-256 calculation for long messages with reload
Version 2.2.12
- Fix hardfault issue on the Keil compiler due to unaligned memcpy() input on some optimization levels
Version 2.2.13
- Added function hashcrypt_seed_prng() which loading random number into PRNG_SEED register before AES operation for SCA protection
Version 2.2.14
- Modify function hashcrypt_get_data() to prevent issue with unaligned access
Version 2.2.15
- Add wait on DIGEST BIT inside hashcrypt_sha_one_block() to fix issues with some optimization flags
Version 2.2.16
- Add DSB instruction inside hashcrypt_sha_ldm_stm_16_words() to fix issues with some optimization flags

enum _hashcrypt_algo_t

Algorithm used for Hashcrypt operation.

Values:

enumerator kHASHCRYPT_Sha1: SHA_1

enumerator kHASHCRYPT_Sha256: SHA_256

enumerator kHASHCRYPT_Aes: AES

typedef enum _hashcrypt_algo_t hashcrypt_algo_t: Algorithm used for Hashcrypt operation.

void HASHCRYPT_Init(HASHCRYPT_Type *base)

Enables clock and disables reset for HASHCRYPT peripheral.

Enable clock and disable reset for HASHCRYPT.

Parameters:

base – HASHCRYPT base address

void HASHCRYPT_Deinit(HASHCRYPT_Type *base)

Disables clock for HASHCRYPT peripheral.

Disable clock and enable reset.

Parameters:

base – HASHCRYPT base address

HASHCRYPT_MODE_SHA1: Algorithm definitions correspond with the values for Mode field in Control register !

HASHCRYPT_MODE_SHA256

HASHCRYPT_MODE_AES

Hashcrypt AES

enum _hashcrypt_aes_mode_t

AES mode.

Values:

enumerator kHASHCRYPT_AesEcb: AES ECB mode

enumerator kHASHCRYPT_AesCbc: AES CBC mode

enumerator kHASHCRYPT_AesCtr: AES CTR mode

enum _hashcrypt_aes_keysize_t

Size of AES key.

Values:

enumerator kHASHCRYPT_Aes128: AES 128 bit key

enumerator kHASHCRYPT_Aes192: AES 192 bit key

enumerator kHASHCRYPT_Aes256: AES 256 bit key

enumerator kHASHCRYPT_InvalidKey: AES invalid key

enum _hashcrypt_key

HASHCRYPT key source selection.

Values:

enumerator kHASHCRYPT_UserKey: HASHCRYPT user key

enumerator kHASHCRYPT_SecretKey: HASHCRYPT secret key (dedicated hw bus from PUF)

typedef enum _hashcrypt_aes_mode_t hashcrypt_aes_mode_t: AES mode.

typedef enum _hashcrypt_aes_keysize_t hashcrypt_aes_keysize_t: Size of AES key.

typedef enum _hashcrypt_key hashcrypt_key_t: HASHCRYPT key source selection.

typedef struct _hashcrypt_handle hashcrypt_handle_t

struct _hashcrypt_handle __attribute__ ((aligned))

status_t HASHCRYPT_AES_SetKey(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *key, size_t keySize)

Set AES key to hashcrypt_handle_t struct and optionally to HASHCRYPT.

Sets the AES key for encryption/decryption with the hashcrypt_handle_t structure. The hashcrypt_handle_t input argument specifies key source.

Parameters:

base – HASHCRYPT peripheral base address.
handle – Handle used for the request.
key – 0-mod-4 aligned pointer to AES key.
keySize – AES key size in bytes. Shall equal 16, 24 or 32.

Returns:

status from set key operation

status_t HASHCRYPT_AES_EncryptEcb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size)

Encrypts AES on one or multiple 128-bit block(s).

Encrypts AES. The source plaintext and destination ciphertext can overlap in system memory.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptEcb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size)

Decrypts AES on one or multiple 128-bit block(s).

Decrypts AES. The source ciphertext and destination plaintext can overlap in system memory.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
ciphertext – Input plain text to encrypt
plaintext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.

Returns:

Status from decrypt operation

status_t HASHCRYPT_AES_EncryptCbc(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])

Encrypts AES using CBC block mode.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptCbc(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])

Decrypts AES using CBC block mode.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.

Returns:

Status from decrypt operation

status_t HASHCRYPT_AES_CryptCtr(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *input, uint8_t *output, size_t size, uint8_t counter[16U], uint8_t counterlast[16U], size_t *szLeft)

Encrypts or decrypts AES using CTR block mode.

Encrypts or decrypts AES using CTR block mode. AES CTR mode uses only forward AES cipher and same algorithm for encryption and decryption. The only difference between encryption and decryption is that, for encryption, the input argument is plain text and the output argument is cipher text. For decryption, the input argument is cipher text and the output argument is plain text.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
input – Input data for CTR block mode
output – [out] Output data for CTR block mode
size – Size of input and output data in bytes
counter – [inout] Input counter (updates on return)
counterlast – [out] Output cipher of last counter, for chained CTR calls (statefull encryption). NULL can be passed if chained calls are not used.
szLeft – [out] Output number of bytes in left unused in counterlast block. NULL can be passed if chained calls are not used.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_CryptOfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *input, uint8_t *output, size_t size, const uint8_t iv[16U])

Encrypts or decrypts AES using OFB block mode.

Encrypts or decrypts AES using OFB block mode. AES OFB mode uses only forward AES cipher and same algorithm for encryption and decryption. The only difference between encryption and decryption is that, for encryption, the input argument is plain text and the output argument is cipher text. For decryption, the input argument is cipher text and the output argument is plain text.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
input – Input data for OFB block mode
output – [out] Output data for OFB block mode
size – Size of input and output data in bytes
iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_EncryptCfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])

Encrypts AES using CFB block mode.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptCfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])

Decrypts AES using CFB block mode.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plaintext text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

HASHCRYPT_AES_BLOCK_SIZE: AES block size in bytes

AES_ENCRYPT

AES_DECRYPT

struct _hashcrypt_handle

#include <fsl_hashcrypt.h>

Specify HASHCRYPT’s key resource.

Public Members

uint32_t keyWord[8]: Copy of user key (set by HASHCRYPT_AES_SetKey().

hashcrypt_key_t keyType: For operations with key (such as AES encryption/decryption), specify key type.

Hashcrypt HASH

typedef struct _hashcrypt_hash_ctx_t hashcrypt_hash_ctx_t: Storage type used to save hash context.

typedef void (*hashcrypt_callback_t)(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, status_t status, void *userData): HASHCRYPT background hash callback function.

status_t HASHCRYPT_SHA(HASHCRYPT_Type *base, hashcrypt_algo_t algo, const uint8_t *input, size_t inputSize, uint8_t *output, size_t *outputSize)

Create HASH on given data.

Perform the full SHA in one function call. The function is blocking.

Parameters:

base – HASHCRYPT peripheral base address
algo – Underlaying algorithm to use for hash computation.
input – Input data
inputSize – Size of input data in bytes
output – [out] Output hash data
outputSize – [out] Output parameter storing the size of the output hash in bytes

Returns:

Status of the one call hash operation.

status_t HASHCRYPT_SHA_Init(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, hashcrypt_algo_t algo)

Initialize HASH context.

This function initializes the HASH.

Parameters:

base – HASHCRYPT peripheral base address
ctx – [out] Output hash context
algo – Underlaying algorithm to use for hash computation.

Returns:

Status of initialization

status_t HASHCRYPT_SHA_Update(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, const uint8_t *input, size_t inputSize)

Add data to current HASH.

Add data to current HASH. This can be called repeatedly with an arbitrary amount of data to be hashed. The functions blocks. If it returns kStatus_Success, the running hash has been updated (HASHCRYPT has processed the input data), so the memory at input pointer can be released back to system. The HASHCRYPT context buffer is updated with the running hash and with all necessary information to support possible context switch.

Parameters:

base – HASHCRYPT peripheral base address
ctx – [inout] HASH context
input – Input data
inputSize – Size of input data in bytes

Returns:

Status of the hash update operation

status_t HASHCRYPT_SHA_Finish(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, uint8_t *output, size_t *outputSize)

Finalize hashing.

Outputs the final hash (computed by HASHCRYPT_HASH_Update()) and erases the context.

Parameters:

base – HASHCRYPT peripheral base address
ctx – [inout] Input hash context
output – [out] Output hash data
outputSize – [inout] Optional parameter (can be passed as NULL). On function entry, it specifies the size of output[] buffer. On function return, it stores the number of updated output bytes.

Returns:

Status of the hash finish operation

HASHCRYPT_HASH_CTX_SIZE: HASHCRYPT HASH Context size.

struct _hashcrypt_hash_ctx_t

#include <fsl_hashcrypt.h>

Storage type used to save hash context.

Public Members

uint32_t x[30]: storage

I2C: Inter-Integrated Circuit Driver

I2C DMA Driver

void I2C_MasterTransferCreateHandleDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_dma_transfer_callback_t callback, void *userData, dma_handle_t *dmaHandle)

Init the I2C handle which is used in transactional functions.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
callback – pointer to user callback function
userData – user param passed to the callback function
dmaHandle – DMA handle pointer

status_t I2C_MasterTransferDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_transfer_t *xfer)

Performs a master dma non-blocking transfer on the I2C bus.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
xfer – pointer to transfer structure of i2c_master_transfer_t

Return values:

kStatus_Success – Sucessully complete the data transmission.
kStatus_I2C_Busy – Previous transmission still not finished.
kStatus_I2C_Timeout – Transfer error, wait signal timeout.
kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.
kStataus_I2C_Nak – Transfer error, receive Nak during transfer.

status_t I2C_MasterTransferGetCountDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, size_t *count)

Get master transfer status during a dma non-blocking transfer.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
count – Number of bytes transferred so far by the non-blocking transaction.

void I2C_MasterTransferAbortDMA(I2C_Type *base, i2c_master_dma_handle_t *handle)

Abort a master dma non-blocking transfer in a early time.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure

FSL_I2C_DMA_DRIVER_VERSION: I2C DMA driver version.

typedef struct _i2c_master_dma_handle i2c_master_dma_handle_t: I2C master dma handle typedef.

typedef void (*i2c_master_dma_transfer_callback_t)(I2C_Type *base, i2c_master_dma_handle_t *handle, status_t status, void *userData): I2C master dma transfer callback typedef.

typedef void (*flexcomm_i2c_dma_master_irq_handler_t)(I2C_Type *base, i2c_master_dma_handle_t *handle): Typedef for master dma handler.

I2C_MAX_DMA_TRANSFER_COUNT: Maximum lenght of single DMA transfer (determined by capability of the DMA engine)

struct _i2c_master_dma_handle

#include <fsl_i2c_dma.h>

I2C master dma transfer structure.

Public Members

uint8_t state: Transfer state machine current state.

uint32_t transferCount: Indicates progress of the transfer

uint32_t remainingBytesDMA: Remaining byte count to be transferred using DMA.

uint8_t *buf: Buffer pointer for current state.

bool checkAddrNack: Whether to check the nack signal is detected during addressing.

dma_handle_t *dmaHandle: The DMA handler used.

i2c_master_transfer_t transfer: Copy of the current transfer info.

i2c_master_dma_transfer_callback_t completionCallback: Callback function called after dma transfer finished.

void *userData: Callback parameter passed to callback function.

I2C Driver

FSL_I2C_DRIVER_VERSION: I2C driver version.

I2C status return codes.

Values:

enumerator kStatus_I2C_Busy: The master is already performing a transfer.

enumerator kStatus_I2C_Idle: The slave driver is idle.

enumerator kStatus_I2C_Nak: The slave device sent a NAK in response to a byte.

enumerator kStatus_I2C_InvalidParameter: Unable to proceed due to invalid parameter.

enumerator kStatus_I2C_BitError: Transferred bit was not seen on the bus.

enumerator kStatus_I2C_ArbitrationLost: Arbitration lost error.

enumerator kStatus_I2C_NoTransferInProgress: Attempt to abort a transfer when one is not in progress.

enumerator kStatus_I2C_DmaRequestFail: DMA request failed.

enumerator kStatus_I2C_StartStopError: Start and stop error.

enumerator kStatus_I2C_UnexpectedState: Unexpected state.

enumerator kStatus_I2C_Timeout: Timeout when waiting for I2C master/slave pending status to set to continue transfer.

enumerator kStatus_I2C_Addr_Nak: NAK received for Address

enumerator kStatus_I2C_EventTimeout: Timeout waiting for bus event.

enumerator kStatus_I2C_SclLowTimeout: Timeout SCL signal remains low.

enum _i2c_status_flags

I2C status flags.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_MasterPendingFlag: The I2C module is waiting for software interaction. bit 0

enumerator kI2C_MasterArbitrationLostFlag: The arbitration of the bus was lost. There was collision on the bus. bit 4

enumerator kI2C_MasterStartStopErrorFlag: There was an error during start or stop phase of the transaction. bit 6

enumerator kI2C_MasterIdleFlag: The I2C master idle status. bit 5

enumerator kI2C_MasterRxReadyFlag: The I2C master rx ready status. bit 1

enumerator kI2C_MasterTxReadyFlag: The I2C master tx ready status. bit 2

enumerator kI2C_MasterAddrNackFlag: The I2C master address nack status. bit 7

enumerator kI2C_MasterDataNackFlag: The I2C master data nack status. bit 3

enumerator kI2C_SlavePendingFlag: The I2C module is waiting for software interaction. bit 8

enumerator kI2C_SlaveNotStretching: Indicates whether the slave is currently stretching clock (0 = yes, 1 = no). bit 11

enumerator kI2C_SlaveSelected: Indicates whether the slave is selected by an address match. bit 14

enumerator kI2C_SaveDeselected: Indicates that slave was previously deselected (deselect event took place, w1c). bit 15

enumerator kI2C_SlaveAddressedFlag: One of the I2C slave’s 4 addresses is matched. bit 22

enumerator kI2C_SlaveReceiveFlag: Slave receive data available. bit 9

enumerator kI2C_SlaveTransmitFlag: Slave data can be transmitted. bit 10

enumerator kI2C_SlaveAddress0MatchFlag: Slave address0 match. bit 20

enumerator kI2C_SlaveAddress1MatchFlag: Slave address1 match. bit 12

enumerator kI2C_SlaveAddress2MatchFlag: Slave address2 match. bit 13

enumerator kI2C_SlaveAddress3MatchFlag: Slave address3 match. bit 21

enumerator kI2C_MonitorReadyFlag: The I2C monitor ready interrupt. bit 16

enumerator kI2C_MonitorOverflowFlag: The monitor data overrun interrupt. bit 17

enumerator kI2C_MonitorActiveFlag: The monitor is active. bit 18

enumerator kI2C_MonitorIdleFlag: The monitor idle interrupt. bit 19

enumerator kI2C_EventTimeoutFlag: The bus event timeout interrupt. bit 24

enumerator kI2C_SclTimeoutFlag: The SCL timeout interrupt. bit 25

enumerator kI2C_MasterAllClearFlags

enumerator kI2C_SlaveAllClearFlags

enumerator kI2C_CommonAllClearFlags

enum _i2c_interrupt_enable

I2C interrupt enable.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_MasterPendingInterruptEnable: The I2C master communication pending interrupt.

enumerator kI2C_MasterArbitrationLostInterruptEnable: The I2C master arbitration lost interrupt.

enumerator kI2C_MasterStartStopErrorInterruptEnable: The I2C master start/stop timing error interrupt.

enumerator kI2C_SlavePendingInterruptEnable: The I2C slave communication pending interrupt.

enumerator kI2C_SlaveNotStretchingInterruptEnable: The I2C slave not streching interrupt, deep-sleep mode can be entered only when this interrupt occurs.

enumerator kI2C_SlaveDeselectedInterruptEnable: The I2C slave deselection interrupt.

enumerator kI2C_MonitorReadyInterruptEnable: The I2C monitor ready interrupt.

enumerator kI2C_MonitorOverflowInterruptEnable: The monitor data overrun interrupt.

enumerator kI2C_MonitorIdleInterruptEnable: The monitor idle interrupt.

enumerator kI2C_EventTimeoutInterruptEnable: The bus event timeout interrupt.

enumerator kI2C_SclTimeoutInterruptEnable: The SCL timeout interrupt.

enumerator kI2C_MasterAllInterruptEnable

enumerator kI2C_SlaveAllInterruptEnable

enumerator kI2C_CommonAllInterruptEnable

I2C_RETRY_TIMES: Retry times for waiting flag.

I2C_MASTER_TRANSMIT_IGNORE_LAST_NACK: Whether to ignore the nack signal of the last byte during master transmit.

I2C_STAT_MSTCODE_IDLE: Master Idle State Code

I2C_STAT_MSTCODE_RXREADY: Master Receive Ready State Code

I2C_STAT_MSTCODE_TXREADY: Master Transmit Ready State Code

I2C_STAT_MSTCODE_NACKADR: Master NACK by slave on address State Code

I2C_STAT_MSTCODE_NACKDAT: Master NACK by slave on data State Code

I2C_STAT_SLVST_ADDR

I2C_STAT_SLVST_RX

I2C_STAT_SLVST_TX

I2C Master Driver

void I2C_MasterGetDefaultConfig(i2c_master_config_t *masterConfig)

Provides a default configuration for the I2C master peripheral.

This function provides the following default configuration for the I2C master peripheral:

masterConfig->enableMaster            = true;
masterConfig->baudRate_Bps            = 100000U;
masterConfig->enableTimeout           = false;

After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with I2C_MasterInit().

Parameters:

masterConfig – [out] User provided configuration structure for default values. Refer to i2c_master_config_t.

void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)

Initializes the I2C master peripheral.

This function enables the peripheral clock and initializes the I2C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters:

base – The I2C peripheral base address.
masterConfig – User provided peripheral configuration. Use I2C_MasterGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.

void I2C_MasterDeinit(I2C_Type *base)

Deinitializes the I2C master peripheral.

This function disables the I2C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

uint32_t I2C_GetInstance(I2C_Type *base)

Returns an instance number given a base address.

If an invalid base address is passed, debug builds will assert. Release builds will just return instance number 0.

Parameters:

base – The I2C peripheral base address.

Returns:

I2C instance number starting from 0.

static inline void I2C_MasterReset(I2C_Type *base)

Performs a software reset.

Restores the I2C master peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

static inline void I2C_MasterEnable(I2C_Type *base, bool enable)

Enables or disables the I2C module as master.

Parameters:

base – The I2C peripheral base address.
enable – Pass true to enable or false to disable the specified I2C as master.

uint32_t I2C_GetStatusFlags(I2C_Type *base)

Gets the I2C status flags.

A bit mask with the state of all I2C status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also

_i2c_status_flags.

Parameters:

base – The I2C peripheral base address.

Returns:

State of the status flags:

1: related status flag is set.
0: related status flag is not set.

static inline void I2C_ClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C status flag state.

Refer to kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags to see the clearable flags. Attempts to clear other flags has no effect.

See also

_i2c_status_flags, _i2c_master_status_flags and _i2c_slave_status_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of the members in kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags. You may pass the result of a previous call to I2C_GetStatusFlags().

static inline void I2C_MasterClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C master status flag state.

Deprecated:

Do not use this function. It has been superceded by I2C_ClearStatusFlags The following status register flags can be cleared:

kI2C_MasterArbitrationLostFlag
kI2C_MasterStartStopErrorFlag

Attempts to clear other flags has no effect.

See also

_i2c_status_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_status_flags enumerators OR’d together. You may pass the result of a previous call to I2C_GetStatusFlags().

static inline void I2C_EnableInterrupts(I2C_Type *base, uint32_t interruptMask)

Enables the I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.
interruptMask – Bit mask of interrupts to enable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.

static inline void I2C_DisableInterrupts(I2C_Type *base, uint32_t interruptMask)

Disables the I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.
interruptMask – Bit mask of interrupts to disable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t I2C_GetEnabledInterrupts(I2C_Type *base)

Returns the set of currently enabled I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.

Returns:

A bitmask composed of _i2c_interrupt_enable enumerators OR’d together to indicate the set of enabled interrupts.

void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the I2C bus frequency for master transactions.

The I2C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.

Parameters:

base – The I2C peripheral base address.
srcClock_Hz – I2C functional clock frequency in Hertz.
baudRate_Bps – Requested bus frequency in bits per second.

void I2C_MasterSetTimeoutValue(I2C_Type *base, uint8_t timeout_Ms, uint32_t srcClock_Hz)

Sets the I2C bus timeout value.

If the SCL signal remains low or bus does not have event longer than the timeout value, kI2C_SclTimeoutFlag or kI2C_EventTimeoutFlag is set. This can indicete the bus is held by slave or any fault occurs to the I2C module.

Parameters:

base – The I2C peripheral base address.
timeout_Ms – Timeout value in millisecond.
srcClock_Hz – I2C functional clock frequency in Hertz.

static inline bool I2C_MasterGetBusIdleState(I2C_Type *base)

Returns whether the bus is idle.

Requires the master mode to be enabled.

Parameters:

base – The I2C peripheral base address.

Return values:

true – Bus is busy.
false – Bus is idle.

status_t I2C_MasterStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)

Sends a START on the I2C bus.

This function is used to initiate a new master mode transfer by sending the START signal. The slave address is sent following the I2C START signal.

Parameters:

base – I2C peripheral base pointer
address – 7-bit slave device address.
direction – Master transfer directions(transmit/receive).

Return values:

kStatus_Success – Successfully send the start signal.
kStatus_I2C_Busy – Current bus is busy.

status_t I2C_MasterStop(I2C_Type *base)

Sends a STOP signal on the I2C bus.

Return values:

kStatus_Success – Successfully send the stop signal.
kStatus_I2C_Timeout – Send stop signal failed, timeout.

static inline status_t I2C_MasterRepeatedStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)

Sends a REPEATED START on the I2C bus.

Parameters:

base – I2C peripheral base pointer
address – 7-bit slave device address.
direction – Master transfer directions(transmit/receive).

Return values:

kStatus_Success – Successfully send the start signal.
kStatus_I2C_Busy – Current bus is busy but not occupied by current I2C master.

status_t I2C_MasterWriteBlocking(I2C_Type *base, const void *txBuff, size_t txSize, uint32_t flags)

Performs a polling send transfer on the I2C bus.

Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_I2C_Nak.

Parameters:

base – The I2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.
flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag

Return values:

kStatus_Success – Data was sent successfully.
kStatus_I2C_Busy – Another master is currently utilizing the bus.
kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_I2C_ArbitrationLost – Arbitration lost error.

status_t I2C_MasterReadBlocking(I2C_Type *base, void *rxBuff, size_t rxSize, uint32_t flags)

Performs a polling receive transfer on the I2C bus.

Parameters:

base – The I2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.
flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag

Return values:

kStatus_Success – Data was received successfully.
kStatus_I2C_Busy – Another master is currently utilizing the bus.
kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_I2C_ArbitrationLost – Arbitration lost error.

status_t I2C_MasterTransferBlocking(I2C_Type *base, i2c_master_transfer_t *xfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to arbitration lost or receiving a NAK.

Parameters:

base – I2C peripheral base address.
xfer – Pointer to the transfer structure.

Return values:

kStatus_Success – Successfully complete the data transmission.
kStatus_I2C_Busy – Previous transmission still not finished.
kStatus_I2C_Timeout – Transfer error, wait signal timeout.
kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.
kStataus_I2C_Nak – Transfer error, receive NAK during transfer.
kStataus_I2C_Addr_Nak – Transfer error, receive NAK during addressing.

void I2C_MasterTransferCreateHandle(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_callback_t callback, void *userData)

Creates a new handle for the I2C master non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_MasterTransferAbort() API shall be called.

Parameters:

base – The I2C peripheral base address.
handle – [out] Pointer to the I2C master driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t I2C_MasterTransferNonBlocking(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_t *xfer)

Performs a non-blocking transaction on the I2C bus.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
xfer – The pointer to the transfer descriptor.

Return values:

kStatus_Success – The transaction was started successfully.
kStatus_I2C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.

status_t I2C_MasterTransferGetCount(I2C_Type *base, i2c_master_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
count – [out] Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_I2C_Busy –

status_t I2C_MasterTransferAbort(I2C_Type *base, i2c_master_handle_t *handle)

Terminates a non-blocking I2C master transmission early.

Note

It is not safe to call this function from an IRQ handler that has a higher priority than the I2C peripheral’s IRQ priority.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.

Return values:

kStatus_Success – A transaction was successfully aborted.
kStatus_I2C_Timeout – Timeout during polling for flags.

void I2C_MasterTransferHandleIRQ(I2C_Type *base, i2c_master_handle_t *handle)

Reusable routine to handle master interrupts.

Note

This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.

enum _i2c_direction

Direction of master and slave transfers.

Values:

enumerator kI2C_Write: Master transmit.

enumerator kI2C_Read: Master receive.

enum _i2c_master_transfer_flags

Transfer option flags.

Note

These enumerations are intended to be OR’d together to form a bit mask of options for the _i2c_master_transfer::flags field.

Values:

enumerator kI2C_TransferDefaultFlag: Transfer starts with a start signal, stops with a stop signal.

enumerator kI2C_TransferNoStartFlag: Don’t send a start condition, address, and sub address

enumerator kI2C_TransferRepeatedStartFlag: Send a repeated start condition

enumerator kI2C_TransferNoStopFlag: Don’t send a stop condition.

enum _i2c_transfer_states

States for the state machine used by transactional APIs.

Values:

enumerator kIdleState

enumerator kTransmitSubaddrState

enumerator kTransmitDataState

enumerator kReceiveDataBeginState

enumerator kReceiveDataState

enumerator kReceiveLastDataState

enumerator kStartState

enumerator kStopState

enumerator kWaitForCompletionState

typedef enum _i2c_direction i2c_direction_t: Direction of master and slave transfers.

typedef struct _i2c_master_config i2c_master_config_t

Structure with settings to initialize the I2C master module.

This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef struct _i2c_master_transfer i2c_master_transfer_t: I2C master transfer typedef.

typedef struct _i2c_master_handle i2c_master_handle_t: I2C master handle typedef.

typedef void (*i2c_master_transfer_callback_t)(I2C_Type *base, i2c_master_handle_t *handle, status_t completionStatus, void *userData)

Master completion callback function pointer type.

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to I2C_MasterTransferCreateHandle().

Param base:: The I2C peripheral base address.
Param completionStatus:: Either kStatus_Success or an error code describing how the transfer completed.
Param userData:: Arbitrary pointer-sized value passed from the application.

struct _i2c_master_config

#include <fsl_i2c.h>

Structure with settings to initialize the I2C master module.

This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Public Members

bool enableMaster: Whether to enable master mode.

uint32_t baudRate_Bps: Desired baud rate in bits per second.

bool enableTimeout: Enable internal timeout function.

uint8_t timeout_Ms: Event timeout and SCL low timeout value.

struct _i2c_master_transfer

#include <fsl_i2c.h>

Non-blocking transfer descriptor structure.

This structure is used to pass transaction parameters to the I2C_MasterTransferNonBlocking() API.

Public Members

uint32_t flags: Bit mask of options for the transfer. See enumeration _i2c_master_transfer_flags for available options. Set to 0 or kI2C_TransferDefaultFlag for normal transfers.

uint8_t slaveAddress: The 7-bit slave address.

i2c_direction_t direction: Either kI2C_Read or kI2C_Write.

uint32_t subaddress: Sub address. Transferred MSB first.

size_t subaddressSize: Length of sub address to send in bytes. Maximum size is 4 bytes.

void *data: Pointer to data to transfer.

size_t dataSize: Number of bytes to transfer.

struct _i2c_master_handle

#include <fsl_i2c.h>

Driver handle for master non-blocking APIs.

Note

The contents of this structure are private and subject to change.

Public Members

uint8_t state: Transfer state machine current state.

uint32_t transferCount: Indicates progress of the transfer

uint32_t remainingBytes: Remaining byte count in current state.

uint8_t *buf: Buffer pointer for current state.

bool checkAddrNack: Whether to check the nack signal is detected during addressing.

i2c_master_transfer_t transfer: Copy of the current transfer info.

i2c_master_transfer_callback_t completionCallback: Callback function pointer.

void *userData: Application data passed to callback.

I2C Slave Driver

void I2C_SlaveGetDefaultConfig(i2c_slave_config_t *slaveConfig)

Provides a default configuration for the I2C slave peripheral.

This function provides the following default configuration for the I2C slave peripheral:

slaveConfig->enableSlave = true;
slaveConfig->address0.disable = false;
slaveConfig->address0.address = 0u;
slaveConfig->address1.disable = true;
slaveConfig->address2.disable = true;
slaveConfig->address3.disable = true;
slaveConfig->busSpeed = kI2C_SlaveStandardMode;

After calling this function, override any settings to customize the configuration, prior to initializing the master driver with I2C_SlaveInit(). Be sure to override at least the address0.address member of the configuration structure with the desired slave address.

Parameters:

slaveConfig – [out] User provided configuration structure that is set to default values. Refer to i2c_slave_config_t.

status_t I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig, uint32_t srcClock_Hz)

Initializes the I2C slave peripheral.

This function enables the peripheral clock and initializes the I2C slave peripheral as described by the user provided configuration.

Parameters:

base – The I2C peripheral base address.
slaveConfig – User provided peripheral configuration. Use I2C_SlaveGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate CLKDIV value to provide enough data setup time for master when slave stretches the clock.

void I2C_SlaveSetAddress(I2C_Type *base, i2c_slave_address_register_t addressRegister, uint8_t address, bool addressDisable)

Configures Slave Address n register.

This function writes new value to Slave Address register.

Parameters:

base – The I2C peripheral base address.
addressRegister – The module supports multiple address registers. The parameter determines which one shall be changed.
address – The slave address to be stored to the address register for matching.
addressDisable – Disable matching of the specified address register.

void I2C_SlaveDeinit(I2C_Type *base)

Deinitializes the I2C slave peripheral.

This function disables the I2C slave peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

static inline void I2C_SlaveEnable(I2C_Type *base, bool enable)

Enables or disables the I2C module as slave.

Parameters:

base – The I2C peripheral base address.
enable – True to enable or flase to disable.

static inline void I2C_SlaveClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C status flag state.

The following status register flags can be cleared:

slave deselected flag

Attempts to clear other flags has no effect.

See also

_i2c_slave_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_slave_flags enumerators OR’d together. You may pass the result of a previous call to I2C_SlaveGetStatusFlags().

status_t I2C_SlaveWriteBlocking(I2C_Type *base, const uint8_t *txBuff, size_t txSize)

Performs a polling send transfer on the I2C bus.

The function executes blocking address phase and blocking data phase.

Parameters:

base – The I2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.

Returns:

kStatus_Success Data has been sent.

Returns:

kStatus_Fail Unexpected slave state (master data write while master read from slave is expected).

status_t I2C_SlaveReadBlocking(I2C_Type *base, uint8_t *rxBuff, size_t rxSize)

Performs a polling receive transfer on the I2C bus.

The function executes blocking address phase and blocking data phase.

Parameters:

base – The I2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.

Returns:

kStatus_Success Data has been received.

Returns:

kStatus_Fail Unexpected slave state (master data read while master write to slave is expected).

void I2C_SlaveTransferCreateHandle(I2C_Type *base, i2c_slave_handle_t *handle, i2c_slave_transfer_callback_t callback, void *userData)

Creates a new handle for the I2C slave non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_SlaveTransferAbort() API shall be called.

Parameters:

base – The I2C peripheral base address.
handle – [out] Pointer to the I2C slave driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t I2C_SlaveTransferNonBlocking(I2C_Type *base, i2c_slave_handle_t *handle, uint32_t eventMask)

Starts accepting slave transfers.

Call this API after calling I2C_SlaveInit() and I2C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that was passed into the call to I2C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.

If no slave Tx transfer is busy, a master read from slave request invokes kI2C_SlaveTransmitEvent callback. If no slave Rx transfer is busy, a master write to slave request invokes kI2C_SlaveReceiveEvent callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

status_t I2C_SlaveSetSendBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, const void *txData, size_t txSize, uint32_t eventMask)

Starts accepting master read from slave requests.

The function can be called in response to kI2C_SlaveTransmitEvent callback to start a new slave Tx transfer from within the transfer callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The I2C peripheral base address.
transfer – Pointer to i2c_slave_transfer_t structure.
txData – Pointer to data to send to master.
txSize – Size of txData in bytes.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

status_t I2C_SlaveSetReceiveBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *rxData, size_t rxSize, uint32_t eventMask)

Starts accepting master write to slave requests.

The function can be called in response to kI2C_SlaveReceiveEvent callback to start a new slave Rx transfer from within the transfer callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The I2C peripheral base address.
transfer – Pointer to i2c_slave_transfer_t structure.
rxData – Pointer to data to store data from master.
rxSize – Size of rxData in bytes.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

static inline uint32_t I2C_SlaveGetReceivedAddress(I2C_Type *base, volatile i2c_slave_transfer_t *transfer)

Returns the slave address sent by the I2C master.

This function should only be called from the address match event callback kI2C_SlaveAddressMatchEvent.

Parameters:

base – The I2C peripheral base address.
transfer – The I2C slave transfer.

Returns:

The 8-bit address matched by the I2C slave. Bit 0 contains the R/w direction bit, and the 7-bit slave address is in the upper 7 bits.

void I2C_SlaveTransferAbort(I2C_Type *base, i2c_slave_handle_t *handle)

Aborts the slave non-blocking transfers.

Note

This API could be called at any time to stop slave for handling the bus events.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

Return values:

kStatus_Success –
kStatus_I2C_Idle –

status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count)

Gets the slave transfer remaining bytes during a interrupt non-blocking transfer.

Parameters:

base – I2C base pointer.
handle – pointer to i2c_slave_handle_t structure.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void I2C_SlaveTransferHandleIRQ(I2C_Type *base, i2c_slave_handle_t *handle)

Reusable routine to handle slave interrupts.

Note

This function does not need to be called unless you are reimplementing the non blocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

enum _i2c_slave_address_register

I2C slave address register.

Values:

enumerator kI2C_SlaveAddressRegister0: Slave Address 0 register.

enumerator kI2C_SlaveAddressRegister1: Slave Address 1 register.

enumerator kI2C_SlaveAddressRegister2: Slave Address 2 register.

enumerator kI2C_SlaveAddressRegister3: Slave Address 3 register.

enum _i2c_slave_address_qual_mode

I2C slave address match options.

Values:

enumerator kI2C_QualModeMask: The SLVQUAL0 field (qualAddress) is used as a logical mask for matching address0.

enumerator kI2C_QualModeExtend: The SLVQUAL0 (qualAddress) field is used to extend address 0 matching in a range of addresses.

enum _i2c_slave_bus_speed

I2C slave bus speed options.

Values:

enumerator kI2C_SlaveStandardMode

enumerator kI2C_SlaveFastMode

enumerator kI2C_SlaveFastModePlus

enumerator kI2C_SlaveHsMode

enum _i2c_slave_transfer_event

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

Values:

enumerator kI2C_SlaveAddressMatchEvent: Received the slave address after a start or repeated start.

enumerator kI2C_SlaveTransmitEvent: Callback is requested to provide data to transmit (slave-transmitter role).

enumerator kI2C_SlaveReceiveEvent: Callback is requested to provide a buffer in which to place received data (slave-receiver role).

enumerator kI2C_SlaveCompletionEvent: All data in the active transfer have been consumed.

enumerator kI2C_SlaveDeselectedEvent: The slave function has become deselected (SLVSEL flag changing from 1 to 0.

enumerator kI2C_SlaveAllEvents: Bit mask of all available events.

enum _i2c_slave_fsm

I2C slave software finite state machine states.

Values:

enumerator kI2C_SlaveFsmAddressMatch

enumerator kI2C_SlaveFsmReceive

enumerator kI2C_SlaveFsmTransmit

typedef enum _i2c_slave_address_register i2c_slave_address_register_t: I2C slave address register.

typedef struct _i2c_slave_address i2c_slave_address_t: Data structure with 7-bit Slave address and Slave address disable.

typedef enum _i2c_slave_address_qual_mode i2c_slave_address_qual_mode_t: I2C slave address match options.

typedef enum _i2c_slave_bus_speed i2c_slave_bus_speed_t: I2C slave bus speed options.

typedef struct _i2c_slave_config i2c_slave_config_t

Structure with settings to initialize the I2C slave module.

This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef enum _i2c_slave_transfer_event i2c_slave_transfer_event_t

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

typedef struct _i2c_slave_handle i2c_slave_handle_t: I2C slave handle typedef.

typedef struct _i2c_slave_transfer i2c_slave_transfer_t: I2C slave transfer structure.

typedef void (*i2c_slave_transfer_callback_t)(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *userData)

Slave event callback function pointer type.

This callback is used only for the slave non-blocking transfer API. To install a callback, use the I2C_SlaveSetCallback() function after you have created a handle.

Param base:: Base address for the I2C instance on which the event occurred.
Param transfer:: Pointer to transfer descriptor containing values passed to and/or from the callback.
Param userData:: Arbitrary pointer-sized value passed from the application.

typedef enum _i2c_slave_fsm i2c_slave_fsm_t: I2C slave software finite state machine states.

typedef void (*flexcomm_i2c_master_irq_handler_t)(I2C_Type *base, i2c_master_handle_t *handle): Typedef for master interrupt handler.

typedef void (*flexcomm_i2c_slave_irq_handler_t)(I2C_Type *base, i2c_slave_handle_t *handle): Typedef for slave interrupt handler.

struct _i2c_slave_address

#include <fsl_i2c.h>

Data structure with 7-bit Slave address and Slave address disable.

Public Members

uint8_t address: 7-bit Slave address SLVADR.

bool addressDisable: Slave address disable SADISABLE.

struct _i2c_slave_config

#include <fsl_i2c.h>

Structure with settings to initialize the I2C slave module.

This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Public Members

i2c_slave_address_t address0: Slave’s 7-bit address and disable.

i2c_slave_address_t address1: Alternate slave 7-bit address and disable.

i2c_slave_address_t address2: Alternate slave 7-bit address and disable.

i2c_slave_address_t address3: Alternate slave 7-bit address and disable.

i2c_slave_address_qual_mode_t qualMode: Qualify mode for slave address 0.

uint8_t qualAddress: Slave address qualifier for address 0.

i2c_slave_bus_speed_t busSpeed: Slave bus speed mode. If the slave function stretches SCL to allow for software response, it must provide sufficient data setup time to the master before releasing the stretched clock. This is accomplished by inserting one clock time of CLKDIV at that point. The busSpeed value is used to configure CLKDIV such that one clock time is greater than the tSU;DAT value noted in the I2C bus specification for the I2C mode that is being used. If the busSpeed mode is unknown at compile time, use the longest data setup time kI2C_SlaveStandardMode (250 ns)

bool enableSlave: Enable slave mode.

struct _i2c_slave_transfer

#include <fsl_i2c.h>

I2C slave transfer structure.

Public Members

i2c_slave_handle_t *handle: Pointer to handle that contains this transfer.

i2c_slave_transfer_event_t event: Reason the callback is being invoked.

uint8_t receivedAddress: Matching address send by master. 7-bits plus R/nW bit0

uint32_t eventMask: Mask of enabled events.

uint8_t *rxData: Transfer buffer for receive data

const uint8_t *txData: Transfer buffer for transmit data

size_t txSize: Transfer size

size_t rxSize: Transfer size

size_t transferredCount: Number of bytes transferred during this transfer.

status_t completionStatus: Success or error code describing how the transfer completed. Only applies for kI2C_SlaveCompletionEvent.

struct _i2c_slave_handle

#include <fsl_i2c.h>

I2C slave handle structure.

Note

The contents of this structure are private and subject to change.

Public Members

volatile i2c_slave_transfer_t transfer: I2C slave transfer.

volatile bool isBusy: Whether transfer is busy.

volatile i2c_slave_fsm_t slaveFsm: slave transfer state machine.

i2c_slave_transfer_callback_t callback: Callback function called at transfer event.

void *userData: Callback parameter passed to callback.

I2S: I2S Driver

I2S_BRIDGE: I2S bridging and signal sharing configuration

enum _i2s_bridge_share_set_index

I2S Bridge share set.

Values:

enumerator kI2S_BRIDGE_OriginalSignal: Original FLEXCOMM I2S signals

enumerator kI2S_BRIDGE_ShareSet0: share set 0 signals

enumerator kI2S_BRIDGE_ShareSet1: share set 1 signals

enum _i2s_bridge_signal

I2S signal.

Values:

enumerator kI2S_BRIDGE_SignalSCK: SCK signal

enumerator kI2S_BRIDGE_SignalWS: WS signal

enumerator kI2S_BRIDGE_SignalDataIn: Data in signal

enumerator kI2S_BRIDGE_SignalDataOut: Data out signal

enum _i2s_bridge_share_src

I2S signal source.

Values:

enumerator kI2S_BRIDGE_Flexcomm0: Shared signal comes from FLEXCOMM0

enumerator kI2S_BRIDGE_Flexcomm1: Shared signal comes from FLEXCOMM1

enumerator kI2S_BRIDGE_Flexcomm2: Shared signal comes from FLEXCOMM2

enumerator kI2S_BRIDGE_Flexcomm3: Shared signal comes from FLEXCOMM3

enumerator kI2S_BRIDGE_Flexcomm4: Shared signal comes from FLEXCOMM4

enumerator kI2S_BRIDGE_Flexcomm5: Shared signal comes from FLEXCOMM5

enumerator kI2S_BRIDGE_Flexcomm6: Shared signal comes from FLEXCOMM6

enumerator kI2S_BRIDGE_Flexcomm7: Shared signal comes from FLEXCOMM7

enum _i2s_bridge_dataout_mask

I2S Bridge shared data out mask.

Values:

enumerator kI2S_BRIDGE_Flexcomm0DataOut: FLEXCOMM0 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm1DataOut: FLEXCOMM1 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm2DataOut: FLEXCOMM2 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm3DataOut: FLEXCOMM3 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm4DataOut: FLEXCOMM4 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm5DataOut: FLEXCOMM5 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm6DataOut: FLEXCOMM6 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm7DataOut: FLEXCOMM7 DATAOUT Output Enable

typedef enum _i2s_bridge_signal i2s_bridge_signal_t: I2S signal.

FSL_I2S_BRIDGE_DRIVER_VERSION

Group I2S Bridge driver version for SDK.

Version 2.0.0.

void I2S_BRIDGE_SetFlexcommShareSet(uint32_t flexCommIndex, uint32_t sckSet, uint32_t wsSet, uint32_t dataInSet, uint32_t dataOutSet)

I2S Bridge share set selection for flexcomm instance.

Parameters:

flexCommIndex – index of flexcomm, refer to RM for supported FLEXCOMM instances.
sckSet – share set for sck, refer to _i2s_bridge_share_set_index
wsSet – share set for ws, refer to _i2s_bridge_share_set_index
dataInSet – share set for data in, refer to _i2s_bridge_share_set_index
dataOutSet – share set for data out, refer to _i2s_bridge_share_set_index

void I2S_BRIDGE_SetFlexcommSignalShareSet(uint32_t flexCommIndex, i2s_bridge_signal_t signal, uint32_t set)

I2S Bridge share set selection for a separate signal.

Parameters:

flexCommIndex – index of flexcomm, refer to RM for supported FLEXCOMM instances.
signal – The signal need to be configured.
set – share set for the signal, refer to _i2s_bridge_share_set_index

void I2S_BRIDGE_SetShareSetSrc(uint32_t setIndex, uint32_t sckShareSrc, uint32_t wsShareSrc, uint32_t dataInShareSrc, uint32_t dataOutShareSrc)

I2S Bridge share set source configure.

Parameters:

setIndex – index of share set, refer _i2s_bridge_share_set_index
sckShareSrc – sck source for this share set, refer to _i2s_bridge_share_src
wsShareSrc – ws source for this share set, refer to _i2s_bridge_share_src
dataInShareSrc – data in source for this share set, refer to _i2s_bridge_share_src
dataOutShareSrc – data out source for this share set, refer to _i2s_bridge_dataout_mask

void I2S_BRIDGE_SetShareSignalSrc(uint32_t setIndex, i2s_bridge_signal_t signal, uint32_t shareSrc)

I2S Bridge shared signal source selection for a share set.

Parameters:

setIndex – index of share set, refer to _i2s_bridge_share_set_index
signal – the shared signal to be configured
shareSrc – the signal selection, refer to _i2s_bridge_share_src.

I2S DMA Driver

void I2S_TxTransferCreateHandleDMA(I2S_Type *base, i2s_dma_handle_t *handle, dma_handle_t *dmaHandle, i2s_dma_transfer_callback_t callback, void *userData)

Initializes handle for transfer of audio data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
dmaHandle – pointer to dma handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.

status_t I2S_TxTransferSendDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t transfer)

Begins or queue sending of the given data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.

Return values:

kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with unsent buffers.

void I2S_TransferAbortDMA(I2S_Type *base, i2s_dma_handle_t *handle)

Aborts transfer of data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

void I2S_RxTransferCreateHandleDMA(I2S_Type *base, i2s_dma_handle_t *handle, dma_handle_t *dmaHandle, i2s_dma_transfer_callback_t callback, void *userData)

Initializes handle for reception of audio data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
dmaHandle – pointer to dma handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.

status_t I2S_RxTransferReceiveDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t transfer)

Begins or queue reception of data into given buffer.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.

Return values:

kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with buffers which are not full.

void I2S_DMACallback(dma_handle_t *handle, void *userData, bool transferDone, uint32_t tcds)

Invoked from DMA interrupt handler.

Parameters:

handle – pointer to DMA handle structure.
userData – argument for user callback.
transferDone – if transfer was done.
tcds –

void I2S_TransferInstallLoopDMADescriptorMemory(i2s_dma_handle_t *handle, void *dmaDescriptorAddr, size_t dmaDescriptorNum)

Install DMA descriptor memory for loop transfer only.

This function used to register DMA descriptor memory for the i2s loop dma transfer.

It must be callbed before I2S_TransferSendLoopDMA/I2S_TransferReceiveLoopDMA and after I2S_RxTransferCreateHandleDMA/I2S_TxTransferCreateHandleDMA.

User should be take care about the address of DMA descriptor pool which required align with 16BYTE at least.

Parameters:

handle – Pointer to i2s DMA transfer handle.
dmaDescriptorAddr – DMA descriptor start address.
dmaDescriptorNum – DMA descriptor number.

status_t I2S_TransferSendLoopDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t *xfer, uint32_t loopTransferCount)

Send link transfer data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

This function support loop transfer, such as A->B->…->A, the loop transfer chain will be converted into a chain of descriptor and submit to dma. Application must be aware of that the more counts of the loop transfer, then more DMA descriptor memory required, user can use function I2S_InstallDMADescriptorMemory to register the dma descriptor memory.

As the DMA support maximum 1024 transfer count, so application must be aware of that this transfer function support maximum 1024 samples in each transfer, otherwise assert error or error status will be returned. Once the loop transfer start, application can use function I2S_TransferAbortDMA to stop the loop transfer.

Parameters:

base – I2S peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – I2S DMA transfer structure. See i2s_transfer_t.
loopTransferCount – loop count

Return values:

kStatus_Success –

status_t I2S_TransferReceiveLoopDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t *xfer, uint32_t loopTransferCount)

Receive link transfer data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

This function support loop transfer, such as A->B->…->A, the loop transfer chain will be converted into a chain of descriptor and submit to dma. Application must be aware of that the more counts of the loop transfer, then more DMA descriptor memory required, user can use function I2S_InstallDMADescriptorMemory to register the dma descriptor memory.

As the DMA support maximum 1024 transfer count, so application must be aware of that this transfer function support maximum 1024 samples in each transfer, otherwise assert error or error status will be returned. Once the loop transfer start, application can use function I2S_TransferAbortDMA to stop the loop transfer.

Parameters:

base – I2S peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – I2S DMA transfer structure. See i2s_transfer_t.
loopTransferCount – loop count

Return values:

kStatus_Success –

FSL_I2S_DMA_DRIVER_VERSION: I2S DMA driver version 2.3.3.

typedef struct _i2s_dma_handle i2s_dma_handle_t: Members not to be accessed / modified outside of the driver.

typedef void (*i2s_dma_transfer_callback_t)(I2S_Type *base, i2s_dma_handle_t *handle, status_t completionStatus, void *userData)

Callback function invoked from DMA API on completion.

Param base:: I2S base pointer.
Param handle:: pointer to I2S transaction.
Param completionStatus:: status of the transaction.
Param userData:: optional pointer to user arguments data.

struct _i2s_dma_handle

#include <fsl_i2s_dma.h>

i2s dma handle

Public Members

uint32_t state: Internal state of I2S DMA transfer

uint8_t bytesPerFrame: bytes per frame

i2s_dma_transfer_callback_t completionCallback: Callback function pointer

void *userData: Application data passed to callback

dma_handle_t *dmaHandle: DMA handle

volatile i2s_transfer_t i2sQueue[(4U)]: Transfer queue storing transfer buffers

volatile uint8_t queueUser: Queue index where user’s next transfer will be stored

volatile uint8_t queueDriver: Queue index of buffer actually used by the driver

dma_descriptor_t *i2sLoopDMADescriptor: descriptor pool pointer

size_t i2sLoopDMADescriptorNum: number of descriptor in descriptors pool

I2S Driver

void I2S_TxInit(I2S_Type *base, const i2s_config_t *config)

Initializes the FLEXCOMM peripheral for I2S transmit functionality.

Ungates the FLEXCOMM clock and configures the module for I2S transmission using a configuration structure. The configuration structure can be custom filled or set with default values by I2S_TxGetDefaultConfig().

Note

This API should be called at the beginning of the application to use the I2S driver.

Parameters:

base – I2S base pointer.
config – pointer to I2S configuration structure.

void I2S_RxInit(I2S_Type *base, const i2s_config_t *config)

Initializes the FLEXCOMM peripheral for I2S receive functionality.

Ungates the FLEXCOMM clock and configures the module for I2S receive using a configuration structure. The configuration structure can be custom filled or set with default values by I2S_RxGetDefaultConfig().

Note

This API should be called at the beginning of the application to use the I2S driver.

Parameters:

base – I2S base pointer.
config – pointer to I2S configuration structure.

void I2S_TxGetDefaultConfig(i2s_config_t *config)

Sets the I2S Tx configuration structure to default values.

This API initializes the configuration structure for use in I2S_TxInit(). The initialized structure can remain unchanged in I2S_TxInit(), or it can be modified before calling I2S_TxInit(). Example:

i2s_config_t config;
I2S_TxGetDefaultConfig(&config);

Default values:

config->masterSlave = kI2S_MasterSlaveNormalMaster;
config->mode = kI2S_ModeI2sClassic;
config->rightLow = false;
config->leftJust = false;
config->pdmData = false;
config->sckPol = false;
config->wsPol = false;
config->divider = 1;
config->oneChannel = false;
config->dataLength = 16;
config->frameLength = 32;
config->position = 0;
config->watermark = 4;
config->txEmptyZero = true;
config->pack48 = false;

Parameters:

config – pointer to I2S configuration structure.

void I2S_RxGetDefaultConfig(i2s_config_t *config)

Sets the I2S Rx configuration structure to default values.

This API initializes the configuration structure for use in I2S_RxInit(). The initialized structure can remain unchanged in I2S_RxInit(), or it can be modified before calling I2S_RxInit(). Example:

i2s_config_t config;
I2S_RxGetDefaultConfig(&config);

Default values:

config->masterSlave = kI2S_MasterSlaveNormalSlave;
config->mode = kI2S_ModeI2sClassic;
config->rightLow = false;
config->leftJust = false;
config->pdmData = false;
config->sckPol = false;
config->wsPol = false;
config->divider = 1;
config->oneChannel = false;
config->dataLength = 16;
config->frameLength = 32;
config->position = 0;
config->watermark = 4;
config->txEmptyZero = false;
config->pack48 = false;

Parameters:

config – pointer to I2S configuration structure.

void I2S_Deinit(I2S_Type *base)

De-initializes the I2S peripheral.

This API gates the FLEXCOMM clock. The I2S module can’t operate unless I2S_TxInit or I2S_RxInit is called to enable the clock.

Parameters:

base – I2S base pointer.

void I2S_SetBitClockRate(I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers)

Transmitter/Receiver bit clock rate configurations.

Parameters:

base – SAI base pointer.
sourceClockHz – bit clock source frequency.
sampleRate – audio data sample rate.
bitWidth – audio data bitWidth.
channelNumbers – audio channel numbers.

void I2S_TxTransferCreateHandle(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_callback_t callback, void *userData)

Initializes handle for transfer of audio data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.

status_t I2S_TxTransferNonBlocking(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_t transfer)

Begins or queue sending of the given data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.

Return values:

kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with unsent buffers.

void I2S_TxTransferAbort(I2S_Type *base, i2s_handle_t *handle)

Aborts sending of data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

void I2S_RxTransferCreateHandle(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_callback_t callback, void *userData)

Initializes handle for reception of audio data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.

status_t I2S_RxTransferNonBlocking(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_t transfer)

Begins or queue reception of data into given buffer.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.

Return values:

kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with buffers which are not full.

void I2S_RxTransferAbort(I2S_Type *base, i2s_handle_t *handle)

Aborts receiving of data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

status_t I2S_TransferGetCount(I2S_Type *base, i2s_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
count – [out] number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress – there is no non-blocking transaction currently in progress.

status_t I2S_TransferGetErrorCount(I2S_Type *base, i2s_handle_t *handle, size_t *count)

Returns number of buffer underruns or overruns.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
count – [out] number of transmit errors encountered so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress – there is no non-blocking transaction currently in progress.

static inline void I2S_Enable(I2S_Type *base)

Enables I2S operation.

Parameters:

base – I2S base pointer.

void I2S_EnableSecondaryChannel(I2S_Type *base, uint32_t channel, bool oneChannel, uint32_t position)

Enables I2S secondary channel.

Parameters:

base – I2S base pointer.
channel – seondary channel channel number, reference _i2s_secondary_channel.
oneChannel – true is treated as single channel, functionality left channel for this pair.
position – define the location within the frame of the data, should not bigger than 0x1FFU.

static inline void I2S_DisableSecondaryChannel(I2S_Type *base, uint32_t channel)

Disables I2S secondary channel.

Parameters:

base – I2S base pointer.
channel – seondary channel channel number, reference _i2s_secondary_channel.

static inline void I2S_Disable(I2S_Type *base)

Disables I2S operation.

Parameters:

base – I2S base pointer.

static inline void I2S_EnableInterrupts(I2S_Type *base, uint32_t interruptMask)

Enables I2S FIFO interrupts.

Parameters:

base – I2S base pointer.
interruptMask – bit mask of interrupts to enable. See i2s_flags_t for the set of constants that should be OR’d together to form the bit mask.

static inline void I2S_DisableInterrupts(I2S_Type *base, uint32_t interruptMask)

Disables I2S FIFO interrupts.

Parameters:

base – I2S base pointer.
interruptMask – bit mask of interrupts to enable. See i2s_flags_t for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t I2S_GetEnabledInterrupts(I2S_Type *base)

Returns the set of currently enabled I2S FIFO interrupts.

Parameters:

base – I2S base pointer.

Returns:

A bitmask composed of i2s_flags_t enumerators OR’d together to indicate the set of enabled interrupts.

status_t I2S_EmptyTxFifo(I2S_Type *base)

Flush the valid data in TX fifo.

Parameters:

base – I2S base pointer.

Returns:

kStatus_Fail empty TX fifo failed, kStatus_Success empty tx fifo success.

void I2S_TxHandleIRQ(I2S_Type *base, i2s_handle_t *handle)

Invoked from interrupt handler when transmit FIFO level decreases.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

void I2S_RxHandleIRQ(I2S_Type *base, i2s_handle_t *handle)

Invoked from interrupt handler when receive FIFO level decreases.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

FSL_I2S_DRIVER_VERSION: I2S driver version 2.3.2.

_i2s_status I2S status codes.

Values:

enumerator kStatus_I2S_BufferComplete: Transfer from/into a single buffer has completed

enumerator kStatus_I2S_Done: All buffers transfers have completed

enumerator kStatus_I2S_Busy: Already performing a transfer and cannot queue another buffer

enum _i2s_flags

I2S flags.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2S_TxErrorFlag: TX error interrupt

enumerator kI2S_TxLevelFlag: TX level interrupt

enumerator kI2S_RxErrorFlag: RX error interrupt

enumerator kI2S_RxLevelFlag: RX level interrupt

enum _i2s_master_slave

Master / slave mode.

Values:

enumerator kI2S_MasterSlaveNormalSlave: Normal slave

enumerator kI2S_MasterSlaveWsSyncMaster: WS synchronized master

enumerator kI2S_MasterSlaveExtSckMaster: Master using existing SCK

enumerator kI2S_MasterSlaveNormalMaster: Normal master

enum _i2s_mode

I2S mode.

Values:

enumerator kI2S_ModeI2sClassic: I2S classic mode

enumerator kI2S_ModeDspWs50: DSP mode, WS having 50% duty cycle

enumerator kI2S_ModeDspWsShort: DSP mode, WS having one clock long pulse

enumerator kI2S_ModeDspWsLong: DSP mode, WS having one data slot long pulse

_i2s_secondary_channel I2S secondary channel.

Values:

enumerator kI2S_SecondaryChannel1: secondary channel 1

enumerator kI2S_SecondaryChannel2: secondary channel 2

enumerator kI2S_SecondaryChannel3: secondary channel 3

typedef enum _i2s_flags i2s_flags_t: I2S flags.

Note

These enums are meant to be OR’d together to form a bit mask.

typedef enum _i2s_master_slave i2s_master_slave_t: Master / slave mode.

typedef enum _i2s_mode i2s_mode_t: I2S mode.

typedef struct _i2s_config i2s_config_t: I2S configuration structure.

typedef struct _i2s_transfer i2s_transfer_t: Buffer to transfer from or receive audio data into.

typedef struct _i2s_handle i2s_handle_t: Transactional state of the intialized transfer or receive I2S operation.

typedef void (*i2s_transfer_callback_t)(I2S_Type *base, i2s_handle_t *handle, status_t completionStatus, void *userData)

Callback function invoked from transactional API on completion of a single buffer transfer.

Param base:: I2S base pointer.
Param handle:: pointer to I2S transaction.
Param completionStatus:: status of the transaction.
Param userData:: optional pointer to user arguments data.

I2S_NUM_BUFFERS: Number of buffers .

struct _i2s_config

#include <fsl_i2s.h>

I2S configuration structure.

Public Members

i2s_master_slave_t masterSlave: Master / slave configuration

i2s_mode_t mode: I2S mode

bool rightLow: Right channel data in low portion of FIFO

bool leftJust: Left justify data in FIFO

bool pdmData: Data source is the D-Mic subsystem

bool sckPol: SCK polarity

bool wsPol: WS polarity

uint16_t divider: Flexcomm function clock divider (1 - 4096)

bool oneChannel: true mono, false stereo

uint8_t dataLength: Data length (4 - 32)

uint16_t frameLength: Frame width (4 - 512)

uint16_t position: Data position in the frame

uint8_t watermark: FIFO trigger level

bool txEmptyZero: Transmit zero when buffer becomes empty or last item

bool pack48: Packing format for 48-bit data (false - 24 bit values, true - alternating 32-bit and 16-bit values)

struct _i2s_transfer

#include <fsl_i2s.h>

Buffer to transfer from or receive audio data into.

Public Members

uint8_t *data: Pointer to data buffer.

size_t dataSize: Buffer size in bytes.

struct _i2s_handle

#include <fsl_i2s.h>

Members not to be accessed / modified outside of the driver.

Public Members

volatile uint32_t state: State of transfer

i2s_transfer_callback_t completionCallback: Callback function pointer

void *userData: Application data passed to callback

bool oneChannel: true mono, false stereo

uint8_t dataLength: Data length (4 - 32)

bool pack48: Packing format for 48-bit data (false - 24 bit values, true - alternating 32-bit and 16-bit values)

uint8_t watermark: FIFO trigger level

bool useFifo48H: When dataLength 17-24: true use FIFOWR48H, false use FIFOWR

volatile i2s_transfer_t i2sQueue[(4U)]: Transfer queue storing transfer buffers

volatile uint8_t queueUser: Queue index where user’s next transfer will be stored

volatile uint8_t queueDriver: Queue index of buffer actually used by the driver

volatile uint32_t errorCount: Number of buffer underruns/overruns

volatile uint32_t transferCount: Number of bytes transferred

I3C: I3C Driver

FSL_I3C_DRIVER_VERSION: I3C driver version.

I3C status return codes.

Values:

enumerator kStatus_I3C_Busy: The master is already performing a transfer.

enumerator kStatus_I3C_Idle: The slave driver is idle.

enumerator kStatus_I3C_Nak: The slave device sent a NAK in response to an address.

enumerator kStatus_I3C_WriteAbort: The slave device sent a NAK in response to a write.

enumerator kStatus_I3C_Term: The master terminates slave read.

enumerator kStatus_I3C_HdrParityError: Parity error from DDR read.

enumerator kStatus_I3C_CrcError: CRC error from DDR read.

enumerator kStatus_I3C_ReadFifoError: Read from M/SRDATAB register when FIFO empty.

enumerator kStatus_I3C_WriteFifoError: Write to M/SWDATAB register when FIFO full.

enumerator kStatus_I3C_MsgError: Message SDR/DDR mismatch or read/write message in wrong state

enumerator kStatus_I3C_InvalidReq: Invalid use of request.

enumerator kStatus_I3C_Timeout: The module has stalled too long in a frame.

enumerator kStatus_I3C_SlaveCountExceed: The I3C slave count has exceed the definition in I3C_MAX_DEVCNT.

enumerator kStatus_I3C_IBIWon: The I3C slave event IBI or MR or HJ won the arbitration on a header address.

enumerator kStatus_I3C_OverrunError: Slave internal from-bus buffer/FIFO overrun.

enumerator kStatus_I3C_UnderrunError: Slave internal to-bus buffer/FIFO underrun

enumerator kStatus_I3C_UnderrunNak: Slave internal from-bus buffer/FIFO underrun and NACK error

enumerator kStatus_I3C_InvalidStart: Slave invalid start flag

enumerator kStatus_I3C_SdrParityError: SDR parity error

enumerator kStatus_I3C_S0S1Error: S0 or S1 error

enum _i3c_hdr_mode

I3C HDR modes.

Values:

enumerator kI3C_HDRModeNone

enumerator kI3C_HDRModeDDR

enumerator kI3C_HDRModeTSP

enumerator kI3C_HDRModeTSL

typedef enum _i3c_hdr_mode i3c_hdr_mode_t: I3C HDR modes.

typedef struct _i3c_device_info i3c_device_info_t: I3C device information.

I3C_RETRY_TIMES: Timeout times for waiting flag.

I3C_MAX_DEVCNT

I3C_IBI_BUFF_SIZE

struct _i3c_device_info

#include <fsl_i3c.h>

I3C device information.

Public Members

uint8_t dynamicAddr: Device dynamic address.

uint8_t staticAddr: Static address.

uint8_t dcr: Device characteristics register information.

uint8_t bcr: Bus characteristics register information.

uint16_t vendorID: Device vendor ID(manufacture ID).

uint32_t partNumber: Device part number info

uint16_t maxReadLength: Maximum read length.

uint16_t maxWriteLength: Maximum write length.

uint8_t hdrMode: Support hdr mode, could be OR logic in i3c_hdr_mode.

I3C Common Driver

typedef struct _i3c_config i3c_config_t

Structure with settings to initialize the I3C module, could both initialize master and slave functionality.

This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_GetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

uint32_t I3C_GetInstance(I3C_Type *base)

Get which instance current I3C is used.

Parameters:

base – The I3C peripheral base address.

void I3C_GetDefaultConfig(i3c_config_t *config)

Provides a default configuration for the I3C peripheral, the configuration covers both master functionality and slave functionality.

This function provides the following default configuration for I3C:

config->disableTimeout config->hKeep config->enableOpenDrainStop config->enableOpenDrainHigh config->baudRate_Hzconfig->baudRate_Hzconfig->baudRate_Hzconfig->masterDynamicAddress config->slowClock_Hz config->enableSlave config->vendorID config->enableRandomPart config->partNumber config->dcr config->bcr config->hdrMode config->nakAllRequest config->ignoreS0S1Error config->offline config->matchSlaveStartStop 

notranslate">

config->enableMaster                 = kI3C_MasterCapable; = false; = kI3C_MasterHighKeeperNone; = true; = true; class="o">.i2cBaud          = 400000U; class="o">.i3cPushPullBaud  = 12500000U; class="o">.i3cOpenDrainBaud = 2500000U; = 0x0AU; = 1000000U; = true; = 0x11BU; = false; = 0; = 0; = 0; = (uint8_t)kI3C_HDRModeDDR; = false; = false; = false; = false;
After calling this function, you can override any settings in order to customize the configuration, prior to initializing the common I3C driver with I3C_Init().

Parameters:

config – [out] User provided configuration structure for default values. Refer to i3c_config_t. 







void I3C_Init(I3C_Type *base, const i3c_config_t *config, uint32_t sourceClock_Hz)

Initializes the I3C peripheral. This function enables the peripheral clock and initializes the I3C peripheral as described by the user provided configuration. This will initialize both the master peripheral and slave peripheral so that I3C module could work as pure master, pure slave or secondary master, etc. A software reset is performed prior to configuration. 

Parameters:

base – The I3C peripheral base address. 
config – User provided peripheral configuration. Use I3C_GetDefaultConfig() to get a set of defaults that you can override. 
sourceClock_Hz – Frequency in Hertz of the I3C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods. 







struct _i3c_config


#include <fsl_i3c.h>
Structure with settings to initialize the I3C module, could both initialize master and slave functionality. 
This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_GetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash. 

Public Members


i3c_master_enable_t enableMaster

Enable master mode. 




bool disableTimeout

Whether to disable timeout to prevent the ERRWARN. 




i3c_master_hkeep_t hKeep

High keeper mode setting. 




bool enableOpenDrainStop

Whether to emit open-drain speed STOP. 




bool enableOpenDrainHigh

Enable Open-Drain High to be 1 PPBAUD count for i3c messages, or 1 ODBAUD. 




i3c_baudrate_hz_t baudRate_Hz

Desired baud rate settings. 




uint8_t masterDynamicAddress

Main master dynamic address configuration. 




uint32_t maxWriteLength

Maximum write length. 




uint32_t maxReadLength

Maximum read length. 




bool enableSlave

Whether to enable slave. 




uint8_t staticAddr

Static address. 




uint16_t vendorID

Device vendor ID(manufacture ID). 




uint32_t partNumber

Device part number info 




uint8_t dcr

Device characteristics register information. 




uint8_t bcr

Bus characteristics register information. 




uint8_t hdrMode

Support hdr mode, could be OR logic in enumeration:i3c_hdr_mode_t. 




bool nakAllRequest

Whether to reply NAK to all requests except broadcast CCC. 




bool ignoreS0S1Error

Whether to ignore S0/S1 error in SDR mode. 




bool offline

Whether to wait 60 us of bus quiet or HDR request to ensure slave track SDR mode safely. 




bool matchSlaveStartStop

Whether to assert start/stop status only the time slave is addressed.

Act2	Act1	Comment	31-28	27-12
0	0	No op	Don’t care
0	1	Set data length	0000	Data Length
1	0	Transfer data	Data address
1	1	Link descriptor	Descriptor address

Address field	Length	Reserved	Attribute
63 32	31 16	15 06	05	04	03	02	01	00
32-bit address	16-bit length	0000000000	Act2	Act1	0	Int	End	Valid

Act2	Act1	Comment	Operation
0	0	No op	Don’t care
0	1	Reserved	Read this line and go to next one
1	0	Transfer data	Transfer data with address and length set in this descriptor line
1	1	Link descriptor	Link to another descriptor

MIMXRT595S

ACMP: Analog Comparator Driver

CACHE: CACHE Memory Controller

CASPER: The Cryptographic Accelerator and Signal Processing Engine with RAM sharing

casper_driver

casper_driver_pkha

Clock Driver

CRC: Cyclic Redundancy Check Driver

CTIMER: Standard counter/timers

DMA: Direct Memory Access Controller Driver

DMIC: Digital Microphone

DMIC DMA Driver

DMIC Driver

DSP Driver

FLEXCOMM: FLEXCOMM Driver

FLEXCOMM Driver

FlexIO: FlexIO Driver

FlexIO Driver

FlexIO I2C Master Driver

FlexIO I2S Driver

FlexIO SPI Driver

FlexIO UART Driver

FLEXSPI: Flexible Serial Peripheral Interface Driver

FLEXSPI DMA Driver

FMEAS: Frequency Measure Driver

Hashcrypt: The Cryptographic Accelerator

Hashcrypt Background HASH

Hashcrypt common functions

Hashcrypt AES

Hashcrypt HASH

I2C: Inter-Integrated Circuit Driver

I2C DMA Driver

I2C Driver

I2C Master Driver

I2C Slave Driver

I2S: I2S Driver

I2S_BRIDGE: I2S bridging and signal sharing configuration

I2S DMA Driver

I2S Driver

I3C: I3C Driver

I3C Common Driver

I3C Master DMA Driver

I3C Master Driver

I3C Slave DMA Driver

I3C Slave Driver

IAP Boot Driver

IAP: In Application Programming Driver

IAP FlexSPI Driver

IAP OTP Driver

INPUTMUX: Input Multiplexing Driver

IOPCTL: Input/Output Pad Controller

Common Driver

LCDIF: LCD interface

LPADC: 12-bit SAR Analog-to-Digital Converter Driver

GPIO: General Purpose I/O

MIPI DSI Driver

MIPI_DSI: MIPI DSI Host Controller

MIPI DSI SMARTDMA driver

MRT: Multi-Rate Timer

MU: Messaging Unit

OSTIMER: OS Event Timer Driver

OTFAD: On The Fly AES-128 Decryption Driver

PINT: Pin Interrupt and Pattern Match Driver

Power Driver

POWERQUAD: PowerQuad hardware accelerator

PUF: Physical Unclonable Function

Reset Driver

RTC: Real Time Clock

SCTimer: SCTimer/PWM (SCT)

SEMA42: Hardware Semaphores Driver

SMARTDMA: SMART DMA Driver

MCXN SMARTDMA Firmware

RT500 SMARTDMA Firmware

Soc_mipi_dsi

SPI: Serial Peripheral Interface Driver

SPI DMA Driver

SPI Driver

TRNG: True Random Number Generator

USART: Universal Synchronous/Asynchronous Receiver/Transmitter Driver

USART DMA Driver