MIMXRT798S

ACMP: Analog Comparator Driver

void ACMP_Init(CMP_Type *base, const acmp_config_t *config)

Initializes the ACMP.

The default configuration can be got by calling ACMP_GetDefaultConfig().

Parameters:

base – ACMP peripheral base address.
config – Pointer to ACMP configuration structure.

void ACMP_Deinit(CMP_Type *base)

Deinitializes the ACMP.

Parameters:

base – ACMP peripheral base address.

void ACMP_GetDefaultConfig(acmp_config_t *config)

Gets the default configuration for ACMP.

This function initializes the user configuration structure to default value. The default value are:

Example:

config->enableHighSpeed = false;
config->enableInvertOutput = false;
config->useUnfilteredOutput = false;
config->enablePinOut = false;
config->enableHysteresisBothDirections = false;
config->hysteresisMode = kACMP_hysteresisMode0;

Parameters:

config – Pointer to ACMP configuration structure.

void ACMP_Enable(CMP_Type *base, bool enable)

Enables or disables the ACMP.

Parameters:

base – ACMP peripheral base address.
enable – True to enable the ACMP.

void ACMP_EnableLinkToDAC(CMP_Type *base, bool enable)

Enables the link from CMP to DAC enable.

When this bit is set, the DAC enable/disable is controlled by the bit CMP_C0[EN] instead of CMP_C1[DACEN].

Parameters:

base – ACMP peripheral base address.
enable – Enable the feature or not.

void ACMP_SetChannelConfig(CMP_Type *base, const acmp_channel_config_t *config)

Sets the channel configuration.

Note that the plus/minus mux’s setting is only valid when the positive/negative port’s input isn’t from DAC but from channel mux.

Example:

acmp_channel_config_t configStruct = {0};
configStruct.positivePortInput = kACMP_PortInputFromDAC;
configStruct.negativePortInput = kACMP_PortInputFromMux;
configStruct.minusMuxInput = 1U;
ACMP_SetChannelConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to channel configuration structure.

void ACMP_EnableDMA(CMP_Type *base, bool enable)

Enables or disables DMA.

Parameters:

base – ACMP peripheral base address.
enable – True to enable DMA.

void ACMP_SetFilterConfig(CMP_Type *base, const acmp_filter_config_t *config)

Configures the filter.

The filter can be enabled when the filter count is bigger than 1, the filter period is greater than 0 and the sample clock is from divided bus clock or the filter is bigger than 1 and the sample clock is from external clock. Detailed usage can be got from the reference manual.

Example:

acmp_filter_config_t configStruct = {0};
configStruct.filterCount = 5U;
configStruct.filterPeriod = 200U;
configStruct.enableSample = false;
ACMP_SetFilterConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to filter configuration structure.

void ACMP_SetDACConfig(CMP_Type *base, const acmp_dac_config_t *config)

Configures the internal DAC.

Example:

acmp_dac_config_t configStruct = {0};
configStruct.referenceVoltageSource = kACMP_VrefSourceVin1;
configStruct.DACValue = 20U;
configStruct.enableOutput = false;
configStruct.workMode = kACMP_DACWorkLowSpeedMode;
ACMP_SetDACConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to DAC configuration structure. “NULL” is for disabling the feature.

void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask)

Enables interrupts.

Parameters:

base – ACMP peripheral base address.
mask – Interrupts mask. See “_acmp_interrupt_enable”.

void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask)

Disables interrupts.

Parameters:

base – ACMP peripheral base address.
mask – Interrupts mask. See “_acmp_interrupt_enable”.

uint32_t ACMP_GetStatusFlags(CMP_Type *base)

Gets status flags.

Parameters:

base – ACMP peripheral base address.

Returns:

Status flags asserted mask. See “_acmp_status_flags”.

void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask)

Clears status flags.

Parameters:

base – ACMP peripheral base address.
mask – Status flags mask. See “_acmp_status_flags”.

void ACMP_SetDiscreteModeConfig(CMP_Type *base, const acmp_discrete_mode_config_t *config)

Configure the discrete mode.

Configure the discrete mode when supporting 3V domain with 1.8V core.

Parameters:

base – ACMP peripheral base address.
config – Pointer to configuration structure. See “acmp_discrete_mode_config_t”.

void ACMP_GetDefaultDiscreteModeConfig(acmp_discrete_mode_config_t *config)

Get the default configuration for discrete mode setting.

Parameters:

config – Pointer to configuration structure to be restored with the setting values.

FSL_ACMP_DRIVER_VERSION: ACMP driver version 2.3.0.

enum _acmp_interrupt_enable

Interrupt enable/disable mask.

Values:

enumerator kACMP_OutputRisingInterruptEnable: Enable the interrupt when comparator outputs rising.

enumerator kACMP_OutputFallingInterruptEnable: Enable the interrupt when comparator outputs falling.

enum _acmp_status_flags

Status flag mask.

Values:

enumerator kACMP_OutputRisingEventFlag: Rising-edge on compare output has occurred.

enumerator kACMP_OutputFallingEventFlag: Falling-edge on compare output has occurred.

enumerator kACMP_OutputAssertEventFlag: Return the current value of the analog comparator output.

enum _acmp_offset_mode

Comparator hard block offset control.

If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port input in the positive direction (or negative port input crossing positive port input in the negative direction). Hysteresis still exists for positive port input crossing negative port input in the falling direction. If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.

Values:

enumerator kACMP_OffsetLevel0: The comparator hard block output has level 0 offset internally.

enumerator kACMP_OffsetLevel1: The comparator hard block output has level 1 offset internally.

enum _acmp_hysteresis_mode

Comparator hard block hysteresis control.

See chip data sheet to get the actual hysteresis value with each level.

Values:

enumerator kACMP_HysteresisLevel0: Offset is level 0 and Hysteresis is level 0.

enumerator kACMP_HysteresisLevel1: Offset is level 0 and Hysteresis is level 1.

enumerator kACMP_HysteresisLevel2: Offset is level 0 and Hysteresis is level 2.

enumerator kACMP_HysteresisLevel3: Offset is level 0 and Hysteresis is level 3.

enum _acmp_reference_voltage_source

CMP Voltage Reference source.

Values:

enumerator kACMP_VrefSourceVin1: Vin1 is selected as resistor ladder network supply reference Vin.

enumerator kACMP_VrefSourceVin2: Vin2 is selected as resistor ladder network supply reference Vin.

enum _acmp_port_input

Port input source.

Values:

enumerator kACMP_PortInputFromDAC: Port input from the 8-bit DAC output.

enumerator kACMP_PortInputFromMux: Port input from the analog 8-1 mux.

enum _acmp_dac_work_mode

Internal DAC’s work mode.

Values:

enumerator kACMP_DACWorkLowSpeedMode: DAC is selected to work in low speed and low power mode.

enumerator kACMP_DACWorkHighSpeedMode: DAC is selected to work in high speed high power mode.

typedef enum _acmp_offset_mode acmp_offset_mode_t

Comparator hard block offset control.

If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port input in the positive direction (or negative port input crossing positive port input in the negative direction). Hysteresis still exists for positive port input crossing negative port input in the falling direction. If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.

typedef enum _acmp_hysteresis_mode acmp_hysteresis_mode_t

Comparator hard block hysteresis control.

See chip data sheet to get the actual hysteresis value with each level.

typedef enum _acmp_reference_voltage_source acmp_reference_voltage_source_t: CMP Voltage Reference source.

typedef enum _acmp_port_input acmp_port_input_t: Port input source.

typedef enum _acmp_dac_work_mode acmp_dac_work_mode_t: Internal DAC’s work mode.

typedef struct _acmp_config acmp_config_t: Configuration for ACMP.

typedef struct _acmp_channel_config acmp_channel_config_t

Configuration for channel.

The comparator’s port can be input from channel mux or DAC. If port input is from channel mux, detailed channel number for the mux should be configured.

typedef struct _acmp_filter_config acmp_filter_config_t: Configuration for filter.

typedef struct _acmp_dac_config acmp_dac_config_t: Configuration for DAC.

typedef struct _acmp_discrete_mode_config acmp_discrete_mode_config_t: Configuration for discrete mode.

CMP_C0_CFx_MASK: The mask of status flags cleared by writing 1.

struct _acmp_config

#include <fsl_acmp.h>

Configuration for ACMP.

Public Members

acmp_offset_mode_t offsetMode: Offset mode.

acmp_hysteresis_mode_t hysteresisMode: Hysteresis mode.

bool enableHighSpeed: Enable High Speed (HS) comparison mode.

bool enableInvertOutput: Enable inverted comparator output.

bool useUnfilteredOutput: Set compare output(COUT) to equal COUTA(true) or COUT(false).

bool enablePinOut: The comparator output is available on the associated pin.

struct _acmp_channel_config

#include <fsl_acmp.h>

Configuration for channel.

The comparator’s port can be input from channel mux or DAC. If port input is from channel mux, detailed channel number for the mux should be configured.

Public Members

acmp_port_input_t positivePortInput: Input source of the comparator’s positive port.

uint32_t plusMuxInput: Plus mux input channel(0~7).

acmp_port_input_t negativePortInput: Input source of the comparator’s negative port.

uint32_t minusMuxInput: Minus mux input channel(0~7).

struct _acmp_filter_config

#include <fsl_acmp.h>

Configuration for filter.

Public Members

uint32_t filterCount: Filter Sample Count. Available range is 1-7, 0 would cause the filter disabled.

uint32_t filterPeriod: Filter Sample Period. The divider to bus clock. Available range is 0-255.

struct _acmp_dac_config

#include <fsl_acmp.h>

Configuration for DAC.

Public Members

acmp_reference_voltage_source_t referenceVoltageSource: Supply voltage reference source.

uint32_t DACValue: Value for DAC Output Voltage. Available range is 0-255.

bool enableOutput: Enable the DAC output.

struct _acmp_discrete_mode_config

#include <fsl_acmp.h>

Configuration for discrete mode.

Public Members

bool enablePositiveChannelDiscreteMode: Positive Channel Continuous Mode Enable. By default, the continuous mode is used.

bool enableNegativeChannelDiscreteMode: Negative Channel Continuous Mode Enable. By default, the continuous mode is used.

CACHE: CACHE Memory Controller

uint32_t CACHE64_GetInstance(CACHE64_POLSEL_Type *base)

Returns an instance number given peripheral base address.

Parameters:

base – The peripheral base address.

Returns:

CACHE64_POLSEL instance number starting from 0.

uint32_t CACHE64_GetInstanceByAddr(uint32_t address)

brief Returns an instance number given physical memory address.

param address The physical memory address.

Returns:: CACHE64_CTRL instance number starting from 0.

status_t CACHE64_Init(CACHE64_POLSEL_Type *base, const cache64_config_t *config)

Initializes an CACHE64 instance with the user configuration structure.

This function configures the CACHE64 module with user-defined settings. Call the CACHE64_GetDefaultConfig() function to configure the configuration structure and get the default configuration.

Parameters:

base – CACHE64_POLSEL peripheral base address.
config – Pointer to a user-defined configuration structure.

Return values:

kStatus_Success – CACHE64 initialize succeed

void CACHE64_GetDefaultConfig(cache64_config_t *config)

Gets the default configuration structure.

This function initializes the CACHE64 configuration structure to a default value. The default values are first region covers whole cacheable area, and policy set to write back.

Parameters:

config – Pointer to a configuration structure.

void CACHE64_EnableCache(CACHE64_CTRL_Type *base)

Enables the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_DisableCache(CACHE64_CTRL_Type *base)

Disables the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_InvalidateCache(CACHE64_CTRL_Type *base)

Invalidates the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_InvalidateCacheByRange(uint32_t address, uint32_t size_byte)

Invalidates cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be invalidated, should be larger than 0.

void CACHE64_CleanCache(CACHE64_CTRL_Type *base)

Cleans the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_CleanCacheByRange(uint32_t address, uint32_t size_byte)

Cleans cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be cleaned, should be larger than 0.

void CACHE64_CleanInvalidateCache(CACHE64_CTRL_Type *base)

Cleans and invalidates the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_CleanInvalidateCacheByRange(uint32_t address, uint32_t size_byte)

Cleans and invalidate cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be Cleaned and Invalidated, should be larger than 0.

void CACHE64_EnableWriteBuffer(CACHE64_CTRL_Type *base, bool enable)

Enables/disables the write buffer.

Parameters:

base – CACHE64_CTRL peripheral base address.
enable – The enable or disable flag. true - enable the write buffer. false - disable the write buffer.

static inline void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates instruction cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated, should be larger than 0.

static inline void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated, should be larger than 0.

static inline void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte)

Clean data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be cleaned, should be larger than 0.

static inline void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte)

Cleans and Invalidates data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be Cleaned and Invalidated, should be larger than 0.

FSL_CACHE_DRIVER_VERSION: cache driver version.

enum _cache64_policy

Level 2 cache controller way size.

Values:

enumerator kCACHE64_PolicyNonCacheable: Non-cacheable

enumerator kCACHE64_PolicyWriteThrough: Write through

enumerator kCACHE64_PolicyWriteBack: Write back

typedef enum _cache64_policy cache64_policy_t: Level 2 cache controller way size.

typedef struct _cache64_config cache64_config_t: CACHE64 configuration structure.

CACHE64_LINESIZE_BYTE: cache line size.

CACHE64_REGION_NUM: cache region number.

CACHE64_REGION_ALIGNMENT: cache region alignment.

struct _cache64_config

#include <fsl_cache.h>

CACHE64 configuration structure.

Public Members

uint32_t boundaryAddr[(3U) - 1]: < The cache controller can divide whole memory into 3 regions. Boundary address is the FlexSPI internal address (start from 0) instead of system address (start from FlexSPI AMBA base) to split adjacent regions and must be 1KB aligned. The boundary address itself locates in upper region. Cacheable policy for each region.

CDOG

status_t CDOG_Init(CDOG_Type *base, cdog_config_t *conf)

Initialize CDOG.

This function initializes CDOG block and setting.

Parameters:

base – CDOG peripheral base address
conf – CDOG configuration structure

Returns:

Status of the init operation

void CDOG_Deinit(CDOG_Type *base)

Deinitialize CDOG.

This function deinitializes CDOG secure counter.

Parameters:

base – CDOG peripheral base address

void CDOG_GetDefaultConfig(cdog_config_t *conf)

Sets the default configuration of CDOG.

This function initialize CDOG config structure to default values.

Parameters:

conf – CDOG configuration structure

void CDOG_Stop(CDOG_Type *base, uint32_t stop)

Stops secure counter and instruction timer.

This function stops instruction timer and secure counter. This also change state od CDOG to IDLE.

Parameters:

base – CDOG peripheral base address
stop – expected value which will be compared with value of secure counter

void CDOG_Start(CDOG_Type *base, uint32_t reload, uint32_t start)

Sets secure counter and instruction timer values.

This function sets value in RELOAD and START registers for instruction timer and secure counter

Parameters:

base – CDOG peripheral base address
reload – reload value
start – start value

void CDOG_Check(CDOG_Type *base, uint32_t check)

Checks secure counter.

This function compares stop value in handler with secure counter value by writting to RELOAD refister.

Parameters:

base – CDOG peripheral base address
check – expected (stop) value

void CDOG_Set(CDOG_Type *base, uint32_t stop, uint32_t reload, uint32_t start)

Sets secure counter and instruction timer values.

This function sets value in STOP, RELOAD and START registers for instruction timer and secure counter.

Parameters:

base – CDOG peripheral base address
stop – expected value which will be compared with value of secure counter
reload – reload value for instruction timer
start – start value for secure timer

void CDOG_Add(CDOG_Type *base, uint32_t add)

Add value to secure counter.

This function add specified value to secure counter.

Parameters:

base – CDOG peripheral base address.
add – Value to be added.

void CDOG_Add1(CDOG_Type *base)

Add 1 to secure counter.

This function add 1 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Add16(CDOG_Type *base)

Add 16 to secure counter.

This function add 16 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Add256(CDOG_Type *base)

Add 256 to secure counter.

This function add 256 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub(CDOG_Type *base, uint32_t sub)

brief Substract value to secure counter

This function substract specified value to secure counter.

param base CDOG peripheral base address. param sub Value to be substracted.

void CDOG_Sub1(CDOG_Type *base)

Substract 1 from secure counter.

This function substract specified 1 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub16(CDOG_Type *base)

Substract 16 from secure counter.

This function substract specified 16 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub256(CDOG_Type *base)

Substract 256 from secure counter.

This function substract specified 256 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_WritePersistent(CDOG_Type *base, uint32_t value)

Set the CDOG persistent word.

Parameters:

base – CDOG peripheral base address.
value – The value to be written.

uint32_t CDOG_ReadPersistent(CDOG_Type *base)

Get the CDOG persistent word.

Parameters:

base – CDOG peripheral base address.

Returns:

The persistent word.

FSL_CDOG_DRIVER_VERSION

Defines CDOG driver version 2.1.3.

Change log:

Version 2.1.3
- Re-design multiple instance IRQs and Clocks
- Add fix for RESTART command errata
Version 2.1.2
- Support multiple IRQs
- Fix default CONTROL values
Version 2.1.1
- Remove bit CONTROL[CONTROL_CTRL]
Version 2.1.0
- Rename CWT to CDOG
Version 2.0.2
- Fix MISRA-2012 issues
Version 2.0.1
- Fix doxygen issues
Version 2.0.0
- initial version

enum __cdog_debug_Action_ctrl_enum

Values:

enumerator kCDOG_DebugHaltCtrl_Run

enumerator kCDOG_DebugHaltCtrl_Pause

enum __cdog_irq_pause_ctrl_enum

Values:

enumerator kCDOG_IrqPauseCtrl_Run

enumerator kCDOG_IrqPauseCtrl_Pause

enum __cdog_fault_ctrl_enum

Values:

enumerator kCDOG_FaultCtrl_EnableReset

enumerator kCDOG_FaultCtrl_EnableInterrupt

enumerator kCDOG_FaultCtrl_NoAction

enum __code_lock_ctrl_enum

Values:

enumerator kCDOG_LockCtrl_Lock

enumerator kCDOG_LockCtrl_Unlock

typedef uint32_t secure_counter_t

SC_ADD(add)

SC_ADD1

SC_ADD16

SC_ADD256

SC_SUB(sub)

SC_SUB1

SC_SUB16

SC_SUB256

SC_CHECK(val)

struct cdog_config_t: #include <fsl_cdog.h>

Clock Driver

enum _clock_usb_src

USB clock source definition.

Values:

enumerator kCLOCK_Usb480M: Use 480M.

enumerator kCLOCK_UsbSrcUnused: Used when the function does not care the clock source.

enum _clock_usb_phy_src

Source of the USB HS PHY.

Values:

enumerator kCLOCK_Usbphy480M: Use 480M.

enum _clock_ip_name

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

Values:

enumerator kCLOCK_IpInvalid: Invalid Ip Name.

enumerator kCLOCK_Xcache1: Clock gate name: Code cache

enumerator kCLOCK_Xcache0: Clock gate name: System cache

enumerator kCLOCK_Ocotp0: Clock gate name: VDD2 OTP0

enumerator kCLOCK_Sleepcon0: Clock gate name: SLEEPCON_CMPT

enumerator kCLOCK_Syscon0: Clock gate name: SYSCON_CMPT

enumerator kCLOCK_Glikey0: Clock gate name: GLIKEY0

enumerator kCLOCK_Glikey3: Clock gate name: GLIKEY3

enumerator kCLOCK_TpiuTraceClkin: Clock gate name: TPIU_TRACECLKIN

enumerator kCLOCK_SWOTraceClkin: Clock gate name: SWO_TRACECLKIN

enumerator kCLOCK_Tsclk: Clock gate name: TRACE

enumerator kCLOCK_Dma0: Clock gate name: DMA0

enumerator kCLOCK_Dma1: Clock gate name: DMA1

enumerator kCLOCK_PkcRam: Clock gate name: PKC RAM

enumerator kCLOCK_Pkc: Clock gate name: PKC

enumerator kCLOCK_Romcp: Clock gate name: ROMCP

enumerator kCLOCK_Xspi0: Clock gate name: XSPI0

enumerator kCLOCK_Xspi1: Clock gate name: XSPI1

enumerator kCLOCK_Cache64ctrl0: Clock gate name: CACHE64_0

enumerator kCLOCK_Cache64ctrl1: Clock gate name: CACHE64_1

enumerator kCLOCK_Puf: Clock gate name: QK_SUBSYS

enumerator kCLOCK_Mmu0: Clock gate name: MMU0

enumerator kCLOCK_Mmu1: Clock gate name: MMU1

enumerator kCLOCK_Gpio0: Clock gate name: GPIO0

enumerator kCLOCK_Gpio1: Clock gate name: GPIO1

enumerator kCLOCK_Gpio2: Clock gate name: GPIO2

enumerator kCLOCK_Gpio3: Clock gate name: GPIO3

enumerator kCLOCK_Gpio4: Clock gate name: GPIO4

enumerator kCLOCK_Gpio5: Clock gate name: GPIO5

enumerator kCLOCK_Gpio6: Clock gate name: GPIO6

enumerator kCLOCK_Gpio7: Clock gate name: GPIO7

enumerator kCLOCK_Sct0: Clock gate name: SCT0

enumerator kCLOCK_Cdog0: Clock gate name: CDOG0

enumerator kCLOCK_Cdog1: Clock gate name: CDOG1

enumerator kCLOCK_Cdog2: Clock gate name: CDOG2

enumerator kCLOCK_LPFlexComm0: Clock gate name: LP_Flexcomm0

enumerator kCLOCK_LPFlexComm1: Clock gate name: LP_Flexcomm1

enumerator kCLOCK_LPUart0: Clock gate name: LPUART0

enumerator kCLOCK_LPUart1: Clock gate name: LPUART1

enumerator kCLOCK_LPI2c0: Clock gate name: LPI2C0

enumerator kCLOCK_LPI2c1: Clock gate name: LPI2C1

enumerator kCLOCK_LPSpi0: Clock gate name: LPSPI0

enumerator kCLOCK_LPSpi1: Clock gate name: LPSPI1

enumerator kCLOCK_LPFlexComm2: Clock gate name: LP_Flexcomm2

enumerator kCLOCK_LPFlexComm3: Clock gate name: LP_Flexcomm3

enumerator kCLOCK_LPFlexComm4: Clock gate name: LP_Flexcomm4

enumerator kCLOCK_LPFlexComm5: Clock gate name: LP_Flexcomm5

enumerator kCLOCK_LPFlexComm6: Clock gate name: LP_Flexcomm6

enumerator kCLOCK_LPFlexComm7: Clock gate name: LP_Flexcomm7

enumerator kCLOCK_LPFlexComm8: Clock gate name: LP_Flexcomm8

enumerator kCLOCK_LPFlexComm9: Clock gate name: LP_Flexcomm9

enumerator kCLOCK_LPFlexComm10: Clock gate name: LP_Flexcomm10

enumerator kCLOCK_LPFlexComm11: Clock gate name: LP_Flexcomm11

enumerator kCLOCK_LPFlexComm12: Clock gate name: LP_Flexcomm12

enumerator kCLOCK_LPFlexComm13: Clock gate name: LP_Flexcomm13

enumerator kCLOCK_LPUart2: Clock gate name: LPUART2

enumerator kCLOCK_LPUart3: Clock gate name: LPUART3

enumerator kCLOCK_LPUart4: Clock gate name: LPUART4

enumerator kCLOCK_LPUart5: Clock gate name: LPUART5

enumerator kCLOCK_LPUart6: Clock gate name: LPUART6

enumerator kCLOCK_LPUart7: Clock gate name: LPUART7

enumerator kCLOCK_LPUart8: Clock gate name: LPUART8

enumerator kCLOCK_LPUart9: Clock gate name: LPUART9

enumerator kCLOCK_LPUart10: Clock gate name: LPUART10

enumerator kCLOCK_LPUart11: Clock gate name: LPUART11

enumerator kCLOCK_LPUart12: Clock gate name: LPUART12

enumerator kCLOCK_LPUart13: Clock gate name: LPUART13

enumerator kCLOCK_LPI2c2: Clock gate name: LPI2C2

enumerator kCLOCK_LPI2c3: Clock gate name: LPI2C3

enumerator kCLOCK_LPI2c4: Clock gate name: LPI2C4

enumerator kCLOCK_LPI2c5: Clock gate name: LPI2C5

enumerator kCLOCK_LPI2c6: Clock gate name: LPI2C6

enumerator kCLOCK_LPI2c7: Clock gate name: LPI2C7

enumerator kCLOCK_LPI2c8: Clock gate name: LPI2C8

enumerator kCLOCK_LPI2c9: Clock gate name: LPI2C9

enumerator kCLOCK_LPI2c10: Clock gate name: LPI2C10

enumerator kCLOCK_LPI2c11: Clock gate name: LPI2C11

enumerator kCLOCK_LPI2c12: Clock gate name: LPI2C12

enumerator kCLOCK_LPI2c13: Clock gate name: LPI2C13

enumerator kCLOCK_LPSpi2: Clock gate name: LPSPI2

enumerator kCLOCK_LPSpi3: Clock gate name: LPSPI3

enumerator kCLOCK_LPSpi4: Clock gate name: LPSPI4

enumerator kCLOCK_LPSpi5: Clock gate name: LPSPI5

enumerator kCLOCK_LPSpi6: Clock gate name: LPSPI6

enumerator kCLOCK_LPSpi7: Clock gate name: LPSPI7

enumerator kCLOCK_LPSpi8: Clock gate name: LPSPI8

enumerator kCLOCK_LPSpi9: Clock gate name: LPSPI9

enumerator kCLOCK_LPSpi10: Clock gate name: LPSPI10

enumerator kCLOCK_LPSpi11: Clock gate name: LPSPI11

enumerator kCLOCK_LPSpi12: Clock gate name: LPSPI12

enumerator kCLOCK_LPSpi13: Clock gate name: LPSPI13

enumerator kCLOCK_Sai0: Clock gate name: SAI0

enumerator kCLOCK_Sai1: Clock gate name: SAI1

enumerator kCLOCK_Sai2: Clock gate name: SAI2

enumerator kCLOCK_I3c0: Clock gate name: I3C0

enumerator kCLOCK_I3c1: Clock gate name: I3C1

enumerator kCLOCK_Crc0: Clock gate name: CRC0

enumerator kCLOCK_Wwdt0: Clock gate name: WWDT0

enumerator kCLOCK_Wwdt1: Clock gate name: WWDT1

enumerator kCLOCK_Ct32b0: Clock gate name: CTIMER0

enumerator kCLOCK_Ct32b1: Clock gate name: CTIMER1

enumerator kCLOCK_Ct32b2: Clock gate name: CTIMER2

enumerator kCLOCK_Ct32b3: Clock gate name: CTIMER3

enumerator kCLOCK_Ct32b4: Clock gate name: CTIMER4

enumerator kCLOCK_Mrt0: Clock gate name: Mrt0

enumerator kCLOCK_Utick0: Clock gate name: Utick0

enumerator kCLOCK_Sema424: Clock gate name: SEMA42_4

enumerator kCLOCK_Mu4: Clock gate name: MU4

enumerator kCLOCK_Pint0: Clock gate name: PINT0

enumerator kCLOCK_InputMux0: Clock gate name: PMUX_CMPT_SPLITTER

enumerator kCLOCK_Freqme0: Clock gate name: FREQME0

enumerator kCLOCK_SafoSgi: Clock gate name: SAFO_SGI

enumerator kCLOCK_Trace: Clock gate name: TRACE

enumerator kCLOCK_Prince0: Clock gate name: PRINCE0

enumerator kCLOCK_Prince1: Clock gate name: PRINCE1

enumerator kCLOCK_PrinceExe: Clock gate name: PRINCE_EXE

enumerator kCLOCK_Syspm0: Clock gate name: CMX_PERFMON0

enumerator kCLOCK_Syspm1: Clock gate name: CMX_PERFMON1

enumerator kCLOCK_Hifi4: Clock gate name: HIFI4

enumerator kCLOCK_Npu0: Clock gate name: NPU0

enumerator kCLOCK_CompAccessRamArbiter1: Clock gate name: COMP_ACCESS_RAM_ARBITER1

enumerator kCLOCK_Iopctl0: Clock gate name: IOMUXC_VDD2

enumerator kCLOCK_Hifi4AccessRamArbiter1: Clock gate name: HIFI4_ACCESS_RAM_ARBITER1

enumerator kCLOCK_MediaAccessRamArbiter0: Clock gate name: MEDIA_ACCESS_RAM_ARBITER0

enumerator kCLOCK_Sleepcon1: Clock gate name: SLEEPCONCPU1

enumerator kCLOCK_Syscon1: Clock gate name: SYSCONSENSE1

enumerator kCLOCK_SenseAccessRamArbiter0: Clock gate name: SENSE_ACCESS_RAM_ARBITER0

enumerator kCLOCK_Hifi1: Clock gate name: HIFI1

enumerator kCLOCK_Dma2: Clock gate name: DMA2

enumerator kCLOCK_Dma3: Clock gate name: DMA3

enumerator kCLOCK_LPFlexComm17: Clock gate name: LP_Flexcomm17

enumerator kCLOCK_LPFlexComm18: Clock gate name: LP_Flexcomm18

enumerator kCLOCK_LPFlexComm19: Clock gate name: LP_Flexcomm19

enumerator kCLOCK_LPFlexComm20: Clock gate name: LP_Flexcomm20

enumerator kCLOCK_LPI2c17: Clock gate name: LPI2C17

enumerator kCLOCK_LPI2c18: Clock gate name: LPI2C18

enumerator kCLOCK_LPI2c19: Clock gate name: LPI2C19

enumerator kCLOCK_LPI2c20: Clock gate name: LPI2C20

enumerator kCLOCK_LPSpi17: Clock gate name: LPSPI17

enumerator kCLOCK_LPSpi18: Clock gate name: LPSPI18

enumerator kCLOCK_LPSpi19: Clock gate name: LPSPI19

enumerator kCLOCK_LPSpi20: Clock gate name: LPSPI20

enumerator kCLOCK_LPUart17: Clock gate name: LPUART17

enumerator kCLOCK_LPUart18: Clock gate name: LPUART18

enumerator kCLOCK_LPUart19: Clock gate name: LPUART19

enumerator kCLOCK_LPUart20: Clock gate name: LPUART20

enumerator kCLOCK_Sai3: Clock gate name: SAI3

enumerator kCLOCK_I3c2: Clock gate name: I3C2

enumerator kCLOCK_I3c3: Clock gate name: I3C3

enumerator kCLOCK_Gpio8: Clock gate name: GPIO8

enumerator kCLOCK_Gpio9: Clock gate name: GPIO9

enumerator kCLOCK_Gpio10: Clock gate name: GPIO10

enumerator kCLOCK_Pint1: Clock gate name: PINT1

enumerator kCLOCK_InputMux1: Clock gate name: PMUX_SNS_SPLITTER

enumerator kCLOCK_Ct32b5: Clock gate name: CTIMER5

enumerator kCLOCK_Ct32b6: Clock gate name: CTIMER6

enumerator kCLOCK_Ct32b7: Clock gate name: CTIMER7

enumerator kCLOCK_Mrt1: Clock gate name: Mrt1

enumerator kCLOCK_Utick1: Clock gate name: Utick1

enumerator kCLOCK_Cdog3: Clock gate name: CDOG3

enumerator kCLOCK_Cdog4: Clock gate name: CDOG4

enumerator kCLOCK_Mu3: Clock gate name: MU3

enumerator kCLOCK_Sema423: Clock gate name: SEMA42_3

enumerator kCLOCK_Wwdt2: Clock gate name: WWDT2

enumerator kCLOCK_Wwdt3: Clock gate name: WWDT3

enumerator kCLOCK_Syscon2: Clock gate name: SYSCON_COMM

enumerator kCLOCK_Iopctl2: Clock gate name: IOMUXC_VDDN

enumerator kCLOCK_Cpu1: Clock gate name: CPU1

enumerator kCLOCK_Mu0: Clock gate name: MU0

enumerator kCLOCK_Mu1: Clock gate name: MU1

enumerator kCLOCK_Mu2: Clock gate name: MU2

enumerator kCLOCK_OsTimer: Clock gate name: OsTimer

enumerator kCLOCK_Sema420: Clock gate name: SEMA42_0

enumerator kCLOCK_Sdadc0: Clock gate name: SDADC0

enumerator kCLOCK_Adc0: Clock gate name: SARADC0

enumerator kCLOCK_Acmp0: Clock gate name: Acmp0

enumerator kCLOCK_Pdm: Clock gate name: MICFIL(PDM)

enumerator kCLOCK_Glikey4: Clock gate name: GLIKEY_SYSCON1

enumerator kCLOCK_Dbg: Clock gate name: DBG

enumerator kCLOCK_Syscon3: Clock gate name: SYSCON_SENSE0

enumerator kCLOCK_Iopctl1: Clock gate name: IOMUXC_VDD1

enumerator kCLOCK_Glikey1: Clock gate name: GLIKEY1

enumerator kCLOCK_LPI2c15: Clock gate name: LPI2C

enumerator kCLOCK_MediaAccessRamArbiter1: Clock gate name: MEDIA_ACCESS_RAM_ARBITER1

enumerator kCLOCK_Axi0: Clock gate name: AXI0

enumerator kCLOCK_Gpu: Clock gate name: VGPU

enumerator kCLOCK_MipiDsiCtrl: Clock gate name: MIPIDSI

enumerator kCLOCK_LPSpi16: Clock gate name: LPSPI16

enumerator kCLOCK_LPSpi14: Clock gate name: LPSPI14

enumerator kCLOCK_Xspi2: Clock gate name: XSPI2

enumerator kCLOCK_Mmu2: Clock gate name: MMU2

enumerator kCLOCK_Glikey5: Clock gate name: GLIKEY_SYSCON2

enumerator kCLOCK_Flexio: Clock gate name: FLEXIO0

enumerator kCLOCK_Lcdif: Clock gate name: LCDIF(DCN)

enumerator kCLOCK_Syscon4: Clock gate name: SYSCONMEDIA

enumerator kCLOCK_JpgDecoder: Clock gate name: JPG_DECODER

enumerator kCLOCK_PngDecoder: Clock gate name: PNG_DECODER

enumerator kCLOCK_Ezhv: Clock gate name: EZHV

enumerator kCLOCK_AxbsEzh: Clock gate name: AXBS_EZH

enumerator kCLOCK_Glikey2: Clock gate name: GLIKEY2

enumerator kCLOCK_Usb0: Clock gate name: USB0

enumerator kCLOCK_Usb1: Clock gate name: USB1

enumerator kCLOCK_Usdhc0: Clock gate name: USHDC0

enumerator kCLOCK_Usdhc1: Clock gate name: USDHC1

enumerator kCLOCK_Gdet3Ref: Clock gate name: GDET3 Reference clock

enumerator kCLOCK_Rtc: RTC functional clock gating.

enumerator kCLOCK_Gdet3: GDET3 functional clock gating.

enumerator kCLOCK_UsbphyRef: USBPHY referrence clock gating.

enum _clock_name

Clock name used to get clock frequency.

Values:

enumerator kCLOCK_CoreSysClk: Core clock (aka system clock)

enumerator kCLOCK_BusClk: Bus clock (AHB/APB clock, aka HCLK)

enumerator kCLOCK_MclkClk: MCLK, to MCLK pin

enumerator kCLOCK_Wdt2Clk: Watchdog1

enumerator kCLOCK_Wdt3Clk: Watchdog1

enumerator kCLOCK_Hifi1CpuClk: Hifi1 DSP clock

enumerator kCLOCK_LPFlexComm17Clk: Flexcomm17Clock

enumerator kCLOCK_LPFlexComm18Clk: Flexcomm18Clock

enumerator kCLOCK_LPFlexComm19Clk: Flexcomm19Clock

enumerator kCLOCK_LPFlexComm20Clk: Flexcomm20Clock

enumerator kCLOCK_Vdd1ClockOutClk: VDD1 CLOCKOUT

enumerator kCLOCK_AdcClk: ADC

enumerator kCLOCK_Xspi2Clk: XSPI1

enumerator kCLOCK_SctClk: SCT

enumerator kCLOCK_SystickClk: Systick

enumerator kCLOCK_Sdio0Clk: SDIO0

enumerator kCLOCK_Sdio1Clk: SDIO1

enumerator kCLOCK_I3cClk: I3C

enumerator kCLOCK_Usb0Clk: USB0

enumerator kCLOCK_Usb1Clk: USB1

enumerator kCLOCK_PdmClk: Digital Mic clock

enumerator kCLOCK_AcmpClk: Acmp clock

enumerator kCLOCK_FlexioClk: FlexIO

enumerator kCLOCK_LPSpi14Clk: LPSPI14

enumerator kCLOCK_LPI2c15Clk: LPI2C15

enumerator kCLOCK_LPSpi16Clk: LPSPI16

enumerator kCLOCK_VgpuClk: VGPU Core

enumerator kCLOCK_LcdifClk: LCDIF Clock

enumerator kCLOCK_MipiDphyClk: MIPI D-PHY Bit Clock

enumerator kCLOCK_MipiDphyEscRxClk: MIPI D-PHY RX Clock

enumerator kCLOCK_MipiDphyEscTxClk: MIPI D-PHY TX Clock

enum _clock_attach_id

The enumerator of clock attach Id for multi sources clock slices. Not all Muxer has MUX output enable control, if no mux output enable control, the mux output will be always enabled.

Values:

enumerator kFRO1_DIV3_to_SENSE_BASE: Attach FRO1 divided-by-3 clock to Sense Base Clock.

enumerator kFRO1_DIV1_to_SENSE_BASE: Attach FRO1 max clock to Sense Base Clock.

enumerator kFRO2_DIV3_to_SENSE_BASE: Attach FRO2 divided-by-3 clock to Sense Base Clock.

enumerator kLPOSC_to_SENSE_BASE: Attach LPOSC to Sense Base Clock.

enumerator kSENSE_BASE_to_SENSE_DSP: Attach Sense base clock to Sense DSP Clock.

enumerator kFRO2_DIV1_to_SENSE_DSP: Attach FRO2 max clock to Sense DSP Clock.

enumerator kAUDIO_PLL_PFD1_to_SENSE_DSP: Attach Audio PLL PFD1 clock to Sense DSP Clock.

enumerator kFRO1_DIV1_to_SENSE_DSP: Attach FRO1 max clock to Sense DSP Clock.

enumerator kNONE_to_SENSE_DSP: Attach NONE to Sense DSP Clock.

enumerator kSENSE_BASE_to_SAI3: Attach Sense base clock to SAI3 Clock.

enumerator kFRO2_DIV8_to_SAI3: Attach FRO2_DIV8 clock to SAI3 Clock.

enumerator kFRO2_DIV1_to_SAI3: Attach FRO2 clock to SAI3 Clock.

enumerator kAUDIO_VDD1_to_SAI3: Attach audio_clk to SAI3 Clock.

enumerator kNONE_to_SAI3: Attach NONE to SAI3 Clock.

enumerator kSENSE_BASE_to_UTICK: Attach Sense base clock to UTICK Functional Clock.

enumerator kLPOSC_to_UTICK: Attach LPOSC clock to UTICK Functional Clock.

enumerator kFRO2_DIV1_to_UTICK: Attach FRO2 max clock to UTICK Functional Clock.

enumerator kFRO1_DIV2_to_UTICK: Attach FRO1_DIV2 clock to UTICK Functional Clock.

enumerator kNONE_to_UTICK: Attach NONE to UTICK Functional Clock.

enumerator kLPOSC_to_WWDT2: Attach LPOSC clock to WWDT2 Functional Clock.

enumerator kNONE_to_WWDT2: Attach NONE to WWDT2 Functional Clock.

enumerator kLPOSC_to_WWDT3: Attach LPOSC clock to WWDT3 Functional Clock.

enumerator kNONE_to_WWDT3: Attach NONE to WWDT3 Functional Clock.

enumerator kSENSE_BASE_to_SYSTICK: Attach Sense base clock to SYSTICK Functional Clock.

enumerator kLPOSC_to_SYSTICK: Attach LPOSC clock to SYSTICK Functional Clock.

enumerator k32KHZ_WAKE_to_SYSTICK: Attach 32 kHz wake clock(switch to other clock source before sense vdd1 enter SRPG mode.) to SYSTICK Functional Clock.

enumerator kOSC_CLK_to_SYSTICK: Attach OSC clock to SYSTICK Functional Clock.

enumerator kNONE_to_SYSTICK: Attach NONE to SYSTICK Functional Clock.

enumerator kSENSE_BASE_to_CTIMER5: Attach Sense base clock to CTIMER5 Clock.

enumerator kAUDIO_VDD1_to_CTIMER5: Attach audio_clk to CTIMER5 Clock.

enumerator kFRO2_DIV1_to_CTIMER5: Attach FRO2 Max clock to CTIMER5 Clock.

enumerator k32KHZ_WAKE_to_CTIMER5: Attach 32KHz wake clock to CTIMER5 Clock.

enumerator kNONE_to_CTIMER5: Attach NONE to CTIMER5 Clock.

enumerator kSENSE_BASE_to_CTIMER6: Attach Sense base clock to CTIMER6 Clock.

enumerator kAUDIO_VDD1_to_CTIMER6: Attach audio_clk to CTIMER6 Clock.

enumerator kFRO2_DIV1_to_CTIMER6: Attach FRO2 Max clock to CTIMER6 Clock.

enumerator k32KHZ_WAKE_to_CTIMER6: Attach 32KHz wake clock to CTIMER6 Clock.

enumerator kNONE_to_CTIMER6: Attach NONE to CTIMER6 Clock.

enumerator kSENSE_BASE_to_CTIMER7: Attach Sense base clock to CTIMER7 Clock.

enumerator kAUDIO_VDD1_to_CTIMER7: Attach audio_clk to CTIMER7 Clock.

enumerator kFRO2_DIV1_to_CTIMER7: Attach FRO2 Max clock to CTIMER7 Clock.

enumerator k32KHZ_WAKE_to_CTIMER7: Attach 32KHz wake clock to CTIMER7 Clock.

enumerator kNONE_to_CTIMER7: Attach NONE to CTIMER7 Clock.

enumerator kSENSE_BASE_to_I3C23: Attach Sense base clock to I3C2 and I3C3 Functional Clock.

enumerator kFRO2_DIV1_to_I3C23: Attach FRO2 max clock to I3C2 and I3C3 Functional Clock.

enumerator kFRO1_DIV8_to_I3C23: Attach FRO2_DIV8 clock to I3C2 and I3C3 Functional Clock.

enumerator kOSC_CLK_to_I3C23: Attach OSC clock to I3C2 and I3C3 Functional Clock.

enumerator kNONE_to_I3C23: Attach NONE to I3C2 and I3C3 Functional Clock.

enumerator kMCLK_to_AUDIO_VDD1: Attach MCLK IN from Pad to Audio VDD1 Clock.

enumerator kOSC_to_AUDIO_VDD1: Attach OSC clock to Audio VDD1 Clock.

enumerator kFRO2_DIV8_to_AUDIO_VDD1: Attach FRO2_DIV8 clock to Audio VDD1 Clock.

enumerator kAUDIO_PLL_PFD3_to_AUDIO_VDD1: Attach AUDIO PLL PFD3 clock to Audio VDD1 Clock.

enumerator kSENSE_BASE_to_FLEXCOMM17: Attach Sense base clock to FLEXCOMM17.

enumerator kFRO2_DIV1_to_FLEXCOMM17: Attach FRO2 max clock to FLEXCOMM17.

enumerator kFRO1_DIV1_to_FLEXCOMM17: Attach FRO1 max clock to FLEXCOMM17.

enumerator k32KHZ_WAKE_to_FLEXCOMM17: Attach 32k_wake_clk to FLEXCOMM17.

enumerator kNONE_to_FLEXCOMM17: Attach NONE to FLEXCOMM17.

enumerator kSENSE_BASE_to_FLEXCOMM18: Attach Sense base clock to FLEXCOMM18.

enumerator kFRO2_DIV1_to_FLEXCOMM18: Attach FRO2 max clock to FLEXCOMM18.

enumerator kFRO1_DIV1_to_FLEXCOMM18: Attach FRO1 max clock to FLEXCOMM18.

enumerator k32KHZ_WAKE_to_FLEXCOMM18: Attach 32k_wake_clk to FLEXCOMM18.

enumerator kNONE_to_FLEXCOMM18: Attach NONE to FLEXCOMM18.

enumerator kSENSE_BASE_to_FLEXCOMM19: Attach Sense base clock to FLEXCOMM19.

enumerator kFRO2_DIV1_to_FLEXCOMM19: Attach FRO2 max clock to FLEXCOMM19.

enumerator kFRO1_DIV1_to_FLEXCOMM19: Attach FRO1 max clock to FLEXCOMM19.

enumerator k32KHZ_WAKE_to_FLEXCOMM19: Attach 32k_wake_clk to FLEXCOMM19.

enumerator kNONE_to_FLEXCOMM19: Attach NONE to FLEXCOMM19.

enumerator kSENSE_BASE_to_FLEXCOMM20: Attach Sense base clock to FLEXCOMM20.

enumerator kFRO2_DIV1_to_FLEXCOMM20: Attach FRO2 max clock to FLEXCOMM20.

enumerator kFRO1_DIV1_to_FLEXCOMM20: Attach FRO1 max clock to FLEXCOMM20.

enumerator k32KHZ_WAKE_to_FLEXCOMM20: Attach 32k_wake_clk to FLEXCOMM20.

enumerator kNONE_to_FLEXCOMM20: Attach NONE to FLEXCOMM20.

enumerator kCOMMON_BASE_to_COMMON_VDDN: Attach Common base clock to Common VDDN Clock.

enumerator kMAIN_PLL_PFD3_to_COMMON_VDDN: Attach Main PLL PFD3 clock to Common VDDN Clock.

enumerator kFRO1_DIV1_to_COMMON_VDDN: Attach FRO1 max clock to Common VDDN Clock.

enumerator kOSC_CLK_to_COMMON_VDDN: Attach OSC clock to Common VDDN Clock.

enumerator kOSC_CLK_to_USB_24MHZ: Attach OSC_CLK clock to 24MHz USB OSC Clock.

enumerator kFRO1_DIV8_to_USB_24MHZ: Attach FRO1_DIV8 clock to 24MHz USB OSC Clock.

enumerator kFRO1_DIV3_to_COMMON_BASE: Attach Fro1 divided-by-3 to Common Base Clock.

enumerator kFRO1_DIV1_to_COMMON_BASE: Attach Fro1 divided-by-1 to Common Base Clock.

enumerator kFRO0_DIV3_to_COMMON_BASE: Attach Fro0 divided-by-3 to Common Base Clock.

enumerator kLPOSC_to_COMMON_BASE: Attach LPOSC to Common Base Clock.

enumerator kOSC_CLK_to_EUSB_24MHZ: Attach OSC_CLK clock to 24MHz eUSB OSC Clock.

enumerator kFRO1_DIV8_to_EUSB_24MHZ: Attach FRO1_DIV8 clock to 24MHz eUSB OSC Clock.

enumerator kFRO1_DIV8_to_MAIN_PLL0: Attach FRO1_DIV8 clock to Main PLL0 Clock.

enumerator kOSC_CLK_to_MAIN_PLL0: Attach OSC_CLK clock to Main PLL0 Clock.

enumerator kFRO1_DIV8_to_AUDIO_PLL0: Attach FRO1_DIV8 to Audio PLL0 Clock.

enumerator kOSC_CLK_to_AUDIO_PLL0: Attach OSC_CLK clock (User-Selectable) to Audio PLL0 Clock.

enumerator kSENSE_BASE_to_SENSE_MAIN: Attach Sense base clock to Sense main clock.

enumerator kFRO2_DIV1_to_SENSE_MAIN: Attach FRO2 max clock to Sense main clock.

enumerator kAUDIO_PLL_PFD3_to_SENSE_MAIN: Attach Audio PLL PFD3 clock to Sense main clock.

enumerator kFRO1_DIV1_to_SENSE_MAIN: Attach FRO1 max clock to Sense main clock.

enumerator kSENSE_BASE_to_SENSE_RAM: Attach Sense base clock to Sense RAM clock.

enumerator kFRO2_DIV1_to_SENSE_RAM: Attach FRO2 max clock to Sense RAM clock.

enumerator kAUDIO_PLL_PFD2_to_SENSE_RAM: Attach Audio PLL PFD2 clock to Sense RAM clock.

enumerator kFRO1_DIV1_to_SENSE_RAM: Attach FRO1 max clock to Sense RAM clock.

enumerator kSENSE_BASE_to_OSTIMER: Attach Sense Base to OSTIMER.

enumerator k32KHZ_WAKE_to_OSTIMER: Attach 32k_wake_clk to OSTIMER.

enumerator kLPOSC_to_OSTIMER: Attach LPOSC to OSTIMER.

enumerator kOSC_CLK_to_OSTIMER: Attach OSC clock to OSTIMER.

enumerator kNONE_to_OSTIMER: Attach NONE to OSTIMER.

enumerator kSENSE_BASE_to_SDADC: Attach Sense base clock to SDADC Functional Clock.

enumerator kFRO2_DIV8_to_SDADC: Attach FRO2_DIV8 clock to SDADC Functional Clock.

enumerator kAUDIO_PLL_to_SDADC: Attach Audio PLL VCO clock to SDADC Functional Clock.

enumerator kAUDIO_VDD1_to_SDADC: Attach audio_clk to SDADC Functional Clock.

enumerator kNONE_to_SDADC: Attach NONE to SDADC Functional Clock.

enumerator kSENSE_BASE_to_ADC: Attach Sense base clock to SARADC Functional Clock.

enumerator kMAIN_PLL_PFD1_to_ADC: Attach main_pll_pfd1 to SARADC Functional Clock.

enumerator kFRO2_DIV1_to_ADC: Attach FRO0 max clock to SARADC Functional Clock.

enumerator kOSC_CLK_to_ADC: Attach osc_clk to SARADC Functional Clock.

enumerator kNONE_to_ADC: Attach NONE to SARADC Functional Clock.

enumerator kOSC32K_to_32K_WAKE: Attach OSC 32K to Wake 32k Clock.

enumerator kLPOSC_DIV32_to_32K_WAKE: Attach LPOSC clock divided by 32 by default to Wake 32k Clock.

enumerator kNONE_to_32K_WAKE: Attach NONE to Wake 32k Clock.

enumerator kSENSE_BASE_to_MICFIL0: Attach Sense base clock to MICFIL0 Functional Clock.

enumerator kAUDIO_PLL_PFD3_to_MICFIL0: Attach Audio PLL PFD3 clock to MICFIL0 Functional Clock.

enumerator kFRO2_DIV1_to_MICFIL0: Attach FRO2 MAX clock to MICFIL0 Functional Clock.

enumerator kAUDIO_VDD1_to_MICFIL0: Attach Audio clock to MICFIL0 Functional Clock.

enumerator kNONE_to_MICFIL0: Attach NONE to MICFIL0 Functional Clock.

enumerator kSENSE_BASE_to_LPI2C15: Attach Sense base clock to LPI2C15 Functional Clock.

enumerator kFRO1_DIV1_to_LPI2C15: Attach FRO1 max clock to LPI2C15 Functional Clock.

enumerator kFRO1_DIV2_to_LPI2C15: Attach FRO1 divided-by-2 to LPI2C15 Functional Clock.

enumerator kFRO2_DIV1_to_LPI2C15: Attach FRO2 max clock to LPI2C15 Functional Clock.

enumerator kNONE_to_LPI2C15: Attach NONE to LPI2C15 Functional Clock.

enumerator kSENSE_BASE_to_VDD1_CLKOUT: Attach Sense VDD1 Base Clock to VDD1 CLKOUT Clock.

enumerator kAUDIO_PLL_PFD3_to_VDD1_CLKOUT: Attach AUDIO PLL PFD3 Clock to VDD1 CLKOUT Clock.

enumerator kFRO2_DIV1_to_VDD1_CLKOUT: Attach FRO2 Max Clock to VDD1 CLKOUT Clock.

enumerator kFRO1_DIV1_to_VDD1_CLKOUT: Attach FRO1 Max Clock to VDD1 CLKOUT Clock.

enumerator kNONE_to_VDD1_CLKOUT: Attach NONE to VDD1 CLKOUT Clock.

enumerator kMEDIA_VDDN_BASE_to_MEDIA_VDDN: Attach MEDIA VDDN base clock to MEDIA VDDN clock.

enumerator kMAIN_PLL_PFD0_to_MEDIA_VDDN: Attach MAIN PLL PFD0 to MEDIA VDDN clock.

enumerator kFRO0_DIV1_to_MEDIA_VDDN: Attach FRO0 max to MEDIA VDDN clock.

enumerator kMAIN_PLL_PFD2_to_MEDIA_VDDN: Attach MAIN PLL PFD2 to MEDIA VDDN clock.

enumerator kMEDIA_VDD2_BASE_to_MEDIA_MAIN: Attach MEDIA VDD2 base clock to MEDIA MAIN clock.

enumerator kMAIN_PLL_PFD0_to_MEDIA_MAIN: Attach Main PLL PFD0 clock to MEDIA MAIN clock.

enumerator kFRO0_DIV1_to_MEDIA_MAIN: Attach FRO0 to MEDIA MAIN clock.

enumerator kMAIN_PLL_PFD2_to_MEDIA_MAIN: Attach Main PLL PFD2 clock to MEDIA MAIN clock.

enumerator kFRO1_DIV3_to_MEDIA_VDDN_BASE: Attach Fro1 divided-by-3 to Media VDDN Base Clock.

enumerator kFRO1_DIV1_to_MEDIA_VDDN_BASE: Attach Fro1 divided-by-1 to Media VDDN Base Clock.

enumerator kFRO0_DIV3_to_MEDIA_VDDN_BASE: Attach Fro0 divided-by-3 to Media VDDN Base Clock.

enumerator kLPOSC_to_MEDIA_VDDN_BASE: Attach LPOSC clock to Media VDDN Base Clock.

enumerator kFRO1_DIV3_to_MEDIA_VDD2_BASE: Attach Fro1 divided-by-3 to Media VDD2 Base Clock.

enumerator kFRO1_DIV1_to_MEDIA_VDD2_BASE: Attach Fro1 divided-by-1 to Media VDD2 Base Clock.

enumerator kFRO0_DIV3_to_MEDIA_VDD2_BASE: Attach Fro0 divided-by-3 to Media VDD2 Base Clock.

enumerator kLPOSC_to_MEDIA_VDD2_BASE: Attach LPOSC clock to Media VDD2 Base Clock.

enumerator kCOMMON_BASE_to_XSPI2: Attach Common VDDN base clock to XSPI2 Functional Clock.

enumerator kAUDIO_PLL_PFD1_to_XSPI2: Attach Audio PLL PFD1 clock to XSPI2 Functional Clock.

enumerator kFRO0_DIV1_to_XSPI2: Attach FRO0 max clock to XSPI2 Functional Clock.

enumerator kMAIN_PLL_PFD3_to_XSPI2: Attach Main PLL PFD3 clock to XSPI2 Functional Clock.

enumerator kNONE_to_XSPI2: Attach NONE to XSPI2 Functional Clock.

enumerator k32KHZ_WAKE_to_USB: Attach Wakeup 32K to USB Functional Clock.

enumerator kLPOSC_to_USB: Attach LPOSC_1M to USB Functional Clock.

enumerator kUSB_24MHZ_to_USB: Attach 24MHz USB OSC clock to USB Functional Clock.

enumerator kNONE_to_USB: Attach NONE to USB Functional Clock.

enumerator k32KHZ_WAKE_to_EUSB: Attach Wakeup 32K to eUSB Functional Clock.

enumerator kLPOSC_to_EUSB: Attach LPOSC_1M to eUSB Functional Clock.

enumerator kEUSB_24MHZ_to_EUSB: Attach 24MHz eUSB OSC clock to eUSB Functional Clock.

enumerator kNONE_to_EUSB: Attach NONE to eUSB Functional Clock.

enumerator kMEDIA_VDDN_BASE_to_SDIO0: Attach Media VDDN base clock to SDIO0 Functional Clock.

enumerator kAUDIO_PLL_PFD0_to_SDIO0: Attach Audio PLL PFD0 clock to SDIO0 Functional Clock.

enumerator kFRO0_DIV1_to_SDIO0: Attach FRO0 max clock to SDIO0 Functional Clock.

enumerator kMAIN_PLL_PFD2_to_SDIO0: Attach Main PLL PFD2 clock to SDIO0 Functional Clock.

enumerator kNONE_to_SDIO0: Attach NONE to SDIO0 Functional Clock.

enumerator kMEDIA_VDDN_BASE_to_SDIO1: Attach Media VDDN base clock to SDIO1 Functional Clock.

enumerator kAUDIO_PLL_PFD0_to_SDIO1: Attach Audio PLL PFD0 clock to SDIO1 Functional Clock.

enumerator kFRO0_DIV1_to_SDIO1: Attach FRO0 max clock to SDIO1 Functional Clock.

enumerator kMAIN_PLL_PFD1_to_SDIO1: Attach Main PLL PFD1 clock to SDIO1 Functional Clock.

enumerator kNONE_to_SDIO1: Attach NONE to SDIO1 Functional Clock.

enumerator kMEDIA_VDD2_BASE_to_MIPI_DSI_HOST_PHY: Attach Media VDD2 base clock to MIPI_DSI_Host PHY Clock.

enumerator kFRO0_DIV1_to_MIPI_DSI_HOST_PHY: Attach FRO0 max clock to MIPI_DSI_Host PHY Clock.

enumerator kAUDIO_PLL_PFD2_to_MIPI_DSI_HOST_PHY: Attach Audio PLL PFD2 clock to MIPI_DSI_Host PHY Clock.

enumerator kNONE_to_MIPI_DSI_HOST_PHY: Attach NONE to MIPI_DSI_Host PHY Clock.

enumerator kMEDIA_VDD2_BASE_to_MIPI_DPHYESC_CLK: Attach Media VDD2 base clock to MIPI_DSI_Host DPHY Escape Mode Clock.

enumerator kMAIN_PLL_PFD1_to_MIPI_DPHYESC_CLK: Attach Main PLL PFD1 clock to MIPI_DSI_Host DPHY Escape Mode Clock.

enumerator kFRO0_DIV1_to_MIPI_DPHYESC_CLK: Attach FRO0 max clock to MIPI_DSI_Host DPHY Escape Mode Clock.

enumerator kAUDIO_PLL_PFD2_to_MIPI_DPHYESC_CLK: Attach Audio PLL PFD2 clock to MIPI_DSI_Host DPHY Escape Mode Clock.

enumerator kNONE_to_MIPI_DPHYESC_CLK: Attach NONE to MIPI_DSI_Host DPHY Escape Mode Clock.

enumerator kMEDIA_VDD2_BASE_to_VGPU: Attach Media VDD2 base clock to VGPU Clock.

enumerator kMAIN_PLL_PFD0_to_VGPU: Attach Main PLL PFD0 clock to VGPU Clock.

enumerator kFRO0_DIV1_to_VGPU: Attach FRO0 max clock to VGPU Clock.

enumerator kMAIN_PLL_PFD2_to_VGPU: Attach Main PLL PFD2 clock to VGPU Clock.

enumerator kNONE_to_VGPU: Attach NONE to VGPU Clock.

enumerator kMEDIA_VDD2_BASE_to_LPSPI14: Attach Media VDD2 base clock to LPSPI14 Clock.

enumerator kFRO0_DIV1_to_LPSPI14: Attach FRO0 max clock to LPSPI14 Clock.

enumerator kMAIN_PLL_PFD0_to_LPSPI14: Attach Main PLL PFD0 clock to LPSPI14 Clock.

enumerator kFRO1_DIV1_to_LPSPI14: Attach FRO1 max clock to LPSPI14 Clock.

enumerator kNONE_to_LPSPI14: Attach NONE to LPSPI14 Clock.

enumerator kMEDIA_VDD2_BASE_to_LPSPI16: Attach Media VDD2 base clock to LPSPI16 Clock.

enumerator kFRO0_DIV1_to_LPSPI16: Attach FRO0 max clock to LPSPI16 Clock.

enumerator kMAIN_PLL_PFD0_to_LPSPI16: Attach Main PLL PFD0 clock to LPSPI16 Clock.

enumerator kFRO1_DIV1_to_LPSPI16: Attach FRO1 max clock to LPSPI16 Clock.

enumerator kNONE_to_LPSPI16: Attach NONE to LPSPI16 Clock.

enumerator kMEDIA_VDD2_BASE_to_FLEXIO: Attach MEDIA VDD2 base clock to FLEXIO.

enumerator kFRO0_DIV1_to_FLEXIO: Attach FRO0 max clock to FLEXIO.

enumerator kFRO1_DIV1_to_FLEXIO: Attach FRO1 max clock to FLEXIO.

enumerator kMAIN_PLL_PFD3_to_FLEXIO: Attach Main PLL PFD3 clock to FLEXIO.

enumerator kNONE_to_FLEXIO: Attach NONE to FLEXIO.

enumerator kMEDIA_VDD2_BASE_to_LCDIF: Attach MEDIA VDD2 base clock to LCDIF.

enumerator kMAIN_PLL_PFD2_to_LCDIF: Attach Main PLL PFD0 clock to LCDIF.

enumerator kFRO0_DIV1_to_LCDIF: Attach FRO0 max clock to LCDIF.

enumerator kAUDIO_PLL_PFD1_to_LCDIF: Attach Audio PLL PFD1 to LCDIF.

enumerator kNONE_to_LCDIF: Attach NONE to LCDIF.

enum _clock_div_name

Clock dividers.

Values:

enumerator kCLOCK_DivLPFlexComm17Clk: LP_FLEXCOMM17 Clk Divider.

enumerator kCLOCK_DivLPFlexComm18Clk: LP_FLEXCOMM18 Clk Divider.

enumerator kCLOCK_DivLPFlexComm19Clk: LP_FLEXCOMM19 Clk Divider.

enumerator kCLOCK_DivLPFlexComm20Clk: LP_FLEXCOMM20 Clk Divider.

enumerator kCLOCK_DivSenseDspClk: Sense DSP Clk Divider.

enumerator kCLOCK_DivSai3Clk: SAI3 FCLK Clk Divider.

enumerator kCLOCK_DivUtick1Clk: UTICK1 Functional Clk Divider.

enumerator kCLOCK_DivSystickClk: SYSTICK Functional Clk Divider.

enumerator kCLOCK_DivCtimer5Clk: CTIMER5 FCLK Clk Divider.

enumerator kCLOCK_DivCtimer6Clk: CTIMER6 FCLK Clk Divider.

enumerator kCLOCK_DivCtimer7Clk: CTIMER7 FCLK Clk Divider.

enumerator kCLOCK_DivI3c23Clk: I3C2 and I3C3 Functional Clk Divider.

enumerator kCLOCK_DivCommonVddnClk: Common VDDN Clk Divider.

enumerator kCLOCK_DivSenseMainClk: VDD1_SENSE Main Clock Divider.

enumerator kCLOCK_DivSenseRamClk: Senese RAM Clk Divider.

enumerator kCLOCK_DivOstimerClk: OSTIMER Clk Divider.

enumerator kCLOCK_DivSdadcClk: SDADC Clk Divider.

enumerator kCLOCK_DivAdcClk: SARADC Clk Divider.

enumerator kCLOCK_Div32KhzWakeClk: 32KHZ Wakeup Clk Divider.

enumerator kCLOCK_DivMicfil0Clk: DMIC0 Clk Divider.

enumerator kCLOCK_DivLpi2c15Clk: PMIC LPI2C Clk Divider.

enumerator kCLOCK_DivVdd1ClockOut: CLKOUT_VDD1 Clk Divider.

enumerator kCLOCK_DivMediaVddnClk: Media VDDN Clk Divider.

enumerator kCLOCK_DivMediaMainClk: Media Main Clk Divider.

enumerator kCLOCK_DivXspi2Clk: XSPI2 Clk Divider.

enumerator kCLOCK_DivSdio0Clk: SDIO0 Clk Divider.

enumerator kCLOCK_DivSdio1Clk: SDIO1 Clk Divider.

enumerator kCLOCK_DivDphyClk: DPHY Clk Divider.

enumerator kCLOCK_DivDphyEscRxClk: DphyEscRx Clk Divider.

enumerator kCLOCK_DivDphyEscTxClk: DphyEscTx Clk Divider.

enumerator kCLOCK_DivVgpuClk: VGPU Clk Divider.

enumerator kCLOCK_DivLpspi14Clk: LPSPI14 Clk Divider.

enumerator kCLOCK_DivLpspi16Clk: LPSPI16 Clk Divider.

enumerator kCLOCK_DivFlexioClk: FLEXIO Clk Divider.

enumerator kCLOCK_DivLcdifClk: LCDIF Pixel Clk Divider.

enumerator kCLOCK_DivLowFreqClk: Low frequency Clk Divider.

enum _clock_fro_output_en

FRO output enable.

Values:

enumerator kCLOCK_FroDiv1OutEn: Enable Fro Div1 output.

enumerator kCLOCK_FroDiv2OutEn: Enable Fro Div2 output.

enumerator kCLOCK_FroDiv3OutEn: Enable Fro Div3 output.

enumerator kCLOCK_FroDiv6OutEn: Enable Fro Div6 output.

enumerator kCLOCK_FroDiv8OutEn: Enable Fro Div8 output.

enumerator kCLOCK_FroAllOutEn: Enable all Fro output.

enum _clock_fro_interrupt

FRO Interrupt control.

Values:

enumerator kCLOCK_FroTrimUpdateReqInt: Trim Update Request Interrupt Enable.

enumerator kCLOCK_FroTuneErrInt: Tune Error Interrupt Enable.

enumerator kCLOCK_FroLossOfLockInt: Loss-of-Lock Error Interrupt Enable.

enumerator kCLOCK_FroAllIntterrupt: All Interrupt Enable.

enum _clock_fro_flag

FRO flags.

Values:

enumerator kCLOCK_FroTuneOnceDone: FRO Tune Once Done Flag.

enumerator kCLOCK_FroTrimLock: FRO Trim Lock Flag.

enumerator kCLOCK_FroTrimUpdateReq: FRO Trim Update Request Flag.

enumerator kCLOCK_FroTuneErr: FRO Tune Error Flag.

enumerator kCLOCK_FroLossOfLockErr: FRO Loss-of-lock Error Flag.

enum _clock_domain_enable

Clock Control for each power domain.

Values:

enumerator kCLOCK_Vdd2CompDomainEnable: Clock Control of VDD2_COMP Domain.

enumerator kCLOCK_Vdd1SenseDomainEnable: Clock Control of VDD1_SENSE Domain.

enumerator kCLOCK_Vdd2DspDomainEnable: Clock Control of VDD2_DSP Domain.

enumerator kCLOCK_Vdd2MediaDomainEnable: Clock Control of VDD2_MEDIA Domain.

enumerator kCLOCK_VddnMediaDomainEnable: Clock Control of VDDN_MEDIA Domain.

enumerator kCLOCK_Vdd2ComDomainEnable: Clock Control of VDD2_COM Domain.

enumerator kCLOCK_VddnComDomainEnable: Clock Control of VDDN_COM Domain.

enumerator kCLOCK_AllDomainEnable: Clock Control of all Domain.

enum _clock_pfd

PLL PFD clock name.

Values:

enumerator kCLOCK_Pfd0: PLL PFD0

enumerator kCLOCK_Pfd1: PLL PFD1

enumerator kCLOCK_Pfd2: PLL PFD2

enumerator kCLOCK_Pfd3: PLL PFD3

enum _main_pll_src

MainPLL Reference Input Clock Source.

Values:

enumerator kCLOCK_MainPllFro1Div8: FRO1_DIV8 clock

enumerator kCLOCK_MainPllOscClk: OSC clock

enum _main_pll_mult

MainPLL Multiplication Factor.

Values:

enumerator kCLOCK_MainPllMult16: Divide by 16

enumerator kCLOCK_MainPllMult17: Divide by 17

enumerator kCLOCK_MainPllMult18: Divide by 18

enumerator kCLOCK_MainPllMult19: Divide by 19

enumerator kCLOCK_MainPllMult20: Divide by 20

enumerator kCLOCK_MainPllMult21: Divide by 21

enumerator kCLOCK_MainPllMult22: Divide by 22

enum _audio_pll_src

AudioPll Reference Input Clock Source.

Values:

enumerator kCLOCK_AudioPllFro1Div8: FRO1_DIV8 clock

enumerator kCLOCK_AudioPllOscClk: OSC clock

enum _audio_pll_mult

AudioPll Multiplication Factor.

Values:

enumerator kCLOCK_AudioPllMult16: Divide by 16

enumerator kCLOCK_AudioPllMult17: Divide by 17

enumerator kCLOCK_AudioPllMult18: Divide by 18

enumerator kCLOCK_AudioPllMult19: Divide by 19

enumerator kCLOCK_AudioPllMult20: Divide by 20

enumerator kCLOCK_AudioPllMult21: Divide by 21

enumerator kCLOCK_AudioPllMult22: Divide by 22

enum _osc32k_cap_trim

Capacitor Trim Value for OSC32KNP.

Values:

enumerator kCLOCK_Osc32kCapPf0: Capacitor Trim Value 0pF.

enumerator kCLOCK_Osc32kCapPf2: Capacitor Trim Value 2pF.

enumerator kCLOCK_Osc32kCapPf4: Capacitor Trim Value 4pF.

enumerator kCLOCK_Osc32kCapPf6: Capacitor Trim Value 6pF.

enumerator kCLOCK_Osc32kCapPf8: Capacitor Trim Value 8pF.

enumerator kCLOCK_Osc32kCapPf10: Capacitor Trim Value 10pF.

enumerator kCLOCK_Osc32kCapPf12: Capacitor Trim Value 12pF.

enumerator kCLOCK_Osc32kCapPf14: Capacitor Trim Value 14pF.

enumerator kCLOCK_Osc32kCapPf16: Capacitor Trim Value 16pF.

enumerator kCLOCK_Osc32kCapPf18: Capacitor Trim Value 18pF.

enumerator kCLOCK_Osc32kCapPf20: Capacitor Trim Value 20pF.

enumerator kCLOCK_Osc32kCapPf22: Capacitor Trim Value 22pF.

enumerator kCLOCK_Osc32kCapPf24: Capacitor Trim Value 24pF.

enumerator kCLOCK_Osc32kCapPf26: Capacitor Trim Value 26pF.

enumerator kCLOCK_Osc32kCapPf28: Capacitor Trim Value 28pF.

enumerator kCLOCK_Osc32kCapPf30: Capacitor Trim Value 30pF.

typedef enum _clock_usb_src clock_usb_src_t: USB clock source definition.

typedef enum _clock_usb_phy_src clock_usb_phy_src_t: Source of the USB HS PHY.

typedef enum _clock_ip_name clock_ip_name_t: Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

typedef enum _clock_name clock_name_t: Clock name used to get clock frequency.

typedef enum _clock_attach_id clock_attach_id_t: The enumerator of clock attach Id for multi sources clock slices. Not all Muxer has MUX output enable control, if no mux output enable control, the mux output will be always enabled.

typedef enum _clock_div_name clock_div_name_t: Clock dividers.

typedef enum _clock_fro_output_en clock_fro_output_en_t: FRO output enable.

typedef struct _clock_fro_config clock_fro_config_t: FRO configuration.

typedef enum _clock_domain_enable clock_domain_enable_t: Clock Control for each power domain.

typedef enum _clock_pfd clock_pfd_t: PLL PFD clock name.

typedef enum _main_pll_src main_pll_src_t: MainPLL Reference Input Clock Source.

typedef enum _main_pll_mult main_pll_mult_t: MainPLL Multiplication Factor.

typedef struct _clock_main_pll_config clock_main_pll_config_t: PLL configuration for MAINPLL.

typedef enum _audio_pll_src audio_pll_src_t: AudioPll Reference Input Clock Source.

typedef enum _audio_pll_mult audio_pll_mult_t: AudioPll Multiplication Factor.

typedef struct _clock_audio_pll_config clock_audio_pll_config_t: PLL configuration for Audio PLL.

typedef enum _osc32k_cap_trim osc32k_cap_trim_t: Capacitor Trim Value for OSC32KNP.

typedef struct _clock_osc32k_config_t clock_osc32k_config_t: configuration for 32K OSC

volatile uint32_t g_xtalFreq

External XTAL (SYSOSC) clock frequency.

The XTAL (SYSOSC) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetXtalFreq to set the value in to clock driver. For example, if XTAL is 16MHz,

CLOCK_SetXtalFreq(160000000);

volatile uint32_t g_clkinFreq

External CLK_IN pin clock frequency (clkin).

The CLK_IN pin (clkin) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetClkinFreq to set the value in to clock driver. For example, if CLK_IN is 16MHz,

CLOCK_SetClkinFreq(160000000);

volatile uint32_t g_32kClkinFreq

External 32KHz input clock frequency.

The External 32KHz input clock frequency in Hz, used when OSC32KNP in bypass mode, use the function CLOCK_Set32kClkinFreq to set the value in to clock driver. For example, if EXTALIN32K input is 32768,

CLOCK_Set32kClkinFreq(32768);

volatile uint32_t g_mclkFreq

External MCLK IN clock frequency.

The MCLK IN clock frequency in Hz, when the clock is setup, use the function CLOCK_SetMclkFreq to set the value in to clock driver. For example, if MCLK IN is 16MHz,

CLOCK_SetMclkFreq(160000000);

void CLOCK_EnableClock(clock_ip_name_t clk)

Enable the clock for specific IP.

Parameters:

clk – : Clock to be enabled.

Returns:

Nothing

void CLOCK_DisableClock(clock_ip_name_t clk)

Disable the clock for specific IP.

Parameters:

clk – : Clock to be disabled.

Returns:

Nothing

void CLOCK_AttachClk(clock_attach_id_t connection)

brief Configure the clock selection muxes.

For some of the muxes, there’s SEL_EN bit to gate the mux ouput to reduce power, using kNONT_to_XXX to gate the mux oupput. used by any peripheral.

Parameters:

connection – : Clock to be configured.

Returns:

Nothing

void CLOCK_SetClkDiv(clock_div_name_t div_name, uint32_t divider)

Setup peripheral clock dividers.

Parameters:

div_name – : Clock divider name
divider – : Value to be divided. Divided clock frequency = Undivided clock frequency / divider.

Returns:

Nothing

uint32_t CLOCK_GetFreq(clock_name_t clockName)

Return Frequency of selected clock.

Returns:: Frequency of selected clock

uint32_t CLOCK_GetSenseAudioClkFreq(void)

Return Frequency of VDD1 audio clk.

Returns:: Frequency of audio_clk

uint32_t CLOCK_GetHifi1ClkFreq(void)

Return Frequency of Sense DSP clk.

Returns:: Frequency of Sense DSP clk

void CLOCK_EnableFroClkOutput(FRO_Type *base, uint32_t divOutEnable)

Enable/Disable FRO clock output.

Parameters:

base – : base address of FRO.
divOutEnable – : Or’ed value of clock_fro_output_en_t to enable certain clock freq output.

void CLOCK_ConfigFroTrim(FRO_Type *base, uint16_t trimVal)

Configure FRO trim values when FRO is configured in Open loop mode.

Parameters:

base – : base address of FRO.
trimVal – : 12bits trim value.

void CLOCK_DisableFro(FRO_Type *base)

Disable the FRO clock. This API will disable the FRO clock output and power off FRO.

Parameters:

base – : base address of FRO.

status_t CLOCK_EnableFroAutoTuning(FRO_Type *base, const clock_fro_config_t *config, bool enable)

Enable/Disable FRO for close loop mode(autotuner).

Parameters:

base – : base address of FRO.
config – : The configuration for FRO.
enable – Enable auto tuning mode or not.

Return values:

kStatus_Success – successfully tuned to the target configuration.
kStatus_InvalidArgument – Invalid arguement.
kStatus_Fail – failed to lock to the target frequency.

void CLOCK_EnableFroClkFreq(FRO_Type *base, uint32_t targetFreq, uint32_t divOutEnable)

Enable FRO clock output with specified frequency.

Parameters:

base – : base address of FRO.
targetFreq – target fro frequency.
divOutEnable – Or’ed value of clock_fro_output_en_t to enable certain clock freq output.

status_t CLOCK_EnableFroClkFreqCloseLoop(FRO_Type *base, const clock_fro_config_t *config, uint32_t divOutEnable)

Enable FRO clock output with target frequency using FRO close loop mode. For example, to enable FRO2 to ouput 200MHZ:

   const clock_fro_config_t config = {
    .targetFreq = 200000000U,
    .range = 50U,
    .trim1DelayUs = 15U,
    .trim2DelayUs = 150U,
    .refDiv = 0U,
    .enableInt = 0U,
    .coarseTrimEn = true,
};
CLOCK_EnableFroClkFreqCloseLoop(FRO2, &config, kCLOCK_FroAllOutEn);

Parameters:

base – : base address of FRO.
config – : The configuration for FRO.
divOutEnable – : Or’ed value of clock_fro_output_en_t to enable certain clock freq output.

Return values:

kStatus_Success – successfully tuned to the target configuration.
kStatus_InvalidArgument – Invalid arguement.
kStatus_Fail – failed to lock to the target frequency.

uint32_t CLOCK_GetFroFlags(FRO_Type *base)

Get FRO flags.

Parameters:

base – : base address of FRO.
flags – Or’ed value of _clock_fro_flag.

static inline void CLOCK_ClearFroFlags(FRO_Type *base, uint32_t flags)

Clear FRO flags.

Parameters:

base – : base address of FRO.
flags – Or’ed value of _clock_fro_flag to clear.

static inline void CLOCK_EnableFroFastStartup(FRO_Type *base, bool enable)

Enable/Disable FRO fast startup.

Parameters:

base – : base address of FRO.
true (enable,) – to enable fast startup, false to disable fast startup.

uint32_t CLOCK_GetFroClkFreq(uint32_t id)

Return Frequency of FRO clk.

Parameters:

id – FRO index

Returns:

Frequency of FRO clk

uint32_t CLOCK_GetSenseMainClkFreq(void)

Return Frequency of sense main clk.

Returns:: Frequency of main clk

uint32_t CLOCK_GetMainPllFreq(void)

Return Frequency of MAINPLL.

Returns:: Frequency of MAINPLL

uint32_t CLOCK_GetMainPfdFreq(clock_pfd_t pfd)

Get current output frequency of specific Main PLL PFD.

Parameters:

pfd – : pfd name to get frequency.

Returns:

Frequency of MainPLL PFD.

uint32_t CLOCK_GetAudioPllFreq(void)

Return Frequency of AUDIO PLL.

Returns:: Frequency of AUDIO PLL

uint32_t CLOCK_GetAudioPfdFreq(clock_pfd_t pfd)

Get current output frequency of specific Audio PLL PFD.

Parameters:

pfd – : pfd name to get frequency.

Returns:

Frequency of AUDIO PLL PFD.

static inline uint32_t CLOCK_GetXtalInClkFreq(void)

Return Frequency of High-Freq output of FRO.

Return Frequency of sys osc Clock

Returns:: Frequency of High-Freq output of FRO
Returns:: Frequency of sys osc Clock. Or CLK_IN pin frequency.

uint32_t CLOCK_GetSenseBaseClkFreq(void)

Return Frequency of Sense Base clock.

Returns:: Frequency of sense base clk

void CLOCK_EnableSysOscClk(bool enable, bool enableLowPower, uint32_t delay_us)

Enable/Disable sys osc clock from external crystal clock.

Parameters:

enable – : true to enable system osc clock, false to bypass system osc.
enableLowPower – : true to enable low power mode, false to enable high gain mode.
delay_us – : Delay time after OSC power up.

uint32_t CLOCK_GetVddnComBaseClkFreq(void)

Return Frequency of VDDN_COM Base Clock.

Returns:: Frequency of baseclk_comn

uint32_t CLOCK_GetVddnMediaBaseClkFreq(void)

Return Frequency of VDDN_MEDIA Base Clock.

Returns:: Frequency of baseclk_mdn

uint32_t CLOCK_GetVdd2MediaBaseClkFreq(void)

Return Frequency of VDD2_MEDIA Base Clock.

Returns:: Frequency of baseclk_md2

uint32_t CLOCK_GetMediaMainClkFreq(void)

Return Frequency of MEDIA_MAIN Clock.

Returns:: Frequency of media_main_clk

uint32_t CLOCK_GetMediaVddnClkFreq(void)

Return Frequency of MEDIA_VDDN Clock.

Returns:: Frequency of media_vddn_clk

void CLOCK_EnableFro2ClkForDomain(uint32_t domainEnable)

Enable/Disable FRO2 clock for various domains.

Parameters:

domainEnable – : Or’ed value of clock_domain_enable_t to enable DRFO2 max clock for certain domain.

void CLOCK_EnableMainPllPfdClkForDomain(clock_pfd_t pfd, uint32_t domainEnable)

Enable/Disable MainPLL PFD clock for various domains.

Enables PFD clock of MainPLL for various domains. Each PFD clock of MainPLL can be sent to various domain. To reduce power consumption, turn off the PFD in the domain when this PFD is not configured.

Parameters:

pfd – : Which PFD clock to control.
domainEnable – : Or’ed value of clock_domain_enable_t to enable clock for certain domain.

void CLOCK_EnableAudioPllPfdClkForDomain(clock_pfd_t pfd, uint32_t domainEnable)

Enable/Disable AUDIO PFD clock for various domains.

Enables PFD clock of AUDIO for various domains. Each PFD clock of AUDIO can be sent to various domain. To reduce power consumption, turn off the PFD in the domain when this PFD is not configured.

Parameters:

pfd – : Which PFD clock to control.
domainEnable – : Or’ed value of clock_domain_enable_t to enable clock for certain domain.

void CLOCK_EnableAudioPllVcoClkForDomain(uint32_t domainEnable)

Enable/Disable AUDIO VCO clock for various domains.

VCO clock of Audio PLL can be sent to various domains to reduce power consumption when VCO is not set to use in such domain. This VCO can be disabled for such domain.

Parameters:

domainEnable – : Or’ed value of clock_domain_enable_t to enable clock for certain domain.

void CLOCK_InitMainPll(const clock_main_pll_config_t *config)

Initialize the Main PLL.

Parameters:

config – : Configuration to set to PLL.

static inline void CLOCK_DeinitMainPll(void): brief Deinit the Main PLL. param none.

status_t CLOCK_InitMainPfd(clock_pfd_t pfd, uint8_t divider)

Initialize the Main PLL PFD.

Note

It is recommended that PFD settings are kept between 12-35.

Parameters:

pfd – : Which PFD clock to enable.
divider – : The PFD divider value.

Returns:

kStatus_Success if successfully, kStatus_Timeout if timeout happen.

static inline void CLOCK_DeinitMainPfd(clock_pfd_t pfd): brief Disable the Main PLL PFD. param pfd : Which PFD clock to disable.

void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config)

Initialize the audio PLL.

Parameters:

config – : Configuration to set to PLL.

static inline void CLOCK_DeinitAudioPll(void): brief Deinit the Audio PLL. param none.

status_t CLOCK_InitAudioPfd(clock_pfd_t pfd, uint8_t divider)

Initialize the audio PLL PFD.

Note

It is recommended that PFD settings are kept between 12-35.

Parameters:

pfd – : Which PFD clock to enable.
divider – : The PFD divider value.

Returns:

kStatus_Success if successfully, kStatus_Timeout if timeout happen.

static inline void CLOCK_DeinitAudioPfd(uint32_t pfd): brief Disable the audio PLL PFD. param pfd : Which PFD clock to disable.

static inline uint32_t CLOCK_GetLpOscFreq(void)

Return Frequency of Lower power osc.

Returns:: Frequency of LPOSC

static inline uint32_t CLOCK_GetSysOscFreq(void)

Return Frequency of sys osc Clock.

Returns:: Frequency of sys osc Clock. Or CLK_IN pin frequency.

static inline uint32_t CLOCK_GetMclkInClkFreq(void)

Return Frequency of MCLK Input Clock.

Returns:: Frequency of MCLK input Clock.

uint32_t CLOCK_GetOsc32KFreq(void)

Return Frequency of 32kHz osc.

Returns:: Frequency of 32kHz osc

void CLOCK_EnableOsc32K(clock_osc32k_config_t *config)

Enables OSC32KNP.

Parameters:

config – : configuration set to OSC32KNP

static inline void CLOCK_DisableOsc32K(void): Disable OSC32KNP.

uint32_t CLOCK_GetWakeClk32KFreq(void)

Return Frequency of 32khz wake clk.

Returns:: Frequency of 32kHz wake clk

static inline void CLOCK_SetXtalFreq(uint32_t freq)

Set the XTALIN (system OSC) frequency based on board setting. NOTE, when SOSC is used, either CLOCK_SetXtalFreq or CLOCK_SetClkinFreq(But NOT both.) should be called to tell driver the clock frequency connected to SOSC module.

Parameters:

freq – : The XTAL input clock frequency in Hz.

static inline void CLOCK_SetClkinFreq(uint32_t freq)

Set the CLKIN (CLKIN pin) frequency based on board setting.

Parameters:

freq – : The CLK_IN pin input clock frequency in Hz.

static inline void CLOCK_Set32kClkinFreq(uint32_t freq)

Set the 32KHz external input frequency based on board setting.

Parameters:

freq – : The 32KHz external pin input clock frequency in Hz.

static inline void CLOCK_SetMclkFreq(uint32_t freq)

Set the MCLK IN frequency based on board setting.

Parameters:

freq – : The MCLK input clock frequency in Hz.

static inline uint32_t CLOCK_GetCoreSysClkFreq(void)

Return Frequency of Core/system clock.

Returns:: Frequency of core or system Clock

uint32_t CLOCK_GetXspiClkFreq(uint32_t id)

Return Frequency of XSPI function clock.

Parameters:

id – : XSPI index to get frequency.

Returns:

Frequency of XSPI functional Clock

uint32_t CLOCK_GetUtickClkFreq(void)

Return Frequency of UTICK function clock.

Returns:: Frequency of UTICK functional Clock

uint32_t CLOCK_GetSystickClkFreq(void)

Return Frequency of systick clk.

Returns:: Frequency of systick clk

uint32_t CLOCK_GetWdtClkFreq(uint32_t id)

Return Frequency of WDT clk.

Parameters:

id – : WDT index to get frequency.

Returns:

Frequency of WDT clk

uint32_t CLOCK_GetAcmpClkFreq(void)

Return Frequency of ACMP clk.

Returns:: Frequency of ACMP clk

uint32_t CLOCK_GetSaiClkFreq(void)

Return Frequency of SAI clk.

Returns:: Frequency of SAI clk

uint32_t CLOCK_GetUsbClkFreq(void)

Return Frequency of USB clk.

Returns:: Frequency of USB clk

uint32_t CLOCK_GetI3cClkFreq(void)

Return Frequency of I3C clk.

Returns:: Frequency of I3C clk

uint32_t CLOCK_GetLPFlexCommClkFreq(uint32_t id)

Return Frequency of Flexcomm functional Clock.

Parameters:

id – : flexcomm index to get frequency.

Returns:

Frequency of Flexcomm functional Clock

uint32_t CLOCK_GetLPI2cClkFreq(uint32_t id)

Return Frequency of LPI2C functional Clock.

Parameters:

id – : LPI2C index to get frequency.

Returns:

Frequency of LPI2C functional Clock

uint32_t CLOCK_GetLPSpiClkFreq(uint32_t id)

Return Frequency of LPSPI functional Clock.

Parameters:

id – : LPSPI index to get frequency.

Returns:

Frequency of LPSPI functional Clock

uint32_t CLOCK_GetFlexioClkFreq(void)

Return Frequency of Flexio functional Clock.

Returns:: Frequency of Flexcomm functional Clock

uint32_t CLOCK_GetOSTimerClkFreq(void)

Return Frequency of OSTIMER functional Clock.

Returns:: Frequency of OSTIMER functional Clock

uint32_t CLOCK_GetMicfilClkFreq(void)

Return Frequency of MICFIL functional Clock.

Returns:: Frequency of MICFIL functional Clock

uint32_t CLOCK_GetCTimerClkFreq(uint32_t id)

Return Frequency of Ctimer Clock.

Parameters:

id – : ctimer index to get frequency.

Returns:

Frequency of Ctimer Clock

uint32_t CLOCK_GetClockOutClkFreq(void)

Return Frequency of VDD2 ClockOut.

Returns:: Frequency of ClockOut

uint32_t CLOCK_GetVdd1ClockOutClkFreq(void)

Return Frequency of VDD1 Clock Out.

Returns:: Frequency of ClockOut of sense domain

uint32_t CLOCK_GetAdcClkFreq(void)

Return Frequency of Adc Clock.

Returns:: Frequency of Adc Clock.

uint32_t CLOCK_GetSdAdcClkFreq(void)

Return Frequency of SDADC Clock.

Returns:: Frequency of SDADC Clock.

uint32_t CLOCK_GetVgpuClkFreq(void)

Return Frequency of VGPU functional Clock.

Returns:: Frequency of VGPU functional Clock

uint32_t CLOCK_GetLcdifClkFreq(void)

Return Frequency of LCDIF pixel Clock.

Returns:: Frequency of LCDIF pixel Clock

uint32_t CLOCK_GetMipiDphyClkFreq(void)

Return Frequency of MIPI DPHY functional Clock.

Returns:: Frequency of MIPI DPHY functional Clock

uint32_t CLOCK_GetMipiDphyEscRxClkFreq(void)

Return Frequency of MIPI DPHY Esc RX functional Clock.

Returns:: Frequency of MIPI DPHY Esc RX functional Clock

uint32_t CLOCK_GetMipiDphyEscTxClkFreq(void)

Return Frequency of MIPI DPHY Esc Tx functional Clock.

Returns:: Frequency of MIPI DPHY Esc Tx functional Clock

uint32_t CLOCK_GetUsdhcClkFreq(uint32_t id)

Return Frequency of USDHC Clock.

Parameters:

id – : uSDHC index to get frequency.

Returns:

Frequency of USDHC Clock

bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq)

brief Enable USB HS PHY PLL clock.

This function enables the internal 480MHz USB PHY PLL clock.

param src USB HS PHY PLL clock source. param freq The frequency specified by src. retval true The clock is set successfully. retval false The clock source is invalid to get proper USB HS clock.

bool CLOCK_EnableUsbhs0Clock(clock_usb_src_t src, uint32_t freq)

brief Enable USB HS clock.

This function only enables the access to USB HS prepheral, upper layer should first call the ref CLOCK_EnableUsbhs0PhyPllClock to enable the PHY clock to use USB HS.

param src USB HS does not care about the clock source, here must be ref kCLOCK_UsbSrcUnused. param freq USB HS does not care about the clock source, so this parameter is ignored. retval true The clock is set successfully. retval false The clock source is invalid to get proper USB HS clock.

void CLOCK_DisableUsbhs0PhyPllClock(void)

brief Disable USB HS PHY PLL clock.

This function disables USB HS PHY PLL clock.

FSL_CLOCK_DRIVER_VERSION: CLOCK driver version 2.4.0.

CLOCK_DeinitSysPfd

CLOCK_InitSysPfd

CDOG_CLOCKS: Clock ip name array for CDOG.

FREQME_CLOCKS: Clock ip name array for FREQME.

GPU_CLOCKS: Clock ip name array for GPU.

MIPI_DSI_HOST_CLOCKS: Clock ip name array for MIPI DSI.

LCDIF_CLOCKS: Clock ip name array for LCDIF.

SCT_CLOCKS: Clock ip name array for SCT.

USB_CLOCKS: Clock ip name array for USB.

USBPHY_CLOCKS: Clock ip name array for USBPHY.

XSPI_CLOCKS: Clock ip name array for FlexSPI.

MMU_CLOCKS: Clock ip name array for MMU.

CACHE64_CLOCKS: Clock ip name array for CACHE64.

CACHE64POLSEL_CLOCKS: Clock ip name array for CACHE64_POLSEL.

LPADC_CLOCKS: Clock ip name array for ADC.

SDADC_CLOCKS: Clock ip name array for SDADC.

CMP_CLOCKS: Clock ip name array for ACMP.

USDHC_CLOCKS: Clock ip name array for uSDHC.

WWDT_CLOCKS: Clock ip name array for WWDT.

UTICK_CLOCKS: Clock ip name array for UTICK.

FLEXIO_CLOCKS: Clock ip name array for FlexIO.

LP_FLEXCOMM_CLOCKS: Clock ip name array for LP_FLEXCOMM.

LPUART_CLOCKS: Clock ip name array for LPUART.

LPI2C_CLOCKS: Clock ip name array for LPI2C.

LPSPI_CLOCKS: Clock ip name array for LSPI.

SAI_CLOCKS: Clock ip name array for SAI.

SEMA42_CLOCKS: Clock ip name array for SEMA.

CRC_CLOCKS

Clock ip name array for MU.

Clock ip name array for CRC.

GPIO_CLOCKS: Clock ip name array for GPIO.

PDM_CLOCKS: Clock ip name array for PDM.

PINT_CLOCKS: Clock ip name array for PINT.

PNGDEC_CLOCKS: Clock ip name array for PNGDEC.

JPEGDEC_CLOCKS: Clock ip name array for JPEGDEC.

I3C_CLOCKS: Clock ip name array for I3C.

MRT_CLOCKS: Clock ip name array for MRT.

CTIMER_CLOCKS: Clock ip name array for CT32B.

OSTIMER_CLOCKS: Clock ip name array for OSTIMER.

RTC_CLOCKS: Clock ip name array for RTC.

CLK_GATE_REG_OFFSET_SHIFT: Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

CLK_GATE_REG_OFFSET_MASK

CLK_GATE_BIT_SHIFT_SHIFT

CLK_GATE_BIT_SHIFT_MASK

CLK_GATE_DEFINE(reg_offset, bit_shift)

CLK_GATE_ABSTRACT_REG_OFFSET(x)

CLK_GATE_ABSTRACT_BITS_SHIFT(x)

CLK_CTL0_PSCCTL0

CLK_CTL0_PSCCTL1

CLK_CTL0_PSCCTL2

CLK_CTL0_PSCCTL3

CLK_CTL0_PSCCTL4

CLK_CTL0_PSCCTL5

CLK_CTL1_PSCCTL0

CLK_CTL1_PSCCTL1

CLK_CTL2_PSCCTL0

CLK_CTL3_PSCCTL0

CLK_CTL4_PSCCTL0

CLK_CTL4_PSCCTL1

SYSCON3_SEC_CLK_CTRL

CLKCTL0_ONE_SRC_CLKSLICE_ENABLE

CLKCTL3_ONE_SRC_CLKSLICE_ENABLE

CLKCTL4_ONE_SRC_CLKSLICE_ENABLE

CLK_MUX_INST_INDEX_SHIFT

Clock Mux Switches The encoding is as follows each connection identified is 32bits wide starting from LSB upwards.

[ 31-29 14 12:11 10:0 ] [CLKCTL index]: [Disable MUX output]: [MUXA choice]:[MUXA offset]. MUX offset 0 means end of descriptor.

CLK_MUX_CHOICE_OFFSET_SHIFT

CLK_MUX_DISABLE_OUTPUT_MASK

SENSEBASECLKSEL_OFFSET

SENSEDSPCPUCLKDIV_OFFSET

SENSEDSPCPUCLKSEL_OFFSET

SAI3FCLKSEL_OFFSET

SAI3CLKDIV_OFFSET

UTICK1FCLKSEL_OFFSET

UTICK1CLKDIV_OFFSET

WWDT2FCLKSEL_OFFSET

WWDT3FCLKSEL_OFFSET

SYSTICKFCLKSEL_OFFSET

SYSTICKFCLKDIV_OFFSET

CTIMER5FCLKSEL_OFFSET

CTIMER6FCLKSEL_OFFSET

CTIMER7FCLKSEL_OFFSET

CTIMER5CLKDIV_OFFSET

CTIMER6CLKDIV_OFFSET

CTIMER7CLKDIV_OFFSET

I3C23FCLKSEL_OFFSET

I3C23FCLKDIV_OFFSET

FC17FCLKSEL_OFFSET

FC18FCLKSEL_OFFSET

FC19FCLKSEL_OFFSET

FC20FCLKSEL_OFFSET

FC17FCLKDIV_OFFSET

FC18FCLKDIV_OFFSET

FC19FCLKDIV_OFFSET

FC20FCLKDIV_OFFSET

AUDIOVDD1CLKSEL_OFFSET

USBCLKSRC24MCLKSEL_OFFSET

USBCLKSRC24MCLKSEL_OFFSET

COMMONVDDNCLKSEL_OFFSET

COMMONVDDNCLKDIV_OFFSET

COMNBASECLKSEL_OFFSET

EUSBCLKSRC24MCLKSEL_OFFSET

MAINPLL0CLKSEL_OFFSET

MAINPLL0LOCKTIMEDIV2_OFFSET

AUDIOPLL0CLKSEL_OFFSET

AUDIOPLL0LOCKTIMEDIV2_OFFSET

SENSEMAINCLKDIV_OFFSET

SENSE_MAINCLKSEL_OFFSET

SENSERAMCLKSEL_OFFSET

SENSERAMCLKDIV_OFFSET

OSEVENTTFCLKSEL_OFFSET

OSEVENTFCLKDIV_OFFSET

SDADCFCLKSEL_OFFSET

SDADCFCLKDIV_OFFSET

SARADCFCLKSEL_OFFSET

SARADCFCLKDIV_OFFSET

WAKE32KCLKSEL_OFFSET

A32KHZWAKECLKDIV_OFFSET

MICFIL0FCLKSEL_OFFSET

MICFIL0FCLKDIV_OFFSET

LPI2CFCLKSEL_OFFSET

LPI2CFCLKDIV_OFFSET

SENSE_CLKOUTCLKSEL_OFFSET

SENSE_CLKOUTCLKDIV_OFFSET

MEDIAVDDNCLKSEL_OFFSET

MEDIAVDDNCLKDIV_OFFSET

MEDIAMAINCLKSEL_OFFSET

MEDIAMAINCLKDIV_OFFSET

MDNBASECLKSEL_OFFSET

MD2BASECLKSEL_OFFSET

XSPI2FCLKSEL_OFFSET

XSPI2FCLKDIV_OFFSET

USBFCLKSEL_OFFSET

EUSBFCLKSEL_OFFSET

SDIO0FCLKSEL_OFFSET

SDIO0FCLKDIV_OFFSET

SDIO1FCLKSEL_OFFSET

SDIO1FCLKDIV_OFFSET

DPHYCLKSEL_OFFSET

DPHYCLKDIV_OFFSET

DPHYESCCLKSEL_OFFSET

DPHYESCRXCLKDIV_OFFSET

DPHYESCTXCLKDIV_OFFSET

VGPUCLKSEL_OFFSET

VGPUCLKDIV_OFFSET

LPSPI14CLKSEL_OFFSET

LPSPI14CLKDIV_OFFSET

LPSPI16CLKSEL_OFFSET

LPSPI16CLKDIV_OFFSET

FLEXIOCLKSEL_OFFSET

FLEXIOCLKDIV_OFFSET

LCDIFPIXELCLKSEL_OFFSET

LCDIFPIXELCLKDIV_OFFSET

LOWFREQCLKDIV_OFFSET

CLKCTL0_INDEX

CLKCTL1_INDEX

CLKCTL2_INDEX

CLKCTL3_INDEX

CLKCTL4_INDEX

CLKCTL0_TUPLE_MUXA(reg, choice)

CLKCTL1_TUPLE_MUXA(reg, choice)

CLKCTL2_TUPLE_MUXA(reg, choice)

CLKCTL3_TUPLE_MUXA(reg, choice)

CLKCTL4_TUPLE_MUXA(reg, choice)

CLKCTL0_TUPLE_MUXA_NONE(reg, choice): Macro for gated clock mux

CLKCTL1_TUPLE_MUXA_NONE(reg, choice)

CLKCTL2_TUPLE_MUXA_NONE(reg, choice)

CLKCTL3_TUPLE_MUXA_NONE(reg, choice)

CLKCTL4_TUPLE_MUXA_NONE(reg, choice)

CLKCTL_TUPLE_REG(base, tuple)

CLKCTL_TUPLE_SEL(tuple)

uint32_t targetFreq: Target frequency.

uint16_t refDiv: OSC Reference clock divider. 1 for divide ratio 1.

uint16_t trim1DelayUs: Trim 1 delay in us, minimum is 15us. Used when running in Closed Loop mode and trim values are updated by 1 decimal unit.

uint16_t trim2DelayUs: Trim 2 delay in us. Used at start of closed loop mode when auto tuner is updating trim values by 16 decimal unit steps

uint8_t range: Trim Expected Count Range. Specifies the + or - counts that the FRO frequency can be off from TEXPCNT to be considerred locked. The value/100 is the % deviation.

uint32_t enableInt: Enable interrupts. Bit mask of _clock_fro_interrupt.

bool coarseTrimEn: Coarse Trim Enable. Set to true to allow autotrimming of the FRO high-byte trim bits.

bool fastStartupEn: Fast startup Enable. Enables FRO fast startup.

main_pll_src_t main_pll_src: Reference Input Clock Source.

uint32_t numerator: 30 bit numerator of fractional loop divider.

uint32_t denominator: 30 bit numerator of fractional loop divider.

main_pll_mult_t main_pll_mult: Multiplication Factor.

audio_pll_src_t audio_pll_src: Reference Input Clock Source.

uint32_t numerator: 30 bit numerator of fractional loop divider.

uint32_t denominator: 30 bit numerator of fractional loop divider.

audio_pll_mult_t audio_pll_mult: Multiplication Factor.

bool enableVcoOut: Enable VCO output

bool bypass: Bypass enable.

bool monitorEnable: Clock Monitor Enable.

bool lowPowerMode: Low-Power (Nano-Power) mode enable. NOTE, can only change from High-Power mode to Nano-Power mode, and not vice versa.

osc32k_cap_trim_t cap: Capacitor Trim Value.

struct _clock_fro_config: #include <fsl_clock.h>

FRO configuration.

struct _clock_main_pll_config: #include <fsl_clock.h>

PLL configuration for MAINPLL.

struct _clock_audio_pll_config: #include <fsl_clock.h>

PLL configuration for Audio PLL.

struct _clock_osc32k_config_t: #include <fsl_clock.h>

configuration for 32K OSC

CRC: Cyclic Redundancy Check Driver

FSL_CRC_DRIVER_VERSION

CRC driver version. Version 2.0.4.

Current version: 2.0.4

Change log:

Version 2.0.4
- Release peripheral from reset if necessary in init function.
Version 2.0.3
- Fix MISRA issues
Version 2.0.2
- Fix MISRA issues
Version 2.0.1
- move DATA and DATALL macro definition from header file to source file

enum _crc_bits

CRC bit width.

Values:

enumerator kCrcBits16: Generate 16-bit CRC code

enumerator kCrcBits32: Generate 32-bit CRC code

enum _crc_result

CRC result type.

Values:

enumerator kCrcFinalChecksum: CRC data register read value is the final checksum. Reflect out and final xor protocol features are applied.

enumerator kCrcIntermediateChecksum: CRC data register read value is intermediate checksum (raw value). Reflect out and final xor protocol feature are not applied. Intermediate checksum can be used as a seed for CRC_Init() to continue adding data to this checksum.

typedef enum _crc_bits crc_bits_t: CRC bit width.

typedef enum _crc_result crc_result_t: CRC result type.

typedef struct _crc_config crc_config_t

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

void CRC_Init(CRC_Type *base, const crc_config_t *config)

Enables and configures the CRC peripheral module.

This function enables the clock gate in the SIM module for the CRC peripheral. It also configures the CRC module and starts a checksum computation by writing the seed.

Parameters:

base – CRC peripheral address.
config – CRC module configuration structure.

static inline void CRC_Deinit(CRC_Type *base)

Disables the CRC peripheral module.

This function disables the clock gate in the SIM module for the CRC peripheral.

Parameters:

base – CRC peripheral address.

void CRC_GetDefaultConfig(crc_config_t *config)

Loads default values to the CRC protocol configuration structure.

Loads default values to the CRC protocol configuration structure. The default values are as follows.

config->polynomial = 0x1021;
config->seed = 0xFFFF;
config->reflectIn = false;
config->reflectOut = false;
config->complementChecksum = false;
config->crcBits = kCrcBits16;
config->crcResult = kCrcFinalChecksum;

Parameters:

config – CRC protocol configuration structure.

void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)

Writes data to the CRC module.

Writes input data buffer bytes to the CRC data register. The configured type of transpose is applied.

Parameters:

base – CRC peripheral address.
data – Input data stream, MSByte in data[0].
dataSize – Size in bytes of the input data buffer.

uint32_t CRC_Get32bitResult(CRC_Type *base)

Reads the 32-bit checksum from the CRC module.

Reads the CRC data register (either an intermediate or the final checksum). The configured type of transpose and complement is applied.

Parameters:

base – CRC peripheral address.

Returns:

An intermediate or the final 32-bit checksum, after configured transpose and complement operations.

uint16_t CRC_Get16bitResult(CRC_Type *base)

Reads a 16-bit checksum from the CRC module.

Reads the CRC data register (either an intermediate or the final checksum). The configured type of transpose and complement is applied.

Parameters:

base – CRC peripheral address.

Returns:

An intermediate or the final 16-bit checksum, after configured transpose and complement operations.

CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT: Default configuration structure filled by CRC_GetDefaultConfig(). Use CRC16-CCIT-FALSE as defeault.

struct _crc_config

#include <fsl_crc.h>

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

Public Members

uint32_t polynomial: CRC Polynomial, MSBit first. Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1

uint32_t seed: Starting checksum value

bool reflectIn: Reflect bits on input.

bool reflectOut: Reflect bits on output.

bool complementChecksum: True if the result shall be complement of the actual checksum.

crc_bits_t crcBits: Selects 16- or 32- bit CRC protocol.

crc_result_t crcResult: Selects final or intermediate checksum return from CRC_Get16bitResult() or CRC_Get32bitResult()

CTIMER: Standard counter/timers

void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config)

Ungates the clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application before using the driver.

Parameters:

base – Ctimer peripheral base address
config – Pointer to the user configuration structure.

void CTIMER_Deinit(CTIMER_Type *base)

Gates the timer clock.

Parameters:

base – Ctimer peripheral base address

void CTIMER_GetDefaultConfig(ctimer_config_t *config)

Fills in the timers configuration structure with the default settings.

The default values are:

config->mode = kCTIMER_TimerMode;
config->input = kCTIMER_Capture_0;
config->prescale = 0;

Parameters:

config – Pointer to the user configuration structure.

status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint32_t pwmPeriod, uint32_t pulsePeriod, bool enableInt)

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM period

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
pwmPeriod – PWM period match value
pulsePeriod – Pulse width match value
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

Returns:

kStatus_Success on success kStatus_Fail If matchChannel is equal to pwmPeriodChannel; this channel is reserved to set the PWM cycle If PWM pulse width register value is larger than 0xFFFFFFFF.

status_t CTIMER_SetupPwm(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, bool enableInt)

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – PWM pulse width; the value should be between 0 to 100
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – Timer counter clock in Hz
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)

Updates the pulse period of an active PWM signal.

Parameters:

base – Ctimer peripheral base address
matchChannel – Match pin to be used to output the PWM signal
pulsePeriod – New PWM pulse width match value

status_t CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent)

Updates the duty cycle of an active PWM signal.

Note

Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution. This function can manually assign the specified channel to set the PWM cycle.

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – New PWM pulse width; the value should be between 0 to 100

Returns:

kStatus_Success on success kStatus_Fail If PWM pulse width register value is larger than 0xFFFFFFFF.

static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)

Enables the selected Timer interrupts.

Parameters:

base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)

Disables the selected Timer interrupts.

Parameters:

base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)

Gets the enabled Timer interrupts.

Parameters:

base – Ctimer peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)

Gets the Timer status flags.

Parameters:

base – Ctimer peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)

Clears the Timer status flags.

Parameters:

base – Ctimer peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_StartTimer(CTIMER_Type *base)

Starts the Timer counter.

Parameters:

base – Ctimer peripheral base address

static inline void CTIMER_StopTimer(CTIMER_Type *base)

Stops the Timer counter.

Parameters:

base – Ctimer peripheral base address

FSL_CTIMER_DRIVER_VERSION: Version 2.3.3

enum _ctimer_capture_channel

List of Timer capture channels.

Values:

enumerator kCTIMER_Capture_0: Timer capture channel 0

enumerator kCTIMER_Capture_1: Timer capture channel 1

enumerator kCTIMER_Capture_3: Timer capture channel 3

enum _ctimer_capture_edge

List of capture edge options.

Values:

enumerator kCTIMER_Capture_RiseEdge: Capture on rising edge

enumerator kCTIMER_Capture_FallEdge: Capture on falling edge

enumerator kCTIMER_Capture_BothEdge: Capture on rising and falling edge

enum _ctimer_match

List of Timer match registers.

Values:

enumerator kCTIMER_Match_0: Timer match register 0

enumerator kCTIMER_Match_1: Timer match register 1

enumerator kCTIMER_Match_2: Timer match register 2

enumerator kCTIMER_Match_3: Timer match register 3

enum _ctimer_external_match

List of external match.

Values:

enumerator kCTIMER_External_Match_0: External match 0

enumerator kCTIMER_External_Match_1: External match 1

enumerator kCTIMER_External_Match_2: External match 2

enumerator kCTIMER_External_Match_3: External match 3

enum _ctimer_match_output_control

List of output control options.

Values:

enumerator kCTIMER_Output_NoAction: No action is taken

enumerator kCTIMER_Output_Clear: Clear the EM bit/output to 0

enumerator kCTIMER_Output_Set: Set the EM bit/output to 1

enumerator kCTIMER_Output_Toggle: Toggle the EM bit/output

enum _ctimer_timer_mode

List of Timer modes.

Values:

enumerator kCTIMER_TimerMode

enumerator kCTIMER_IncreaseOnRiseEdge

enumerator kCTIMER_IncreaseOnFallEdge

enumerator kCTIMER_IncreaseOnBothEdge

enum _ctimer_interrupt_enable

List of Timer interrupts.

Values:

enumerator kCTIMER_Match0InterruptEnable: Match 0 interrupt

enumerator kCTIMER_Match1InterruptEnable: Match 1 interrupt

enumerator kCTIMER_Match2InterruptEnable: Match 2 interrupt

enumerator kCTIMER_Match3InterruptEnable: Match 3 interrupt

enum _ctimer_status_flags

List of Timer flags.

Values:

enumerator kCTIMER_Match0Flag: Match 0 interrupt flag

enumerator kCTIMER_Match1Flag: Match 1 interrupt flag

enumerator kCTIMER_Match2Flag: Match 2 interrupt flag

enumerator kCTIMER_Match3Flag: Match 3 interrupt flag

enum ctimer_callback_type_t

Callback type when registering for a callback. When registering a callback an array of function pointers is passed the size could be 1 or 8, the callback type will tell that.

Values:

enumerator kCTIMER_SingleCallback: Single Callback type where there is only one callback for the timer. based on the status flags different channels needs to be handled differently

enumerator kCTIMER_MultipleCallback: Multiple Callback type where there can be 8 valid callbacks, one per channel. for both match/capture

typedef enum _ctimer_capture_channel ctimer_capture_channel_t: List of Timer capture channels.

typedef enum _ctimer_capture_edge ctimer_capture_edge_t: List of capture edge options.

typedef enum _ctimer_match ctimer_match_t: List of Timer match registers.

typedef enum _ctimer_external_match ctimer_external_match_t: List of external match.

typedef enum _ctimer_match_output_control ctimer_match_output_control_t: List of output control options.

typedef enum _ctimer_timer_mode ctimer_timer_mode_t: List of Timer modes.

typedef enum _ctimer_interrupt_enable ctimer_interrupt_enable_t: List of Timer interrupts.

typedef enum _ctimer_status_flags ctimer_status_flags_t: List of Timer flags.

typedef void (*ctimer_callback_t)(uint32_t flags)

typedef struct _ctimer_match_config ctimer_match_config_t

Match configuration.

This structure holds the configuration settings for each match register.

typedef struct _ctimer_config ctimer_config_t

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config)

Setup the match register.

User configuration is used to setup the match value and action to be taken when a match occurs.

Parameters:

base – Ctimer peripheral base address
matchChannel – Match register to configure
config – Pointer to the match configuration structure

uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel)

Get the status of output match.

This function gets the status of output MAT, whether or not this output is connected to a pin. This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.

Parameters:

base – Ctimer peripheral base address
matchChannel – External match channel, user can obtain the status of multiple match channels at the same time by using the logic of “|” enumeration ctimer_external_match_t

Returns:

The mask of external match channel status flags. Users need to use the _ctimer_external_match type to decode the return variables.

void CTIMER_SetupCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, ctimer_capture_edge_t edge, bool enableInt)

Setup the capture.

Parameters:

base – Ctimer peripheral base address
capture – Capture channel to configure
edge – Edge on the channel that will trigger a capture
enableInt – Flag to enable channel interrupts, if enabled then the registered call back is called upon capture

static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)

Get the timer count value from TC register.

Parameters:

base – Ctimer peripheral base address.

Returns:

return the timer count value.

void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type)

Register callback.

Parameters:

base – Ctimer peripheral base address
cb_func – callback function
cb_type – callback function type, singular or multiple

static inline void CTIMER_Reset(CTIMER_Type *base)

Reset the counter.

The timer counter and prescale counter are reset on the next positive edge of the APB clock.

Parameters:

base – Ctimer peripheral base address

static inline void CTIMER_SetPrescale(CTIMER_Type *base, uint32_t prescale)

Setup the timer prescale value.

Specifies the maximum value for the Prescale Counter.

Parameters:

base – Ctimer peripheral base address
prescale – Prescale value

static inline uint32_t CTIMER_GetCaptureValue(CTIMER_Type *base, ctimer_capture_channel_t capture)

Get capture channel value.

Get the counter/timer value on the corresponding capture channel.

Parameters:

base – Ctimer peripheral base address
capture – Select capture channel

Returns:

The timer count capture value.

static inline void CTIMER_EnableResetMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable reset match channel.

Set the specified match channel reset operation.

Parameters:

base – Ctimer peripheral base address
match – match channel used
enable – Enable match channel reset operation.

static inline void CTIMER_EnableStopMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable stop match channel.

Set the specified match channel stop operation.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
enable – Enable match channel stop operation.

static inline void CTIMER_EnableMatchChannelReload(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable reload channel falling edge.

Enable the specified match channel reload match shadow value.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
enable – Enable .

static inline void CTIMER_EnableRisingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)

Enable capture channel rising edge.

Sets the specified capture channel for rising edge capture.

Parameters:

base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable rising edge capture.

static inline void CTIMER_EnableFallingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)

Enable capture channel falling edge.

Sets the specified capture channel for falling edge capture.

Parameters:

base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable falling edge capture.

static inline void CTIMER_SetShadowValue(CTIMER_Type *base, ctimer_match_t match, uint32_t matchvalue)

Set the specified match shadow channel.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
matchvalue – Reload the value of the corresponding match register.

struct _ctimer_match_config

#include <fsl_ctimer.h>

Match configuration.

This structure holds the configuration settings for each match register.

Public Members

uint32_t matchValue: This is stored in the match register

bool enableCounterReset: true: Match will reset the counter false: Match will not reser the counter

bool enableCounterStop: true: Match will stop the counter false: Match will not stop the counter

ctimer_match_output_control_t outControl: Action to be taken on a match on the EM bit/output

bool outPinInitState: Initial value of the EM bit/output

bool enableInterrupt: true: Generate interrupt upon match false: Do not generate interrupt on match

struct _ctimer_config

#include <fsl_ctimer.h>

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Public Members

ctimer_timer_mode_t mode: Timer mode

ctimer_capture_channel_t input: Input channel to increment the timer, used only in timer modes that rely on this input signal to increment TC

uint32_t prescale: Prescale value

Dsp

enum _dsp_static_vec_sel

Fusion DSP vector table select.

Values:

enumerator kDSP_StatVecSel0

enumerator kDSP_StatVecSel1

typedef struct _dsp_copy_image dsp_copy_image_t

Structure for DSP copy image to destination address.

Defines start and destination address for copying image with given size.

typedef enum _dsp_static_vec_sel dsp_static_vec_sel_t: Fusion DSP vector table select.

void DSP_Init(void)

Initializing DSP core.

Power up DSP TCM Enable DSP clock Reset DSP peripheral

void DSP_Deinit(void)

Deinit DSP core.

Power down DSP TCM Disable DSP clock Set DSP peripheral reset

void DSP_CopyImage(dsp_copy_image_t *dspCopyImage)

Copy DSP image to destination address.

Copy DSP image from source address to destination address with given size.

Parameters:

dspCopyImage – Structure contains information for DSP copy image to destination address.

static inline void DSP_Start(void): Start DSP core.

static inline void DSP_Stop(void): Stop DSP core.

static inline void DSP_SetVecRemap(dsp_static_vec_sel_t statVecSel, uint32_t remap)

Set DSP static vector table remap.

Parameters:

statVecSel – static vector base address selection
remap – static vector remap, For HiFi1 when statVecSel = 0, the valid range is 0~0x3FF, when statVecSel=1, the valid range is 0~0x7FF. For HiFi4, the bits value will remap ARADDR[22:10] when [STATVECSELECT] is high and ARADDR hits 1 KB from 2010_0000h.

FSL_DSP_DRIVER_VERSION: DSP driver version 2.0.0.

uint32_t *srcAddr

uint32_t *destAddr

uint32_t size

struct _dsp_copy_image

#include <fsl_dsp.h>

Structure for DSP copy image to destination address.

Defines start and destination address for copying image with given size.

eDMA: Enhanced Direct Memory Access (eDMA) Controller Driver

void EDMA_Init(EDMA_Type *base, const edma_config_t *config)

Initializes the eDMA peripheral.

This function ungates the eDMA clock and configures the eDMA peripheral according to the configuration structure. All emda enabled request will be cleared in this function.

Note

This function enables the minor loop map feature.

Parameters:

base – eDMA peripheral base address.
config – A pointer to the configuration structure, see “edma_config_t”.

void EDMA_Deinit(EDMA_Type *base)

Deinitializes the eDMA peripheral.

This function gates the eDMA clock.

Parameters:

base – eDMA peripheral base address.

void EDMA_InstallTCD(EDMA_Type *base, uint32_t channel, edma_tcd_t *tcd)

Push content of TCD structure into hardware TCD register.

Parameters:

base – EDMA peripheral base address.
channel – EDMA channel number.
tcd – Point to TCD structure.

void EDMA_GetDefaultConfig(edma_config_t *config)

Gets the eDMA default configuration structure.

This function sets the configuration structure to default values. The default configuration is set to the following values.

config.enableContinuousLinkMode = false;
config.enableHaltOnError = true;
config.enableRoundRobinArbitration = false;
config.enableDebugMode = false;

Parameters:

config – A pointer to the eDMA configuration structure.

void EDMA_InitChannel(EDMA_Type *base, uint32_t channel, edma_channel_config_t *channelConfig)

EDMA Channel initialization.

Parameters:

base – eDMA4 peripheral base address.
channel – eDMA4 channel number.
channelConfig – pointer to user’s eDMA4 channel config structure, see edma_channel_config_t for detail.

static inline void EDMA_SetChannelMemoryAttribute(EDMA_Type *base, uint32_t channel, edma_channel_memory_attribute_t writeAttribute, edma_channel_memory_attribute_t readAttribute)

Set channel memory attribute.

Parameters:

base – eDMA4 peripheral base address.
channel – eDMA4 channel number.
writeAttribute – Attributes associated with a write transaction.
readAttribute – Attributes associated with a read transaction.

static inline void EDMA_SetChannelSignExtension(EDMA_Type *base, uint32_t channel, uint8_t position)

Set channel sign extension.

Parameters:

base – eDMA4 peripheral base address.
channel – eDMA4 channel number.
position – A non-zero value specifing the sign extend bit position. If 0, sign extension is disabled.

static inline void EDMA_SetChannelSwapSize(EDMA_Type *base, uint32_t channel, edma_channel_swap_size_t swapSize)

Set channel swap size.

Parameters:

base – eDMA4 peripheral base address.
channel – eDMA4 channel number.
swapSize – Swap occurs with respect to the specified transfer size. If 0, swap is disabled.

static inline void EDMA_SetChannelAccessType(EDMA_Type *base, uint32_t channel, edma_channel_access_type_t channelAccessType)

Set channel access type.

Parameters:

base – eDMA4 peripheral base address.
channel – eDMA4 channel number.
channelAccessType – eDMA4’s transactions type on the system bus when the channel is active.

static inline void EDMA_SetChannelMux(EDMA_Type *base, uint32_t channel, uint32_t channelRequestSource)

Set channel request source.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
channelRequestSource – eDMA hardware service request source for the channel. User need to use the dma_request_source_t type as the input parameter. Note that devices may use other enum type to express dma request source and User can fined it in SOC header or fsl_edma_soc.h.

static inline uint32_t EDMA_GetChannelSystemBusInformation(EDMA_Type *base, uint32_t channel)

Gets the channel identification and attribute information on the system bus interface.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of the channel system bus information. Users need to use the _edma_channel_sys_bus_info type to decode the return variables.

static inline void EDMA_EnableChannelMasterIDReplication(EDMA_Type *base, uint32_t channel, bool enable)

Set channel master ID replication.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – true is enable, false is disable.

static inline void EDMA_SetChannelProtectionLevel(EDMA_Type *base, uint32_t channel, edma_channel_protection_level_t level)

Set channel security level.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
level – security level.

void EDMA_ResetChannel(EDMA_Type *base, uint32_t channel)

Sets all TCD registers to default values.

This function sets TCD registers for this channel to default values.

Note

This function must not be called while the channel transfer is ongoing or it causes unpredictable results.

Note

This function enables the auto stop request feature.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_SetTransferConfig(EDMA_Type *base, uint32_t channel, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA transfer attribute.

This function configures the transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the TCD address. Example:

edma_transfer_t config;
edma_tcd_t tcd;
config.srcAddr = ..;
config.destAddr = ..;
...
EDMA_SetTransferConfig(DMA0, channel, &config, &stcd);

Note

If nextTcd is not NULL, it means scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the eDMA_ResetChannel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Point to TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_SetMinorOffsetConfig(EDMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config)

Configures the eDMA minor offset feature.

The minor offset means that the signed-extended value is added to the source address or destination address after each minor loop.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – A pointer to the minor offset configuration structure.

void EDMA_SetChannelPreemptionConfig(EDMA_Type *base, uint32_t channel, const edma_channel_Preemption_config_t *config)

Configures the eDMA channel preemption feature.

This function configures the channel preemption attribute and the priority of the channel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number
config – A pointer to the channel preemption configuration structure.

void EDMA_SetChannelLink(EDMA_Type *base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA transfer.

This function configures either the minor link or the major link mode. The minor link means that the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
type – A channel link type, which can be one of the following:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

void EDMA_SetBandWidth(EDMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA transfer.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_SetModulo(EDMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA transfer.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_EnableAsyncRequest(EDMA_Type *base, uint32_t channel, bool enable)

Enables an async request for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

static inline void EDMA_EnableAutoStopRequest(EDMA_Type *base, uint32_t channel, bool enable)

Enables an auto stop request for the eDMA transfer.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

void EDMA_EnableChannelInterrupts(EDMA_Type *base, uint32_t channel, uint32_t mask)

Enables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_DisableChannelInterrupts(EDMA_Type *base, uint32_t channel, uint32_t mask)

Disables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of the interrupt source to be set. Use the defined edma_interrupt_enable_t type.

void EDMA_SetMajorOffsetConfig(EDMA_Type *base, uint32_t channel, int32_t sourceOffset, int32_t destOffset)

Configures the eDMA channel TCD major offset feature.

Adjustment value added to the source address at the completion of the major iteration count

Parameters:

base – eDMA peripheral base address.
channel – edma channel number.
sourceOffset – source address offset will be applied to source address after major loop done.
destOffset – destination address offset will be applied to source address after major loop done.

void EDMA_ConfigChannelSoftwareTCD(edma_tcd_t *tcd, const edma_transfer_config_t *transfer)

Sets TCD fields according to the user’s channel transfer configuration structure, edma_transfer_config_t.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_ConfigChannelSoftwareTCDExt

Application should be careful about the TCD pool buffer storage class,

For the platform has cache, the software TCD should be put in non cache section
The TCD pool buffer should have a consistent storage class.

Note

This function enables the auto stop request feature.

Parameters:

tcd – Pointer to the TCD structure.
transfer – channel transfer configuration pointer.

void EDMA_TcdReset(edma_tcd_t *tcd)

Sets all fields to default values for the TCD structure.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdResetExt

This function sets all fields for this TCD structure to default value.

Note

This function enables the auto stop request feature.

Parameters:

tcd – Pointer to the TCD structure.

void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA TCD transfer attribute.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdSetTransferConfigExt

The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers. The TCD is used in the scatter-gather mode. This function configures the TCD transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the next TCD address. Example:

edma_transfer_t config = {
...
}
edma_tcd_t tcd __aligned(32);
edma_tcd_t nextTcd __aligned(32);
EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);

Note

TCD address should be 32 bytes aligned or it causes an eDMA error.

Note

If the nextTcd is not NULL, the scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the EDMA_TcdReset.

Parameters:

tcd – Pointer to the TCD structure.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Pointer to the next TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config)

Configures the eDMA TCD minor offset feature.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdSetMinorOffsetConfigExt

A minor offset is a signed-extended value added to the source address or a destination address after each minor loop.

Parameters:

tcd – A point to the TCD structure.
config – A pointer to the minor offset configuration structure.

void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA TCD.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdSetChannelLinkExt

This function configures either a minor link or a major link. The minor link means the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

tcd – Point to the TCD structure.
type – Channel link type, it can be one of:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

static inline void EDMA_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA TCD.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdSetBandWidthExt

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

tcd – A pointer to the TCD structure.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA TCD.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdSetModuloExt

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

tcd – A pointer to the TCD structure.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)

Sets the auto stop request for the eDMA TCD.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdEnableAutoStopRequestExt

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

tcd – A pointer to the TCD structure.
enable – The command to enable (true) or disable (false).

void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Enables the interrupt source for the eDMA TCD.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdEnableInterruptsExt

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Disables the interrupt source for the eDMA TCD.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdDisableInterruptsExt

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdSetMajorOffsetConfig(edma_tcd_t *tcd, int32_t sourceOffset, int32_t destOffset)

Configures the eDMA TCD major offset feature.

@Note This API only supports EDMA4 TCD type. It can be used to support all types with extension API EDMA_TcdSetMajorOffsetConfigExt

Adjustment value added to the source address at the completion of the major iteration count

Parameters:

tcd – A point to the TCD structure.
sourceOffset – source address offset wiil be applied to source address after major loop done.
destOffset – destination address offset will be applied to source address after major loop done.

void EDMA_ConfigChannelSoftwareTCDExt(EDMA_Type *base, edma_tcd_t *tcd, const edma_transfer_config_t *transfer)

Sets TCD fields according to the user’s channel transfer configuration structure, edma_transfer_config_t.

Application should be careful about the TCD pool buffer storage class,

For the platform has cache, the software TCD should be put in non cache section
The TCD pool buffer should have a consistent storage class.

Note

This function enables the auto stop request feature.

Parameters:

base – eDMA peripheral base address.
tcd – Pointer to the TCD structure.
transfer – channel transfer configuration pointer.

void EDMA_TcdResetExt(EDMA_Type *base, edma_tcd_t *tcd)

Sets all fields to default values for the TCD structure.

This function sets all fields for this TCD structure to default value.

Note

This function enables the auto stop request feature.

Parameters:

base – eDMA peripheral base address.
tcd – Pointer to the TCD structure.

void EDMA_TcdSetTransferConfigExt(EDMA_Type *base, edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA TCD transfer attribute.

The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers. The TCD is used in the scatter-gather mode. This function configures the TCD transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the next TCD address. Example:

edma_transfer_t config = {
...
}
edma_tcd_t tcd __aligned(32);
edma_tcd_t nextTcd __aligned(32);
EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);

Note

TCD address should be 32 bytes aligned or it causes an eDMA error.

Note

If the nextTcd is not NULL, the scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the EDMA_TcdReset.

Parameters:

base – eDMA peripheral base address.
tcd – Pointer to the TCD structure.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Pointer to the next TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_TcdSetMinorOffsetConfigExt(EDMA_Type *base, edma_tcd_t *tcd, const edma_minor_offset_config_t *config)

Configures the eDMA TCD minor offset feature.

A minor offset is a signed-extended value added to the source address or a destination address after each minor loop.

Parameters:

base – eDMA peripheral base address.
tcd – A point to the TCD structure.
config – A pointer to the minor offset configuration structure.

void EDMA_TcdSetChannelLinkExt(EDMA_Type *base, edma_tcd_t *tcd, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA TCD.

This function configures either a minor link or a major link. The minor link means the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

base – eDMA peripheral base address.
tcd – Point to the TCD structure.
type – Channel link type, it can be one of:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

static inline void EDMA_TcdSetBandWidthExt(EDMA_Type *base, edma_tcd_t *tcd, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA TCD.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

base – eDMA peripheral base address.
tcd – A pointer to the TCD structure.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_TcdSetModuloExt(EDMA_Type *base, edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA TCD.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

base – eDMA peripheral base address.
tcd – A pointer to the TCD structure.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_TcdEnableAutoStopRequestExt(EDMA_Type *base, edma_tcd_t *tcd, bool enable)

Sets the auto stop request for the eDMA TCD.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
tcd – A pointer to the TCD structure.
enable – The command to enable (true) or disable (false).

void EDMA_TcdEnableInterruptsExt(EDMA_Type *base, edma_tcd_t *tcd, uint32_t mask)

Enables the interrupt source for the eDMA TCD.

Parameters:

base – eDMA peripheral base address.
tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdDisableInterruptsExt(EDMA_Type *base, edma_tcd_t *tcd, uint32_t mask)

Disables the interrupt source for the eDMA TCD.

Parameters:

base – eDMA peripheral base address.
tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdSetMajorOffsetConfigExt(EDMA_Type *base, edma_tcd_t *tcd, int32_t sourceOffset, int32_t destOffset)

Configures the eDMA TCD major offset feature.

Adjustment value added to the source address at the completion of the major iteration count

Parameters:

base – eDMA peripheral base address.
tcd – A point to the TCD structure.
sourceOffset – source address offset wiil be applied to source address after major loop done.
destOffset – destination address offset will be applied to source address after major loop done.

static inline void EDMA_EnableChannelRequest(EDMA_Type *base, uint32_t channel)

Enables the eDMA hardware channel request.

This function enables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_DisableChannelRequest(EDMA_Type *base, uint32_t channel)

Disables the eDMA hardware channel request.

This function disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_TriggerChannelStart(EDMA_Type *base, uint32_t channel)

Starts the eDMA transfer by using the software trigger.

This function starts a minor loop transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

uint32_t EDMA_GetRemainingMajorLoopCount(EDMA_Type *base, uint32_t channel)

Gets the remaining major loop count from the eDMA current channel TCD.

This function checks the TCD (Task Control Descriptor) status for a specified eDMA channel and returns the number of major loop count that has not finished.

Note

1. This function can only be used to get unfinished major loop count of transfer without the next TCD, or it might be inaccuracy.

The unfinished/remaining transfer bytes cannot be obtained directly from registers while the channel is running. Because to calculate the remaining bytes, the initial NBYTES configured in DMA_TCDn_NBYTES_MLNO register is needed while the eDMA IP does not support getting it while a channel is active. In another word, the NBYTES value reading is always the actual (decrementing) NBYTES value the dma_engine is working with while a channel is running. Consequently, to get the remaining transfer bytes, a software-saved initial value of NBYTES (for example copied before enabling the channel) is needed. The formula to calculate it is shown below: RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

Major loop count which has not been transferred yet for the current TCD.

static inline uint32_t EDMA_GetErrorStatusFlags(EDMA_Type *base)

Gets the eDMA channel error status flags.

Parameters:

base – eDMA peripheral base address.

Returns:

The mask of error status flags. Users need to use the _edma_error_status_flags type to decode the return variables.

uint32_t EDMA_GetChannelStatusFlags(EDMA_Type *base, uint32_t channel)

Gets the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of channel status flags. Users need to use the _edma_channel_status_flags type to decode the return variables.

void EDMA_ClearChannelStatusFlags(EDMA_Type *base, uint32_t channel, uint32_t mask)

Clears the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of channel status to be cleared. Users need to use the defined _edma_channel_status_flags type.

void EDMA_CreateHandle(edma_handle_t *handle, EDMA_Type *base, uint32_t channel)

Creates the eDMA handle.

This function is called if using the transactional API for eDMA. This function initializes the internal state of the eDMA handle.

Parameters:

handle – eDMA handle pointer. The eDMA handle stores callback function and parameters.
base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize)

Installs the TCDs memory pool into the eDMA handle.

This function is called after the EDMA_CreateHandle to use scatter/gather feature. This function shall only be used while users need to use scatter gather mode. Scatter gather mode enables EDMA to load a new transfer control block (tcd) in hardware, and automatically reconfigure that DMA channel for a new transfer. Users need to prepare tcd memory and also configure tcds using interface EDMA_SubmitTransfer.

Parameters:

handle – eDMA handle pointer.
tcdPool – A memory pool to store TCDs. It must be 32 bytes aligned.
tcdSize – The number of TCD slots.

void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData)

Installs a callback function for the eDMA transfer.

This callback is called in the eDMA IRQ handler. Use the callback to do something after the current major loop transfer completes. This function will be called every time one tcd finished transfer.

Parameters:

handle – eDMA handle pointer.
callback – eDMA callback function pointer.
userData – A parameter for the callback function.

void EDMA_PrepareTransferConfig(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, int16_t srcOffset, void *destAddr, uint32_t destWidth, int16_t destOffset, uint32_t bytesEachRequest, uint32_t transferBytes)

Prepares the eDMA transfer structure configurations.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE). User can check if 128 bytes support is available for specific instance by FSL_FEATURE_EDMA_INSTANCE_SUPPORT_128_BYTES_TRANSFERn.

Parameters:

config – The user configuration structure of type edma_transfer_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
srcOffset – source address offset.
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
destOffset – destination address offset.
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.

void EDMA_PrepareTransfer(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, void *destAddr, uint32_t destWidth, uint32_t bytesEachRequest, uint32_t transferBytes, edma_transfer_type_t type)

Prepares the eDMA transfer structure.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.
type – eDMA transfer type.

void EDMA_PrepareTransferTCD(edma_handle_t *handle, edma_tcd_t *tcd, void *srcAddr, uint32_t srcWidth, int16_t srcOffset, void *destAddr, uint32_t destWidth, int16_t destOffset, uint32_t bytesEachRequest, uint32_t transferBytes, edma_tcd_t *nextTcd)

Prepares the eDMA transfer content descriptor.

This function prepares the transfer content descriptor structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

handle – eDMA handle pointer.
tcd – Pointer to eDMA transfer content descriptor structure.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
srcOffset – source address offset.
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
destOffset – destination address offset.
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.
nextTcd – eDMA transfer linked TCD address.

status_t EDMA_SubmitTransferTCD(edma_handle_t *handle, edma_tcd_t *tcd)

Submits the eDMA transfer content descriptor.

This function submits the eDMA transfer request according to the transfer content descriptor. In scatter gather mode, call this function will add a configured tcd to the circular list of tcd pool. The tcd pools is setup by call function EDMA_InstallTCDMemory before.

Typical user case:

submit single transfer

edma_tcd_t tcd;
EDMA_PrepareTransferTCD(handle, tcd, ....)
EDMA_SubmitTransferTCD(handle, tcd)
EDMA_StartTransfer(handle)

submit static link transfer,

edma_tcd_t tcd[2];
EDMA_PrepareTransferTCD(handle, &tcd[0], ....)
EDMA_PrepareTransferTCD(handle, &tcd[1], ....)
EDMA_SubmitTransferTCD(handle, &tcd[0])
EDMA_StartTransfer(handle)

submit dynamic link transfer

edma_tcd_t tcdpool[2];
EDMA_InstallTCDMemory(&g_DMA_Handle, tcdpool, 2);
edma_tcd_t tcd;
EDMA_PrepareTransferTCD(handle, tcd, ....)
EDMA_SubmitTransferTCD(handle, tcd)
EDMA_PrepareTransferTCD(handle, tcd, ....)
EDMA_SubmitTransferTCD(handle, tcd)
EDMA_StartTransfer(handle)

submit loop transfer

edma_tcd_t tcd[2];
EDMA_PrepareTransferTCD(handle, &tcd[0], ...,&tcd[1])
EDMA_PrepareTransferTCD(handle, &tcd[1], ..., &tcd[0])
EDMA_SubmitTransferTCD(handle, &tcd[0])
EDMA_StartTransfer(handle)

Parameters:

handle – eDMA handle pointer.
tcd – Pointer to eDMA transfer content descriptor structure.

Return values:

kStatus_EDMA_Success – It means submit transfer request succeed.
kStatus_EDMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_EDMA_Busy – It means the given channel is busy, need to submit request later.

status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config)

Submits the eDMA transfer request.

This function submits the eDMA transfer request according to the transfer configuration structure. In scatter gather mode, call this function will add a configured tcd to the circular list of tcd pool. The tcd pools is setup by call function EDMA_InstallTCDMemory before.

Parameters:

handle – eDMA handle pointer.
config – Pointer to eDMA transfer configuration structure.

Return values:

kStatus_EDMA_Success – It means submit transfer request succeed.
kStatus_EDMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_EDMA_Busy – It means the given channel is busy, need to submit request later.

status_t EDMA_SubmitLoopTransfer(edma_handle_t *handle, edma_transfer_config_t *transfer, uint32_t transferLoopCount)

Submits the eDMA scatter gather transfer configurations.

The function is target for submit loop transfer request, the ring transfer request means that the transfer request TAIL is link to HEAD, such as, A->B->C->D->A, or A->A

To use the ring transfer feature, the application should allocate several transfer object, such as

edma_channel_transfer_config_t transfer[2];
EDMA_TransferSubmitLoopTransfer(psHandle, &transfer, 2U);

Then eDMA driver will link transfer[0] and transfer[1] to each other

Note

Application should check the return value of this function to avoid transfer request submit failed

Parameters:

handle – eDMA handle pointer
transfer – pointer to user’s eDMA channel configure structure, see edma_channel_transfer_config_t for detail
transferLoopCount – the count of the transfer ring, if loop count is 1, that means that the one will link to itself.

Return values:

kStatus_Success – It means submit transfer request succeed
kStatus_EDMA_Busy – channel is in busy status
kStatus_InvalidArgument – Invalid Argument

void EDMA_StartTransfer(edma_handle_t *handle)

eDMA starts transfer.

This function enables the channel request. Users can call this function after submitting the transfer request or before submitting the transfer request.

Parameters:

handle – eDMA handle pointer.

void EDMA_StopTransfer(edma_handle_t *handle)

eDMA stops transfer.

This function disables the channel request to pause the transfer. Users can call EDMA_StartTransfer() again to resume the transfer.

Parameters:

handle – eDMA handle pointer.

void EDMA_AbortTransfer(edma_handle_t *handle)

eDMA aborts transfer.

This function disables the channel request and clear transfer status bits. Users can submit another transfer after calling this API.

Parameters:

handle – DMA handle pointer.

static inline uint32_t EDMA_GetUnusedTCDNumber(edma_handle_t *handle)

Get unused TCD slot number.

This function gets current tcd index which is run. If the TCD pool pointer is NULL, it will return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The unused tcd slot number.

static inline uint32_t EDMA_GetNextTCDAddress(edma_handle_t *handle)

Get the next tcd address.

This function gets the next tcd address. If this is last TCD, return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The next TCD address.

void EDMA_HandleIRQ(edma_handle_t *handle)

eDMA IRQ handler for the current major loop transfer completion.

This function clears the channel major interrupt flag and calls the callback function if it is not NULL.

Note: For the case using TCD queue, when the major iteration count is exhausted, additional operations are performed. These include the final address adjustments and reloading of the BITER field into the CITER. Assertion of an optional interrupt request also occurs at this time, as does a possible fetch of a new TCD from memory using the scatter/gather address pointer included in the descriptor (if scatter/gather is enabled).

For instance, when the time interrupt of TCD[0] happens, the TCD[1] has already been loaded into the eDMA engine. As sga and sga_index are calculated based on the DLAST_SGA bitfield lies in the TCD_CSR register, the sga_index in this case should be 2 (DLAST_SGA of TCD[1] stores the address of TCD[2]). Thus, the “tcdUsed” updated should be (tcdUsed - 2U) which indicates the number of TCDs can be loaded in the memory pool (because TCD[0] and TCD[1] have been loaded into the eDMA engine at this point already.).

For the last two continuous ISRs in a scatter/gather process, they both load the last TCD (The last ISR does not load a new TCD) from the memory pool to the eDMA engine when major loop completes. Therefore, ensure that the header and tcdUsed updated are identical for them. tcdUsed are both 0 in this case as no TCD to be loaded.

See the “eDMA basic data flow” in the eDMA Functional description section of the Reference Manual for further details.

Parameters:

handle – eDMA handle pointer.

FSL_EDMA_DRIVER_VERSION

eDMA driver version

Version 2.10.4.

_edma_transfer_status eDMA transfer status

Values:

enumerator kStatus_EDMA_QueueFull: TCD queue is full.

enumerator kStatus_EDMA_Busy: Channel is busy and can’t handle the transfer request.

enum _edma_transfer_size

eDMA transfer configuration

Values:

enumerator kEDMA_TransferSize1Bytes: Source/Destination data transfer size is 1 byte every time

enumerator kEDMA_TransferSize2Bytes: Source/Destination data transfer size is 2 bytes every time

enumerator kEDMA_TransferSize4Bytes: Source/Destination data transfer size is 4 bytes every time

enumerator kEDMA_TransferSize8Bytes: Source/Destination data transfer size is 8 bytes every time

enumerator kEDMA_TransferSize16Bytes: Source/Destination data transfer size is 16 bytes every time

enumerator kEDMA_TransferSize32Bytes: Source/Destination data transfer size is 32 bytes every time

enumerator kEDMA_TransferSize64Bytes: Source/Destination data transfer size is 64 bytes every time

enumerator kEDMA_TransferSize128Bytes: Source/Destination data transfer size is 128 bytes every time

enum _edma_modulo

eDMA modulo configuration

Values:

enumerator kEDMA_ModuloDisable: Disable modulo

enumerator kEDMA_Modulo2bytes: Circular buffer size is 2 bytes.

enumerator kEDMA_Modulo4bytes: Circular buffer size is 4 bytes.

enumerator kEDMA_Modulo8bytes: Circular buffer size is 8 bytes.

enumerator kEDMA_Modulo16bytes: Circular buffer size is 16 bytes.

enumerator kEDMA_Modulo32bytes: Circular buffer size is 32 bytes.

enumerator kEDMA_Modulo64bytes: Circular buffer size is 64 bytes.

enumerator kEDMA_Modulo128bytes: Circular buffer size is 128 bytes.

enumerator kEDMA_Modulo256bytes: Circular buffer size is 256 bytes.

enumerator kEDMA_Modulo512bytes: Circular buffer size is 512 bytes.

enumerator kEDMA_Modulo1Kbytes: Circular buffer size is 1 K bytes.

enumerator kEDMA_Modulo2Kbytes: Circular buffer size is 2 K bytes.

enumerator kEDMA_Modulo4Kbytes: Circular buffer size is 4 K bytes.

enumerator kEDMA_Modulo8Kbytes: Circular buffer size is 8 K bytes.

enumerator kEDMA_Modulo16Kbytes: Circular buffer size is 16 K bytes.

enumerator kEDMA_Modulo32Kbytes: Circular buffer size is 32 K bytes.

enumerator kEDMA_Modulo64Kbytes: Circular buffer size is 64 K bytes.

enumerator kEDMA_Modulo128Kbytes: Circular buffer size is 128 K bytes.

enumerator kEDMA_Modulo256Kbytes: Circular buffer size is 256 K bytes.

enumerator kEDMA_Modulo512Kbytes: Circular buffer size is 512 K bytes.

enumerator kEDMA_Modulo1Mbytes: Circular buffer size is 1 M bytes.

enumerator kEDMA_Modulo2Mbytes: Circular buffer size is 2 M bytes.

enumerator kEDMA_Modulo4Mbytes: Circular buffer size is 4 M bytes.

enumerator kEDMA_Modulo8Mbytes: Circular buffer size is 8 M bytes.

enumerator kEDMA_Modulo16Mbytes: Circular buffer size is 16 M bytes.

enumerator kEDMA_Modulo32Mbytes: Circular buffer size is 32 M bytes.

enumerator kEDMA_Modulo64Mbytes: Circular buffer size is 64 M bytes.

enumerator kEDMA_Modulo128Mbytes: Circular buffer size is 128 M bytes.

enumerator kEDMA_Modulo256Mbytes: Circular buffer size is 256 M bytes.

enumerator kEDMA_Modulo512Mbytes: Circular buffer size is 512 M bytes.

enumerator kEDMA_Modulo1Gbytes: Circular buffer size is 1 G bytes.

enumerator kEDMA_Modulo2Gbytes: Circular buffer size is 2 G bytes.

enum _edma_bandwidth

Bandwidth control.

Values:

enumerator kEDMA_BandwidthStallNone: No eDMA engine stalls.

enumerator kEDMA_BandwidthStall4Cycle: eDMA engine stalls for 4 cycles after each read/write.

enumerator kEDMA_BandwidthStall8Cycle: eDMA engine stalls for 8 cycles after each read/write.

enum _edma_channel_link_type

Channel link type.

Values:

enumerator kEDMA_LinkNone: No channel link

enumerator kEDMA_MinorLink: Channel link after each minor loop

enumerator kEDMA_MajorLink: Channel link while major loop count exhausted

_edma_channel_status_flags eDMA channel status flags.

Values:

enumerator kEDMA_DoneFlag: DONE flag, set while transfer finished, CITER value exhausted

enumerator kEDMA_ErrorFlag: eDMA error flag, an error occurred in a transfer

enumerator kEDMA_InterruptFlag: eDMA interrupt flag, set while an interrupt occurred of this channel

_edma_error_status_flags eDMA channel error status flags.

Values:

enumerator kEDMA_DestinationBusErrorFlag: Bus error on destination address

enumerator kEDMA_SourceBusErrorFlag: Bus error on the source address

enumerator kEDMA_ScatterGatherErrorFlag: Error on the Scatter/Gather address, not 32byte aligned.

enumerator kEDMA_NbytesErrorFlag: NBYTES/CITER configuration error

enumerator kEDMA_DestinationOffsetErrorFlag: Destination offset not aligned with destination size

enumerator kEDMA_DestinationAddressErrorFlag: Destination address not aligned with destination size

enumerator kEDMA_SourceOffsetErrorFlag: Source offset not aligned with source size

enumerator kEDMA_SourceAddressErrorFlag: Source address not aligned with source size

enumerator kEDMA_ErrorChannelFlag: Error channel number of the cancelled channel number

enumerator kEDMA_TransferCanceledFlag: Transfer cancelled

enumerator kEDMA_ValidFlag: No error occurred, this bit is 0. Otherwise, it is 1.

_edma_interrupt_enable eDMA interrupt source

Values:

enumerator kEDMA_ErrorInterruptEnable: Enable interrupt while channel error occurs.

enumerator kEDMA_MajorInterruptEnable: Enable interrupt while major count exhausted.

enumerator kEDMA_HalfInterruptEnable: Enable interrupt while major count to half value.

enum _edma_transfer_type

eDMA transfer type

Values:

enumerator kEDMA_MemoryToMemory: Transfer from memory to memory

enumerator kEDMA_PeripheralToMemory: Transfer from peripheral to memory

enumerator kEDMA_MemoryToPeripheral: Transfer from memory to peripheral

enumerator kEDMA_PeripheralToPeripheral: Transfer from Peripheral to peripheral

enum edma_channel_memory_attribute

eDMA channel memory attribute

Values:

enumerator kEDMA_ChannelNoWriteNoReadNoCacheNoBuffer: No write allocate, no read allocate, non-cacheable, non-bufferable.

enumerator kEDMA_ChannelNoWriteNoReadNoCacheBufferable: No write allocate, no read allocate, non-cacheable, bufferable.

enumerator kEDMA_ChannelNoWriteNoReadCacheableNoBuffer: No write allocate, no read allocate, cacheable, non-bufferable.

enumerator kEDMA_ChannelNoWriteNoReadCacheableBufferable: No write allocate, no read allocate, cacheable, bufferable.

enumerator kEDMA_ChannelNoWriteReadNoCacheNoBuffer: No write allocate, read allocate, non-cacheable, non-bufferable.

enumerator kEDMA_ChannelNoWriteReadNoCacheBufferable: No write allocate, read allocate, non-cacheable, bufferable.

enumerator kEDMA_ChannelNoWriteReadCacheableNoBuffer: No write allocate, read allocate, cacheable, non-bufferable.

enumerator kEDMA_ChannelNoWriteReadCacheableBufferable: No write allocate, read allocate, cacheable, bufferable.

enumerator kEDMA_ChannelWriteNoReadNoCacheNoBuffer: write allocate, no read allocate, non-cacheable, non-bufferable.

enumerator kEDMA_ChannelWriteNoReadNoCacheBufferable: write allocate, no read allocate, non-cacheable, bufferable.

enumerator kEDMA_ChannelWriteNoReadCacheableNoBuffer: write allocate, no read allocate, cacheable, non-bufferable.

enumerator kEDMA_ChannelWriteNoReadCacheableBufferable: write allocate, no read allocate, cacheable, bufferable.

enumerator kEDMA_ChannelWriteReadNoCacheNoBuffer: write allocate, read allocate, non-cacheable, non-bufferable.

enumerator kEDMA_ChannelWriteReadNoCacheBufferable: write allocate, read allocate, non-cacheable, bufferable.

enumerator kEDMA_ChannelWriteReadCacheableNoBuffer: write allocate, read allocate, cacheable, non-bufferable.

enumerator kEDMA_ChannelWriteReadCacheableBufferable: write allocate, read allocate, cacheable, bufferable.

enum _edma_channel_swap_size

eDMA4 channel swap size

Values:

enumerator kEDMA_ChannelSwapDisabled: Swap is disabled.

enumerator kEDMA_ChannelReadWith8bitSwap: Swap occurs with respect to the read 8bit.

enumerator kEDMA_ChannelReadWith16bitSwap: Swap occurs with respect to the read 16bit.

enumerator kEDMA_ChannelReadWith32bitSwap: Swap occurs with respect to the read 32bit.

enumerator kEDMA_ChannelWriteWith8bitSwap: Swap occurs with respect to the write 8bit.

enumerator kEDMA_ChannelWriteWith16bitSwap: Swap occurs with respect to the write 16bit.

enumerator kEDMA_ChannelWriteWith32bitSwap: Swap occurs with respect to the write 32bit.

eDMA channel system bus information, _edma_channel_sys_bus_info

Values:

enumerator kEDMA_PrivilegedAccessLevel: Privileged Access Level for DMA transfers. 0b - User protection level; 1b - Privileged protection level.

enumerator kEDMA_MasterId: DMA’s master ID when channel is active and master ID replication is enabled.

enum _edma_channel_access_type

eDMA4 channel access type

Values:

enumerator kEDMA_ChannelDataAccess: Data access for eDMA4 transfers.

enumerator kEDMA_ChannelInstructionAccess: Instruction access for eDMA4 transfers.

enum _edma_channel_protection_level

eDMA4 channel protection level

Values:

enumerator kEDMA_ChannelProtectionLevelUser: user protection level for eDMA transfers.

enumerator kEDMA_ChannelProtectionLevelPrivileged: Privileged protection level eDMA transfers.

typedef enum _edma_transfer_size edma_transfer_size_t: eDMA transfer configuration

typedef enum _edma_modulo edma_modulo_t: eDMA modulo configuration

typedef enum _edma_bandwidth edma_bandwidth_t: Bandwidth control.

typedef enum _edma_channel_link_type edma_channel_link_type_t: Channel link type.

typedef enum _edma_transfer_type edma_transfer_type_t: eDMA transfer type

typedef struct _edma_channel_Preemption_config edma_channel_Preemption_config_t: eDMA channel priority configuration

typedef struct _edma_minor_offset_config edma_minor_offset_config_t: eDMA minor offset configuration

typedef enum edma_channel_memory_attribute edma_channel_memory_attribute_t: eDMA channel memory attribute

typedef enum _edma_channel_swap_size edma_channel_swap_size_t: eDMA4 channel swap size

typedef enum _edma_channel_access_type edma_channel_access_type_t: eDMA4 channel access type

typedef enum _edma_channel_protection_level edma_channel_protection_level_t: eDMA4 channel protection level

typedef struct _edma_channel_config edma_channel_config_t: eDMA4 channel configuration

typedef edma_core_tcd_t edma_tcd_t

eDMA TCD.

This structure is same as TCD register which is described in reference manual, and is used to configure the scatter/gather feature as a next hardware TCD.

typedef struct _edma_transfer_config edma_transfer_config_t

edma4 channel transfer configuration

The transfer configuration structure support full feature configuration of the transfer control descriptor.

1.To perform a simple transfer, below members should be initialized at least .srcAddr - source address .dstAddr - destination address .srcWidthOfEachTransfer - data width of source address .dstWidthOfEachTransfer - data width of destination address, normally it should be as same as srcWidthOfEachTransfer .bytesEachRequest - bytes to be transferred in each DMA request .totalBytes - total bytes to be transferred .srcOffsetOfEachTransfer - offset value in bytes unit to be applied to source address as each source read is completed .dstOffsetOfEachTransfer - offset value in bytes unit to be applied to destination address as each destination write is completed enablchannelRequest - channel request can be enabled together with transfer configure submission

2.The transfer configuration structure also support advance feature: Programmable source/destination address range(MODULO) Programmable minor loop offset Programmable major loop offset Programmable channel chain feature Programmable channel transfer control descriptor link feature

Note

User should pay attention to the transfer size alignment limitation

the bytesEachRequest should align with the srcWidthOfEachTransfer and the dstWidthOfEachTransfer that is to say bytesEachRequest % srcWidthOfEachTransfer should be 0
the srcOffsetOfEachTransfer and dstOffsetOfEachTransfer must be aligne with transfer width
the totalBytes should align with the bytesEachRequest
the srcAddr should align with the srcWidthOfEachTransfer
the dstAddr should align with the dstWidthOfEachTransfer
the srcAddr should align with srcAddrModulo if modulo feature is enabled
the dstAddr should align with dstAddrModulo if modulo feature is enabled If anyone of above condition can not be satisfied, the edma4 interfaces will generate assert error.

typedef struct _edma_config edma_config_t: eDMA global configuration structure.

typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds)

Define callback function for eDMA.

This callback function is called in the EDMA interrupt handle. In normal mode, run into callback function means the transfer users need is done. In scatter gather mode, run into callback function means a transfer control block (tcd) is finished. Not all transfer finished, users can get the finished tcd numbers using interface EDMA_GetUnusedTCDNumber.

Param handle:: EDMA handle pointer, users shall not touch the values inside.
Param userData:: The callback user parameter pointer. Users can use this parameter to involve things users need to change in EDMA callback function.
Param transferDone:: If the current loaded transfer done. In normal mode it means if all transfer done. In scatter gather mode, this parameter shows is the current transfer block in EDMA register is done. As the load of core is different, it will be different if the new tcd loaded into EDMA registers while this callback called. If true, it always means new tcd still not loaded into registers, while false means new tcd already loaded into registers.
Param tcds:: How many tcds are done from the last callback. This parameter only used in scatter gather mode. It tells user how many tcds are finished between the last callback and this.

typedef struct _edma_handle edma_handle_t: eDMA transfer handle structure

FSL_EDMA_DRIVER_EDMA4: eDMA driver name

EDMA_ALLOCATE_TCD(name, number): Macro used for allocate edma TCD.

DMA_DCHPRI_INDEX(channel): Compute the offset unit from DCHPRI3.

struct _edma_channel_Preemption_config

#include <fsl_edma.h>

eDMA channel priority configuration

Public Members

bool enableChannelPreemption: If true: a channel can be suspended by other channel with higher priority

bool enablePreemptAbility: If true: a channel can suspend other channel with low priority

uint8_t channelPriority: Channel priority

struct _edma_minor_offset_config

#include <fsl_edma.h>

eDMA minor offset configuration

Public Members

bool enableSrcMinorOffset: Enable(true) or Disable(false) source minor loop offset.

bool enableDestMinorOffset: Enable(true) or Disable(false) destination minor loop offset.

uint32_t minorOffset: Offset for a minor loop mapping.

struct _edma_channel_config

#include <fsl_edma.h>

eDMA4 channel configuration

Public Members

edma_channel_Preemption_config_t channelPreemptionConfig: channel preemption configuration

edma_channel_memory_attribute_t channelReadMemoryAttribute: channel memory read attribute configuration

edma_channel_memory_attribute_t channelWriteMemoryAttribute: channel memory write attribute configuration

edma_channel_swap_size_t channelSwapSize: channel swap size configuration

edma_channel_access_type_t channelAccessType: channel access type configuration

uint8_t channelDataSignExtensionBitPosition: channel data sign extension bit psition configuration

uint32_t channelRequestSource: hardware service request source for the channel

bool enableMasterIDReplication: enable master ID replication

edma_channel_protection_level_t protectionLevel: protection level

struct _edma_transfer_config

#include <fsl_edma.h>

edma4 channel transfer configuration

The transfer configuration structure support full feature configuration of the transfer control descriptor.

1.To perform a simple transfer, below members should be initialized at least .srcAddr - source address .dstAddr - destination address .srcWidthOfEachTransfer - data width of source address .dstWidthOfEachTransfer - data width of destination address, normally it should be as same as srcWidthOfEachTransfer .bytesEachRequest - bytes to be transferred in each DMA request .totalBytes - total bytes to be transferred .srcOffsetOfEachTransfer - offset value in bytes unit to be applied to source address as each source read is completed .dstOffsetOfEachTransfer - offset value in bytes unit to be applied to destination address as each destination write is completed enablchannelRequest - channel request can be enabled together with transfer configure submission

2.The transfer configuration structure also support advance feature: Programmable source/destination address range(MODULO) Programmable minor loop offset Programmable major loop offset Programmable channel chain feature Programmable channel transfer control descriptor link feature

Note

User should pay attention to the transfer size alignment limitation

the bytesEachRequest should align with the srcWidthOfEachTransfer and the dstWidthOfEachTransfer that is to say bytesEachRequest % srcWidthOfEachTransfer should be 0
the srcOffsetOfEachTransfer and dstOffsetOfEachTransfer must be aligne with transfer width
the totalBytes should align with the bytesEachRequest
the srcAddr should align with the srcWidthOfEachTransfer
the dstAddr should align with the dstWidthOfEachTransfer
the srcAddr should align with srcAddrModulo if modulo feature is enabled
the dstAddr should align with dstAddrModulo if modulo feature is enabled If anyone of above condition can not be satisfied, the edma4 interfaces will generate assert error.

Public Members

uint32_t srcAddr: Source data address.

uint32_t destAddr: Destination data address.

edma_transfer_size_t srcTransferSize: Source data transfer size.

edma_transfer_size_t destTransferSize: Destination data transfer size.

int16_t srcOffset: Sign-extended offset value in byte unit applied to the current source address to form the next-state value as each source read is completed

int16_t destOffset: Sign-extended offset value in byte unit applied to the current destination address to form the next-state value as each destination write is completed.

uint32_t minorLoopBytes: bytes in each minor loop or each request range: 1 - (2^30 -1) when minor loop mapping is enabled range: 1 - (2^10 - 1) when minor loop mapping is enabled and source or dest minor loop offset is enabled range: 1 - (2^32 - 1) when minor loop mapping is disabled

uint32_t majorLoopCounts: minor loop counts in each major loop, should be 1 at least for each transfer range: (0 - (2^15 - 1)) when minor loop channel link is disabled range: (0 - (2^9 - 1)) when minor loop channel link is enabled total bytes in a transfer = minorLoopCountsEachMajorLoop * bytesEachMinorLoop

uint16_t enabledInterruptMask: channel interrupt to enable, can be OR’ed value of _edma_interrupt_enable

edma_modulo_t srcAddrModulo: source circular data queue range

int32_t srcMajorLoopOffset: source major loop offset

edma_modulo_t dstAddrModulo: destination circular data queue range

int32_t dstMajorLoopOffset: destination major loop offset

bool enableSrcMinorLoopOffset: enable source minor loop offset

bool enableDstMinorLoopOffset: enable dest minor loop offset

int32_t minorLoopOffset: burst offset, the offset will be applied after minor loop update

bool enableChannelMajorLoopLink: channel link when major loop complete

uint32_t majorLoopLinkChannel: major loop link channel number

bool enableChannelMinorLoopLink: channel link when minor loop complete

uint32_t minorLoopLinkChannel: minor loop link channel number

edma_tcd_t *linkTCD: pointer to the link transfer control descriptor

struct _edma_config

#include <fsl_edma.h>

eDMA global configuration structure.

Public Members

bool enableMasterIdReplication: Enable (true) master ID replication. If Master ID replication is disabled, the privileged protection level (supervisor mode) for eDMA4 transfers is used.

bool enableGlobalChannelLink: Enable(true) channel linking is available and controlled by each channel’s link settings.

bool enableHaltOnError: Enable (true) transfer halt on error. Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared.

bool enableDebugMode: Enable(true) eDMA4 debug mode. When in debug mode, the eDMA4 stalls the start of a new channel. Executing channels are allowed to complete.

bool enableRoundRobinArbitration: Enable(true) channel linking is available and controlled by each channel’s link settings.

edma_channel_config_t *channelConfig[1]: channel preemption configuration

struct _edma_handle

#include <fsl_edma.h>

eDMA transfer handle structure

Public Members

edma_callback callback: Callback function for major count exhausted.

void *userData: Callback function parameter.

EDMA_ChannelType *channelBase: eDMA peripheral channel base address.

EDMA_Type *base: eDMA peripheral base address

EDMA_TCDType *tcdBase: eDMA peripheral tcd base address.

edma_tcd_t *tcdPool: Pointer to memory stored TCDs.

uint32_t channel: eDMA channel number.

volatile int8_t header: The first TCD index. Should point to the next TCD to be loaded into the eDMA engine.

volatile int8_t tail: The last TCD index. Should point to the next TCD to be stored into the memory pool.

volatile int8_t tcdUsed: The number of used TCD slots. Should reflect the number of TCDs can be used/loaded in the memory.

volatile int8_t tcdSize: The total number of TCD slots in the queue.

eDMA core Driver

enum _edma_tcd_type

eDMA tcd flag type

Values:

enumerator kEDMA_EDMA4Flag: Data access for eDMA4 transfers.

enumerator kEDMA_EDMA5Flag: Instruction access for eDMA4 transfers.

typedef struct _edma_core_mp edma_core_mp_t: edma core channel struture definition

typedef struct _edma_core_channel edma_core_channel_t: edma core channel struture definition

typedef enum _edma_tcd_type edma_tcd_type_t: eDMA tcd flag type

typedef struct _edma5_core_tcd edma5_core_tcd_t: edma5 core TCD struture definition

typedef struct _edma4_core_tcd edma4_core_tcd_t: edma4 core TCD struture definition

typedef struct _edma_core_tcd edma_core_tcd_t: edma core TCD struture definition

typedef edma_core_channel_t EDMA_ChannelType: EDMA typedef.

typedef edma_core_tcd_t EDMA_TCDType

typedef void EDMA_Type

DMA_CORE_MP_CSR_EDBG_MASK

DMA_CORE_MP_CSR_ERCA_MASK

DMA_CORE_MP_CSR_HAE_MASK

DMA_CORE_MP_CSR_HALT_MASK

DMA_CORE_MP_CSR_GCLC_MASK

DMA_CORE_MP_CSR_GMRC_MASK

DMA_CORE_MP_CSR_EDBG(x)

DMA_CORE_MP_CSR_ERCA(x)

DMA_CORE_MP_CSR_HAE(x)

DMA_CORE_MP_CSR_HALT(x)

DMA_CORE_MP_CSR_GCLC(x)

DMA_CORE_MP_CSR_GMRC(x)

DMA_CSR_INTMAJOR_MASK

DMA_CSR_INTHALF_MASK

DMA_CSR_DREQ_MASK

DMA_CSR_ESG_MASK

DMA_CSR_BWC_MASK

DMA_CSR_BWC(x)

DMA_CSR_START_MASK

DMA_CITER_ELINKNO_CITER_MASK

DMA_BITER_ELINKNO_BITER_MASK

DMA_CITER_ELINKNO_CITER_SHIFT

DMA_CITER_ELINKYES_CITER_MASK

DMA_CITER_ELINKYES_CITER_SHIFT

DMA_ATTR_SMOD_MASK

DMA_ATTR_DMOD_MASK

DMA_CITER_ELINKNO_ELINK_MASK

DMA_CSR_MAJORELINK_MASK

DMA_BITER_ELINKYES_ELINK_MASK

DMA_CITER_ELINKYES_ELINK_MASK

DMA_CSR_MAJORLINKCH_MASK

DMA_BITER_ELINKYES_LINKCH_MASK

DMA_CITER_ELINKYES_LINKCH_MASK

DMA_NBYTES_MLOFFYES_MLOFF_MASK

DMA_NBYTES_MLOFFYES_DMLOE_MASK

DMA_NBYTES_MLOFFYES_SMLOE_MASK

DMA_NBYTES_MLOFFNO_NBYTES_MASK

DMA_ATTR_DMOD(x)

DMA_ATTR_SMOD(x)

DMA_BITER_ELINKYES_LINKCH(x)

DMA_CITER_ELINKYES_LINKCH(x)

DMA_NBYTES_MLOFFYES_MLOFF(x)

DMA_NBYTES_MLOFFYES_DMLOE(x)

DMA_NBYTES_MLOFFYES_SMLOE(x)

DMA_NBYTES_MLOFFNO_NBYTES(x)

DMA_NBYTES_MLOFFYES_NBYTES(x)

DMA_ATTR_DSIZE(x)

DMA_ATTR_SSIZE(x)

DMA_CSR_DREQ(x)

DMA_CSR_MAJORLINKCH(x)

DMA_CH_MATTR_WCACHE(x)

DMA_CH_MATTR_RCACHE(x)

DMA_CH_CSR_SIGNEXT_MASK

DMA_CH_CSR_SIGNEXT_SHIFT

DMA_CH_CSR_SWAP_MASK

DMA_CH_CSR_SWAP_SHIFT

DMA_CH_SBR_INSTR_MASK

DMA_CH_SBR_INSTR_SHIFT

DMA_CH_MUX_SOURCE(x)

DMA_ERR_DBE_FLAG: DMA error flag.

DMA_ERR_SBE_FLAG

DMA_ERR_SGE_FLAG

DMA_ERR_NCE_FLAG

DMA_ERR_DOE_FLAG

DMA_ERR_DAE_FLAG

DMA_ERR_SOE_FLAG

DMA_ERR_SAE_FLAG

DMA_ERR_ERRCHAN_FLAG

DMA_ERR_ECX_FLAG

DMA_ERR_FLAG

DMA_CLEAR_DONE_STATUS(base, channel): get/clear DONE bit

DMA_GET_DONE_STATUS(base, channel)

DMA_ENABLE_ERROR_INT(base, channel): enable/disable error interupt

DMA_DISABLE_ERROR_INT(base, channel)

DMA_CLEAR_ERROR_STATUS(base, channel): get/clear error status

DMA_GET_ERROR_STATUS(base, channel)

DMA_CLEAR_INT_STATUS(base, channel): get/clear INT status

DMA_GET_INT_STATUS(base, channel)

DMA_ENABLE_MAJOR_INT(base, channel): enable/dsiable MAJOR/HALF INT

DMA_ENABLE_HALF_INT(base, channel)

DMA_DISABLE_MAJOR_INT(base, channel)

DMA_DISABLE_HALF_INT(base, channel)

EDMA_TCD_ALIGN_SIZE: EDMA tcd align size.

EDMA_CORE_BASE(base): EDMA base address convert macro.

EDMA_MP_BASE(base)

EDMA_CHANNEL_BASE(base, channel)

EDMA_TCD_BASE(base, channel)

EDMA_TCD_TYPE(x): EDMA TCD type macro.

EDMA_TCD_SADDR(tcd, flag): EDMA TCD address convert macro.

EDMA_TCD_SOFF(tcd, flag)

EDMA_TCD_ATTR(tcd, flag)

EDMA_TCD_NBYTES(tcd, flag)

EDMA_TCD_SLAST(tcd, flag)

EDMA_TCD_DADDR(tcd, flag)

EDMA_TCD_DOFF(tcd, flag)

EDMA_TCD_CITER(tcd, flag)

EDMA_TCD_DLAST_SGA(tcd, flag)

EDMA_TCD_CSR(tcd, flag)

EDMA_TCD_BITER(tcd, flag)

struct _edma_core_mp

#include <fsl_edma_core.h>

edma core channel struture definition

Public Members

__IO uint32_t MP_CSR: Channel Control and Status, array offset: 0x10000, array step: 0x10000

__IO uint32_t MP_ES: Channel Error Status, array offset: 0x10004, array step: 0x10000

struct _edma_core_channel

#include <fsl_edma_core.h>

edma core channel struture definition

Public Members

__IO uint32_t CH_CSR: Channel Control and Status, array offset: 0x10000, array step: 0x10000

__IO uint32_t CH_ES: Channel Error Status, array offset: 0x10004, array step: 0x10000

__IO uint32_t CH_INT: Channel Interrupt Status, array offset: 0x10008, array step: 0x10000

__IO uint32_t CH_SBR: Channel System Bus, array offset: 0x1000C, array step: 0x10000

__IO uint32_t CH_PRI: Channel Priority, array offset: 0x10010, array step: 0x10000

struct _edma5_core_tcd

#include <fsl_edma_core.h>

edma5 core TCD struture definition

Public Members

__IO uint32_t SADDR: SADDR register, used to save source address

__IO uint32_t SADDR_HIGH: SADDR HIGH register, used to save source address

__IO uint16_t SOFF: SOFF register, save offset bytes every transfer

__IO uint16_t ATTR: ATTR register, source/destination transfer size and modulo

__IO uint32_t NBYTES: Nbytes register, minor loop length in bytes

__IO uint32_t SLAST: SLAST register

__IO uint32_t SLAST_SDA_HIGH: SLAST SDA HIGH register

__IO uint32_t DADDR: DADDR register, used for destination address

__IO uint32_t DADDR_HIGH: DADDR HIGH register, used for destination address

__IO uint32_t DLAST_SGA: DLASTSGA register, next tcd address used in scatter-gather mode

__IO uint32_t DLAST_SGA_HIGH: DLASTSGA HIGH register, next tcd address used in scatter-gather mode

__IO uint16_t DOFF: DOFF register, used for destination offset

__IO uint16_t CITER: CITER register, current minor loop numbers, for unfinished minor loop.

__IO uint16_t CSR: CSR register, for TCD control status

__IO uint16_t BITER: BITER register, begin minor loop count.

uint8_t RESERVED[16]: Aligned 64 bytes

struct _edma4_core_tcd

#include <fsl_edma_core.h>

edma4 core TCD struture definition

Public Members

__IO uint32_t SADDR: SADDR register, used to save source address

__IO uint16_t SOFF: SOFF register, save offset bytes every transfer

__IO uint16_t ATTR: ATTR register, source/destination transfer size and modulo

__IO uint32_t NBYTES: Nbytes register, minor loop length in bytes

__IO uint32_t SLAST: SLAST register

__IO uint32_t DADDR: DADDR register, used for destination address

__IO uint16_t DOFF: DOFF register, used for destination offset

__IO uint16_t CITER: CITER register, current minor loop numbers, for unfinished minor loop.

__IO uint32_t DLAST_SGA: DLASTSGA register, next tcd address used in scatter-gather mode

__IO uint16_t CSR: CSR register, for TCD control status

__IO uint16_t BITER: BITER register, begin minor loop count.

struct _edma_core_tcd: #include <fsl_edma_core.h>

edma core TCD struture definition

union MP_REGS

Public Members

struct _edma_core_mp EDMA5_REG

struct EDMA5_REG

Public Members

__IO uint32_t MP_INT_LOW: Channel Control and Status, array offset: 0x10008, array step: 0x10000

__I uint32_t MP_INT_HIGH: Channel Control and Status, array offset: 0x1000C, array step: 0x10000

__I uint32_t MP_HRS_LOW: Channel Control and Status, array offset: 0x10010, array step: 0x10000

__I uint32_t MP_HRS_HIGH: Channel Control and Status, array offset: 0x10014, array step: 0x10000

__IO uint32_t MP_STOPCH: Channel Control and Status, array offset: 0x10020, array step: 0x10000

__I uint32_t MP_SSR_LOW: Channel Control and Status, array offset: 0x10030, array step: 0x10000

__I uint32_t MP_SSR_HIGH: Channel Control and Status, array offset: 0x10034, array step: 0x10000

__IO uint32_t CH_GRPRI [64]: Channel Control and Status, array offset: 0x10100, array step: 0x10000

__IO uint32_t CH_MUX [64]: Channel Control and Status, array offset: 0x10200, array step: 0x10000

__IO uint32_t CH_PROT [64]: Channel Control and Status, array offset: 0x10400, array step: 0x10000

union CH_REGS

Public Members

struct _edma_core_channel EDMA5_REG

struct _edma_core_channel EDMA4_REG

struct EDMA5_REG

Public Members

__IO uint32_t CH_MATTR: Memory Attributes Register, array offset: 0x10018, array step: 0x8000

struct EDMA4_REG

Public Members

__IO uint32_t CH_MUX: Channel Multiplexor Configuration, array offset: 0x10014, array step: 0x10000

__IO uint16_t CH_MATTR: Memory Attributes Register, array offset: 0x10018, array step: 0x8000

union TCD_REGS

Public Members

edma4_core_tcd_t edma4_tcd

eDMA soc Driver

void EDMA_EnableRequest(DMA_Type *base, dma_request_source_t requestSource)

Enable the eDMA request.

This function enables the eDMA request controlled by SYSCON.

Parameters:

base – eDMA peripheral base address.
requestSource – eDMA request source, see “dma_request_source_t”.

void EDMA_DisableRequest(DMA_Type *base, dma_request_source_t requestSource)

Disable the eDMA request.

This function disables the eDMA request controlled by SYSCON.

Parameters:

base – eDMA peripheral base address.
requestSource – eDMA request source, see “dma_request_source_t”.

FSL_EDMA_SOC_DRIVER_VERSION: Driver version 1.0.0.

FSL_EDMA_SOC_IP_DMA3: DMA IP version.

FSL_EDMA_SOC_IP_DMA4

EDMA_CHANNEL_OFFSET: EDMA base address convert macro.

EDMA_CHANNEL_ARRAY_STEP(base)

Ezhv

enum _arm2ezhv_intctl

Definition of 4 interrupt requests from ARM to EZH-V.

Values:

enumerator kEZHV_ARM2EZHV_MEI

enumerator kEZHV_ARM2EZHV_SEI

enumerator kEZHV_ARM2EZHV_MSI

enumerator kEZHV_ARM2EZHV_MTI

enum _ezhv2arm_int_chan

EZH-V to ARM interrupt channel.

Values:

enumerator kEZHV_EzhvToArmIntChan0

enumerator kEZHV_EzhvToArmIntChan1

enumerator kEZHV_EzhvToArmIntChan2

enumerator kEZHV_EzhvToArmIntChan3

enumerator kEZHV_EzhvToArmIntChan4

enumerator kEZHV_EzhvToArmIntChan5

enumerator kEZHV_EzhvToArmIntChan6

enumerator kEZHV_EzhvToArmIntChan7

enumerator kEZHV_EzhvToArmIntChan8

enumerator kEZHV_EzhvToArmIntChan9

enumerator kEZHV_EzhvToArmIntChan10

enumerator kEZHV_EzhvToArmIntChan11

enumerator kEZHV_EzhvToArmIntChan12

enumerator kEZHV_EzhvToArmIntChan13

enumerator kEZHV_EzhvToArmIntChan14

enumerator kEZHV_EzhvToArmIntChan15

typedef void (*ezhv_callback_t)(void *userData)

define callback function for EZH-V

This callback function is called in EZH-V interrupt handle.

typedef struct _ezhv_copy_image ezhv_copy_image_t

Structure for EZH-V copy image to destination address.

Defines source and destination address for copying image with given size.

typedef uint32_t ezhv_api_t: @Brief List of EZH-V APIs

typedef struct _ezhv_param ezhv_param_t: parameters used by EZH-V

typedef enum _arm2ezhv_intctl arm2ezhv_intctl_t: Definition of 4 interrupt requests from ARM to EZH-V.

typedef enum _ezhv2arm_int_chan ezhv2arm_int_chan_t: EZH-V to ARM interrupt channel.

void EZHV_Init(ezhv_copy_image_t *ezhvCopyImage)

Initialize the EZH-V.

Parameters:

ezhvCopyImage – The information about the EZH-V image to copy.

void EZHV_InitWithoutFirmware(void)

Initialize the EZH-V.

This function is similar with EZHV_Init, the difference is this function does not install the firmware, the firmware could be installed using EZHV_InstallFirmware.

void EZHV_InstallFirmware(ezhv_copy_image_t *ezhvCopyImage)

install EZH-V firmware by given image info

Parameters:

ezhvCopyImage – The information about the EZH-V image to copy.

void EZHV_Boot(uint32_t bootAddr)

Boot EZH-V from given address bootAddr.

Parameters:

bootAddr – The boot address.

void EZHV_Deinit(void): Deinitialize the EZH-V.

void EZHV_SetCallback(ezhv_callback_t callback, uint16_t channel, void *userData)

Install the EZH-V callback function.

Parameters:

callback – EZH-V callback function pointer.
channel – interrupt channel index.
userData – A parameter for the callback function.

void EZHV_SetPara(ezhv_param_t *para)

Set the parameter used by EZH-V.

Parameters:

para – Parameter written into shared mem between ARM and EZH-V.

uint32_t *EZHV_GetParaAddr(void)

Get shared space address.

Returns:: The start address of shared space

void EZHV_WakeUpEzhv(arm2ezhv_intctl_t arm2ezhvInt)

Check the wait status and wake up EZH-V.

Parameters:

arm2ezhvInt – The interrupt request which will send to the EZH-V.

static inline void EZHV_EnableArm2EzhvInt(arm2ezhv_intctl_t arm2ezhvInt)

Enable interrupt request from ARM core to EZH-V core.

Note

This interrupt can be used to send interrupt request to EZH-V

Parameters:

arm2ezhvInt – The interrupt request which will send to the EZH-V.

static inline void EZHV_DisableArm2EzhvInt(arm2ezhv_intctl_t arm2ezhvInt)

Disable interrupt request from ARM core to EZH-V core.

Parameters:

arm2ezhvInt – The interrupt request type.

void EZHV_DriverIRQHandler(void): EZH-V IRQ handler.

static inline void EZHV_EnableEzhv2ArmIntChan(ezhv2arm_int_chan_t chan)

Enable the EZH-V interrupt channel to ARM core.

Parameters:

chan – Ezhv to arm interrupt channel index.

static inline uint32_t EZHV_GetEzhv2ArmIntChan(void): Get EZH-V interrupt outputs.

static inline void EZHV_ClearEzhv2ArmIntChan(ezhv2arm_int_chan_t chan)

Clear EZH-V interrupt outputs.

Parameters:

chan – EZH-V to ARM interrupt channel index.

static inline bool EZHV_GetEzhvStopStatusFlag(): Get EZH-V stop status flag.

static inline bool EZHV_GetEzhvHaltStatusFlag(): Get EZH-V halt status flag.

static inline bool EZHV_GetEzhvWaitStatusFlag(): Get EZH-V wait status flag.

static inline bool EZHV_GetEzhvWakeupStatusFlag(): Get EZH-V wakeup status flag.

FSL_EZHV_DRIVER_VERSION: cache driver version.

EZHV_API_MAX_ARG

uint32_t srcAddr

uint32_t destAddr

uint32_t size

ezhv_api_t ezhvApi

uint32_t argc

uint32_t *argv[8U]

EZHV_M_EXT_INT: EZHV inside machine-mode external isr offset.

EZHV_SHARED_DATA_ADDR: shared data space between ARM and EZHV, space size is 256 Bytes

EZHV_INT_CHAN_NUM

definition for active ezhv2arm int channel number

please redefine this macro’s value if less channels are enabled

struct _ezhv_copy_image

#include <fsl_ezhv.h>

Structure for EZH-V copy image to destination address.

Defines source and destination address for copying image with given size.

struct _ezhv_param: #include <fsl_ezhv.h>

parameters used by EZH-V

FGPIO Driver

FlexIO: FlexIO Driver

FlexIO Driver

void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig)

Gets the default configuration to configure the FlexIO module. The configuration can used directly to call the FLEXIO_Configure().

Example:

flexio_config_t config;
FLEXIO_GetDefaultConfig(&config);

Parameters:

userConfig – pointer to flexio_config_t structure

void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig)

Configures the FlexIO with a FlexIO configuration. The configuration structure can be filled by the user or be set with default values by FLEXIO_GetDefaultConfig().

Example

flexio_config_t config = {
.enableFlexio = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false
};
FLEXIO_Configure(base, &config);

Parameters:

base – FlexIO peripheral base address
userConfig – pointer to flexio_config_t structure

void FLEXIO_Deinit(FLEXIO_Type *base)

Gates the FlexIO clock. Call this API to stop the FlexIO clock.

Note

After calling this API, call the FLEXO_Init to use the FlexIO module.

Parameters:

base – FlexIO peripheral base address

uint32_t FLEXIO_GetInstance(FLEXIO_Type *base)

Get instance number for FLEXIO module.

Parameters:

base – FLEXIO peripheral base address.

void FLEXIO_Reset(FLEXIO_Type *base)

Resets the FlexIO module.

Parameters:

base – FlexIO peripheral base address

static inline void FLEXIO_Enable(FLEXIO_Type *base, bool enable)

Enables the FlexIO module operation.

Parameters:

base – FlexIO peripheral base address
enable – true to enable, false to disable.

static inline uint32_t FLEXIO_ReadPinInput(FLEXIO_Type *base)

Reads the input data on each of the FlexIO pins.

Parameters:

base – FlexIO peripheral base address

Returns:

FlexIO pin input data

static inline uint8_t FLEXIO_GetShifterState(FLEXIO_Type *base)

Gets the current state pointer for state mode use.

Parameters:

base – FlexIO peripheral base address

Returns:

current State pointer

void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig)

Configures the shifter with the shifter configuration. The configuration structure covers both the SHIFTCTL and SHIFTCFG registers. To configure the shifter to the proper mode, select which timer controls the shifter to shift, whether to generate start bit/stop bit, and the polarity of start bit and stop bit.

Example

flexio_shifter_config_t config = {
.timerSelect = 0,
.timerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinPolarity = kFLEXIO_PinActiveLow,
.shifterMode = kFLEXIO_ShifterModeTransmit,
.inputSource = kFLEXIO_ShifterInputFromPin,
.shifterStop = kFLEXIO_ShifterStopBitHigh,
.shifterStart = kFLEXIO_ShifterStartBitLow
};
FLEXIO_SetShifterConfig(base, &config);

Parameters:

base – FlexIO peripheral base address
index – Shifter index
shifterConfig – Pointer to flexio_shifter_config_t structure

void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig)

Configures the timer with the timer configuration. The configuration structure covers both the TIMCTL and TIMCFG registers. To configure the timer to the proper mode, select trigger source for timer and the timer pin output and the timing for timer.

Example

flexio_timer_config_t config = {
.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow,
.triggerSource = kFLEXIO_TimerTriggerSourceInternal,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinSelect = 0,
.pinPolarity = kFLEXIO_PinActiveHigh,
.timerMode = kFLEXIO_TimerModeDual8BitBaudBit,
.timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset,
.timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput,
.timerReset = kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput,
.timerDisable = kFLEXIO_TimerDisableOnTimerCompare,
.timerEnable = kFLEXIO_TimerEnableOnTriggerHigh,
.timerStop = kFLEXIO_TimerStopBitEnableOnTimerDisable,
.timerStart = kFLEXIO_TimerStartBitEnabled
};
FLEXIO_SetTimerConfig(base, &config);

Parameters:

base – FlexIO peripheral base address
index – Timer index
timerConfig – Pointer to the flexio_timer_config_t structure

static inline void FLEXIO_SetClockMode(FLEXIO_Type *base, uint8_t index, flexio_timer_decrement_source_t clocksource)

This function set the value of the prescaler on flexio channels.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.
index – Timer index
clocksource – Set clock value

static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the shifter status interrupt. The interrupt generates when the corresponding SSF is set.

Note

For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the shifter status interrupt. The interrupt won’t generate when the corresponding SSF is set.

Note

For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the shifter error interrupt. The interrupt generates when the corresponding SEF is set.

Note

For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the shifter error interrupt. The interrupt won’t generate when the corresponding SEF is set.

Note

For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the timer status interrupt. The interrupt generates when the corresponding SSF is set.

Note

For multiple timer status interrupt enable, for example, two timer status enable, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline void FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the timer status interrupt. The interrupt won’t generate when the corresponding SSF is set.

Note

For multiple timer status interrupt enable, for example, two timer status enable, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline uint32_t FLEXIO_GetShifterStatusFlags(FLEXIO_Type *base)

Gets the shifter status flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Shifter status flags

static inline void FLEXIO_ClearShifterStatusFlags(FLEXIO_Type *base, uint32_t mask)

Clears the shifter status flags.

Note

For clearing multiple shifter status flags, for example, two shifter status flags, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline uint32_t FLEXIO_GetShifterErrorFlags(FLEXIO_Type *base)

Gets the shifter error flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Shifter error flags

static inline void FLEXIO_ClearShifterErrorFlags(FLEXIO_Type *base, uint32_t mask)

Clears the shifter error flags.

Note

For clearing multiple shifter error flags, for example, two shifter error flags, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline uint32_t FLEXIO_GetTimerStatusFlags(FLEXIO_Type *base)

Gets the timer status flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Timer status flags

static inline void FLEXIO_ClearTimerStatusFlags(FLEXIO_Type *base, uint32_t mask)

Clears the timer status flags.

Note

For clearing multiple timer status flags, for example, two timer status flags, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline void FLEXIO_EnableShifterStatusDMA(FLEXIO_Type *base, uint32_t mask, bool enable)

Enables/disables the shifter status DMA. The DMA request generates when the corresponding SSF is set.

Note

For multiple shifter status DMA enables, for example, calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)
enable – True to enable, false to disable.

uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index)

Gets the shifter buffer address for the DMA transfer usage.

Parameters:

base – FlexIO peripheral base address
type – Shifter type of flexio_shifter_buffer_type_t
index – Shifter index

Returns:

Corresponding shifter buffer index

status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr)

Registers the handle and the interrupt handler for the FlexIO-simulated peripheral.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.
handle – Pointer to the handler for FlexIO simulated peripheral.
isr – FlexIO simulated peripheral interrupt handler.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_UnregisterHandleIRQ(void *base)

Unregisters the handle and the interrupt handler for the FlexIO-simulated peripheral.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

static inline void FLEXIO_ClearPortOutput(FLEXIO_Type *base, uint32_t mask)

Sets the output level of the multiple FLEXIO pins to the logic 0.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_SetPortOutput(FLEXIO_Type *base, uint32_t mask)

Sets the output level of the multiple FLEXIO pins to the logic 1.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_TogglePortOutput(FLEXIO_Type *base, uint32_t mask)

Reverses the current output logic of the multiple FLEXIO pins.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_PinWrite(FLEXIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the FLEXIO pins to the logic 1 or 0.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.
output – FLEXIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline void FLEXIO_EnablePinOutput(FLEXIO_Type *base, uint32_t pin)

Enables the FLEXIO output pin function.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

static inline uint32_t FLEXIO_PinRead(FLEXIO_Type *base, uint32_t pin)

Reads the current input value of the FLEXIO pin.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

Return values:

FLEXIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

static inline uint32_t FLEXIO_GetPinStatus(FLEXIO_Type *base, uint32_t pin)

Gets the FLEXIO input pin status.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

Return values:

FLEXIO – port input status

0: corresponding pin input capture no status.
1: corresponding pin input capture rising or falling edge.

static inline void FLEXIO_ClearPortStatus(FLEXIO_Type *base, uint32_t mask)

Clears the multiple FLEXIO input pins status.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

FSL_FLEXIO_DRIVER_VERSION: FlexIO driver version.

enum _flexio_timer_trigger_polarity

Define time of timer trigger polarity.

Values:

enumerator kFLEXIO_TimerTriggerPolarityActiveHigh: Active high.

enumerator kFLEXIO_TimerTriggerPolarityActiveLow: Active low.

enum _flexio_timer_trigger_source

Define type of timer trigger source.

Values:

enumerator kFLEXIO_TimerTriggerSourceExternal: External trigger selected.

enumerator kFLEXIO_TimerTriggerSourceInternal: Internal trigger selected.

enum _flexio_pin_config

Define type of timer/shifter pin configuration.

Values:

enumerator kFLEXIO_PinConfigOutputDisabled: Pin output disabled.

enumerator kFLEXIO_PinConfigOpenDrainOrBidirection: Pin open drain or bidirectional output enable.

enumerator kFLEXIO_PinConfigBidirectionOutputData: Pin bidirectional output data.

enumerator kFLEXIO_PinConfigOutput: Pin output.

enum _flexio_pin_polarity

Definition of pin polarity.

Values:

enumerator kFLEXIO_PinActiveHigh: Active high.

enumerator kFLEXIO_PinActiveLow: Active low.

enum _flexio_timer_mode

Define type of timer work mode.

Values:

enumerator kFLEXIO_TimerModeDisabled: Timer Disabled.

enumerator kFLEXIO_TimerModeDual8BitBaudBit: Dual 8-bit counters baud/bit mode.

enumerator kFLEXIO_TimerModeDual8BitPWM: Dual 8-bit counters PWM mode.

enumerator kFLEXIO_TimerModeSingle16Bit: Single 16-bit counter mode.

enum _flexio_timer_output

Define type of timer initial output or timer reset condition.

Values:

enumerator kFLEXIO_TimerOutputOneNotAffectedByReset: Logic one when enabled and is not affected by timer reset.

enumerator kFLEXIO_TimerOutputZeroNotAffectedByReset: Logic zero when enabled and is not affected by timer reset.

enumerator kFLEXIO_TimerOutputOneAffectedByReset: Logic one when enabled and on timer reset.

enumerator kFLEXIO_TimerOutputZeroAffectedByReset: Logic zero when enabled and on timer reset.

enum _flexio_timer_decrement_source

Define type of timer decrement.

Values:

enumerator kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput: Decrement counter on FlexIO clock, Shift clock equals Timer output.

enumerator kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput: Decrement counter on Trigger input (both edges), Shift clock equals Timer output.

enumerator kFLEXIO_TimerDecSrcOnPinInputShiftPinInput: Decrement counter on Pin input (both edges), Shift clock equals Pin input.

enumerator kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput: Decrement counter on Trigger input (both edges), Shift clock equals Trigger input.

enum _flexio_timer_reset_condition

Define type of timer reset condition.

Values:

enumerator kFLEXIO_TimerResetNever: Timer never reset.

enumerator kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput: Timer reset on Timer Pin equal to Timer Output.

enumerator kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput: Timer reset on Timer Trigger equal to Timer Output.

enumerator kFLEXIO_TimerResetOnTimerPinRisingEdge: Timer reset on Timer Pin rising edge.

enumerator kFLEXIO_TimerResetOnTimerTriggerRisingEdge: Timer reset on Trigger rising edge.

enumerator kFLEXIO_TimerResetOnTimerTriggerBothEdge: Timer reset on Trigger rising or falling edge.

enum _flexio_timer_disable_condition

Define type of timer disable condition.

Values:

enumerator kFLEXIO_TimerDisableNever: Timer never disabled.

enumerator kFLEXIO_TimerDisableOnPreTimerDisable: Timer disabled on Timer N-1 disable.

enumerator kFLEXIO_TimerDisableOnTimerCompare: Timer disabled on Timer compare.

enumerator kFLEXIO_TimerDisableOnTimerCompareTriggerLow: Timer disabled on Timer compare and Trigger Low.

enumerator kFLEXIO_TimerDisableOnPinBothEdge: Timer disabled on Pin rising or falling edge.

enumerator kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh: Timer disabled on Pin rising or falling edge provided Trigger is high.

enumerator kFLEXIO_TimerDisableOnTriggerFallingEdge: Timer disabled on Trigger falling edge.

enum _flexio_timer_enable_condition

Define type of timer enable condition.

Values:

enumerator kFLEXIO_TimerEnabledAlways: Timer always enabled.

enumerator kFLEXIO_TimerEnableOnPrevTimerEnable: Timer enabled on Timer N-1 enable.

enumerator kFLEXIO_TimerEnableOnTriggerHigh: Timer enabled on Trigger high.

enumerator kFLEXIO_TimerEnableOnTriggerHighPinHigh: Timer enabled on Trigger high and Pin high.

enumerator kFLEXIO_TimerEnableOnPinRisingEdge: Timer enabled on Pin rising edge.

enumerator kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh: Timer enabled on Pin rising edge and Trigger high.

enumerator kFLEXIO_TimerEnableOnTriggerRisingEdge: Timer enabled on Trigger rising edge.

enumerator kFLEXIO_TimerEnableOnTriggerBothEdge: Timer enabled on Trigger rising or falling edge.

enum _flexio_timer_stop_bit_condition

Define type of timer stop bit generate condition.

Values:

enumerator kFLEXIO_TimerStopBitDisabled: Stop bit disabled.

enumerator kFLEXIO_TimerStopBitEnableOnTimerCompare: Stop bit is enabled on timer compare.

enumerator kFLEXIO_TimerStopBitEnableOnTimerDisable: Stop bit is enabled on timer disable.

enumerator kFLEXIO_TimerStopBitEnableOnTimerCompareDisable: Stop bit is enabled on timer compare and timer disable.

enum _flexio_timer_start_bit_condition

Define type of timer start bit generate condition.

Values:

enumerator kFLEXIO_TimerStartBitDisabled: Start bit disabled.

enumerator kFLEXIO_TimerStartBitEnabled: Start bit enabled.

enum _flexio_timer_output_state

FlexIO as PWM channel output state.

Values:

enumerator kFLEXIO_PwmLow: The output state of PWM channel is low

enumerator kFLEXIO_PwmHigh: The output state of PWM channel is high

enum _flexio_shifter_timer_polarity

Define type of timer polarity for shifter control.

Values:

enumerator kFLEXIO_ShifterTimerPolarityOnPositive: Shift on positive edge of shift clock.

enumerator kFLEXIO_ShifterTimerPolarityOnNegitive: Shift on negative edge of shift clock.

enum _flexio_shifter_mode

Define type of shifter working mode.

Values:

enumerator kFLEXIO_ShifterDisabled: Shifter is disabled.

enumerator kFLEXIO_ShifterModeReceive: Receive mode.

enumerator kFLEXIO_ShifterModeTransmit: Transmit mode.

enumerator kFLEXIO_ShifterModeMatchStore: Match store mode.

enumerator kFLEXIO_ShifterModeMatchContinuous: Match continuous mode.

enumerator kFLEXIO_ShifterModeState: SHIFTBUF contents are used for storing programmable state attributes.

enumerator kFLEXIO_ShifterModeLogic: SHIFTBUF contents are used for implementing programmable logic look up table.

enum _flexio_shifter_input_source

Define type of shifter input source.

Values:

enumerator kFLEXIO_ShifterInputFromPin: Shifter input from pin.

enumerator kFLEXIO_ShifterInputFromNextShifterOutput: Shifter input from Shifter N+1.

enum _flexio_shifter_stop_bit

Define of STOP bit configuration.

Values:

enumerator kFLEXIO_ShifterStopBitDisable: Disable shifter stop bit.

enumerator kFLEXIO_ShifterStopBitLow: Set shifter stop bit to logic low level.

enumerator kFLEXIO_ShifterStopBitHigh: Set shifter stop bit to logic high level.

enum _flexio_shifter_start_bit

Define type of START bit configuration.

Values:

enumerator kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable: Disable shifter start bit, transmitter loads data on enable.

enumerator kFLEXIO_ShifterStartBitDisabledLoadDataOnShift: Disable shifter start bit, transmitter loads data on first shift.

enumerator kFLEXIO_ShifterStartBitLow: Set shifter start bit to logic low level.

enumerator kFLEXIO_ShifterStartBitHigh: Set shifter start bit to logic high level.

enum _flexio_shifter_buffer_type

Define FlexIO shifter buffer type.

Values:

enumerator kFLEXIO_ShifterBuffer: Shifter Buffer N Register.

enumerator kFLEXIO_ShifterBufferBitSwapped: Shifter Buffer N Bit Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferByteSwapped: Shifter Buffer N Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferBitByteSwapped: Shifter Buffer N Bit Swapped Register.

enumerator kFLEXIO_ShifterBufferNibbleByteSwapped: Shifter Buffer N Nibble Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferHalfWordSwapped: Shifter Buffer N Half Word Swapped Register.

enumerator kFLEXIO_ShifterBufferNibbleSwapped: Shifter Buffer N Nibble Swapped Register.

enum _flexio_gpio_direction

FLEXIO gpio direction definition.

Values:

enumerator kFLEXIO_DigitalInput: Set current pin as digital input

enumerator kFLEXIO_DigitalOutput: Set current pin as digital output

enum _flexio_pin_input_config

FLEXIO gpio input config.

Values:

enumerator kFLEXIO_InputInterruptDisabled: Interrupt request is disabled.

enumerator kFLEXIO_InputInterruptEnable: Interrupt request is enable.

enumerator kFLEXIO_FlagRisingEdgeEnable: Input pin flag on rising edge.

enumerator kFLEXIO_FlagFallingEdgeEnable: Input pin flag on falling edge.

typedef enum _flexio_timer_trigger_polarity flexio_timer_trigger_polarity_t: Define time of timer trigger polarity.

typedef enum _flexio_timer_trigger_source flexio_timer_trigger_source_t: Define type of timer trigger source.

typedef enum _flexio_pin_config flexio_pin_config_t: Define type of timer/shifter pin configuration.

typedef enum _flexio_pin_polarity flexio_pin_polarity_t: Definition of pin polarity.

typedef enum _flexio_timer_mode flexio_timer_mode_t: Define type of timer work mode.

typedef enum _flexio_timer_output flexio_timer_output_t: Define type of timer initial output or timer reset condition.

typedef enum _flexio_timer_decrement_source flexio_timer_decrement_source_t: Define type of timer decrement.

typedef enum _flexio_timer_reset_condition flexio_timer_reset_condition_t: Define type of timer reset condition.

typedef enum _flexio_timer_disable_condition flexio_timer_disable_condition_t: Define type of timer disable condition.

typedef enum _flexio_timer_enable_condition flexio_timer_enable_condition_t: Define type of timer enable condition.

typedef enum _flexio_timer_stop_bit_condition flexio_timer_stop_bit_condition_t: Define type of timer stop bit generate condition.

typedef enum _flexio_timer_start_bit_condition flexio_timer_start_bit_condition_t: Define type of timer start bit generate condition.

typedef enum _flexio_timer_output_state flexio_timer_output_state_t: FlexIO as PWM channel output state.

typedef enum _flexio_shifter_timer_polarity flexio_shifter_timer_polarity_t: Define type of timer polarity for shifter control.

typedef enum _flexio_shifter_mode flexio_shifter_mode_t: Define type of shifter working mode.

typedef enum _flexio_shifter_input_source flexio_shifter_input_source_t: Define type of shifter input source.

typedef enum _flexio_shifter_stop_bit flexio_shifter_stop_bit_t: Define of STOP bit configuration.

typedef enum _flexio_shifter_start_bit flexio_shifter_start_bit_t: Define type of START bit configuration.

typedef enum _flexio_shifter_buffer_type flexio_shifter_buffer_type_t: Define FlexIO shifter buffer type.

typedef struct _flexio_config_ flexio_config_t: Define FlexIO user configuration structure.

typedef struct _flexio_timer_config flexio_timer_config_t: Define FlexIO timer configuration structure.

typedef struct _flexio_shifter_config flexio_shifter_config_t: Define FlexIO shifter configuration structure.

typedef enum _flexio_gpio_direction flexio_gpio_direction_t: FLEXIO gpio direction definition.

typedef enum _flexio_pin_input_config flexio_pin_input_config_t: FLEXIO gpio input config.

typedef struct _flexio_gpio_config flexio_gpio_config_t

The FLEXIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, use inputConfig param. If configured as an output pin, use outputLogic.

typedef void (*flexio_isr_t)(void *base, void *handle): typedef for FlexIO simulated driver interrupt handler.

FLEXIO_Type *const s_flexioBases[]: Pointers to flexio bases for each instance.

const clock_ip_name_t s_flexioClocks[]: Pointers to flexio clocks for each instance.

void FLEXIO_SetPinConfig(FLEXIO_Type *base, uint32_t pin, flexio_gpio_config_t *config)

Configure a FLEXIO pin used by the board.

To Config the FLEXIO PIN, define a pin configuration, as either input or output, in the user file. Then, call the FLEXIO_SetPinConfig() function.

This is an example to define an input pin or an output pin configuration.

Define a digital input pin configuration,
flexio_gpio_config_t config =
{
  kFLEXIO_DigitalInput,
  0U,
  kFLEXIO_FlagRisingEdgeEnable | kFLEXIO_InputInterruptEnable,
}
Define a digital output pin configuration,
flexio_gpio_config_t config =
{
  kFLEXIO_DigitalOutput,
  0U,
  0U
}

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.
config – FLEXIO pin configuration pointer.

FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x): Calculate FlexIO timer trigger.

FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(x)

FLEXIO_TIMER_TRIGGER_SEL_TIMn(x)

struct _flexio_config_

#include <fsl_flexio.h>

Define FlexIO user configuration structure.

Public Members

bool enableFlexio: Enable/disable FlexIO module

bool enableInDoze: Enable/disable FlexIO operation in doze mode

bool enableInDebug: Enable/disable FlexIO operation in debug mode

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

struct _flexio_timer_config

#include <fsl_flexio.h>

Define FlexIO timer configuration structure.

Public Members

uint32_t triggerSelect: The internal trigger selection number using MACROs.

flexio_timer_trigger_polarity_t triggerPolarity: Trigger Polarity.

flexio_timer_trigger_source_t triggerSource: Trigger Source, internal (see ‘trgsel’) or external.

flexio_pin_config_t pinConfig: Timer Pin Configuration.

uint32_t pinSelect: Timer Pin number Select.

flexio_pin_polarity_t pinPolarity: Timer Pin Polarity.

flexio_timer_mode_t timerMode: Timer work Mode.

flexio_timer_output_t timerOutput: Configures the initial state of the Timer Output and whether it is affected by the Timer reset.

flexio_timer_decrement_source_t timerDecrement: Configures the source of the Timer decrement and the source of the Shift clock.

flexio_timer_reset_condition_t timerReset: Configures the condition that causes the timer counter (and optionally the timer output) to be reset.

flexio_timer_disable_condition_t timerDisable: Configures the condition that causes the Timer to be disabled and stop decrementing.

flexio_timer_enable_condition_t timerEnable: Configures the condition that causes the Timer to be enabled and start decrementing.

flexio_timer_stop_bit_condition_t timerStop: Timer STOP Bit generation.

flexio_timer_start_bit_condition_t timerStart: Timer STRAT Bit generation.

uint32_t timerCompare: Value for Timer Compare N Register.

struct _flexio_shifter_config

#include <fsl_flexio.h>

Define FlexIO shifter configuration structure.

Public Members

uint32_t timerSelect: Selects which Timer is used for controlling the logic/shift register and generating the Shift clock.

flexio_shifter_timer_polarity_t timerPolarity: Timer Polarity.

flexio_pin_config_t pinConfig: Shifter Pin Configuration.

uint32_t pinSelect: Shifter Pin number Select.

flexio_pin_polarity_t pinPolarity: Shifter Pin Polarity.

flexio_shifter_mode_t shifterMode: Configures the mode of the Shifter.

uint32_t parallelWidth: Configures the parallel width when using parallel mode.

flexio_shifter_input_source_t inputSource: Selects the input source for the shifter.

flexio_shifter_stop_bit_t shifterStop: Shifter STOP bit.

flexio_shifter_start_bit_t shifterStart: Shifter START bit.

struct _flexio_gpio_config

#include <fsl_flexio.h>

The FLEXIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, use inputConfig param. If configured as an output pin, use outputLogic.

Public Members

flexio_gpio_direction_t pinDirection: FLEXIO pin direction, input or output

uint8_t outputLogic: Set a default output logic, which has no use in input

uint8_t inputConfig: Set an input config

FlexIO eDMA I2S Driver

void FLEXIO_I2S_TransferTxCreateHandleEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle)

Initializes the FlexIO I2S eDMA handle.

This function initializes the FlexIO I2S master DMA handle which can be used for other FlexIO I2S master transactional APIs. Usually, for a specified FlexIO I2S instance, call this API once to get the initialized handle.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S eDMA handle pointer.
callback – FlexIO I2S eDMA callback function called while finished a block.
userData – User parameter for callback.
dmaHandle – eDMA handle for FlexIO I2S. This handle is a static value allocated by users.

void FLEXIO_I2S_TransferRxCreateHandleEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle)

Initializes the FlexIO I2S Rx eDMA handle.

This function initializes the FlexIO I2S slave DMA handle which can be used for other FlexIO I2S master transactional APIs. Usually, for a specified FlexIO I2S instance, call this API once to get the initialized handle.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S eDMA handle pointer.
callback – FlexIO I2S eDMA callback function called while finished a block.
userData – User parameter for callback.
dmaHandle – eDMA handle for FlexIO I2S. This handle is a static value allocated by users.

void FLEXIO_I2S_TransferSetFormatEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S Tx audio format.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred. This function also sets the eDMA parameter according to format.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S eDMA handle pointer
format – Pointer to FlexIO I2S audio data format structure.
srcClock_Hz – FlexIO I2S clock source frequency in Hz, it should be 0 while in slave mode.

status_t FLEXIO_I2S_TransferSendEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs a non-blocking FlexIO I2S transfer using DMA.

Note

This interface returned immediately after transfer initiates. Users should call FLEXIO_I2S_GetTransferStatus to poll the transfer status and check whether the FlexIO I2S transfer is finished.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.
xfer – Pointer to DMA transfer structure.

Return values:

kStatus_Success – Start a FlexIO I2S eDMA send successfully.
kStatus_InvalidArgument – The input arguments is invalid.
kStatus_TxBusy – FlexIO I2S is busy sending data.

status_t FLEXIO_I2S_TransferReceiveEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs a non-blocking FlexIO I2S receive using eDMA.

Note

This interface returned immediately after transfer initiates. Users should call FLEXIO_I2S_GetReceiveRemainingBytes to poll the transfer status and check whether the FlexIO I2S transfer is finished.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.
xfer – Pointer to DMA transfer structure.

Return values:

kStatus_Success – Start a FlexIO I2S eDMA receive successfully.
kStatus_InvalidArgument – The input arguments is invalid.
kStatus_RxBusy – FlexIO I2S is busy receiving data.

void FLEXIO_I2S_TransferAbortSendEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle)

Aborts a FlexIO I2S transfer using eDMA.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.

void FLEXIO_I2S_TransferAbortReceiveEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle)

Aborts a FlexIO I2S receive using eDMA.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.

status_t FLEXIO_I2S_TransferGetSendCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count)

Gets the remaining bytes to be sent.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.
count – Bytes sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count)

Get the remaining bytes to be received.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.
count – Bytes received.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

FSL_FLEXIO_I2S_EDMA_DRIVER_VERSION: FlexIO I2S EDMA driver version 2.1.8.

typedef struct _flexio_i2s_edma_handle flexio_i2s_edma_handle_t

typedef void (*flexio_i2s_edma_callback_t)(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, status_t status, void *userData): FlexIO I2S eDMA transfer callback function for finish and error.

struct _flexio_i2s_edma_handle

#include <fsl_flexio_i2s_edma.h>

FlexIO I2S DMA transfer handle, users should not touch the content of the handle.

Public Members

edma_handle_t *dmaHandle: DMA handler for FlexIO I2S send

uint8_t bytesPerFrame: Bytes in a frame

uint8_t nbytes: eDMA minor byte transfer count initially configured.

uint32_t state: Internal state for FlexIO I2S eDMA transfer

flexio_i2s_edma_callback_t callback: Callback for users while transfer finish or error occurred

void *userData: User callback parameter

edma_tcd_t tcd[(4U) + 1U]: TCD pool for eDMA transfer.

flexio_i2s_transfer_t queue[(4U)]: Transfer queue storing queued transfer.

size_t transferSize[(4U)]: Data bytes need to transfer

volatile uint8_t queueUser: Index for user to queue transfer.

volatile uint8_t queueDriver: Index for driver to get the transfer data and size

FlexIO eDMA SPI Driver

status_t FLEXIO_SPI_MasterTransferCreateHandleEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, flexio_spi_master_edma_transfer_callback_t callback, void *userData, edma_handle_t *txHandle, edma_handle_t *rxHandle)

Initializes the FlexIO SPI master eDMA handle.

This function initializes the FlexIO SPI master eDMA handle which can be used for other FlexIO SPI master transactional APIs. For a specified FlexIO SPI instance, call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
callback – SPI callback, NULL means no callback.
userData – callback function parameter.
txHandle – User requested eDMA handle for FlexIO SPI RX eDMA transfer.
rxHandle – User requested eDMA handle for FlexIO SPI TX eDMA transfer.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO SPI eDMA type/handle table out of range.

status_t FLEXIO_SPI_MasterTransferEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, flexio_spi_transfer_t *xfer)

Performs a non-blocking FlexIO SPI transfer using eDMA.

Note

This interface returns immediately after transfer initiates. Call FLEXIO_SPI_MasterGetTransferCountEDMA to poll the transfer status and check whether the FlexIO SPI transfer is finished.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
xfer – Pointer to FlexIO SPI transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – FlexIO SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbortEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle)

Aborts a FlexIO SPI transfer using eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.

status_t FLEXIO_SPI_MasterTransferGetCountEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, size_t *count)

Gets the number of bytes transferred so far using FlexIO SPI master eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.
count – Number of bytes transferred so far by the non-blocking transaction.

static inline void FLEXIO_SPI_SlaveTransferCreateHandleEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, flexio_spi_slave_edma_transfer_callback_t callback, void *userData, edma_handle_t *txHandle, edma_handle_t *rxHandle)

Initializes the FlexIO SPI slave eDMA handle.

This function initializes the FlexIO SPI slave eDMA handle.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.
callback – SPI callback, NULL means no callback.
userData – callback function parameter.
txHandle – User requested eDMA handle for FlexIO SPI TX eDMA transfer.
rxHandle – User requested eDMA handle for FlexIO SPI RX eDMA transfer.

status_t FLEXIO_SPI_SlaveTransferEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, flexio_spi_transfer_t *xfer)

Performs a non-blocking FlexIO SPI transfer using eDMA.

Note

This interface returns immediately after transfer initiates. Call FLEXIO_SPI_SlaveGetTransferCountEDMA to poll the transfer status and check whether the FlexIO SPI transfer is finished.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.
xfer – Pointer to FlexIO SPI transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – FlexIO SPI is not idle, is running another transfer.

static inline void FLEXIO_SPI_SlaveTransferAbortEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle)

Aborts a FlexIO SPI transfer using eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.

static inline status_t FLEXIO_SPI_SlaveTransferGetCountEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, size_t *count)

Gets the number of bytes transferred so far using FlexIO SPI slave eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.
count – Number of bytes transferred so far by the non-blocking transaction.

FSL_FLEXIO_SPI_EDMA_DRIVER_VERSION: FlexIO SPI EDMA driver version.

typedef struct _flexio_spi_master_edma_handle flexio_spi_master_edma_handle_t: typedef for flexio_spi_master_edma_handle_t in advance.

typedef flexio_spi_master_edma_handle_t flexio_spi_slave_edma_handle_t: Slave handle is the same with master handle.

typedef void (*flexio_spi_master_edma_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, status_t status, void *userData): FlexIO SPI master callback for finished transmit.

typedef void (*flexio_spi_slave_edma_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, status_t status, void *userData): FlexIO SPI slave callback for finished transmit.

struct _flexio_spi_master_edma_handle

#include <fsl_flexio_spi_edma.h>

FlexIO SPI eDMA transfer handle, users should not touch the content of the handle.

Public Members

size_t transferSize: Total bytes to be transferred.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

bool txInProgress: Send transfer in progress

bool rxInProgress: Receive transfer in progress

edma_handle_t *txHandle: DMA handler for SPI send

edma_handle_t *rxHandle: DMA handler for SPI receive

flexio_spi_master_edma_transfer_callback_t callback: Callback for SPI DMA transfer

void *userData: User Data for SPI DMA callback

FlexIO eDMA UART Driver

status_t FLEXIO_UART_TransferCreateHandleEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_edma_transfer_callback_t callback, void *userData, edma_handle_t *txEdmaHandle, edma_handle_t *rxEdmaHandle)

Initializes the UART handle which is used in transactional functions.

Parameters:

base – Pointer to FLEXIO_UART_Type.
handle – Pointer to flexio_uart_edma_handle_t structure.
callback – The callback function.
userData – The parameter of the callback function.
rxEdmaHandle – User requested DMA handle for RX DMA transfer.
txEdmaHandle – User requested DMA handle for TX DMA transfer.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO SPI eDMA type/handle table out of range.

status_t FLEXIO_UART_TransferSendEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_transfer_t *xfer)

Sends data using eDMA.

This function sends data using eDMA. This is a non-blocking function, which returns right away. When all data is sent out, the send callback function is called.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – UART handle pointer.
xfer – UART eDMA transfer structure, see flexio_uart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXIO_UART_TxBusy – Previous transfer on going.

status_t FLEXIO_UART_TransferReceiveEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_transfer_t *xfer)

Receives data using eDMA.

This function receives data using eDMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
xfer – UART eDMA transfer structure, see flexio_uart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_UART_RxBusy – Previous transfer on going.

void FLEXIO_UART_TransferAbortSendEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle)

Aborts the sent data which using eDMA.

This function aborts sent data which using eDMA.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure

void FLEXIO_UART_TransferAbortReceiveEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle)

Aborts the receive data which using eDMA.

This function aborts the receive data which using eDMA.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure

status_t FLEXIO_UART_TransferGetSendCountEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, size_t *count)

Gets the number of bytes sent out.

This function gets the number of bytes sent out.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
count – Number of bytes sent so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

status_t FLEXIO_UART_TransferGetReceiveCountEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, size_t *count)

Gets the number of bytes received.

This function gets the number of bytes received.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
count – Number of bytes received so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

FSL_FLEXIO_UART_EDMA_DRIVER_VERSION: FlexIO UART EDMA driver version.

typedef struct _flexio_uart_edma_handle flexio_uart_edma_handle_t

typedef void (*flexio_uart_edma_transfer_callback_t)(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, status_t status, void *userData): UART transfer callback function.

struct _flexio_uart_edma_handle

#include <fsl_flexio_uart_edma.h>

UART eDMA handle.

Public Members

flexio_uart_edma_transfer_callback_t callback: Callback function.

void *userData: UART callback function parameter.

size_t txDataSizeAll: Total bytes to be sent.

size_t rxDataSizeAll: Total bytes to be received.

edma_handle_t *txEdmaHandle: The eDMA TX channel used.

edma_handle_t *rxEdmaHandle: The eDMA RX channel used.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

FlexIO I2C Master Driver

status_t FLEXIO_I2C_CheckForBusyBus(FLEXIO_I2C_Type *base)

Make sure the bus isn’t already pulled down.

Check the FLEXIO pin status to see whether either of SDA and SCL pin is pulled down.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure..

Return values:

kStatus_Success –
kStatus_FLEXIO_I2C_Busy –

status_t FLEXIO_I2C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, and configures the FlexIO I2C hardware configuration.

Example

FLEXIO_I2C_Type base = {
.flexioBase = FLEXIO,
.SDAPinIndex = 0,
.SCLPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_i2c_master_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 100000
};
FLEXIO_I2C_MasterInit(base, &config, srcClock_Hz);

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
masterConfig – Pointer to flexio_i2c_master_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

Return values:

kStatus_Success – Initialization successful
kStatus_InvalidArgument – The source clock exceed upper range limitation

void FLEXIO_I2C_MasterDeinit(FLEXIO_I2C_Type *base)

De-initializes the FlexIO I2C master peripheral. Calling this API Resets the FlexIO I2C master shifer and timer config, module can’t work unless the FLEXIO_I2C_MasterInit is called.

Parameters:

base – pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterGetDefaultConfig(flexio_i2c_master_config_t *masterConfig)

Gets the default configuration to configure the FlexIO module. The configuration can be used directly for calling the FLEXIO_I2C_MasterInit().

Example:

flexio_i2c_master_config_t config;
FLEXIO_I2C_MasterGetDefaultConfig(&config);

Parameters:

masterConfig – Pointer to flexio_i2c_master_config_t structure.

static inline void FLEXIO_I2C_MasterEnable(FLEXIO_I2C_Type *base, bool enable)

Enables/disables the FlexIO module operation.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
enable – Pass true to enable module, false does not have any effect.

uint32_t FLEXIO_I2C_MasterGetStatusFlags(FLEXIO_I2C_Type *base)

Gets the FlexIO I2C master status flags.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure

Returns:

Status flag, use status flag to AND _flexio_i2c_master_status_flags can get the related status.

void FLEXIO_I2C_MasterClearStatusFlags(FLEXIO_I2C_Type *base, uint32_t mask)

Clears the FlexIO I2C master status flags.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Status flag. The parameter can be any combination of the following values:
- kFLEXIO_I2C_RxFullFlag
- kFLEXIO_I2C_ReceiveNakFlag

void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)

Enables the FlexIO i2c master interrupt requests.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Interrupt source. Currently only one interrupt request source:
- kFLEXIO_I2C_TransferCompleteInterruptEnable

void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)

Disables the FlexIO I2C master interrupt requests.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Interrupt source.

void FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the FlexIO I2C master transfer baudrate.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
baudRate_Bps – the baud rate value in HZ
srcClock_Hz – source clock in HZ

void FLEXIO_I2C_MasterStart(FLEXIO_I2C_Type *base, uint8_t address, flexio_i2c_direction_t direction)

Sends START + 7-bit address to the bus.

Note

This API should be called when the transfer configuration is ready to send a START signal and 7-bit address to the bus. This is a non-blocking API, which returns directly after the address is put into the data register but the address transfer is not finished on the bus. Ensure that the kFLEXIO_I2C_RxFullFlag status is asserted before calling this API.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
address – 7-bit address.
direction – transfer direction. This parameter is one of the values in flexio_i2c_direction_t:
- kFLEXIO_I2C_Write: Transmit
- kFLEXIO_I2C_Read: Receive

void FLEXIO_I2C_MasterStop(FLEXIO_I2C_Type *base)

Sends the stop signal on the bus.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterRepeatedStart(FLEXIO_I2C_Type *base)

Sends the repeated start signal on the bus.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterAbortStop(FLEXIO_I2C_Type *base)

Sends the stop signal when transfer is still on-going.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterEnableAck(FLEXIO_I2C_Type *base, bool enable)

Configures the sent ACK/NAK for the following byte.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
enable – True to configure send ACK, false configure to send NAK.

status_t FLEXIO_I2C_MasterSetTransferCount(FLEXIO_I2C_Type *base, uint16_t count)

Sets the number of bytes to be transferred from a start signal to a stop signal.

Note

Call this API before a transfer begins because the timer generates a number of clocks according to the number of bytes that need to be transferred.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
count – Number of bytes need to be transferred from a start signal to a re-start/stop signal

Return values:

kStatus_Success – Successfully configured the count.
kStatus_InvalidArgument – Input argument is invalid.

static inline void FLEXIO_I2C_MasterWriteByte(FLEXIO_I2C_Type *base, uint32_t data)

Writes one byte of data to the I2C bus.

Note

This is a non-blocking API, which returns directly after the data is put into the data register but the data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
data – a byte of data.

static inline uint8_t FLEXIO_I2C_MasterReadByte(FLEXIO_I2C_Type *base)

Reads one byte of data from the I2C bus.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the data is ready in the register.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

Returns:

data byte read.

status_t FLEXIO_I2C_MasterWriteBlocking(FLEXIO_I2C_Type *base, const uint8_t *txBuff, uint8_t txSize)

Sends a buffer of data in bytes.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
txBuff – The data bytes to send.
txSize – The number of data bytes to send.

Return values:

kStatus_Success – Successfully write data.
kStatus_FLEXIO_I2C_Nak – Receive NAK during writing data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

status_t FLEXIO_I2C_MasterReadBlocking(FLEXIO_I2C_Type *base, uint8_t *rxBuff, uint8_t rxSize)

Receives a buffer of bytes.

Note

This function blocks via polling until all bytes have been received.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
rxBuff – The buffer to store the received bytes.
rxSize – The number of data bytes to be received.

Return values:

kStatus_Success – Successfully read data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

status_t FLEXIO_I2C_MasterTransferBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_transfer_t *xfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to receiving NAK.

Parameters:

base – pointer to FLEXIO_I2C_Type structure.
xfer – pointer to flexio_i2c_master_transfer_t structure.

Returns:

status of status_t.

status_t FLEXIO_I2C_MasterTransferCreateHandle(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_callback_t callback, void *userData)

Initializes the I2C handle which is used in transactional functions.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
handle – Pointer to flexio_i2c_master_handle_t structure to store the transfer state.
callback – Pointer to user callback function.
userData – User param passed to the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/isr table out of range.

status_t FLEXIO_I2C_MasterTransferNonBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_t *xfer)

Performs a master interrupt non-blocking transfer on the I2C bus.

Note

The API returns immediately after the transfer initiates. Call FLEXIO_I2C_MasterTransferGetCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_FLEXIO_I2C_Busy, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state
xfer – pointer to flexio_i2c_master_transfer_t structure

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_FLEXIO_I2C_Busy – FlexIO I2C is not idle, is running another transfer.

status_t FLEXIO_I2C_MasterTransferGetCount(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, size_t *count)

Gets the master transfer status during a interrupt non-blocking transfer.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.
kStatus_Success – Successfully return the count.

void FLEXIO_I2C_MasterTransferAbort(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle)

Aborts an interrupt non-blocking transfer early.

Note

This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state

void FLEXIO_I2C_MasterTransferHandleIRQ(void *i2cType, void *i2cHandle)

Master interrupt handler.

Parameters:

i2cType – Pointer to FLEXIO_I2C_Type structure
i2cHandle – Pointer to flexio_i2c_master_transfer_t structure

FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION

FlexIO I2C transfer status.

Values:

enumerator kStatus_FLEXIO_I2C_Busy: I2C is busy doing transfer.

enumerator kStatus_FLEXIO_I2C_Idle: I2C is busy doing transfer.

enumerator kStatus_FLEXIO_I2C_Nak: NAK received during transfer.

enumerator kStatus_FLEXIO_I2C_Timeout: Timeout polling status flags.

enum _flexio_i2c_master_interrupt

Define FlexIO I2C master interrupt mask.

Values:

enumerator kFLEXIO_I2C_TxEmptyInterruptEnable: Tx buffer empty interrupt enable.

enumerator kFLEXIO_I2C_RxFullInterruptEnable: Rx buffer full interrupt enable.

enum _flexio_i2c_master_status_flags

Define FlexIO I2C master status mask.

Values:

enumerator kFLEXIO_I2C_TxEmptyFlag: Tx shifter empty flag.

enumerator kFLEXIO_I2C_RxFullFlag: Rx shifter full/Transfer complete flag.

enumerator kFLEXIO_I2C_ReceiveNakFlag: Receive NAK flag.

enum _flexio_i2c_direction

Direction of master transfer.

Values:

enumerator kFLEXIO_I2C_Write: Master send to slave.

enumerator kFLEXIO_I2C_Read: Master receive from slave.

typedef enum _flexio_i2c_direction flexio_i2c_direction_t: Direction of master transfer.

typedef struct _flexio_i2c_type FLEXIO_I2C_Type: Define FlexIO I2C master access structure typedef.

typedef struct _flexio_i2c_master_config flexio_i2c_master_config_t: Define FlexIO I2C master user configuration structure.

typedef struct _flexio_i2c_master_transfer flexio_i2c_master_transfer_t: Define FlexIO I2C master transfer structure.

typedef struct _flexio_i2c_master_handle flexio_i2c_master_handle_t: FlexIO I2C master handle typedef.

typedef void (*flexio_i2c_master_transfer_callback_t)(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, status_t status, void *userData): FlexIO I2C master transfer callback typedef.

I2C_RETRY_TIMES: Retry times for waiting flag.

struct _flexio_i2c_type

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t SDAPinIndex: Pin select for I2C SDA.

uint8_t SCLPinIndex: Pin select for I2C SCL.

uint8_t shifterIndex[2]: Shifter index used in FlexIO I2C.

uint8_t timerIndex[3]: Timer index used in FlexIO I2C.

uint32_t baudrate: Master transfer baudrate, used to calculate delay time.

struct _flexio_i2c_master_config

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master user configuration structure.

Public Members

bool enableMaster: Enables the FlexIO I2C peripheral at initialization time.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

struct _flexio_i2c_master_transfer

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master transfer structure.

Public Members

uint32_t flags: Transfer flag which controls the transfer, reserved for FlexIO I2C.

uint8_t slaveAddress: 7-bit slave address.

flexio_i2c_direction_t direction: Transfer direction, read or write.

uint32_t subaddress: Sub address. Transferred MSB first.

uint8_t subaddressSize: Size of command buffer.

uint8_t volatile *data: Transfer buffer.

volatile size_t dataSize: Transfer size.

struct _flexio_i2c_master_handle

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master handle structure.

Public Members

flexio_i2c_master_transfer_t transfer: FlexIO I2C master transfer copy.

size_t transferSize: Total bytes to be transferred.

uint8_t state: Transfer state maintained during transfer.

flexio_i2c_master_transfer_callback_t completionCallback: Callback function called at transfer event. Callback function called at transfer event.

void *userData: Callback parameter passed to callback function.

bool needRestart: Whether master needs to send re-start signal.

FlexIO I2S Driver

void FLEXIO_I2S_Init(FLEXIO_I2S_Type *base, const flexio_i2s_config_t *config)

Initializes the FlexIO I2S.

This API configures FlexIO pins and shifter to I2S and configures the FlexIO I2S with a configuration structure. The configuration structure can be filled by the user, or be set with default values by FLEXIO_I2S_GetDefaultConfig().

Note

This API should be called at the beginning of the application to use the FlexIO I2S driver. Otherwise, any access to the FlexIO I2S module can cause hard fault because the clock is not enabled.

Parameters:

base – FlexIO I2S base pointer
config – FlexIO I2S configure structure.

void FLEXIO_I2S_GetDefaultConfig(flexio_i2s_config_t *config)

Sets the FlexIO I2S configuration structure to default values.

The purpose of this API is to get the configuration structure initialized for use in FLEXIO_I2S_Init(). Users may use the initialized structure unchanged in FLEXIO_I2S_Init() or modify some fields of the structure before calling FLEXIO_I2S_Init().

Parameters:

config – pointer to master configuration structure

void FLEXIO_I2S_Deinit(FLEXIO_I2S_Type *base)

De-initializes the FlexIO I2S.

Calling this API resets the FlexIO I2S shifter and timer config. After calling this API, call the FLEXO_I2S_Init to use the FlexIO I2S module.

Parameters:

base – FlexIO I2S base pointer

static inline void FLEXIO_I2S_Enable(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S module operation.

Parameters:

base – Pointer to FLEXIO_I2S_Type
enable – True to enable, false dose not have any effect.

uint32_t FLEXIO_I2S_GetStatusFlags(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S status flags.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

Status flag, which are ORed by the enumerators in the _flexio_i2s_status_flags.

void FLEXIO_I2S_EnableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)

Enables the FlexIO I2S interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
mask – interrupt source

void FLEXIO_I2S_DisableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)

Disables the FlexIO I2S interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – pointer to FLEXIO_I2S_Type structure
mask – interrupt source

static inline void FLEXIO_I2S_TxEnableDMA(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S Tx DMA requests.

Parameters:

base – FlexIO I2S base pointer
enable – True means enable DMA, false means disable DMA.

static inline void FLEXIO_I2S_RxEnableDMA(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S Rx DMA requests.

Parameters:

base – FlexIO I2S base pointer
enable – True means enable DMA, false means disable DMA.

static inline uint32_t FLEXIO_I2S_TxGetDataRegisterAddress(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S send data register address.

This function returns the I2S data register address, mainly used by DMA/eDMA.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

FlexIO i2s send data register address.

static inline uint32_t FLEXIO_I2S_RxGetDataRegisterAddress(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S receive data register address.

This function returns the I2S data register address, mainly used by DMA/eDMA.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

FlexIO i2s receive data register address.

void FLEXIO_I2S_MasterSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S audio format in master mode.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
format – Pointer to FlexIO I2S audio data format structure.
srcClock_Hz – I2S master clock source frequency in Hz.

void FLEXIO_I2S_SlaveSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format)

Configures the FlexIO I2S audio format in slave mode.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
format – Pointer to FlexIO I2S audio data format structure.

status_t FLEXIO_I2S_WriteBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *txData, size_t size)

Sends data using a blocking method.

Note

This function blocks via polling until data is ready to be sent.

Parameters:

base – FlexIO I2S base pointer.
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
txData – Pointer to the data to be written.
size – Bytes to be written.

Return values:

kStatus_Success – Successfully write data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

static inline void FLEXIO_I2S_WriteData(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint32_t data)

Writes data into a data register.

Parameters:

base – FlexIO I2S base pointer.
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
data – Data to be written.

status_t FLEXIO_I2S_ReadBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *rxData, size_t size)

Receives a piece of data using a blocking method.

Note

This function blocks via polling until data is ready to be sent.

Parameters:

base – FlexIO I2S base pointer
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
rxData – Pointer to the data to be read.
size – Bytes to be read.

Return values:

kStatus_Success – Successfully read data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

static inline uint32_t FLEXIO_I2S_ReadData(FLEXIO_I2S_Type *base)

Reads a data from the data register.

Parameters:

base – FlexIO I2S base pointer

Returns:

Data read from data register.

void FLEXIO_I2S_TransferTxCreateHandle(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_callback_t callback, void *userData)

Initializes the FlexIO I2S handle.

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs. Call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
handle – Pointer to flexio_i2s_handle_t structure to store the transfer state.
callback – FlexIO I2S callback function, which is called while finished a block.
userData – User parameter for the FlexIO I2S callback.

void FLEXIO_I2S_TransferSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S audio format.

Audio format can be changed at run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – FlexIO I2S handle pointer.
format – Pointer to audio data format structure.
srcClock_Hz – FlexIO I2S bit clock source frequency in Hz. This parameter should be 0 while in slave mode.

void FLEXIO_I2S_TransferRxCreateHandle(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_callback_t callback, void *userData)

Initializes the FlexIO I2S receive handle.

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs. Call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure to store the transfer state.
callback – FlexIO I2S callback function, which is called while finished a block.
userData – User parameter for the FlexIO I2S callback.

status_t FLEXIO_I2S_TransferSendNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs an interrupt non-blocking send transfer on FlexIO I2S.

Note

The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status and check whether the transfer is finished. If the return status is 0, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
xfer – Pointer to flexio_i2s_transfer_t structure

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_FLEXIO_I2S_TxBusy – Previous transmission still not finished, data not all written to TX register yet.
kStatus_InvalidArgument – The input parameter is invalid.

status_t FLEXIO_I2S_TransferReceiveNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs an interrupt non-blocking receive transfer on FlexIO I2S.

Note

The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status to check whether the transfer is finished. If the return status is 0, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
xfer – Pointer to flexio_i2s_transfer_t structure

Return values:

kStatus_Success – Successfully start the data receive.
kStatus_FLEXIO_I2S_RxBusy – Previous receive still not finished.
kStatus_InvalidArgument – The input parameter is invalid.

void FLEXIO_I2S_TransferAbortSend(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)

Aborts the current send.

Note

This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer in a early time.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state

void FLEXIO_I2S_TransferAbortReceive(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)

Aborts the current receive.

Note

This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer in a early time.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state

status_t FLEXIO_I2S_TransferGetSendCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)

Gets the remaining bytes to be sent.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
count – Bytes sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)

Gets the remaining bytes to be received.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
count – Bytes recieved.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

Returns:

count Bytes received.

void FLEXIO_I2S_TransferTxHandleIRQ(void *i2sBase, void *i2sHandle)

Tx interrupt handler.

Parameters:

i2sBase – Pointer to FLEXIO_I2S_Type structure.
i2sHandle – Pointer to flexio_i2s_handle_t structure

void FLEXIO_I2S_TransferRxHandleIRQ(void *i2sBase, void *i2sHandle)

Rx interrupt handler.

Parameters:

i2sBase – Pointer to FLEXIO_I2S_Type structure.
i2sHandle – Pointer to flexio_i2s_handle_t structure.

FSL_FLEXIO_I2S_DRIVER_VERSION: FlexIO I2S driver version 2.2.0.

FlexIO I2S transfer status.

Values:

enumerator kStatus_FLEXIO_I2S_Idle: FlexIO I2S is in idle state

enumerator kStatus_FLEXIO_I2S_TxBusy: FlexIO I2S Tx is busy

enumerator kStatus_FLEXIO_I2S_RxBusy: FlexIO I2S Tx is busy

enumerator kStatus_FLEXIO_I2S_Error: FlexIO I2S error occurred

enumerator kStatus_FLEXIO_I2S_QueueFull: FlexIO I2S transfer queue is full.

enumerator kStatus_FLEXIO_I2S_Timeout: FlexIO I2S timeout polling status flags.

enum _flexio_i2s_master_slave

Master or slave mode.

Values:

enumerator kFLEXIO_I2S_Master: Master mode

enumerator kFLEXIO_I2S_Slave: Slave mode

_flexio_i2s_interrupt_enable Define FlexIO FlexIO I2S interrupt mask.

Values:

enumerator kFLEXIO_I2S_TxDataRegEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_I2S_RxDataRegFullInterruptEnable: Receive buffer full interrupt enable.

_flexio_i2s_status_flags Define FlexIO FlexIO I2S status mask.

Values:

enumerator kFLEXIO_I2S_TxDataRegEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_I2S_RxDataRegFullFlag: Receive buffer full flag.

enum _flexio_i2s_sample_rate

Audio sample rate.

Values:

enumerator kFLEXIO_I2S_SampleRate8KHz: Sample rate 8000Hz

enumerator kFLEXIO_I2S_SampleRate11025Hz: Sample rate 11025Hz

enumerator kFLEXIO_I2S_SampleRate12KHz: Sample rate 12000Hz

enumerator kFLEXIO_I2S_SampleRate16KHz: Sample rate 16000Hz

enumerator kFLEXIO_I2S_SampleRate22050Hz: Sample rate 22050Hz

enumerator kFLEXIO_I2S_SampleRate24KHz: Sample rate 24000Hz

enumerator kFLEXIO_I2S_SampleRate32KHz: Sample rate 32000Hz

enumerator kFLEXIO_I2S_SampleRate44100Hz: Sample rate 44100Hz

enumerator kFLEXIO_I2S_SampleRate48KHz: Sample rate 48000Hz

enumerator kFLEXIO_I2S_SampleRate96KHz: Sample rate 96000Hz

enum _flexio_i2s_word_width

Audio word width.

Values:

enumerator kFLEXIO_I2S_WordWidth8bits: Audio data width 8 bits

enumerator kFLEXIO_I2S_WordWidth16bits: Audio data width 16 bits

enumerator kFLEXIO_I2S_WordWidth24bits: Audio data width 24 bits

enumerator kFLEXIO_I2S_WordWidth32bits: Audio data width 32 bits

typedef struct _flexio_i2s_type FLEXIO_I2S_Type: Define FlexIO I2S access structure typedef.

typedef enum _flexio_i2s_master_slave flexio_i2s_master_slave_t: Master or slave mode.

typedef struct _flexio_i2s_config flexio_i2s_config_t: FlexIO I2S configure structure.

typedef struct _flexio_i2s_format flexio_i2s_format_t: FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx.

typedef enum _flexio_i2s_sample_rate flexio_i2s_sample_rate_t: Audio sample rate.

typedef enum _flexio_i2s_word_width flexio_i2s_word_width_t: Audio word width.

typedef struct _flexio_i2s_transfer flexio_i2s_transfer_t: Define FlexIO I2S transfer structure.

typedef struct _flexio_i2s_handle flexio_i2s_handle_t

typedef void (*flexio_i2s_callback_t)(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, status_t status, void *userData): FlexIO I2S xfer callback prototype.

I2S_RETRY_TIMES: Retry times for waiting flag.

FLEXIO_I2S_XFER_QUEUE_SIZE: FlexIO I2S transfer queue size, user can refine it according to use case.

struct _flexio_i2s_type

#include <fsl_flexio_i2s.h>

Define FlexIO I2S access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer

uint8_t txPinIndex: Tx data pin index in FlexIO pins

uint8_t rxPinIndex: Rx data pin index

uint8_t bclkPinIndex: Bit clock pin index

uint8_t fsPinIndex: Frame sync pin index

uint8_t txShifterIndex: Tx data shifter index

uint8_t rxShifterIndex: Rx data shifter index

uint8_t bclkTimerIndex: Bit clock timer index

uint8_t fsTimerIndex: Frame sync timer index

struct _flexio_i2s_config

#include <fsl_flexio_i2s.h>

FlexIO I2S configure structure.

Public Members

bool enableI2S: Enable FlexIO I2S

flexio_i2s_master_slave_t masterSlave: Master or slave

flexio_pin_polarity_t txPinPolarity: Tx data pin polarity, active high or low

flexio_pin_polarity_t rxPinPolarity: Rx data pin polarity

flexio_pin_polarity_t bclkPinPolarity: Bit clock pin polarity

flexio_pin_polarity_t fsPinPolarity: Frame sync pin polarity

flexio_shifter_timer_polarity_t txTimerPolarity: Tx data valid on bclk rising or falling edge

flexio_shifter_timer_polarity_t rxTimerPolarity: Rx data valid on bclk rising or falling edge

struct _flexio_i2s_format

#include <fsl_flexio_i2s.h>

FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx.

Public Members

uint8_t bitWidth: Bit width of audio data, always 8/16/24/32 bits

uint32_t sampleRate_Hz: Sample rate of the audio data

struct _flexio_i2s_transfer

#include <fsl_flexio_i2s.h>

Define FlexIO I2S transfer structure.

Public Members

uint8_t *data: Data buffer start pointer

size_t dataSize: Bytes to be transferred.

struct _flexio_i2s_handle

#include <fsl_flexio_i2s.h>

Define FlexIO I2S handle structure.

Public Members

uint32_t state: Internal state

flexio_i2s_callback_t callback: Callback function called at transfer event

void *userData: Callback parameter passed to callback function

uint8_t bitWidth: Bit width for transfer, 8/16/24/32bits

flexio_i2s_transfer_t queue[(4U)]: Transfer queue storing queued transfer

size_t transferSize[(4U)]: Data bytes need to transfer

volatile uint8_t queueUser: Index for user to queue transfer

volatile uint8_t queueDriver: Index for driver to get the transfer data and size

FlexIO SPI Driver

void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI master hardware, and configures the FlexIO SPI with FlexIO SPI master configuration. The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_MasterGetDefaultConfig().

Example

FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_spi_master_config_t config = {
.enableMaster = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 500000,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz);

Note

1.FlexIO SPI master only support CPOL = 0, which means clock inactive low. 2.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time is 2.5 clock cycles. So if FlexIO SPI master communicates with other spi IPs, the maximum baud rate is FlexIO clock frequency divided by 2*2=4. If FlexIO SPI master communicates with FlexIO SPI slave, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
masterConfig – Pointer to the flexio_spi_master_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base)

Resets the FlexIO SPI timer and shifter config.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig)

Gets the default configuration to configure the FlexIO SPI master. The configuration can be used directly by calling the FLEXIO_SPI_MasterConfigure(). Example:

flexio_spi_master_config_t masterConfig;
FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig);

Parameters:

masterConfig – Pointer to the flexio_spi_master_config_t structure.

void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig)

Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration. The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_SlaveGetDefaultConfig().

Note

1.Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored. 2.FlexIO SPI slave only support CPOL = 0, which means clock inactive low. 3.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time is 2.5 clock cycles. So if FlexIO SPI slave communicates with other spi IPs, the maximum baud rate is FlexIO clock frequency divided by 3*2=6. If FlexIO SPI slave communicates with FlexIO SPI master, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8. Example

FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0}
};
flexio_spi_slave_config_t config = {
.enableSlave = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_SlaveInit(&spiDev, &config);

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
slaveConfig – Pointer to the flexio_spi_slave_config_t structure.

void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base)

Gates the FlexIO clock.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig)

Gets the default configuration to configure the FlexIO SPI slave. The configuration can be used directly for calling the FLEXIO_SPI_SlaveConfigure(). Example:

flexio_spi_slave_config_t slaveConfig;
FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters:

slaveConfig – Pointer to the flexio_spi_slave_config_t structure.

uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base)

Gets FlexIO SPI status flags.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.

Returns:

status flag; Use the status flag to AND the following flag mask and get the status.

kFLEXIO_SPI_TxEmptyFlag
kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask)

Clears FlexIO SPI status flags.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – status flag The parameter can be any combination of the following values:
- kFLEXIO_SPI_TxEmptyFlag
- kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)

Enables the FlexIO SPI interrupt.

This function enables the FlexIO SPI interrupt.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – interrupt source. The parameter can be any combination of the following values:
- kFLEXIO_SPI_RxFullInterruptEnable
- kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)

Disables the FlexIO SPI interrupt.

This function disables the FlexIO SPI interrupt.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – interrupt source The parameter can be any combination of the following values:
- kFLEXIO_SPI_RxFullInterruptEnable
- kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable)

Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA, which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – SPI DMA source.
enable – True means enable DMA, false means disable DMA.

static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Gets the FlexIO SPI transmit data register address for MSB first transfer.

This function returns the SPI data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

FlexIO SPI transmit data register address.

static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Gets the FlexIO SPI receive data register address for the MSB first transfer.

This function returns the SPI data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

FlexIO SPI receive data register address.

static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable)

Enables/disables the FlexIO SPI module operation.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.
enable – True to enable, false does not have any effect.

void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz)

Sets baud rate for the FlexIO SPI transfer, which is only used for the master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
baudRate_Bps – Baud Rate needed in Hz.
srcClockHz – SPI source clock frequency in Hz.

static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint32_t data)

Writes one byte of data, which is sent using the MSB method.

Note

This is a non-blocking API, which returns directly after the data is put into the data register but the data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
data – 8/16/32 bit data.

static inline uint32_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Reads 8 bit/16 bit data.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the RxFullFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

8 bit/16 bit data received.

status_t FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, const uint8_t *buffer, size_t size)

Sends a buffer of data bytes.

Note

This function blocks using the polling method until all bytes have been sent.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
buffer – The data bytes to send.
size – The number of data bytes to send.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

status_t FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint8_t *buffer, size_t size)

Receives a buffer of bytes.

Note

This function blocks using the polling method until all bytes have been received.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
buffer – The buffer to store the received bytes.
size – The number of data bytes to be received.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

status_t FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer)

Receives a buffer of bytes.

Note

This function blocks via polling until all bytes have been received.

Parameters:

base – pointer to FLEXIO_SPI_Type structure
xfer – FlexIO SPI transfer structure, see flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

void FLEXIO_SPI_FlushShifters(FLEXIO_SPI_Type *base)

Flush tx/rx shifters.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.

status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_master_transfer_callback_t callback, void *userData)

Initializes the FlexIO SPI Master handle, which is used in transactional functions.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_transfer_t *xfer)

Master transfer data using IRQ.

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, the callback function is called.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
xfer – FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle)

Aborts the master data transfer, which used IRQ.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count)

Gets the data transfer status which used IRQ.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle)

FlexIO SPI master IRQ handler function.

Parameters:

spiType – Pointer to the FLEXIO_SPI_Type structure.
spiHandle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_slave_transfer_callback_t callback, void *userData)

Initializes the FlexIO SPI Slave handle, which is used in transactional functions.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_transfer_t *xfer)

Slave transfer data using IRQ.

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, the callback function is called.

Parameters:

handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
base – Pointer to the FLEXIO_SPI_Type structure.
xfer – FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – SPI is not idle; it is running another transfer.

static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle)

Aborts the slave data transfer which used IRQ, share same API with master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, size_t *count)

Gets the data transfer status which used IRQ, share same API with master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle)

FlexIO SPI slave IRQ handler function.

Parameters:

spiType – Pointer to the FLEXIO_SPI_Type structure.
spiHandle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

FSL_FLEXIO_SPI_DRIVER_VERSION: FlexIO SPI driver version.

Error codes for the FlexIO SPI driver.

Values:

enumerator kStatus_FLEXIO_SPI_Busy: FlexIO SPI is busy.

enumerator kStatus_FLEXIO_SPI_Idle: SPI is idle

enumerator kStatus_FLEXIO_SPI_Error: FlexIO SPI error.

enumerator kStatus_FLEXIO_SPI_Timeout: FlexIO SPI timeout polling status flags.

enum _flexio_spi_clock_phase

FlexIO SPI clock phase configuration.

Values:

enumerator kFLEXIO_SPI_ClockPhaseFirstEdge: First edge on SPSCK occurs at the middle of the first cycle of a data transfer.

enumerator kFLEXIO_SPI_ClockPhaseSecondEdge: First edge on SPSCK occurs at the start of the first cycle of a data transfer.

enum _flexio_spi_shift_direction

FlexIO SPI data shifter direction options.

Values:

enumerator kFLEXIO_SPI_MsbFirst: Data transfers start with most significant bit.

enumerator kFLEXIO_SPI_LsbFirst: Data transfers start with least significant bit.

enum _flexio_spi_data_bitcount_mode

FlexIO SPI data length mode options.

Values:

enumerator kFLEXIO_SPI_8BitMode: 8-bit data transmission mode.

enumerator kFLEXIO_SPI_16BitMode: 16-bit data transmission mode.

enumerator kFLEXIO_SPI_32BitMode: 32-bit data transmission mode.

enum _flexio_spi_interrupt_enable

Define FlexIO SPI interrupt mask.

Values:

enumerator kFLEXIO_SPI_TxEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_SPI_RxFullInterruptEnable: Receive buffer full interrupt enable.

enum _flexio_spi_status_flags

Define FlexIO SPI status mask.

Values:

enumerator kFLEXIO_SPI_TxBufferEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_SPI_RxBufferFullFlag: Receive buffer full flag.

enum _flexio_spi_dma_enable

Define FlexIO SPI DMA mask.

Values:

enumerator kFLEXIO_SPI_TxDmaEnable: Tx DMA request source

enumerator kFLEXIO_SPI_RxDmaEnable: Rx DMA request source

enumerator kFLEXIO_SPI_DmaAllEnable: All DMA request source

enum _flexio_spi_transfer_flags

Define FlexIO SPI transfer flags.

Note

Use kFLEXIO_SPI_csContinuous and one of the other flags to OR together to form the transfer flag.

Values:

enumerator kFLEXIO_SPI_8bitMsb: FlexIO SPI 8-bit MSB first

enumerator kFLEXIO_SPI_8bitLsb: FlexIO SPI 8-bit LSB first

enumerator kFLEXIO_SPI_16bitMsb: FlexIO SPI 16-bit MSB first

enumerator kFLEXIO_SPI_16bitLsb: FlexIO SPI 16-bit LSB first

enumerator kFLEXIO_SPI_32bitMsb: FlexIO SPI 32-bit MSB first

enumerator kFLEXIO_SPI_32bitLsb: FlexIO SPI 32-bit LSB first

enumerator kFLEXIO_SPI_csContinuous: Enable the CS signal continuous mode

typedef enum _flexio_spi_clock_phase flexio_spi_clock_phase_t: FlexIO SPI clock phase configuration.

typedef enum _flexio_spi_shift_direction flexio_spi_shift_direction_t: FlexIO SPI data shifter direction options.

typedef enum _flexio_spi_data_bitcount_mode flexio_spi_data_bitcount_mode_t: FlexIO SPI data length mode options.

typedef struct _flexio_spi_type FLEXIO_SPI_Type: Define FlexIO SPI access structure typedef.

typedef struct _flexio_spi_master_config flexio_spi_master_config_t: Define FlexIO SPI master configuration structure.

typedef struct _flexio_spi_slave_config flexio_spi_slave_config_t: Define FlexIO SPI slave configuration structure.

typedef struct _flexio_spi_transfer flexio_spi_transfer_t: Define FlexIO SPI transfer structure.

typedef struct _flexio_spi_master_handle flexio_spi_master_handle_t: typedef for flexio_spi_master_handle_t in advance.

typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t: Slave handle is the same with master handle.

typedef void (*flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, status_t status, void *userData): FlexIO SPI master callback for finished transmit.

typedef void (*flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, status_t status, void *userData): FlexIO SPI slave callback for finished transmit.

FLEXIO_SPI_DUMMYDATA: FlexIO SPI dummy transfer data, the data is sent while txData is NULL.

SPI_RETRY_TIMES: Retry times for waiting flag.

FLEXIO_SPI_XFER_DATA_FORMAT(flag): Get the transfer data format of width and bit order.

struct _flexio_spi_type

#include <fsl_flexio_spi.h>

Define FlexIO SPI access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t SDOPinIndex: Pin select for data output. To set SDO pin in Hi-Z state, user needs to mux the pin as GPIO input and disable all pull up/down in application.

uint8_t SDIPinIndex: Pin select for data input.

uint8_t SCKPinIndex: Pin select for clock.

uint8_t CSnPinIndex: Pin select for enable.

uint8_t shifterIndex[2]: Shifter index used in FlexIO SPI.

uint8_t timerIndex[2]: Timer index used in FlexIO SPI.

struct _flexio_spi_master_config

#include <fsl_flexio_spi.h>

Define FlexIO SPI master configuration structure.

Public Members

bool enableMaster: Enable/disable FlexIO SPI master after configuration.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

flexio_spi_clock_phase_t phase: Clock phase.

flexio_spi_data_bitcount_mode_t dataMode: 8bit or 16bit mode.

struct _flexio_spi_slave_config

#include <fsl_flexio_spi.h>

Define FlexIO SPI slave configuration structure.

Public Members

bool enableSlave: Enable/disable FlexIO SPI slave after configuration.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

flexio_spi_clock_phase_t phase: Clock phase.

flexio_spi_data_bitcount_mode_t dataMode: 8bit or 16bit mode.

struct _flexio_spi_transfer

#include <fsl_flexio_spi.h>

Define FlexIO SPI transfer structure.

Public Members

const uint8_t *txData: Send buffer.

uint8_t *rxData: Receive buffer.

size_t dataSize: Transfer bytes.

uint8_t flags: FlexIO SPI control flag, MSB first or LSB first.

struct _flexio_spi_master_handle

#include <fsl_flexio_spi.h>

Define FlexIO SPI handle structure.

Public Members

const uint8_t *txData: Transfer buffer.

uint8_t *rxData: Receive buffer.

size_t transferSize: Total bytes to be transferred.

volatile size_t txRemainingBytes: Send data remaining in bytes.

volatile size_t rxRemainingBytes: Receive data remaining in bytes.

volatile uint32_t state: FlexIO SPI internal state.

uint8_t bytePerFrame: SPI mode, 2bytes or 1byte in a frame

flexio_spi_shift_direction_t direction: Shift direction.

flexio_spi_master_transfer_callback_t callback: FlexIO SPI callback.

void *userData: Callback parameter.

FlexIO UART Driver

status_t FLEXIO_UART_Init(FLEXIO_UART_Type *base, const flexio_uart_config_t *userConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, configures FlexIO UART hardware, and configures the FlexIO UART with FlexIO UART configuration. The configuration structure can be filled by the user or be set with default values by FLEXIO_UART_GetDefaultConfig().

Example

FLEXIO_UART_Type base = {
.flexioBase = FLEXIO,
.TxPinIndex = 0,
.RxPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_uart_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 115200U,
.bitCountPerChar = 8
};
FLEXIO_UART_Init(base, &config, srcClock_Hz);

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
userConfig – Pointer to the flexio_uart_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

Return values:

kStatus_Success – Configuration success.
kStatus_FLEXIO_UART_BaudrateNotSupport – Baudrate is not supported for current clock source frequency.

void FLEXIO_UART_Deinit(FLEXIO_UART_Type *base)

Resets the FlexIO UART shifter and timer config.

Note

After calling this API, call the FLEXO_UART_Init to use the FlexIO UART module.

Parameters:

base – Pointer to FLEXIO_UART_Type structure

void FLEXIO_UART_GetDefaultConfig(flexio_uart_config_t *userConfig)

Gets the default configuration to configure the FlexIO UART. The configuration can be used directly for calling the FLEXIO_UART_Init(). Example:

flexio_uart_config_t config;
FLEXIO_UART_GetDefaultConfig(&userConfig);

Parameters:

userConfig – Pointer to the flexio_uart_config_t structure.

uint32_t FLEXIO_UART_GetStatusFlags(FLEXIO_UART_Type *base)

Gets the FlexIO UART status flags.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART status flags.

void FLEXIO_UART_ClearStatusFlags(FLEXIO_UART_Type *base, uint32_t mask)

Gets the FlexIO UART status flags.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Status flag. The parameter can be any combination of the following values:
- kFLEXIO_UART_TxDataRegEmptyFlag
- kFLEXIO_UART_RxEmptyFlag
- kFLEXIO_UART_RxOverRunFlag

void FLEXIO_UART_EnableInterrupts(FLEXIO_UART_Type *base, uint32_t mask)

Enables the FlexIO UART interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Interrupt source.

void FLEXIO_UART_DisableInterrupts(FLEXIO_UART_Type *base, uint32_t mask)

Disables the FlexIO UART interrupt.

This function disables the FlexIO UART interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Interrupt source.

static inline uint32_t FLEXIO_UART_GetTxDataRegisterAddress(FLEXIO_UART_Type *base)

Gets the FlexIO UARt transmit data register address.

This function returns the UART data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART transmit data register address.

static inline uint32_t FLEXIO_UART_GetRxDataRegisterAddress(FLEXIO_UART_Type *base)

Gets the FlexIO UART receive data register address.

This function returns the UART data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART receive data register address.

static inline void FLEXIO_UART_EnableTxDMA(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART transmit DMA. This function enables/disables the FlexIO UART Tx DMA, which means asserting the kFLEXIO_UART_TxDataRegEmptyFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
enable – True to enable, false to disable.

static inline void FLEXIO_UART_EnableRxDMA(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART receive DMA. This function enables/disables the FlexIO UART Rx DMA, which means asserting kFLEXIO_UART_RxDataRegFullFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
enable – True to enable, false to disable.

static inline void FLEXIO_UART_Enable(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART module operation.

Parameters:

base – Pointer to the FLEXIO_UART_Type.
enable – True to enable, false does not have any effect.

static inline void FLEXIO_UART_WriteByte(FLEXIO_UART_Type *base, const uint8_t *buffer)

Writes one byte of data.

Note

This is a non-blocking API, which returns directly after the data is put into the data register. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
buffer – The data bytes to send.

static inline void FLEXIO_UART_ReadByte(FLEXIO_UART_Type *base, uint8_t *buffer)

Reads one byte of data.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the RxFullFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
buffer – The buffer to store the received bytes.

status_t FLEXIO_UART_WriteBlocking(FLEXIO_UART_Type *base, const uint8_t *txData, size_t txSize)

Sends a buffer of data bytes.

Note

This function blocks using the polling method until all bytes have been sent.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
txData – The data bytes to send.
txSize – The number of data bytes to send.

Return values:

kStatus_FLEXIO_UART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully wrote all data.

status_t FLEXIO_UART_ReadBlocking(FLEXIO_UART_Type *base, uint8_t *rxData, size_t rxSize)

Receives a buffer of bytes.

Note

This function blocks using the polling method until all bytes have been received.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
rxData – The buffer to store the received bytes.
rxSize – The number of data bytes to be received.

Return values:

kStatus_FLEXIO_UART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

status_t FLEXIO_UART_TransferCreateHandle(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_callback_t callback, void *userData)

Initializes the UART handle.

This function initializes the FlexIO UART handle, which can be used for other FlexIO UART transactional APIs. Call this API once to get the initialized handle.

The UART driver supports the “background” receiving, which means that users can set up a RX ring buffer optionally. Data received is stored into the ring buffer even when the user doesn’t call the FLEXIO_UART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, users can get the received data from the ring buffer directly. The ring buffer is disabled if passing NULL as ringBuffer.

Parameters:

base – to FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

void FLEXIO_UART_TransferStartRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific UART handle.

When the RX ring buffer is used, data received is stored into the ring buffer even when the user doesn’t call the UART_ReceiveNonBlocking() API. If there is already data received in the ring buffer, users can get the received data from the ring buffer directly.

Note

When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, only 31 bytes are used for saving data.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
ringBuffer – Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – Size of the ring buffer.

void FLEXIO_UART_TransferStopRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferSendNonBlocking(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in ISR, the FlexIO UART driver calls the callback function and passes the kStatus_FLEXIO_UART_TxIdle as status parameter.

Note

The kStatus_FLEXIO_UART_TxIdle is passed to the upper layer when all data is written to the TX register. However, it does not ensure that all data is sent out.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
xfer – FlexIO UART transfer structure. See flexio_uart_transfer_t.

Return values:

kStatus_Success – Successfully starts the data transmission.
kStatus_UART_TxBusy – Previous transmission still not finished, data not written to the TX register.

void FLEXIO_UART_TransferAbortSend(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt-driven data sending. Get the remainBytes to find out how many bytes are still not sent out.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetSendCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count)

Gets the number of bytes sent.

This function gets the number of bytes sent driven by interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
count – Number of bytes sent so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

status_t FLEXIO_UART_TransferReceiveNonBlocking(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using the interrupt method.

This function receives data using the interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in ring buffer is not enough to read, the receive request is saved by the UART driver. When new data arrives, the receive request is serviced first. When all data is received, the UART driver notifies the upper layer through a callback function and passes the status parameter kStatus_UART_RxIdle. For example, if the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer, the 5 bytes are copied to xfer->data. This function returns with the parameter receivedBytes set to 5. For the last 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the UART driver notifies upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
xfer – UART transfer structure. See flexio_uart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.

Return values:

kStatus_Success – Successfully queue the transfer into the transmit queue.
kStatus_FLEXIO_UART_RxBusy – Previous receive request is not finished.

void FLEXIO_UART_TransferAbortReceive(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the receive data which was using IRQ.

This function aborts the receive data which was using IRQ.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetReceiveCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count)

Gets the number of bytes received.

This function gets the number of bytes received driven by interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
count – Number of bytes received so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

void FLEXIO_UART_TransferHandleIRQ(void *uartType, void *uartHandle)

FlexIO UART IRQ handler function.

This function processes the FlexIO UART transmit and receives the IRQ request.

Parameters:

uartType – Pointer to the FLEXIO_UART_Type structure.
uartHandle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

void FLEXIO_UART_FlushShifters(FLEXIO_UART_Type *base)

Flush tx/rx shifters.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

FSL_FLEXIO_UART_DRIVER_VERSION: FlexIO UART driver version.

Error codes for the UART driver.

Values:

enumerator kStatus_FLEXIO_UART_TxBusy: Transmitter is busy.

enumerator kStatus_FLEXIO_UART_RxBusy: Receiver is busy.

enumerator kStatus_FLEXIO_UART_TxIdle: UART transmitter is idle.

enumerator kStatus_FLEXIO_UART_RxIdle: UART receiver is idle.

enumerator kStatus_FLEXIO_UART_ERROR: ERROR happens on UART.

enumerator kStatus_FLEXIO_UART_RxRingBufferOverrun: UART RX software ring buffer overrun.

enumerator kStatus_FLEXIO_UART_RxHardwareOverrun: UART RX receiver overrun.

enumerator kStatus_FLEXIO_UART_Timeout: UART times out.

enumerator kStatus_FLEXIO_UART_BaudrateNotSupport: Baudrate is not supported in current clock source

enum _flexio_uart_bit_count_per_char

FlexIO UART bit count per char.

Values:

enumerator kFLEXIO_UART_7BitsPerChar: 7-bit data characters

enumerator kFLEXIO_UART_8BitsPerChar: 8-bit data characters

enumerator kFLEXIO_UART_9BitsPerChar: 9-bit data characters

enum _flexio_uart_interrupt_enable

Define FlexIO UART interrupt mask.

Values:

enumerator kFLEXIO_UART_TxDataRegEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_UART_RxDataRegFullInterruptEnable: Receive buffer full interrupt enable.

enum _flexio_uart_status_flags

Define FlexIO UART status mask.

Values:

enumerator kFLEXIO_UART_TxDataRegEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_UART_RxDataRegFullFlag: Receive buffer full flag.

enumerator kFLEXIO_UART_RxOverRunFlag: Receive buffer over run flag.

typedef enum _flexio_uart_bit_count_per_char flexio_uart_bit_count_per_char_t: FlexIO UART bit count per char.

typedef struct _flexio_uart_type FLEXIO_UART_Type: Define FlexIO UART access structure typedef.

typedef struct _flexio_uart_config flexio_uart_config_t: Define FlexIO UART user configuration structure.

typedef struct _flexio_uart_transfer flexio_uart_transfer_t: Define FlexIO UART transfer structure.

typedef struct _flexio_uart_handle flexio_uart_handle_t

typedef void (*flexio_uart_transfer_callback_t)(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, status_t status, void *userData): FlexIO UART transfer callback function.

UART_RETRY_TIMES: Retry times for waiting flag.

struct _flexio_uart_type

#include <fsl_flexio_uart.h>

Define FlexIO UART access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t TxPinIndex: Pin select for UART_Tx.

uint8_t RxPinIndex: Pin select for UART_Rx.

uint8_t shifterIndex[2]: Shifter index used in FlexIO UART.

uint8_t timerIndex[2]: Timer index used in FlexIO UART.

struct _flexio_uart_config

#include <fsl_flexio_uart.h>

Define FlexIO UART user configuration structure.

Public Members

bool enableUart: Enable/disable FlexIO UART TX & RX.

bool enableInDoze: Enable/disable FlexIO operation in doze mode

bool enableInDebug: Enable/disable FlexIO operation in debug mode

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

flexio_uart_bit_count_per_char_t bitCountPerChar: number of bits, 7/8/9 -bit

struct _flexio_uart_transfer

#include <fsl_flexio_uart.h>

Define FlexIO UART transfer structure.

Public Members

size_t dataSize: Transfer size

struct _flexio_uart_handle

#include <fsl_flexio_uart.h>

Define FLEXIO UART handle structure.

Public Members

const uint8_t *volatile txData: Address of remaining data to send.

volatile size_t txDataSize: Size of the remaining data to send.

uint8_t *volatile rxData: Address of remaining data to receive.

volatile size_t rxDataSize: Size of the remaining data to receive.

size_t txDataSizeAll: Total bytes to be sent.

size_t rxDataSizeAll: Total bytes to be received.

uint8_t *rxRingBuffer: Start address of the receiver ring buffer.

size_t rxRingBufferSize: Size of the ring buffer.

volatile uint16_t rxRingBufferHead: Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail: Index for the user to get data from the ring buffer.

flexio_uart_transfer_callback_t callback: Callback function.

void *userData: UART callback function parameter.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

union __unnamed71__

Public Members

uint8_t *data: The buffer of data to be transfer.

uint8_t *rxData: The buffer to receive data.

const uint8_t *txData: The buffer of data to be sent.

FREQME: Frequency Measurement

GDET

status_t GDET_Init(GDET_Type *base)

Initialize GDET.

This function initializes GDET block and setting.

Parameters:

base – GDET peripheral base address

Returns:

Status of the init operation

void GDET_Deinit(GDET_Type *base)

Deinitialize GDET.

This function deinitializes GDET secure counter.

Parameters:

base – GDET peripheral base address

status_t GDET_Enable(GDET_Type *base)

Enable GDET.

This function enables GDET and interrupts.

Parameters:

base – GDET peripheral base address

Returns:

Status of the enable operation

status_t GDET_Disable(GDET_Type *base)

Disable GDET.

This function disables GDET and interrupts.

Parameters:

base – GDET peripheral base address

Returns:

Status of the disable operation

status_t GDET_IsolateOn(GDET_Type *base)

Turn on GDET isolation.

This function turns on isolation of GDET peripheral

Parameters:

base – GDET peripheral base address

Returns:

Status of the operation

status_t GDET_IsolateOff(GDET_Type *base)

Turn off GDET isolation.

This function turns off isolation of GDET peripheral

Parameters:

base – GDET peripheral base address

Returns:

Status of the operation

status_t GDET_ReconfigureVoltageMode(GDET_Type *base, gdet_core_voltage_t voltage)

Change expected core voltage.

This function changes core voltage which Glitch detector expect.

Parameters:

base – GDET peripheral base address
voltage – Expected core voltage

Returns:

Status of the GDET reconfiguration operation

FSL_GDET_DRIVER_VERSION

Defines GDET driver version 2.1.0.

Change log:

Version 2.1.0
- Update for multiple instances
- Fix bug in isolation off API
- Add enable and disable APIs
2.0.1
- Fix MISRA in GDET_ReconfigureVoltageMode()
Version 2.0.0
- initial version

typedef uint32_t gdet_core_voltage_t

GDET Core Voltage.

These constants are used to define core voltage argument to be used with GDET_ReconfigureVoltageMode(). Different SoC may support various volatages, refer to documentation.

void GDET_DriverIRQHandler(void)

kGDET_0_9v: Voltage (0.9V)

kGDET_1_0v: Voltage (1.0V)

kGDET_1_1v: Voltage (1.1V)

Glitch Detect

GLIKEY

Values:

enumerator kStatus_GLIKEY_LockedError: GLIKEY status for locked SFR registers (unexpected) .

enumerator kStatus_GLIKEY_NotLocked: GLIKEY status for unlocked SFR registers.

enumerator kStatus_GLIKEY_Locked: GLIKEY status for locked SFR registers.

enumerator kStatus_GLIKEY_DisabledError: GLIKEY status for disabled error.

FSL_GLIKEY_DRIVER_VERSION

Defines GLIKEY driver version 2.0.1.

Change log:

Version 2.0.1
- Implement INIT state recovery from the LOCKED state after a reset when the previous index was locked.
Version 2.0.0
- Initial version

GLIKEY_CODEWORD_STEP1

GLIKEY_CODEWORD_STEP2

GLIKEY_CODEWORD_STEP3

GLIKEY_CODEWORD_STEP4

GLIKEY_CODEWORD_STEP5

GLIKEY_CODEWORD_STEP6

GLIKEY_CODEWORD_STEP7

GLIKEY_CODEWORD_STEP_EN

GLIKEY_FSM_WR_DIS

GLIKEY_FSM_INIT

GLIKEY_FSM_STEP1

GLIKEY_FSM_STEP2

GLIKEY_FSM_STEP3

GLIKEY_FSM_STEP4

GLIKEY_FSM_LOCKED

GLIKEY_FSM_WR_EN

GLIKEY_FSM_SSR_RESET

uint32_t GLIKEY_GetStatus(GLIKEY_Type *base)

Retreives the current status of Glikey.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Glikey status information

status_t GLIKEY_IsLocked(GLIKEY_Type *base)

Get if Glikey is locked.

This operation returns the locking status of Glikey.

Return values:

kStatus_GLIKEY_Locked – if locked
kStatus_GLIKEY_NotLocked – if unlocked

Returns:

Status

status_t GLIKEY_CheckLock(GLIKEY_Type *base)

Check if Glikey is locked.

This operation returns the locking status of Glikey.

Return values:

kStatus_GLIKEY_LockedError – if locked
kStatus_GLIKEY_NotLocked – if unlocked

Returns:

Status kStatus_Success if success

status_t GLIKEY_SyncReset(GLIKEY_Type *base)

Perform a synchronous reset of Glikey.

This function performs a synchrounous reset of the Glikey. This results in:

Glikey will return to the INIT state, unless it is in the LOCK state

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError

status_t GLIKEY_SetIntEnable(GLIKEY_Type *base, uint32_t value)

Set interrupt enable flag of Glikey.

Parameters:

base – [in] The base address of the Glikey instance
value – [in] Value to set the interrupt enable flag to, see #[TODO: add reference to constants]

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError

status_t GLIKEY_GetIntEnable(GLIKEY_Type *base, uint32_t *value)

Get interrupt enable flag of Glikey.

Parameters:

base – [in] The base address of the Glikey instance
value – [out] Pointer which will be filled with the interrupt enable status, see #[TODO: add reference to constants]

Returns:

Status kStatus_Success if success

status_t GLIKEY_ClearIntStatus(GLIKEY_Type *base)

Clear the interrupt status flag of Glikey.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError

status_t GLIKEY_SetIntStatus(GLIKEY_Type *base)

Set the interrupt status flag of Glikey.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError

status_t GLIKEY_Lock(GLIKEY_Type *base)

Lock Glikey SFR (Special Function Registers) interface.

This operation locks the Glikey SFR interface if it is not locked yet.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success

status_t GLIKEY_LockIndex(GLIKEY_Type *base)

Lock Glikey index.

This operation is used to lock a Glikey index. It can only be executed from the WR_EN state, executing it from any other state will result in Glikey entering WR_DIS state. When this happens Glikey requires a reset (synchrous or asynchronous) to go back to INIT state. If the Glikey SFR lock is active this operation will return an error.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError, kStatus_GLIKEY_DisabledError

status_t GLIKEY_IsIndexLocked(GLIKEY_Type *base, uint32_t index)

Check if Glikey index is locked.

This operation returns the locking status of Glikey index.

Parameters:

base – [in] The base address of the Glikey instance
index – [in] The index of the Glikey instance

Returns:

kStatus_GLIKEY_Locked if locked, kStatus_GLIKEY_NotLocked if unlocked Possible errors: kStatus_Fail

status_t GLIKEY_StartEnable(GLIKEY_Type *base, uint32_t index)

Start Glikey enable.

This operation is used to set a new index and start a the sequence to enable it. It needs to be started from the INIT state. If the new index is already locked Glikey will go to LOCKED state, otherwise it will go to STEP1 state. If this operation is used when Glikey is in any state other than INIT Glikey will go to WR_DIS state. It can only recover from this state through a reset (synchrounous or asyncrhonous). If the Glikey SFR lock is active this operation will return an error.

Parameters:

base – [in] The base address of the Glikey instance
index – [in] The index of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError, kStatus_Fail

status_t GLIKEY_ContinueEnable(GLIKEY_Type *base, uint32_t codeword)

Continue Glikey enable.

This operation is used to progress through the different states of the state machine, starting from STEP1 until the state WR_EN is reached. Each next state of the state machine can only be reached by providing the right codeword to this function. If anything goes wrong the state machine will go to WR_DIS state and can only recover from it through a reset (synchrous or asynchronous). If the Glikey SFR lock is active this operation will return an error.

Parameters:

base – [in] The base address of the Glikey instance
codeword – [in] Encoded word for progressing to next FSM state (see GLIKEY_CODEWORD_STEPx/EN)

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError, kStatus_Fail, kStatus_GLIKEY_DisabledError

status_t GLIKEY_EndOperation(GLIKEY_Type *base)

End Glikey operation.

This operation is used to end a Glikey operation. It can only be executed from the WR_EN, LOCKED and RESET states. Executing it from any other state will result in Glikey entering WR_DIS state. When this happens Glikey requires a reset (synchrous or asynchronous) to go back to INIT state. After this operation Glikey will go to INIT state or stay in LOCKED state when the index was locked. If the Glikey SFR lock is active this operation will return an error.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

A code-flow protected error code (see nxpCsslFlowProtection)

Returns:

Status kStatus_Success if success, kStatus_GLIKEY_Locked if index is still locked Possible errors: kStatus_GLIKEY_LockedError, kStatus_GLIKEY_DisabledError

status_t GLIKEY_ResetIndex(GLIKEY_Type *base, uint32_t index)

Reset Glikey index.

This operation is used to reset a Glikey index. It can only be executed from the INIT state, executing it from any other state will result in Glikey entering WR_DIS state. When this happens Glikey requires a reset (synchrous or asynchronous) to go back to INIT state. If the Glikey SFR lock is active or the index is locked this operation will return an error.

Returns:: A code-flow protected error code (see nxpCsslFlowProtection)
Returns:: Status kStatus_Success if success, kStatus_GLIKEY_Locked if index is still locked Possible errors: kStatus_GLIKEY_LockedError, kStatus_GLIKEY_DisabledError

GPIO: General-Purpose Input/Output Driver

FSL_GPIO_DRIVER_VERSION: GPIO driver version.

enum _gpio_pin_direction

GPIO direction definition.

Values:

enumerator kGPIO_DigitalInput: Set current pin as digital input

enumerator kGPIO_DigitalOutput: Set current pin as digital output

enum _gpio_checker_attribute

GPIO checker attribute.

Values:

enumerator kGPIO_UsernonsecureRWUsersecureRWPrivilegedsecureRW: User nonsecure:Read+Write; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureRUsersecureRWPrivilegedsecureRW: User nonsecure:Read; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureRWPrivilegedsecureRW: User nonsecure:None; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureRUsersecureRPrivilegedsecureRW: User nonsecure:Read; User Secure:Read; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureRPrivilegedsecureRW: User nonsecure:None; User Secure:Read; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureRW: User nonsecure:None; User Secure:None; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureR: User nonsecure:None; User Secure:None; Privileged Secure:Read

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureN: User nonsecure:None; User Secure:None; Privileged Secure:None

enumerator kGPIO_IgnoreAttributeCheck: Ignores the attribute check

enum _gpio_interrupt_config

Configures the interrupt generation condition.

Values:

enumerator kGPIO_InterruptStatusFlagDisabled: Interrupt status flag is disabled.

enumerator kGPIO_DMARisingEdge: ISF flag and DMA request on rising edge.

enumerator kGPIO_DMAFallingEdge: ISF flag and DMA request on falling edge.

enumerator kGPIO_DMAEitherEdge: ISF flag and DMA request on either edge.

enumerator kGPIO_FlagRisingEdge: Flag sets on rising edge.

enumerator kGPIO_FlagFallingEdge: Flag sets on falling edge.

enumerator kGPIO_FlagEitherEdge: Flag sets on either edge.

enumerator kGPIO_InterruptLogicZero: Interrupt when logic zero.

enumerator kGPIO_InterruptRisingEdge: Interrupt on rising edge.

enumerator kGPIO_InterruptFallingEdge: Interrupt on falling edge.

enumerator kGPIO_InterruptEitherEdge: Interrupt on either edge.

enumerator kGPIO_InterruptLogicOne: Interrupt when logic one.

enumerator kGPIO_ActiveHighTriggerOutputEnable: Enable active high-trigger output.

enumerator kGPIO_ActiveLowTriggerOutputEnable: Enable active low-trigger output.

enum _gpio_interrupt_selection

Configures the selection of interrupt/DMA request/trigger output.

Values:

enumerator kGPIO_InterruptOutput0: Interrupt/DMA request/trigger output 0.

enumerator kGPIO_InterruptOutput1: Interrupt/DMA request/trigger output 1.

enum gpio_pin_interrupt_control_t

GPIO pin and interrupt control.

Values:

enumerator kGPIO_PinControlNonSecure: Pin Control Non-Secure.

enumerator kGPIO_InterruptControlNonSecure: Interrupt Control Non-Secure.

enumerator kGPIO_PinControlNonPrivilege: Pin Control Non-Privilege.

enumerator kGPIO_InterruptControlNonPrivilege: Interrupt Control Non-Privilege.

typedef enum _gpio_pin_direction gpio_pin_direction_t: GPIO direction definition.

typedef enum _gpio_checker_attribute gpio_checker_attribute_t: GPIO checker attribute.

typedef struct _gpio_pin_config gpio_pin_config_t

The GPIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, leave the outputConfig unused. Note that in some use cases, the corresponding port property should be configured in advance with the PORT_SetPinConfig().

typedef enum _gpio_interrupt_config gpio_interrupt_config_t: Configures the interrupt generation condition.

typedef enum _gpio_interrupt_selection gpio_interrupt_selection_t: Configures the selection of interrupt/DMA request/trigger output.

typedef struct _gpio_version_info gpio_version_info_t: GPIO version information.

GPIO_FIT_REG(value)

struct _gpio_pin_config

#include <fsl_gpio.h>

The GPIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, leave the outputConfig unused. Note that in some use cases, the corresponding port property should be configured in advance with the PORT_SetPinConfig().

Public Members

gpio_pin_direction_t pinDirection: GPIO direction, input or output

uint8_t outputLogic: Set a default output logic, which has no use in input

struct _gpio_version_info

#include <fsl_gpio.h>

GPIO version information.

Public Members

uint16_t feature: Feature Specification Number.

uint8_t minor: Minor Version Number.

uint8_t major: Major Version Number.

GPIO Driver

void GPIO_PortInit(GPIO_Type *base)

Initializes the GPIO peripheral.

This function ungates the GPIO clock.

Parameters:

base – GPIO peripheral base pointer.

void GPIO_PortDenit(GPIO_Type *base)

Denitializes the GPIO peripheral.

Parameters:

base – GPIO peripheral base pointer.

void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config)

Initializes a GPIO pin used by the board.

To initialize the GPIO, define a pin configuration, as either input or output, in the user file. Then, call the GPIO_PinInit() function.

This is an example to define an input pin or an output pin configuration.

Define a digital input pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalInput,
  0,
}
Define a digital output pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalOutput,
  0,
}

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO port pin number
config – GPIO pin configuration pointer

void GPIO_GetVersionInfo(GPIO_Type *base, gpio_version_info_t *info)

Get GPIO version information.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
info – GPIO version information

static inline void GPIO_SecurePrivilegeLock(GPIO_Type *base, gpio_pin_interrupt_control_t mask)

lock or unlock secure privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – pin or interrupt macro

static inline void GPIO_EnablePinControlNonSecure(GPIO_Type *base, uint32_t mask)

Enable Pin Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisablePinControlNonSecure(GPIO_Type *base, uint32_t mask)

Disable Pin Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Enable Pin Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Disable Pin Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnableInterruptControlNonSecure(GPIO_Type *base, uint32_t mask)

Enable Interrupt Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisableInterruptControlNonSecure(GPIO_Type *base, uint32_t mask)

Disable Interrupt Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnableInterruptControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Enable Interrupt Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisableInterruptControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Disable Interrupt Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortInputEnable(GPIO_Type *base, uint32_t mask)

Enable port input.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortInputDisable(GPIO_Type *base, uint32_t mask)

Disable port input.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the multiple GPIO pins to the logic 1 or 0.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO pin number
output – GPIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 1.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 0.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask)

Reverses the current output logic of the multiple GPIO pins.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t pin)

Reads the current input value of the GPIO port.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO pin number

Return values:

GPIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

static inline void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_config_t config)

Configures the gpio pin interrupt/DMA request.

Parameters:

base – GPIO peripheral base pointer.
pin – GPIO pin number.
config – GPIO pin interrupt configuration.
- kGPIO_InterruptStatusFlagDisabled: Interrupt/DMA request disabled.
- kGPIO_DMARisingEdge : DMA request on rising edge(if the DMA requests exit).
- kGPIO_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit).
- kGPIO_DMAEitherEdge : DMA request on either edge(if the DMA requests exit).
- kGPIO_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit).
- kGPIO_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit).
- kGPIO_FlagEitherEdge : Flag sets on either edge(if the Flag states exit).
- kGPIO_InterruptLogicZero : Interrupt when logic zero.
- kGPIO_InterruptRisingEdge : Interrupt on rising edge.
- kGPIO_InterruptFallingEdge: Interrupt on falling edge.
- kGPIO_InterruptEitherEdge : Interrupt on either edge.
- kGPIO_InterruptLogicOne : Interrupt when logic one.
- kGPIO_ActiveHighTriggerOutputEnable : Enable active high-trigger output (if the trigger states exit).
- kGPIO_ActiveLowTriggerOutputEnable : Enable active low-trigger output (if the trigger states exit).

static inline void GPIO_SetPinInterruptChannel(GPIO_Type *base, uint32_t pin, gpio_interrupt_selection_t selection)

Configures the gpio pin interrupt/DMA request/trigger output channel selection.

Parameters:

base – GPIO peripheral base pointer.
pin – GPIO pin number.
selection – GPIO pin interrupt output selection.
- kGPIO_InterruptOutput0: Interrupt/DMA request/trigger output 0.
- kGPIO_InterruptOutput1 : Interrupt/DMA request/trigger output 1.

uint32_t GPIO_GpioGetInterruptFlags(GPIO_Type *base)

Read the GPIO interrupt status flags.

Parameters:

base – GPIO peripheral base pointer. (GPIOA, GPIOB, GPIOC, and so on.)

Returns:

The current GPIO’s interrupt status flag. ‘1’ means the related pin’s flag is set, ‘0’ means the related pin’s flag not set. For example, the return value 0x00010001 means the pin 0 and 17 have the interrupt pending.

uint32_t GPIO_GpioGetInterruptChannelFlags(GPIO_Type *base, uint32_t channel)

Read the GPIO interrupt status flags based on selected interrupt channel(IRQS).

Parameters:

base – GPIO peripheral base pointer. (GPIOA, GPIOB, GPIOC, and so on.)
channel – ‘0’ means selete interrupt channel 0, ‘1’ means selete interrupt channel 1.

Returns:

The current GPIO’s interrupt status flag based on the selected interrupt channel. ‘1’ means the related pin’s flag is set, ‘0’ means the related pin’s flag not set. For example, the return value 0x00010001 means the pin 0 and 17 have the interrupt pending.

uint8_t GPIO_PinGetInterruptFlag(GPIO_Type *base, uint32_t pin)

Read individual pin’s interrupt status flag.

Parameters:

base – GPIO peripheral base pointer. (GPIOA, GPIOB, GPIOC, and so on)
pin – GPIO specific pin number.

Returns:

The current selected pin’s interrupt status flag.

void GPIO_GpioClearInterruptFlags(GPIO_Type *base, uint32_t mask)

Clears GPIO pin interrupt status flags.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

void GPIO_GpioClearInterruptChannelFlags(GPIO_Type *base, uint32_t mask, uint32_t channel)

Clears GPIO pin interrupt status flags based on selected interrupt channel(IRQS).

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro
channel – ‘0’ means selete interrupt channel 0, ‘1’ means selete interrupt channel 1.

void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t pin)

Clear GPIO individual pin’s interrupt status flag.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on).
pin – GPIO specific pin number.

static inline void GPIO_SetMultipleInterruptPinsConfig(GPIO_Type *base, uint32_t mask, gpio_interrupt_config_t config)

Sets the GPIO interrupt configuration in PCR register for multiple pins.

Parameters:

base – GPIO peripheral base pointer.
mask – GPIO pin number macro.
config – GPIO pin interrupt configuration.
- kGPIO_InterruptStatusFlagDisabled: Interrupt disabled.
- kGPIO_DMARisingEdge : DMA request on rising edge(if the DMA requests exit).
- kGPIO_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit).
- kGPIO_DMAEitherEdge : DMA request on either edge(if the DMA requests exit).
- kGPIO_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit).
- kGPIO_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit).
- kGPIO_FlagEitherEdge : Flag sets on either edge(if the Flag states exit).
- kGPIO_InterruptLogicZero : Interrupt when logic zero.
- kGPIO_InterruptRisingEdge : Interrupt on rising edge.
- kGPIO_InterruptFallingEdge: Interrupt on falling edge.
- kGPIO_InterruptEitherEdge : Interrupt on either edge.
- kGPIO_InterruptLogicOne : Interrupt when logic one.
- kGPIO_ActiveHighTriggerOutputEnable : Enable active high-trigger output (if the trigger states exit).
- kGPIO_ActiveLowTriggerOutputEnable : Enable active low-trigger output (if the trigger states exit)..

void GPIO_CheckAttributeBytes(GPIO_Type *base, gpio_checker_attribute_t attribute)

brief The GPIO module supports a device-specific number of data ports, organized as 32-bit words/8-bit Bytes. Each 32-bit/8-bit data port includes a GACR register, which defines the byte-level attributes required for a successful access to the GPIO programming model. If the GPIO module’s GACR register organized as 32-bit words, the attribute controls for the 4 data bytes in the GACR follow a standard little endian data convention.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
attribute – GPIO checker attribute

I3C: I3C Driver

FSL_I3C_DRIVER_VERSION: I3C driver version.

I3C status return codes.

Values:

enumerator kStatus_I3C_Busy: The master is already performing a transfer.

enumerator kStatus_I3C_Idle: The slave driver is idle.

enumerator kStatus_I3C_Nak: The slave device sent a NAK in response to an address.

enumerator kStatus_I3C_WriteAbort: The slave device sent a NAK in response to a write.

enumerator kStatus_I3C_Term: The master terminates slave read.

enumerator kStatus_I3C_HdrParityError: Parity error from DDR read.

enumerator kStatus_I3C_CrcError: CRC error from DDR read.

enumerator kStatus_I3C_ReadFifoError: Read from M/SRDATAB register when FIFO empty.

enumerator kStatus_I3C_WriteFifoError: Write to M/SWDATAB register when FIFO full.

enumerator kStatus_I3C_MsgError: Message SDR/DDR mismatch or read/write message in wrong state

enumerator kStatus_I3C_InvalidReq: Invalid use of request.

enumerator kStatus_I3C_Timeout: The module has stalled too long in a frame.

enumerator kStatus_I3C_SlaveCountExceed: The I3C slave count has exceed the definition in I3C_MAX_DEVCNT.

enumerator kStatus_I3C_IBIWon: The I3C slave event IBI or MR or HJ won the arbitration on a header address.

enumerator kStatus_I3C_OverrunError: Slave internal from-bus buffer/FIFO overrun.

enumerator kStatus_I3C_UnderrunError: Slave internal to-bus buffer/FIFO underrun

enumerator kStatus_I3C_UnderrunNak: Slave internal from-bus buffer/FIFO underrun and NACK error

enumerator kStatus_I3C_InvalidStart: Slave invalid start flag

enumerator kStatus_I3C_SdrParityError: SDR parity error

enumerator kStatus_I3C_S0S1Error: S0 or S1 error

enum _i3c_hdr_mode

I3C HDR modes.

Values:

enumerator kI3C_HDRModeNone

enumerator kI3C_HDRModeDDR

enumerator kI3C_HDRModeTSP

enumerator kI3C_HDRModeTSL

typedef enum _i3c_hdr_mode i3c_hdr_mode_t: I3C HDR modes.

typedef struct _i3c_device_info i3c_device_info_t: I3C device information.

I3C_RETRY_TIMES: Timeout times for waiting flag.

I3C_MAX_DEVCNT

I3C_IBI_BUFF_SIZE

struct _i3c_device_info

#include <fsl_i3c.h>

I3C device information.

Public Members

uint8_t dynamicAddr: Device dynamic address.

uint8_t staticAddr: Static address.

uint8_t dcr: Device characteristics register information.

uint8_t bcr: Bus characteristics register information.

uint16_t vendorID: Device vendor ID(manufacture ID).

uint32_t partNumber: Device part number info

uint16_t maxReadLength: Maximum read length.

uint16_t maxWriteLength: Maximum write length.

uint8_t hdrMode: Support hdr mode, could be OR logic in i3c_hdr_mode.

I3C Common Driver

typedef struct _i3c_config i3c_config_t

Structure with settings to initialize the I3C module, could both initialize master and slave functionality.

This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_GetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

uint32_t I3C_GetInstance(I3C_Type *base)

Get which instance current I3C is used.

Parameters:

base – The I3C peripheral base address.

void I3C_GetDefaultConfig(i3c_config_t *config)

Provides a default configuration for the I3C peripheral, the configuration covers both master functionality and slave functionality.

This function provides the following default configuration for I3C:

config->disableTimeout config->hKeep config->enableOpenDrainStop config->enableOpenDrainHigh config->baudRate_Hzconfig->baudRate_Hzconfig->baudRate_Hzconfig->masterDynamicAddress config->slowClock_Hz config->enableSlave config->vendorID config->enableRandomPart config->partNumber config->dcr config->bcr config->hdrMode config->nakAllRequest config->ignoreS0S1Error config->offline config->matchSlaveStartStop 

notranslate">

config->enableMaster                 = kI3C_MasterCapable; = false; = kI3C_MasterHighKeeperNone; = true; = true; class="o">.i2cBaud          = 400000U; class="o">.i3cPushPullBaud  = 12500000U; class="o">.i3cOpenDrainBaud = 2500000U; = 0x0AU; = 1000000U; = true; = 0x11BU; = false; = 0; = 0; = 0; = (uint8_t)kI3C_HDRModeDDR; = false; = false; = false; = false;
After calling this function, you can override any settings in order to customize the configuration, prior to initializing the common I3C driver with I3C_Init().

Parameters:

config – [out] User provided configuration structure for default values. Refer to i3c_config_t. 







void I3C_Init(I3C_Type *base, const i3c_config_t *config, uint32_t sourceClock_Hz)

Initializes the I3C peripheral. This function enables the peripheral clock and initializes the I3C peripheral as described by the user provided configuration. This will initialize both the master peripheral and slave peripheral so that I3C module could work as pure master, pure slave or secondary master, etc. A software reset is performed prior to configuration. 

Parameters:

base – The I3C peripheral base address. 
config – User provided peripheral configuration. Use I3C_GetDefaultConfig() to get a set of defaults that you can override. 
sourceClock_Hz – Frequency in Hertz of the I3C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods. 







struct _i3c_config


#include <fsl_i3c.h>
Structure with settings to initialize the I3C module, could both initialize master and slave functionality. 
This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_GetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash. 

Public Members


i3c_master_enable_t enableMaster

Enable master mode. 




bool disableTimeout

Whether to disable timeout to prevent the ERRWARN. 




i3c_master_hkeep_t hKeep

High keeper mode setting. 




bool enableOpenDrainStop

Whether to emit open-drain speed STOP. 




bool enableOpenDrainHigh

Enable Open-Drain High to be 1 PPBAUD count for i3c messages, or 1 ODBAUD. 




i3c_baudrate_hz_t baudRate_Hz

Desired baud rate settings. 




uint8_t masterDynamicAddress

Main master dynamic address configuration. 




uint32_t maxWriteLength

Maximum write length. 




uint32_t maxReadLength

Maximum read length. 




bool enableSlave

Whether to enable slave. 




uint8_t staticAddr

Static address. 




uint16_t vendorID

Device vendor ID(manufacture ID). 




uint32_t partNumber

Device part number info 




uint8_t dcr

Device characteristics register information. 




uint8_t bcr

Bus characteristics register information. 




uint8_t hdrMode

Support hdr mode, could be OR logic in enumeration:i3c_hdr_mode_t. 




bool nakAllRequest

Whether to reply NAK to all requests except broadcast CCC. 




bool ignoreS0S1Error

Whether to ignore S0/S1 error in SDR mode. 




bool offline

Whether to wait 60 us of bus quiet or HDR request to ensure slave track SDR mode safely. 




bool matchSlaveStartStop

Whether to assert start/stop status only the time slave is addressed.

Act2	Act1	Comment	31-28	27-12
0	0	No op	Don’t care
0	1	Set data length	0000	Data Length
1	0	Transfer data	Data address
1	1	Link descriptor	Descriptor address

Act2	Act1	Comment	Operation
0	0	No op	Don’t care
0	1	Reserved	Read this line and go to next one
1	0	Transfer data	Transfer data with address and length set in this descriptor line
1	1	Link descriptor	Link to another descriptor

MIMXRT798S

ACMP: Analog Comparator Driver

CACHE: CACHE Memory Controller

CDOG

Clock Driver

CRC: Cyclic Redundancy Check Driver

CTIMER: Standard counter/timers

Dsp

eDMA: Enhanced Direct Memory Access (eDMA) Controller Driver

eDMA core Driver

eDMA soc Driver

Ezhv

FGPIO Driver

FlexIO: FlexIO Driver

FlexIO Driver

FlexIO eDMA I2S Driver

FlexIO eDMA SPI Driver

FlexIO eDMA UART Driver

FlexIO I2C Master Driver

FlexIO I2S Driver

FlexIO SPI Driver

FlexIO UART Driver

FREQME: Frequency Measurement

GDET

Glitch Detect

GLIKEY

GLIKEY

GPIO: General-Purpose Input/Output Driver

GPIO Driver

I3C: I3C Driver

I3C Common Driver

I3C Master Driver

I3C Master DMA Driver

I3C Slave Driver

I3C Slave DMA Driver

INPUTMUX: Input Multiplexing Driver

Iopctl_driver

IRTC: IRTC Driver

Intrusion and Tamper Response Controller

ITRC

JPEGDEC: JPEG decoder Driver

Common Driver

LCDIF: LCD interface

LPADC: 12-bit SAR Analog-to-Digital Converter Driver

Lpc_freqme

LPFLEXCOMM: LPFLEXCOMM Driver

LPFLEXCOMM Driver

LPI2C: Low Power Inter-Integrated Circuit Driver

LPI2C Master Driver

LPI2C Master DMA Driver

LPI2C Slave Driver

LPSPI: Low Power Serial Peripheral Interface

LPSPI Peripheral driver

LPSPI eDMA Driver

LPUART: Low Power Universal Asynchronous Receiver/Transmitter Driver

LPUART Driver

LPUART eDMA Driver

MIPI DSI Driver

MIPI_DSI: MIPI DSI Host Controller

MMU: Memory Map Unit

MRT: Multi-Rate Timer

MU: Messaging Unit

This type defines status return values used by NBOOT functions that are not easily

OSTIMER: OS Event Timer Driver

PDM: Microphone Interface

PDM Driver

PDM EDMA Driver

PINT: Pin Interrupt and Pattern Match Driver

PNGDEC: PNG decoder Driver

Power Driver

PUF: Physical Unclonable Function

Puf_v3_driver

Reset Driver

Runbootloader

SAI: Serial Audio Interface

SAI Driver

SAI EDMA Driver

Sbloader

SCTimer: SCTimer/PWM (SCT)

SDADC: SDADC Module