LPC54S018M
AES: AES encryption decryption driver
-
status_t AES_SetKey(AES_Type *base, const uint8_t *key, size_t keySize)
Sets AES key.
Sets AES key.
- Parameters:
base – AES peripheral base address
key – Input key to use for encryption or decryption
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.
- Returns:
Status from Set Key operation
-
status_t AES_EncryptEcb(AES_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, size_t size)
Encrypts AES using the ECB block mode.
Encrypts AES using the ECB block mode.
- Parameters:
base – AES peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
- Returns:
Status from encrypt operation
-
status_t AES_DecryptEcb(AES_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, size_t size)
Decrypts AES using the ECB block mode.
Decrypts AES using the ECB block mode.
- Parameters:
base – AES peripheral base address
ciphertext – Input ciphertext to decrypt
plaintext – [out] Output plain text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
- Returns:
Status from decrypt operation
-
status_t AES_EncryptCbc(AES_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])
Encrypts AES using CBC block mode.
- Parameters:
base – AES peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.
- Returns:
Status from encrypt operation
-
status_t AES_DecryptCbc(AES_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])
Decrypts AES using CBC block mode.
- Parameters:
base – AES peripheral base address
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.
- Returns:
Status from decrypt operation
-
status_t AES_EncryptCfb(AES_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])
Encrypts AES using CFB block mode.
- Parameters:
base – AES peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input Initial vector to be used as the first input block.
- Returns:
Status from encrypt operation
-
status_t AES_DecryptCfb(AES_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])
Decrypts AES using CFB block mode.
- Parameters:
base – AES peripheral base address
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input Initial vector to be used as the first input block.
- Returns:
Status from decrypt operation
-
status_t AES_EncryptOfb(AES_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])
Encrypts AES using OFB block mode.
- Parameters:
base – AES peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes.
iv – Input Initial vector to be used as the first input block.
- Returns:
Status from encrypt operation
-
status_t AES_DecryptOfb(AES_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])
Decrypts AES using OFB block mode.
- Parameters:
base – AES peripheral base address
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text
size – Size of input and output data in bytes.
iv – Input Initial vector to be used as the first input block.
- Returns:
Status from decrypt operation
-
status_t AES_CryptCtr(AES_Type *base, const uint8_t *input, uint8_t *output, size_t size, uint8_t counter[16], uint8_t counterlast[16], size_t *szLeft)
Encrypts or decrypts AES using CTR block mode.
Encrypts or decrypts AES using CTR block mode. AES CTR mode uses only forward AES cipher and same algorithm for encryption and decryption. The only difference between encryption and decryption is that, for encryption, the input argument is plain text and the output argument is cipher text. For decryption, the input argument is cipher text and the output argument is plain text.
- Parameters:
base – AES peripheral base address
input – Input data for CTR block mode
output – [out] Output data for CTR block mode
size – Size of input and output data in bytes
counter – [inout] Input counter (updates on return)
counterlast – [out] Output cipher of last counter, for chained CTR calls. NULL can be passed if chained calls are not used.
szLeft – [out] Output number of bytes in left unused in counterlast block. NULL can be passed if chained calls are not used.
- Returns:
Status from crypt operation
-
status_t AES_EncryptTagGcm(AES_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t *iv, size_t ivSize, const uint8_t *aad, size_t aadSize, uint8_t *tag, size_t tagSize)
Encrypts AES and tags using GCM block mode.
Encrypts AES and optionally tags using GCM block mode. If plaintext is NULL, only the GHASH is calculated and output in the ‘tag’ field.
- Parameters:
base – AES peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text.
size – Size of input and output data in bytes
iv – Input initial vector
ivSize – Size of the IV
aad – Input additional authentication data
aadSize – Input size in bytes of AAD
tag – [out] Output hash tag. Set to NULL to skip tag processing.
tagSize – Input size of the tag to generate, in bytes. Must be 4,8,12,13,14,15 or 16.
- Returns:
Status from encrypt operation
-
status_t AES_DecryptTagGcm(AES_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t *iv, size_t ivSize, const uint8_t *aad, size_t aadSize, const uint8_t *tag, size_t tagSize)
Decrypts AES and authenticates using GCM block mode.
Decrypts AES and optionally authenticates using GCM block mode. If ciphertext is NULL, only the GHASH is calculated and compared with the received GHASH in ‘tag’ field.
- Parameters:
base – AES peripheral base address
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text.
size – Size of input and output data in bytes
iv – Input initial vector
ivSize – Size of the IV
aad – Input additional authentication data
aadSize – Input size in bytes of AAD
tag – Input hash tag to compare. Set to NULL to skip tag processing.
tagSize – Input size of the tag, in bytes. Must be 4, 8, 12, 13, 14, 15, or 16.
- Returns:
Status from decrypt operation
-
AES_BLOCK_SIZE
AES block size in bytes
-
AES_IV_SIZE
AES Input Vector size in bytes
-
FSL_AES_DRIVER_VERSION
Defines LPC AES driver version 2.0.3.
Change log:
Version 2.0.3
Edit aes_one_block() function to be interrupt safe.
Version 2.0.2
Fix MISRA-2012 issues
Version 2.0.1
GCM constant time tag comparison
Version 2.0.0
initial version
Clock Driver
-
enum _clock_ip_name
Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.
Values:
-
enumerator kCLOCK_IpInvalid
Invalid Ip Name.
-
enumerator kCLOCK_Rom
Clock gate name: Rom.
-
enumerator kCLOCK_Sram1
Clock gate name: Sram1.
-
enumerator kCLOCK_Sram2
Clock gate name: Sram2.
-
enumerator kCLOCK_Sram3
Clock gate name: Sram3.
-
enumerator kCLOCK_Spifi
Clock gate name: Spifi.
-
enumerator kCLOCK_InputMux
Clock gate name: InputMux.
-
enumerator kCLOCK_Iocon
Clock gate name: Iocon.
-
enumerator kCLOCK_Gpio0
Clock gate name: Gpio0.
-
enumerator kCLOCK_Gpio1
Clock gate name: Gpio1.
-
enumerator kCLOCK_Gpio2
Clock gate name: Gpio2.
-
enumerator kCLOCK_Gpio3
Clock gate name: Gpio3.
-
enumerator kCLOCK_Pint
Clock gate name: Pint.
-
enumerator kCLOCK_Gint
Clock gate name: Gint.
-
enumerator kCLOCK_Dma
Clock gate name: Dma.
-
enumerator kCLOCK_Crc
Clock gate name: Crc.
-
enumerator kCLOCK_Wwdt
Clock gate name: Wwdt.
-
enumerator kCLOCK_Rtc
Clock gate name: Rtc.
-
enumerator kCLOCK_Adc0
Clock gate name: Adc0.
-
enumerator kCLOCK_Mrt
Clock gate name: Mrt.
-
enumerator kCLOCK_Rit
Clock gate name: Rit.
-
enumerator kCLOCK_Sct0
Clock gate name: Sct0.
-
enumerator kCLOCK_Mcan0
Clock gate name: Mcan0.
-
enumerator kCLOCK_Mcan1
Clock gate name: Mcan1.
-
enumerator kCLOCK_Utick
Clock gate name: Utick.
-
enumerator kCLOCK_FlexComm0
Clock gate name: FlexComm0.
-
enumerator kCLOCK_FlexComm1
Clock gate name: FlexComm1.
-
enumerator kCLOCK_FlexComm2
Clock gate name: FlexComm2.
-
enumerator kCLOCK_FlexComm3
Clock gate name: FlexComm3.
-
enumerator kCLOCK_FlexComm4
Clock gate name: FlexComm4.
-
enumerator kCLOCK_FlexComm5
Clock gate name: FlexComm5.
-
enumerator kCLOCK_FlexComm6
Clock gate name: FlexComm6.
-
enumerator kCLOCK_FlexComm7
Clock gate name: FlexComm7.
-
enumerator kCLOCK_MinUart0
Clock gate name: MinUart0.
-
enumerator kCLOCK_MinUart1
Clock gate name: MinUart1.
-
enumerator kCLOCK_MinUart2
Clock gate name: MinUart2.
-
enumerator kCLOCK_MinUart3
Clock gate name: MinUart3.
-
enumerator kCLOCK_MinUart4
Clock gate name: MinUart4.
-
enumerator kCLOCK_MinUart5
Clock gate name: MinUart5.
-
enumerator kCLOCK_MinUart6
Clock gate name: MinUart6.
-
enumerator kCLOCK_MinUart7
Clock gate name: MinUart7.
-
enumerator kCLOCK_LSpi0
Clock gate name: LSpi0.
-
enumerator kCLOCK_LSpi1
Clock gate name: LSpi1.
-
enumerator kCLOCK_LSpi2
Clock gate name: LSpi2.
-
enumerator kCLOCK_LSpi3
Clock gate name: LSpi3.
-
enumerator kCLOCK_LSpi4
Clock gate name: LSpi4.
-
enumerator kCLOCK_LSpi5
Clock gate name: LSpi5.
-
enumerator kCLOCK_LSpi6
Clock gate name: LSpi6.
-
enumerator kCLOCK_LSpi7
Clock gate name: LSpi7.
-
enumerator kCLOCK_BI2c0
Clock gate name: BI2c0.
-
enumerator kCLOCK_BI2c1
Clock gate name: BI2c1.
-
enumerator kCLOCK_BI2c2
Clock gate name: BI2c2.
-
enumerator kCLOCK_BI2c3
Clock gate name: BI2c3.
-
enumerator kCLOCK_BI2c4
Clock gate name: BI2c4.
-
enumerator kCLOCK_BI2c5
Clock gate name: BI2c5.
-
enumerator kCLOCK_BI2c6
Clock gate name: BI2c6.
-
enumerator kCLOCK_BI2c7
Clock gate name: BI2c7.
-
enumerator kCLOCK_FlexI2s0
Clock gate name: FlexI2s0.
-
enumerator kCLOCK_FlexI2s1
Clock gate name: FlexI2s1.
-
enumerator kCLOCK_FlexI2s2
Clock gate name: FlexI2s2.
-
enumerator kCLOCK_FlexI2s3
Clock gate name: FlexI2s3.
-
enumerator kCLOCK_FlexI2s4
Clock gate name: FlexI2s4.
-
enumerator kCLOCK_FlexI2s5
Clock gate name: FlexI2s5.
-
enumerator kCLOCK_FlexI2s6
Clock gate name: FlexI2s6.
-
enumerator kCLOCK_FlexI2s7
Clock gate name: FlexI2s7.
-
enumerator kCLOCK_DMic
Clock gate name: DMic.
-
enumerator kCLOCK_Ct32b2
Clock gate name: Ct32b2.
-
enumerator kCLOCK_Usbd0
Clock gate name: Usbd0.
-
enumerator kCLOCK_Ct32b0
Clock gate name: Ct32b0.
-
enumerator kCLOCK_Ct32b1
Clock gate name: Ct32b1.
-
enumerator kCLOCK_BodyBias0
Clock gate name: BodyBias0.
-
enumerator kCLOCK_EzhArchB0
Clock gate name: EzhArchB0.
-
enumerator kCLOCK_Lcd
Clock gate name: Lcd.
-
enumerator kCLOCK_Sdio
Clock gate name: Sdio.
-
enumerator kCLOCK_Usbh1
Clock gate name: Usbh1.
-
enumerator kCLOCK_Usbd1
Clock gate name: Usbd1.
-
enumerator kCLOCK_UsbRam1
Clock gate name: UsbRam1.
-
enumerator kCLOCK_Emc
Clock gate name: Emc.
-
enumerator kCLOCK_Eth
Clock gate name: Eth.
-
enumerator kCLOCK_Gpio4
Clock gate name: Gpio4.
-
enumerator kCLOCK_Gpio5
Clock gate name: Gpio5.
-
enumerator kCLOCK_Aes
Clock gate name: Aes.
-
enumerator kCLOCK_Otp
Clock gate name: Otp.
-
enumerator kCLOCK_Rng
Clock gate name: Rng.
-
enumerator kCLOCK_FlexComm8
Clock gate name: FlexComm8.
-
enumerator kCLOCK_FlexComm9
Clock gate name: FlexComm9.
-
enumerator kCLOCK_MinUart8
Clock gate name: MinUart8.
-
enumerator kCLOCK_MinUart9
Clock gate name: MinUart9.
-
enumerator kCLOCK_LSpi8
Clock gate name: LSpi8.
-
enumerator kCLOCK_LSpi9
Clock gate name: LSpi9.
-
enumerator kCLOCK_BI2c8
Clock gate name: BI2c8.
-
enumerator kCLOCK_BI2c9
Clock gate name: BI2c9.
-
enumerator kCLOCK_FlexI2s8
Clock gate name: FlexI2s8.
-
enumerator kCLOCK_FlexI2s9
Clock gate name: FlexI2s9.
-
enumerator kCLOCK_Usbhmr0
Clock gate name: Usbhmr0.
-
enumerator kCLOCK_Usbhsl0
Clock gate name: Usbhsl0.
-
enumerator kCLOCK_Sha0
Clock gate name: Sha0.
-
enumerator kCLOCK_SmartCard0
Clock gate name: SmartCard0.
-
enumerator kCLOCK_SmartCard1
Clock gate name: SmartCard1.
-
enumerator kCLOCK_FlexComm10
Clock gate name: FlexComm10.
-
enumerator kCLOCK_Puf
Clock gate name: Puf.
-
enumerator kCLOCK_Ct32b3
Clock gate name: Ct32b3.
-
enumerator kCLOCK_Ct32b4
Clock gate name: Ct32b4.
-
enumerator kCLOCK_IpInvalid
-
enum _clock_name
Clock name used to get clock frequency.
Values:
-
enumerator kCLOCK_CoreSysClk
Core/system clock (aka MAIN_CLK)
-
enumerator kCLOCK_BusClk
Bus clock (AHB clock)
-
enumerator kCLOCK_ClockOut
CLOCKOUT
-
enumerator kCLOCK_FroHf
FRO48/96
-
enumerator kCLOCK_UsbPll
USB1 PLL
-
enumerator kCLOCK_Mclk
MCLK
-
enumerator kCLOCK_Fro12M
FRO12M
-
enumerator kCLOCK_ExtClk
External Clock
-
enumerator kCLOCK_PllOut
PLL Output
-
enumerator kCLOCK_UsbClk
USB input
-
enumerator kCLOCK_WdtOsc
Watchdog Oscillator
-
enumerator kCLOCK_Frg
Frg Clock
-
enumerator kCLOCK_AsyncApbClk
Async APB clock
-
enumerator kCLOCK_CoreSysClk
-
enum _async_clock_src
Clock source selections for the asynchronous APB clock.
Values:
-
enumerator kCLOCK_AsyncMainClk
Main System clock
-
enumerator kCLOCK_AsyncFro12Mhz
12MHz FRO
-
enumerator kCLOCK_AsyncAudioPllClk
Async Audio PLL clock.
-
enumerator kCLOCK_AsyncI2cClkFc6
Async I2C clock.
-
enumerator kCLOCK_AsyncMainClk
-
enum _clock_attach_id
The enumerator of clock attach Id.
Values:
-
enumerator kSYSTICK_DIV_CLK_to_SYSTICKCLK
Attach SYSTICK_DIV_CLK to SYSTICKCLK.
-
enumerator kWDT_OSC_to_SYSTICKCLK
Attach WDT_OSC to SYSTICKCLK.
-
enumerator kOSC32K_to_SYSTICKCLK
Attach OSC32K to SYSTICKCLK.
-
enumerator kFRO12M_to_SYSTICKCLK
Attach FRO12M to SYSTICKCLK.
-
enumerator kNONE_to_SYSTICKCLK
Attach NONE to SYSTICKCLK.
-
enumerator kFRO12M_to_MAIN_CLK
Attach FRO12M to MAIN_CLK.
-
enumerator kEXT_CLK_to_MAIN_CLK
Attach EXT_CLK to MAIN_CLK.
-
enumerator kWDT_OSC_to_MAIN_CLK
Attach WDT_OSC to MAIN_CLK.
-
enumerator kFRO_HF_to_MAIN_CLK
Attach FRO_HF to MAIN_CLK.
-
enumerator kSYS_PLL_to_MAIN_CLK
Attach SYS_PLL to MAIN_CLK.
-
enumerator kOSC32K_to_MAIN_CLK
Attach OSC32K to MAIN_CLK.
-
enumerator kMAIN_CLK_to_CLKOUT
Attach MAIN_CLK to CLKOUT.
-
enumerator kEXT_CLK_to_CLKOUT
Attach EXT_CLK to CLKOUT.
-
enumerator kWDT_OSC_to_CLKOUT
Attach WDT_OSC to CLKOUT.
-
enumerator kFRO_HF_to_CLKOUT
Attach FRO_HF to CLKOUT.
-
enumerator kSYS_PLL_to_CLKOUT
Attach SYS_PLL to CLKOUT.
-
enumerator kUSB_PLL_to_CLKOUT
Attach USB_PLL to CLKOUT.
-
enumerator kAUDIO_PLL_to_CLKOUT
Attach AUDIO_PLL to CLKOUT.
-
enumerator kOSC32K_OSC_to_CLKOUT
Attach OSC32K_OSC to CLKOUT.
-
enumerator kFRO12M_to_SYS_PLL
Attach FRO12M to SYS_PLL.
-
enumerator kEXT_CLK_to_SYS_PLL
Attach EXT_CLK to SYS_PLL.
-
enumerator kWDT_OSC_to_SYS_PLL
Attach WDT_OSC to SYS_PLL.
-
enumerator kOSC32K_to_SYS_PLL
Attach OSC32K to SYS_PLL.
-
enumerator kNONE_to_SYS_PLL
Attach NONE to SYS_PLL.
-
enumerator kFRO12M_to_AUDIO_PLL
Attach FRO12M to AUDIO_PLL.
-
enumerator kEXT_CLK_to_AUDIO_PLL
Attach EXT_CLK to AUDIO_PLL.
-
enumerator kNONE_to_AUDIO_PLL
Attach NONE to AUDIO_PLL.
-
enumerator kMAIN_CLK_to_SPIFI_CLK
Attach MAIN_CLK to SPIFI_CLK.
-
enumerator kSYS_PLL_to_SPIFI_CLK
Attach SYS_PLL to SPIFI_CLK.
-
enumerator kUSB_PLL_to_SPIFI_CLK
Attach USB_PLL to SPIFI_CLK.
-
enumerator kFRO_HF_to_SPIFI_CLK
Attach FRO_HF to SPIFI_CLK.
-
enumerator kAUDIO_PLL_to_SPIFI_CLK
Attach AUDIO_PLL to SPIFI_CLK.
-
enumerator kNONE_to_SPIFI_CLK
Attach NONE to SPIFI_CLK.
-
enumerator kFRO_HF_to_ADC_CLK
Attach FRO_HF to ADC_CLK.
-
enumerator kSYS_PLL_to_ADC_CLK
Attach SYS_PLL to ADC_CLK.
-
enumerator kUSB_PLL_to_ADC_CLK
Attach USB_PLL to ADC_CLK.
-
enumerator kAUDIO_PLL_to_ADC_CLK
Attach AUDIO_PLL to ADC_CLK.
-
enumerator kNONE_to_ADC_CLK
Attach NONE to ADC_CLK.
-
enumerator kFRO_HF_to_USB0_CLK
Attach FRO_HF to USB0_CLK.
-
enumerator kSYS_PLL_to_USB0_CLK
Attach SYS_PLL to USB0_CLK.
-
enumerator kUSB_PLL_to_USB0_CLK
Attach USB_PLL to USB0_CLK.
-
enumerator kNONE_to_USB0_CLK
Attach NONE to USB0_CLK.
-
enumerator kFRO_HF_to_USB1_CLK
Attach FRO_HF to USB1_CLK.
-
enumerator kSYS_PLL_to_USB1_CLK
Attach SYS_PLL to USB1_CLK.
-
enumerator kUSB_PLL_to_USB1_CLK
Attach USB_PLL to USB1_CLK.
-
enumerator kNONE_to_USB1_CLK
Attach NONE to USB1_CLK.
-
enumerator kFRO12M_to_FLEXCOMM0
Attach FRO12M to FLEXCOMM0.
-
enumerator kFRO_HF_to_FLEXCOMM0
Attach FRO_HF to FLEXCOMM0.
-
enumerator kAUDIO_PLL_to_FLEXCOMM0
Attach AUDIO_PLL to FLEXCOMM0.
-
enumerator kMCLK_to_FLEXCOMM0
Attach MCLK to FLEXCOMM0.
-
enumerator kFRG_to_FLEXCOMM0
Attach FRG to FLEXCOMM0.
-
enumerator kNONE_to_FLEXCOMM0
Attach NONE to FLEXCOMM0.
-
enumerator kFRO12M_to_FLEXCOMM1
Attach FRO12M to FLEXCOMM1.
-
enumerator kFRO_HF_to_FLEXCOMM1
Attach FRO_HF to FLEXCOMM1.
-
enumerator kAUDIO_PLL_to_FLEXCOMM1
Attach AUDIO_PLL to FLEXCOMM1.
-
enumerator kMCLK_to_FLEXCOMM1
Attach MCLK to FLEXCOMM1.
-
enumerator kFRG_to_FLEXCOMM1
Attach FRG to FLEXCOMM1.
-
enumerator kNONE_to_FLEXCOMM1
Attach NONE to FLEXCOMM1.
-
enumerator kFRO12M_to_FLEXCOMM2
Attach FRO12M to FLEXCOMM2.
-
enumerator kFRO_HF_to_FLEXCOMM2
Attach FRO_HF to FLEXCOMM2.
-
enumerator kAUDIO_PLL_to_FLEXCOMM2
Attach AUDIO_PLL to FLEXCOMM2.
-
enumerator kMCLK_to_FLEXCOMM2
Attach MCLK to FLEXCOMM2.
-
enumerator kFRG_to_FLEXCOMM2
Attach FRG to FLEXCOMM2.
-
enumerator kNONE_to_FLEXCOMM2
Attach NONE to FLEXCOMM2.
-
enumerator kFRO12M_to_FLEXCOMM3
Attach FRO12M to FLEXCOMM3.
-
enumerator kFRO_HF_to_FLEXCOMM3
Attach FRO_HF to FLEXCOMM3.
-
enumerator kAUDIO_PLL_to_FLEXCOMM3
Attach AUDIO_PLL to FLEXCOMM3.
-
enumerator kMCLK_to_FLEXCOMM3
Attach MCLK to FLEXCOMM3.
-
enumerator kFRG_to_FLEXCOMM3
Attach FRG to FLEXCOMM3.
-
enumerator kNONE_to_FLEXCOMM3
Attach NONE to FLEXCOMM3.
-
enumerator kFRO12M_to_FLEXCOMM4
Attach FRO12M to FLEXCOMM4.
-
enumerator kFRO_HF_to_FLEXCOMM4
Attach FRO_HF to FLEXCOMM4.
-
enumerator kAUDIO_PLL_to_FLEXCOMM4
Attach AUDIO_PLL to FLEXCOMM4.
-
enumerator kMCLK_to_FLEXCOMM4
Attach MCLK to FLEXCOMM4.
-
enumerator kFRG_to_FLEXCOMM4
Attach FRG to FLEXCOMM4.
-
enumerator kNONE_to_FLEXCOMM4
Attach NONE to FLEXCOMM4.
-
enumerator kFRO12M_to_FLEXCOMM5
Attach FRO12M to FLEXCOMM5.
-
enumerator kFRO_HF_to_FLEXCOMM5
Attach FRO_HF to FLEXCOMM5.
-
enumerator kAUDIO_PLL_to_FLEXCOMM5
Attach AUDIO_PLL to FLEXCOMM5.
-
enumerator kMCLK_to_FLEXCOMM5
Attach MCLK to FLEXCOMM5.
-
enumerator kFRG_to_FLEXCOMM5
Attach FRG to FLEXCOMM5.
-
enumerator kNONE_to_FLEXCOMM5
Attach NONE to FLEXCOMM5.
-
enumerator kFRO12M_to_FLEXCOMM6
Attach FRO12M to FLEXCOMM6.
-
enumerator kFRO_HF_to_FLEXCOMM6
Attach FRO_HF to FLEXCOMM6.
-
enumerator kAUDIO_PLL_to_FLEXCOMM6
Attach AUDIO_PLL to FLEXCOMM6.
-
enumerator kMCLK_to_FLEXCOMM6
Attach MCLK to FLEXCOMM6.
-
enumerator kFRG_to_FLEXCOMM6
Attach FRG to FLEXCOMM6.
-
enumerator kNONE_to_FLEXCOMM6
Attach NONE to FLEXCOMM6.
-
enumerator kFRO12M_to_FLEXCOMM7
Attach FRO12M to FLEXCOMM7.
-
enumerator kFRO_HF_to_FLEXCOMM7
Attach FRO_HF to FLEXCOMM7.
-
enumerator kAUDIO_PLL_to_FLEXCOMM7
Attach AUDIO_PLL to FLEXCOMM7.
-
enumerator kMCLK_to_FLEXCOMM7
Attach MCLK to FLEXCOMM7.
-
enumerator kFRG_to_FLEXCOMM7
Attach FRG to FLEXCOMM7.
-
enumerator kNONE_to_FLEXCOMM7
Attach NONE to FLEXCOMM7.
-
enumerator kFRO12M_to_FLEXCOMM8
Attach FRO12M to FLEXCOMM8.
-
enumerator kFRO_HF_to_FLEXCOMM8
Attach FRO_HF to FLEXCOMM8.
-
enumerator kAUDIO_PLL_to_FLEXCOMM8
Attach AUDIO_PLL to FLEXCOMM8.
-
enumerator kMCLK_to_FLEXCOMM8
Attach MCLK to FLEXCOMM8.
-
enumerator kFRG_to_FLEXCOMM8
Attach FRG to FLEXCOMM8.
-
enumerator kNONE_to_FLEXCOMM8
Attach NONE to FLEXCOMM8.
-
enumerator kFRO12M_to_FLEXCOMM9
Attach FRO12M to FLEXCOMM9.
-
enumerator kFRO_HF_to_FLEXCOMM9
Attach FRO_HF to FLEXCOMM9.
-
enumerator kAUDIO_PLL_to_FLEXCOMM9
Attach AUDIO_PLL to FLEXCOMM9.
-
enumerator kMCLK_to_FLEXCOMM9
Attach MCLK to FLEXCOMM9.
-
enumerator kFRG_to_FLEXCOMM9
Attach FRG to FLEXCOMM9.
-
enumerator kNONE_to_FLEXCOMM9
Attach NONE to FLEXCOMM9.
-
enumerator kMAIN_CLK_to_FLEXCOMM10
Attach MAIN_CLK to FLEXCOMM10.
-
enumerator kSYS_PLL_to_FLEXCOMM10
Attach SYS_PLL to FLEXCOMM10.
-
enumerator kUSB_PLL_to_FLEXCOMM10
Attach USB_PLL to FLEXCOMM10.
-
enumerator kFRO_HF_to_FLEXCOMM10
Attach FRO_HF to FLEXCOMM10.
-
enumerator kAUDIO_PLL_to_FLEXCOMM10
Attach AUDIO_PLL to FLEXCOMM10.
-
enumerator kNONE_to_FLEXCOMM10
Attach NONE to FLEXCOMM10.
-
enumerator kFRO_HF_to_MCLK
Attach FRO_HF to MCLK.
-
enumerator kAUDIO_PLL_to_MCLK
Attach AUDIO_PLL to MCLK.
-
enumerator kNONE_to_MCLK
Attach NONE to MCLK.
-
enumerator kMAIN_CLK_to_FRG
Attach MAIN_CLK to FRG.
-
enumerator kSYS_PLL_to_FRG
Attach SYS_PLL to FRG.
-
enumerator kFRO12M_to_FRG
Attach FRO12M to FRG.
-
enumerator kFRO_HF_to_FRG
Attach FRO_HF to FRG.
-
enumerator kNONE_to_FRG
Attach NONE to FRG.
-
enumerator kFRO12M_to_DMIC
Attach FRO12M to DMIC.
-
enumerator kFRO_HF_DIV_to_DMIC
Attach FRO_HF_DIV to DMIC.
-
enumerator kAUDIO_PLL_to_DMIC
Attach AUDIO_PLL to DMIC.
-
enumerator kMCLK_to_DMIC
Attach MCLK to DMIC.
-
enumerator kMAIN_CLK_to_DMIC
Attach MAIN_CLK to DMIC.
-
enumerator kWDT_OSC_to_DMIC
Attach WDT_OSC to DMIC.
-
enumerator kNONE_to_DMIC
Attach NONE to DMIC.
-
enumerator kMAIN_CLK_to_SCT_CLK
Attach MAIN_CLK to SCT_CLK.
-
enumerator kSYS_PLL_to_SCT_CLK
Attach SYS_PLL to SCT_CLK.
-
enumerator kFRO_HF_to_SCT_CLK
Attach FRO_HF to SCT_CLK.
-
enumerator kAUDIO_PLL_to_SCT_CLK
Attach AUDIO_PLL to SCT_CLK.
-
enumerator kNONE_to_SCT_CLK
Attach NONE to SCT_CLK.
-
enumerator kMAIN_CLK_to_LCD_CLK
Attach MAIN_CLK to LCD_CLK.
-
enumerator kLCDCLKIN_to_LCD_CLK
Attach LCDCLKIN to LCD_CLK.
-
enumerator kFRO_HF_to_LCD_CLK
Attach FRO_HF to LCD_CLK.
-
enumerator kNONE_to_LCD_CLK
Attach NONE to LCD_CLK.
-
enumerator kMAIN_CLK_to_SDIO_CLK
Attach MAIN_CLK to SDIO_CLK.
-
enumerator kSYS_PLL_to_SDIO_CLK
Attach SYS_PLL to SDIO_CLK.
-
enumerator kUSB_PLL_to_SDIO_CLK
Attach USB_PLL to SDIO_CLK.
-
enumerator kFRO_HF_to_SDIO_CLK
Attach FRO_HF to SDIO_CLK.
-
enumerator kAUDIO_PLL_to_SDIO_CLK
Attach AUDIO_PLL to SDIO_CLK.
-
enumerator kNONE_to_SDIO_CLK
Attach NONE to SDIO_CLK.
-
enumerator kMAIN_CLK_to_ASYNC_APB
Attach MAIN_CLK to ASYNC_APB.
-
enumerator kFRO12M_to_ASYNC_APB
Attach FRO12M to ASYNC_APB.
-
enumerator kAUDIO_PLL_to_ASYNC_APB
Attach AUDIO_PLL to ASYNC_APB.
-
enumerator kI2C_CLK_FC6_to_ASYNC_APB
Attach I2C_CLK_FC6 to ASYNC_APB.
-
enumerator kNONE_to_NONE
Attach NONE to NONE.
-
enumerator kSYSTICK_DIV_CLK_to_SYSTICKCLK
-
enum _clock_div_name
Clock dividers.
Values:
-
enumerator kCLOCK_DivSystickClk
Systick Clock Divider.
-
enumerator kCLOCK_DivArmTrClkDiv
Arm Tr Clk Div Divider.
-
enumerator kCLOCK_DivCan0Clk
Can0 Clock Divider.
-
enumerator kCLOCK_DivCan1Clk
Can1 Clock Divider.
-
enumerator kCLOCK_DivSmartCard0Clk
Smart Card0 Clock Divider.
-
enumerator kCLOCK_DivSmartCard1Clk
Smart Card1 Clock Divider.
-
enumerator kCLOCK_DivAhbClk
Ahb Clock Divider.
-
enumerator kCLOCK_DivClkOut
Clk Out Divider.
-
enumerator kCLOCK_DivFrohfClk
Frohf Clock Divider.
-
enumerator kCLOCK_DivSpifiClk
Spifi Clock Divider.
-
enumerator kCLOCK_DivAdcAsyncClk
Adc Async Clock Divider.
-
enumerator kCLOCK_DivUsb0Clk
Usb0 Clock Divider.
-
enumerator kCLOCK_DivUsb1Clk
Usb1 Clock Divider.
-
enumerator kCLOCK_DivFrg
Frg Divider.
-
enumerator kCLOCK_DivDmicClk
Dmic Clock Divider.
-
enumerator kCLOCK_DivMClk
I2S MCLK Clock Divider.
-
enumerator kCLOCK_DivLcdClk
Lcd Clock Divider.
-
enumerator kCLOCK_DivSctClk
Sct Clock Divider.
-
enumerator kCLOCK_DivEmcClk
Emc Clock Divider.
-
enumerator kCLOCK_DivSdioClk
Sdio clock Divider.
-
enumerator kCLOCK_DivSystickClk
-
enum _pll_error
PLL status definitions.
Values:
-
enumerator kStatus_PLL_Success
PLL operation was successful
-
enumerator kStatus_PLL_OutputTooLow
PLL output rate request was too low
-
enumerator kStatus_PLL_OutputTooHigh
PLL output rate request was too high
-
enumerator kStatus_PLL_InputTooLow
PLL input rate is too low
-
enumerator kStatus_PLL_InputTooHigh
PLL input rate is too high
-
enumerator kStatus_PLL_OutsideIntLimit
Requested output rate isn’t possible
-
enumerator kStatus_PLL_CCOTooLow
Requested CCO rate isn’t possible
-
enumerator kStatus_PLL_CCOTooHigh
Requested CCO rate isn’t possible
-
enumerator kStatus_PLL_Success
-
enum _clock_usb_src
USB clock source definition.
Values:
-
enumerator kCLOCK_UsbSrcFro
Use FRO 96 or 48 MHz.
-
enumerator kCLOCK_UsbSrcSystemPll
Use System PLL output.
-
enumerator kCLOCK_UsbSrcMainClock
Use Main clock.
-
enumerator kCLOCK_UsbSrcUsbPll
Use USB PLL clock.
-
enumerator kCLOCK_UsbSrcNone
Use None, this may be selected in order to reduce power when no output is needed.
-
enumerator kCLOCK_UsbSrcFro
-
enum _usb_pll_psel
USB PDEL Divider.
Values:
-
enumerator pSel_Divide_1
-
enumerator pSel_Divide_2
-
enumerator pSel_Divide_4
-
enumerator pSel_Divide_8
-
enumerator pSel_Divide_1
-
typedef enum _clock_ip_name clock_ip_name_t
Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.
-
typedef enum _clock_name clock_name_t
Clock name used to get clock frequency.
-
typedef enum _async_clock_src async_clock_src_t
Clock source selections for the asynchronous APB clock.
-
typedef enum _clock_attach_id clock_attach_id_t
The enumerator of clock attach Id.
-
typedef enum _clock_div_name clock_div_name_t
Clock dividers.
-
typedef struct _pll_config pll_config_t
PLL configuration structure.
This structure can be used to configure the settings for a PLL setup structure. Fill in the desired configuration for the PLL and call the PLL setup function to fill in a PLL setup structure.
-
typedef struct _pll_setup pll_setup_t
PLL setup structure This structure can be used to pre-build a PLL setup configuration at run-time and quickly set the PLL to the configuration. It can be populated with the PLL setup function. If powering up or waiting for PLL lock, the PLL input clock source should be configured prior to PLL setup.
-
typedef enum _pll_error pll_error_t
PLL status definitions.
-
typedef enum _clock_usb_src clock_usb_src_t
USB clock source definition.
-
typedef enum _usb_pll_psel usb_pll_psel
USB PDEL Divider.
-
typedef struct _usb_pll_setup usb_pll_setup_t
PLL setup structure This structure can be used to pre-build a USB PLL setup configuration at run-time and quickly set the usb PLL to the configuration. It can be populated with the USB PLL setup function. If powering up or waiting for USB PLL lock, the PLL input clock source should be configured prior to USB PLL setup.
-
static inline void CLOCK_EnableClock(clock_ip_name_t clk)
-
static inline void CLOCK_DisableClock(clock_ip_name_t clk)
-
void CLOCK_SetupFROClocking(uint32_t froFreq)
Initialize the Core clock to given frequency (12, 48 or 96 MHz), this API is implememnt in ROM code. Turns on FRO and uses default CCO, if freq is 12000000, then high speed output is off, else high speed output is enabled. Usage: CLOCK_SetupFROClocking(frequency), (frequency must be one of 12, 48 or 96 MHz) Note: Need to make sure ROM and OTP has power(PDRUNCFG0[17,29]= 0U) before calling this API since this API is implemented in ROM code and the FROHF TRIM value is stored in OTP.
- Parameters:
froFreq – target fro frequency.
- Returns:
Nothing
-
void CLOCK_AttachClk(clock_attach_id_t connection)
Configure the clock selection muxes.
- Parameters:
connection – : Clock to be configured.
- Returns:
Nothing
-
clock_attach_id_t CLOCK_GetClockAttachId(clock_attach_id_t attachId)
Get the actual clock attach id. This fuction uses the offset in input attach id, then it reads the actual source value in the register and combine the offset to obtain an actual attach id.
- Parameters:
attachId – : Clock attach id to get.
- Returns:
Clock source value.
-
void CLOCK_SetClkDiv(clock_div_name_t div_name, uint32_t divided_by_value, bool reset)
Setup peripheral clock dividers.
- Parameters:
div_name – : Clock divider name
divided_by_value – Value to be divided
reset – : Whether to reset the divider counter.
- Returns:
Nothing
-
uint32_t CLOCK_GetFreq(clock_name_t clockName)
Return Frequency of selected clock.
- Returns:
Frequency of selected clock
-
uint32_t CLOCK_GetFro12MFreq(void)
Return Frequency of FRO 12MHz.
- Returns:
Frequency of FRO 12MHz
-
uint32_t CLOCK_GetClockOutClkFreq(void)
Return Frequency of ClockOut.
- Returns:
Frequency of ClockOut
-
uint32_t CLOCK_GetSpifiClkFreq(void)
Return Frequency of Spifi Clock.
- Returns:
Frequency of Spifi.
-
uint32_t CLOCK_GetAdcClkFreq(void)
Return Frequency of Adc Clock.
- Returns:
Frequency of Adc Clock.
-
uint32_t CLOCK_GetMCanClkFreq(uint32_t MCanSel)
brief Return Frequency of MCAN Clock param MCanSel : 0U: MCAN0; 1U: MCAN1 return Frequency of MCAN Clock
-
uint32_t CLOCK_GetUsb0ClkFreq(void)
Return Frequency of Usb0 Clock.
- Returns:
Frequency of Usb0 Clock.
-
uint32_t CLOCK_GetUsb1ClkFreq(void)
Return Frequency of Usb1 Clock.
- Returns:
Frequency of Usb1 Clock.
-
uint32_t CLOCK_GetMclkClkFreq(void)
Return Frequency of MClk Clock.
- Returns:
Frequency of MClk Clock.
-
uint32_t CLOCK_GetSctClkFreq(void)
Return Frequency of SCTimer Clock.
- Returns:
Frequency of SCTimer Clock.
-
uint32_t CLOCK_GetSdioClkFreq(void)
Return Frequency of SDIO Clock.
- Returns:
Frequency of SDIO Clock.
-
uint32_t CLOCK_GetLcdClkFreq(void)
Return Frequency of LCD Clock.
- Returns:
Frequency of LCD Clock.
-
uint32_t CLOCK_GetLcdClkIn(void)
Return Frequency of LCD CLKIN Clock.
- Returns:
Frequency of LCD CLKIN Clock.
-
uint32_t CLOCK_GetExtClkFreq(void)
Return Frequency of External Clock.
- Returns:
Frequency of External Clock. If no external clock is used returns 0.
-
uint32_t CLOCK_GetWdtOscFreq(void)
Return Frequency of Watchdog Oscillator.
- Returns:
Frequency of Watchdog Oscillator
-
uint32_t CLOCK_GetFroHfFreq(void)
Return Frequency of High-Freq output of FRO.
- Returns:
Frequency of High-Freq output of FRO
-
uint32_t CLOCK_GetFrgClkFreq(void)
Return Frequency of frg.
- Returns:
Frequency of FRG
-
uint32_t CLOCK_GetDmicClkFreq(void)
Return Frequency of dmic.
- Returns:
Frequency of DMIC
-
uint32_t CLOCK_SetFRGClock(uint32_t freq)
Set FRG Clk.
- Returns:
1: if set FRG CLK successfully. 0: if set FRG CLK fail.
-
uint32_t CLOCK_GetPllOutFreq(void)
Return Frequency of PLL.
- Returns:
Frequency of PLL
-
uint32_t CLOCK_GetUsbPllOutFreq(void)
Return Frequency of USB PLL.
- Returns:
Frequency of PLL
-
uint32_t CLOCK_GetAudioPllOutFreq(void)
Return Frequency of AUDIO PLL.
- Returns:
Frequency of PLL
-
uint32_t CLOCK_GetOsc32KFreq(void)
Return Frequency of 32kHz osc.
- Returns:
Frequency of 32kHz osc
-
uint32_t CLOCK_GetCoreSysClkFreq(void)
Return Frequency of Core System.
- Returns:
Frequency of Core System
-
uint32_t CLOCK_GetI2SMClkFreq(void)
Return Frequency of I2S MCLK Clock.
- Returns:
Frequency of I2S MCLK Clock
-
uint32_t CLOCK_GetFlexCommClkFreq(uint32_t id)
Return Frequency of Flexcomm functional Clock.
- Returns:
Frequency of Flexcomm functional Clock
-
uint32_t CLOCK_GetFRGInputClock(void)
return FRG Clk
- Returns:
Frequency of FRG CLK.
- __STATIC_INLINE async_clock_src_t CLOCK_GetAsyncApbClkSrc (void)
Return Asynchronous APB Clock source.
- Returns:
Asynchronous APB CLock source
-
uint32_t CLOCK_GetAsyncApbClkFreq(void)
Return Frequency of Asynchronous APB Clock.
- Returns:
Frequency of Asynchronous APB Clock Clock
- __STATIC_INLINE uint32_t CLOCK_GetEmcClkFreq (void)
Return EMC source.
- Returns:
EMC source
-
uint32_t CLOCK_GetAudioPLLInClockRate(void)
Return Audio PLL input clock rate.
- Returns:
Audio PLL input clock rate
-
uint32_t CLOCK_GetSystemPLLInClockRate(void)
Return System PLL input clock rate.
- Returns:
System PLL input clock rate
-
uint32_t CLOCK_GetSystemPLLOutClockRate(bool recompute)
Return System PLL output clock rate.
Note
The PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use ‘false’ with the ‘recompute’ parameter.
- Parameters:
recompute – : Forces a PLL rate recomputation if true
- Returns:
System PLL output clock rate
-
uint32_t CLOCK_GetAudioPLLOutClockRate(bool recompute)
Return System AUDIO PLL output clock rate.
Note
The AUDIO PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use ‘false’ with the ‘recompute’ parameter.
- Parameters:
recompute – : Forces a AUDIO PLL rate recomputation if true
- Returns:
System AUDIO PLL output clock rate
-
uint32_t CLOCK_GetUsbPLLOutClockRate(bool recompute)
Return System USB PLL output clock rate.
Note
The USB PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use ‘false’ with the ‘recompute’ parameter.
- Parameters:
recompute – : Forces a USB PLL rate recomputation if true
- Returns:
System USB PLL output clock rate
- __STATIC_INLINE void CLOCK_SetBypassPLL (bool bypass)
Enables and disables PLL bypass mode.
bypass : true to bypass PLL (PLL output = PLL input, false to disable bypass
- Returns:
System PLL output clock rate
- __STATIC_INLINE bool CLOCK_IsSystemPLLLocked (void)
Check if PLL is locked or not.
- Returns:
true if the PLL is locked, false if not locked
- __STATIC_INLINE bool CLOCK_IsUsbPLLLocked (void)
Check if USB PLL is locked or not.
- Returns:
true if the USB PLL is locked, false if not locked
- __STATIC_INLINE bool CLOCK_IsAudioPLLLocked (void)
Check if AUDIO PLL is locked or not.
- Returns:
true if the AUDIO PLL is locked, false if not locked
- __STATIC_INLINE void CLOCK_Enable_SysOsc (bool enable)
Enables and disables SYS OSC.
enable : true to enable SYS OSC, false to disable SYS OSC
-
void CLOCK_SetStoredPLLClockRate(uint32_t rate)
Store the current PLL rate.
- Parameters:
rate – Current rate of the PLL
- Returns:
Nothing
-
void CLOCK_SetStoredAudioPLLClockRate(uint32_t rate)
Store the current AUDIO PLL rate.
- Parameters:
rate – Current rate of the PLL
- Returns:
Nothing
-
uint32_t CLOCK_GetSystemPLLOutFromSetup(pll_setup_t *pSetup)
Return System PLL output clock rate from setup structure.
- Parameters:
pSetup – : Pointer to a PLL setup structure
- Returns:
System PLL output clock rate the setup structure will generate
-
uint32_t CLOCK_GetAudioPLLOutFromSetup(pll_setup_t *pSetup)
Return System AUDIO PLL output clock rate from setup structure.
- Parameters:
pSetup – : Pointer to a PLL setup structure
- Returns:
System PLL output clock rate the setup structure will generate
-
uint32_t CLOCK_GetAudioPLLOutFromFractSetup(pll_setup_t *pSetup)
Return System AUDIO PLL output clock rate from audio fractioanl setup structure.
- Parameters:
pSetup – : Pointer to a PLL setup structure
- Returns:
System PLL output clock rate the setup structure will generate
-
uint32_t CLOCK_GetUsbPLLOutFromSetup(const usb_pll_setup_t *pSetup)
Return System USB PLL output clock rate from setup structure.
- Parameters:
pSetup – : Pointer to a PLL setup structure
- Returns:
System PLL output clock rate the setup structure will generate
-
pll_error_t CLOCK_SetupPLLData(pll_config_t *pControl, pll_setup_t *pSetup)
Set PLL output based on the passed PLL setup data.
Note
Actual frequency for setup may vary from the desired frequency based on the accuracy of input clocks, rounding, non-fractional PLL mode, etc.
- Parameters:
pControl – : Pointer to populated PLL control structure to generate setup with
pSetup – : Pointer to PLL setup structure to be filled
- Returns:
PLL_ERROR_SUCCESS on success, or PLL setup error code
-
pll_error_t CLOCK_SetupAudioPLLData(pll_config_t *pControl, pll_setup_t *pSetup)
Set AUDIO PLL output based on the passed AUDIO PLL setup data.
Note
Actual frequency for setup may vary from the desired frequency based on the accuracy of input clocks, rounding, non-fractional PLL mode, etc.
- Parameters:
pControl – : Pointer to populated PLL control structure to generate setup with
pSetup – : Pointer to PLL setup structure to be filled
- Returns:
PLL_ERROR_SUCCESS on success, or PLL setup error code
-
pll_error_t CLOCK_SetupSystemPLLPrec(pll_setup_t *pSetup, uint32_t flagcfg)
Set PLL output from PLL setup structure (precise frequency)
Note
This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.
- Parameters:
pSetup – : Pointer to populated PLL setup structure
flagcfg – : Flag configuration for PLL config structure
- Returns:
PLL_ERROR_SUCCESS on success, or PLL setup error code
-
pll_error_t CLOCK_SetupAudioPLLPrec(pll_setup_t *pSetup, uint32_t flagcfg)
Set AUDIO PLL output from AUDIOPLL setup structure (precise frequency)
Note
This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the AUDIO PLL, wait for PLL lock, and adjust system voltages to the new AUDIOPLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the AUDIO PLL, so these should be setup prior to and after exiting the function.
- Parameters:
pSetup – : Pointer to populated PLL setup structure
flagcfg – : Flag configuration for PLL config structure
- Returns:
PLL_ERROR_SUCCESS on success, or PLL setup error code
-
pll_error_t CLOCK_SetupAudioPLLPrecFract(pll_setup_t *pSetup, uint32_t flagcfg)
Set AUDIO PLL output from AUDIOPLL setup structure using the Audio Fractional divider register(precise
frequency)
Note
This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the AUDIO PLL, wait for PLL lock, and adjust system voltages to the new AUDIOPLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the AUDIO PLL, so these should be setup prior to and after exiting the function.
- Parameters:
pSetup – : Pointer to populated PLL setup structure
flagcfg – : Flag configuration for PLL config structure
- Returns:
PLL_ERROR_SUCCESS on success, or PLL setup error code
-
pll_error_t CLOCK_SetPLLFreq(const pll_setup_t *pSetup)
Set PLL output from PLL setup structure (precise frequency)
Note
This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.
- Parameters:
pSetup – : Pointer to populated PLL setup structure
- Returns:
kStatus_PLL_Success on success, or PLL setup error code
-
pll_error_t CLOCK_SetAudioPLLFreq(const pll_setup_t *pSetup)
Set Audio PLL output from Audio PLL setup structure (precise frequency)
Note
This function will power off the PLL, setup the Audio PLL with the new setup data, and then optionally powerup the PLL, wait for Audio PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the Audio PLL, so these should be setup prior to and after exiting the function.
- Parameters:
pSetup – : Pointer to populated PLL setup structure
- Returns:
kStatus_PLL_Success on success, or Audio PLL setup error code
-
pll_error_t CLOCK_SetUsbPLLFreq(const usb_pll_setup_t *pSetup)
Set USB PLL output from USB PLL setup structure (precise frequency)
Note
This function will power off the USB PLL, setup the PLL with the new setup data, and then optionally powerup the USB PLL, wait for USB PLL lock, and adjust system voltages to the new USB PLL rate. The function will not alter any source clocks (ie, usb pll clock) that may use the USB PLL, so these should be setup prior to and after exiting the function.
- Parameters:
pSetup – : Pointer to populated USB PLL setup structure
- Returns:
kStatus_PLL_Success on success, or USB PLL setup error code
-
void CLOCK_SetupSystemPLLMult(uint32_t multiply_by, uint32_t input_freq)
Set PLL output based on the multiplier and input frequency.
Note
Unlike the Chip_Clock_SetupSystemPLLPrec() function, this function does not disable or enable PLL power, wait for PLL lock, or adjust system voltages. These must be done in the application. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.
- Parameters:
multiply_by – : multiplier
input_freq – : Clock input frequency of the PLL
- Returns:
Nothing
-
static inline void CLOCK_DisableUsbDevicefs0Clock(clock_ip_name_t clk)
Disable USB clock.
Disable USB clock.
-
bool CLOCK_EnableUsbfs0DeviceClock(clock_usb_src_t src, uint32_t freq)
Enable USB Device FS clock.
- Parameters:
src – : clock source
freq – clock frequency Enable USB Device Full Speed clock.
-
bool CLOCK_EnableUsbfs0HostClock(clock_usb_src_t src, uint32_t freq)
Enable USB HOST FS clock.
- Parameters:
src – : clock source
freq – clock frequency Enable USB HOST Full Speed clock.
-
void CLOCK_SetStoredUsbPLLClockRate(uint32_t rate)
Set the current Usb PLL Rate.
-
bool CLOCK_EnableUsbhs0DeviceClock(clock_usb_src_t src, uint32_t freq)
Enable USB Device HS clock.
- Parameters:
src – : clock source
freq – clock frequency Enable USB Device High Speed clock.
-
bool CLOCK_EnableUsbhs0HostClock(clock_usb_src_t src, uint32_t freq)
Enable USB HOST HS clock.
- Parameters:
src – : clock source
freq – clock frequency Enable USB HOST High Speed clock.
-
FSL_CLOCK_DRIVER_VERSION
CLOCK driver version 2.3.3.
-
FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
Configure whether driver controls clock.
When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.
Note
All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.
-
CLOCK_USR_CFG_PLL_CONFIG_CACHE_COUNT
User-defined the size of cache for CLOCK_PllGetConfig() function.
Once define this MACRO to be non-zero value, CLOCK_PllGetConfig() function would cache the recent calulation and accelerate the execution to get the right settings.
-
SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY
-
ADC_CLOCKS
Clock ip name array for ADC.
-
ROM_CLOCKS
Clock ip name array for ROM.
-
SRAM_CLOCKS
Clock ip name array for SRAM.
-
FLASH_CLOCKS
Clock ip name array for FLASH.
-
FMC_CLOCKS
Clock ip name array for FMC.
-
EEPROM_CLOCKS
Clock ip name array for EEPROM.
-
SPIFI_CLOCKS
Clock ip name array for SPIFI.
-
INPUTMUX_CLOCKS
Clock ip name array for INPUTMUX.
-
IOCON_CLOCKS
Clock ip name array for IOCON.
-
GPIO_CLOCKS
Clock ip name array for GPIO.
-
PINT_CLOCKS
Clock ip name array for PINT.
-
GINT_CLOCKS
Clock ip name array for GINT.
-
DMA_CLOCKS
Clock ip name array for DMA.
-
CRC_CLOCKS
Clock ip name array for CRC.
-
WWDT_CLOCKS
Clock ip name array for WWDT.
-
RTC_CLOCKS
Clock ip name array for RTC.
-
ADC0_CLOCKS
Clock ip name array for ADC0.
-
MRT_CLOCKS
Clock ip name array for MRT.
-
RIT_CLOCKS
Clock ip name array for RIT.
-
SCT_CLOCKS
Clock ip name array for SCT0.
-
MCAN_CLOCKS
Clock ip name array for MCAN.
-
UTICK_CLOCKS
Clock ip name array for UTICK.
-
FLEXCOMM_CLOCKS
Clock ip name array for FLEXCOMM.
-
LPUART_CLOCKS
Clock ip name array for LPUART.
-
BI2C_CLOCKS
Clock ip name array for BI2C.
-
LPSI_CLOCKS
Clock ip name array for LSPI.
-
FLEXI2S_CLOCKS
Clock ip name array for FLEXI2S.
-
DMIC_CLOCKS
Clock ip name array for DMIC.
-
CTIMER_CLOCKS
Clock ip name array for CT32B.
-
LCD_CLOCKS
Clock ip name array for LCD.
-
SDIO_CLOCKS
Clock ip name array for SDIO.
-
USBRAM_CLOCKS
Clock ip name array for USBRAM.
-
EMC_CLOCKS
Clock ip name array for EMC.
-
ETH_CLOCKS
Clock ip name array for ETH.
-
AES_CLOCKS
Clock ip name array for AES.
-
OTP_CLOCKS
Clock ip name array for OTP.
-
RNG_CLOCKS
Clock ip name array for RNG.
-
USBHMR0_CLOCKS
Clock ip name array for USBHMR0.
-
USBHSL0_CLOCKS
Clock ip name array for USBHSL0.
-
SHA0_CLOCKS
Clock ip name array for SHA0.
-
SMARTCARD_CLOCKS
Clock ip name array for SMARTCARD.
-
USBD_CLOCKS
Clock ip name array for USBD.
-
USBH_CLOCKS
Clock ip name array for USBH.
-
CLK_GATE_REG_OFFSET_SHIFT
Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.
-
CLK_GATE_REG_OFFSET_MASK
-
CLK_GATE_BIT_SHIFT_SHIFT
-
CLK_GATE_BIT_SHIFT_MASK
-
CLK_GATE_DEFINE(reg_offset, bit_shift)
-
CLK_GATE_ABSTRACT_REG_OFFSET(x)
-
CLK_GATE_ABSTRACT_BITS_SHIFT(x)
-
AHB_CLK_CTRL0
-
AHB_CLK_CTRL1
-
AHB_CLK_CTRL2
-
ASYNC_CLK_CTRL0
-
CLK_ATTACH_ID(mux, sel, pos)
Clock Mux Switches The encoding is as follows each connection identified is 32bits wide while 24bits are valuable starting from LSB upwards.
[4 bits for choice, 0 means invalid choice] [8 bits mux ID]*
-
MUX_A(mux, sel)
-
MUX_B(mux, sel, selector)
-
GET_ID_ITEM(connection)
-
GET_ID_NEXT_ITEM(connection)
-
GET_ID_ITEM_MUX(connection)
-
GET_ID_ITEM_SEL(connection)
-
GET_ID_SELECTOR(connection)
-
CM_STICKCLKSEL
-
CM_MAINCLKSELA
-
CM_MAINCLKSELB
-
CM_CLKOUTCLKSELA
-
CM_SYSPLLCLKSEL
-
CM_AUDPLLCLKSEL
-
CM_SPIFICLKSEL
-
CM_ADCASYNCCLKSEL
-
CM_USB0CLKSEL
-
CM_USB1CLKSEL
-
CM_FXCOMCLKSEL0
-
CM_FXCOMCLKSEL1
-
CM_FXCOMCLKSEL2
-
CM_FXCOMCLKSEL3
-
CM_FXCOMCLKSEL4
-
CM_FXCOMCLKSEL5
-
CM_FXCOMCLKSEL6
-
CM_FXCOMCLKSEL7
-
CM_FXCOMCLKSEL8
-
CM_FXCOMCLKSEL9
-
CM_FXCOMCLKSEL10
-
CM_MCLKCLKSEL
-
CM_FRGCLKSEL
-
CM_DMICCLKSEL
-
CM_SCTCLKSEL
-
CM_LCDCLKSEL
-
CM_SDIOCLKSEL
-
CM_ASYNCAPB
-
PLL_CONFIGFLAG_USEINRATE
PLL configuration structure flags for ‘flags’ field These flags control how the PLL configuration function sets up the PLL setup structure.
When the PLL_CONFIGFLAG_USEINRATE flag is selected, the ‘InputRate’ field in the configuration structure must be assigned with the expected PLL frequency. If the PLL_CONFIGFLAG_USEINRATE is not used, ‘InputRate’ is ignored in the configuration function and the driver will determine the PLL rate from the currently selected PLL source. This flag might be used to configure the PLL input clock more accurately when using the WDT oscillator or a more dyanmic CLKIN source.
When the PLL_CONFIGFLAG_FORCENOFRACT flag is selected, the PLL hardware for the automatic bandwidth selection, Spread Spectrum (SS) support, and fractional M-divider are not used.
Flag to use InputRate in PLL configuration structure for setup
-
PLL_CONFIGFLAG_FORCENOFRACT
Force non-fractional output mode, PLL output will not use the fractional, automatic bandwidth, or \ SS hardware
-
PLL_SETUPFLAG_POWERUP
PLL setup structure flags for ‘flags’ field These flags control how the PLL setup function sets up the PLL.
Setup will power on the PLL after setup
-
PLL_SETUPFLAG_WAITLOCK
Setup will wait for PLL lock, implies the PLL will be pwoered on
-
PLL_SETUPFLAG_ADGVOLT
Optimize system voltage for the new PLL rate
-
uint32_t desiredRate
Desired PLL rate in Hz
-
uint32_t inputRate
PLL input clock in Hz, only used if PLL_CONFIGFLAG_USEINRATE flag is set
-
uint32_t flags
PLL configuration flags, Or’ed value of PLL_CONFIGFLAG_* definitions
-
uint32_t pllctrl
PLL control register SYSPLLCTRL
-
uint32_t pllndec
PLL NDEC register SYSPLLNDEC
-
uint32_t pllpdec
PLL PDEC register SYSPLLPDEC
-
uint32_t pllmdec
PLL MDEC registers SYSPLLPDEC
-
uint32_t pllRate
Acutal PLL rate
-
uint32_t audpllfrac
only aduio PLL has this function
-
uint32_t flags
PLL setup flags, Or’ed value of PLL_SETUPFLAG_* definitions
-
uint8_t msel
USB PLL control register msel:1U-256U
-
uint8_t psel
USB PLL control register psel:only support inter 1U 2U 4U 8U
-
uint8_t nsel
USB PLL control register nsel:only suppoet inter 1U 2U 3U 4U
-
bool direct
USB PLL CCO output control
-
bool bypass
USB PLL inout clock bypass control
-
bool fbsel
USB PLL ineter mode and non-integer mode control
-
uint32_t inputRate
USB PLL input rate
-
struct _pll_config
- #include <fsl_clock.h>
PLL configuration structure.
This structure can be used to configure the settings for a PLL setup structure. Fill in the desired configuration for the PLL and call the PLL setup function to fill in a PLL setup structure.
-
struct _pll_setup
- #include <fsl_clock.h>
PLL setup structure This structure can be used to pre-build a PLL setup configuration at run-time and quickly set the PLL to the configuration. It can be populated with the PLL setup function. If powering up or waiting for PLL lock, the PLL input clock source should be configured prior to PLL setup.
-
struct _usb_pll_setup
- #include <fsl_clock.h>
PLL setup structure This structure can be used to pre-build a USB PLL setup configuration at run-time and quickly set the usb PLL to the configuration. It can be populated with the USB PLL setup function. If powering up or waiting for USB PLL lock, the PLL input clock source should be configured prior to USB PLL setup.
CRC: Cyclic Redundancy Check Driver
-
FSL_CRC_DRIVER_VERSION
CRC driver version. Version 2.1.1.
Current version: 2.1.1
Change log:
Version 2.0.0
initial version
Version 2.0.1
add explicit type cast when writing to WR_DATA
Version 2.0.2
Fix MISRA issue
Version 2.1.0
Add CRC_WriteSeed function
Version 2.1.1
Fix MISRA issue
-
enum _crc_polynomial
CRC polynomials to use.
Values:
-
enumerator kCRC_Polynomial_CRC_CCITT
x^16+x^12+x^5+1
-
enumerator kCRC_Polynomial_CRC_16
x^16+x^15+x^2+1
-
enumerator kCRC_Polynomial_CRC_32
x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1
-
enumerator kCRC_Polynomial_CRC_CCITT
-
typedef enum _crc_polynomial crc_polynomial_t
CRC polynomials to use.
-
typedef struct _crc_config crc_config_t
CRC protocol configuration.
This structure holds the configuration for the CRC protocol.
-
void CRC_Init(CRC_Type *base, const crc_config_t *config)
Enables and configures the CRC peripheral module.
This functions enables the CRC peripheral clock in the LPC SYSCON block. It also configures the CRC engine and starts checksum computation by writing the seed.
- Parameters:
base – CRC peripheral address.
config – CRC module configuration structure.
-
static inline void CRC_Deinit(CRC_Type *base)
Disables the CRC peripheral module.
This functions disables the CRC peripheral clock in the LPC SYSCON block.
- Parameters:
base – CRC peripheral address.
-
void CRC_Reset(CRC_Type *base)
resets CRC peripheral module.
- Parameters:
base – CRC peripheral address.
-
void CRC_WriteSeed(CRC_Type *base, uint32_t seed)
Write seed to CRC peripheral module.
- Parameters:
base – CRC peripheral address.
seed – CRC Seed value.
-
void CRC_GetDefaultConfig(crc_config_t *config)
Loads default values to CRC protocol configuration structure.
Loads default values to CRC protocol configuration structure. The default values are:
config->polynomial = kCRC_Polynomial_CRC_CCITT; config->reverseIn = false; config->complementIn = false; config->reverseOut = false; config->complementOut = false; config->seed = 0xFFFFU;
- Parameters:
config – CRC protocol configuration structure
-
void CRC_GetConfig(CRC_Type *base, crc_config_t *config)
Loads actual values configured in CRC peripheral to CRC protocol configuration structure.
The values, including seed, can be used to resume CRC calculation later.
- Parameters:
base – CRC peripheral address.
config – CRC protocol configuration structure
-
void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)
Writes data to the CRC module.
Writes input data buffer bytes to CRC data register.
- Parameters:
base – CRC peripheral address.
data – Input data stream, MSByte in data[0].
dataSize – Size of the input data buffer in bytes.
-
static inline uint32_t CRC_Get32bitResult(CRC_Type *base)
Reads 32-bit checksum from the CRC module.
Reads CRC data register.
- Parameters:
base – CRC peripheral address.
- Returns:
final 32-bit checksum, after configured bit reverse and complement operations.
-
static inline uint16_t CRC_Get16bitResult(CRC_Type *base)
Reads 16-bit checksum from the CRC module.
Reads CRC data register.
- Parameters:
base – CRC peripheral address.
- Returns:
final 16-bit checksum, after configured bit reverse and complement operations.
-
CRC_DRIVER_USE_CRC16_CCITT_FALSE_AS_DEFAULT
Default configuration structure filled by CRC_GetDefaultConfig(). Uses CRC-16/CCITT-FALSE as default.
-
struct _crc_config
- #include <fsl_crc.h>
CRC protocol configuration.
This structure holds the configuration for the CRC protocol.
Public Members
-
crc_polynomial_t polynomial
CRC polynomial.
-
bool reverseIn
Reverse bits on input.
-
bool complementIn
Perform 1’s complement on input.
-
bool reverseOut
Reverse bits on output.
-
bool complementOut
Perform 1’s complement on output.
-
uint32_t seed
Starting checksum value.
-
crc_polynomial_t polynomial
CTIMER: Standard counter/timers
-
void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config)
Ungates the clock and configures the peripheral for basic operation.
Note
This API should be called at the beginning of the application before using the driver.
- Parameters:
base – Ctimer peripheral base address
config – Pointer to the user configuration structure.
-
void CTIMER_Deinit(CTIMER_Type *base)
Gates the timer clock.
- Parameters:
base – Ctimer peripheral base address
-
void CTIMER_GetDefaultConfig(ctimer_config_t *config)
Fills in the timers configuration structure with the default settings.
The default values are:
config->mode = kCTIMER_TimerMode; config->input = kCTIMER_Capture_0; config->prescale = 0;
- Parameters:
config – Pointer to the user configuration structure.
-
status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint32_t pwmPeriod, uint32_t pulsePeriod, bool enableInt)
Configures the PWM signal parameters.
Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.
Note
When setting PWM output from multiple output pins, all should use the same PWM period
- Parameters:
base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
pwmPeriod – PWM period match value
pulsePeriod – Pulse width match value
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.
- Returns:
kStatus_Success on success kStatus_Fail If matchChannel is equal to pwmPeriodChannel; this channel is reserved to set the PWM cycle If PWM pulse width register value is larger than 0xFFFFFFFF.
-
status_t CTIMER_SetupPwm(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, bool enableInt)
Configures the PWM signal parameters.
Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.
Note
When setting PWM output from multiple output pins, all should use the same PWM frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.
- Parameters:
base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – PWM pulse width; the value should be between 0 to 100
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – Timer counter clock in Hz
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.
-
static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)
Updates the pulse period of an active PWM signal.
- Parameters:
base – Ctimer peripheral base address
matchChannel – Match pin to be used to output the PWM signal
pulsePeriod – New PWM pulse width match value
-
status_t CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent)
Updates the duty cycle of an active PWM signal.
Note
Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution. This function can manually assign the specified channel to set the PWM cycle.
- Parameters:
base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – New PWM pulse width; the value should be between 0 to 100
- Returns:
kStatus_Success on success kStatus_Fail If PWM pulse width register value is larger than 0xFFFFFFFF.
-
static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)
Enables the selected Timer interrupts.
- Parameters:
base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t
-
static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)
Disables the selected Timer interrupts.
- Parameters:
base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t
-
static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)
Gets the enabled Timer interrupts.
- Parameters:
base – Ctimer peripheral base address
- Returns:
The enabled interrupts. This is the logical OR of members of the enumeration ctimer_interrupt_enable_t
-
static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)
Gets the Timer status flags.
- Parameters:
base – Ctimer peripheral base address
- Returns:
The status flags. This is the logical OR of members of the enumeration ctimer_status_flags_t
-
static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)
Clears the Timer status flags.
- Parameters:
base – Ctimer peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration ctimer_status_flags_t
-
static inline void CTIMER_StartTimer(CTIMER_Type *base)
Starts the Timer counter.
- Parameters:
base – Ctimer peripheral base address
-
static inline void CTIMER_StopTimer(CTIMER_Type *base)
Stops the Timer counter.
- Parameters:
base – Ctimer peripheral base address
-
FSL_CTIMER_DRIVER_VERSION
Version 2.3.3
-
enum _ctimer_capture_channel
List of Timer capture channels.
Values:
-
enumerator kCTIMER_Capture_0
Timer capture channel 0
-
enumerator kCTIMER_Capture_1
Timer capture channel 1
-
enumerator kCTIMER_Capture_3
Timer capture channel 3
-
enumerator kCTIMER_Capture_0
-
enum _ctimer_capture_edge
List of capture edge options.
Values:
-
enumerator kCTIMER_Capture_RiseEdge
Capture on rising edge
-
enumerator kCTIMER_Capture_FallEdge
Capture on falling edge
-
enumerator kCTIMER_Capture_BothEdge
Capture on rising and falling edge
-
enumerator kCTIMER_Capture_RiseEdge
-
enum _ctimer_match
List of Timer match registers.
Values:
-
enumerator kCTIMER_Match_0
Timer match register 0
-
enumerator kCTIMER_Match_1
Timer match register 1
-
enumerator kCTIMER_Match_2
Timer match register 2
-
enumerator kCTIMER_Match_3
Timer match register 3
-
enumerator kCTIMER_Match_0
-
enum _ctimer_external_match
List of external match.
Values:
-
enumerator kCTIMER_External_Match_0
External match 0
-
enumerator kCTIMER_External_Match_1
External match 1
-
enumerator kCTIMER_External_Match_2
External match 2
-
enumerator kCTIMER_External_Match_3
External match 3
-
enumerator kCTIMER_External_Match_0
-
enum _ctimer_match_output_control
List of output control options.
Values:
-
enumerator kCTIMER_Output_NoAction
No action is taken
-
enumerator kCTIMER_Output_Clear
Clear the EM bit/output to 0
-
enumerator kCTIMER_Output_Set
Set the EM bit/output to 1
-
enumerator kCTIMER_Output_Toggle
Toggle the EM bit/output
-
enumerator kCTIMER_Output_NoAction
-
enum _ctimer_timer_mode
List of Timer modes.
Values:
-
enumerator kCTIMER_TimerMode
-
enumerator kCTIMER_IncreaseOnRiseEdge
-
enumerator kCTIMER_IncreaseOnFallEdge
-
enumerator kCTIMER_IncreaseOnBothEdge
-
enumerator kCTIMER_TimerMode
-
enum _ctimer_interrupt_enable
List of Timer interrupts.
Values:
-
enumerator kCTIMER_Match0InterruptEnable
Match 0 interrupt
-
enumerator kCTIMER_Match1InterruptEnable
Match 1 interrupt
-
enumerator kCTIMER_Match2InterruptEnable
Match 2 interrupt
-
enumerator kCTIMER_Match3InterruptEnable
Match 3 interrupt
-
enumerator kCTIMER_Match0InterruptEnable
-
enum _ctimer_status_flags
List of Timer flags.
Values:
-
enumerator kCTIMER_Match0Flag
Match 0 interrupt flag
-
enumerator kCTIMER_Match1Flag
Match 1 interrupt flag
-
enumerator kCTIMER_Match2Flag
Match 2 interrupt flag
-
enumerator kCTIMER_Match3Flag
Match 3 interrupt flag
-
enumerator kCTIMER_Match0Flag
-
enum ctimer_callback_type_t
Callback type when registering for a callback. When registering a callback an array of function pointers is passed the size could be 1 or 8, the callback type will tell that.
Values:
-
enumerator kCTIMER_SingleCallback
Single Callback type where there is only one callback for the timer. based on the status flags different channels needs to be handled differently
-
enumerator kCTIMER_MultipleCallback
Multiple Callback type where there can be 8 valid callbacks, one per channel. for both match/capture
-
enumerator kCTIMER_SingleCallback
-
typedef enum _ctimer_capture_channel ctimer_capture_channel_t
List of Timer capture channels.
-
typedef enum _ctimer_capture_edge ctimer_capture_edge_t
List of capture edge options.
-
typedef enum _ctimer_match ctimer_match_t
List of Timer match registers.
-
typedef enum _ctimer_external_match ctimer_external_match_t
List of external match.
-
typedef enum _ctimer_match_output_control ctimer_match_output_control_t
List of output control options.
-
typedef enum _ctimer_timer_mode ctimer_timer_mode_t
List of Timer modes.
-
typedef enum _ctimer_interrupt_enable ctimer_interrupt_enable_t
List of Timer interrupts.
-
typedef enum _ctimer_status_flags ctimer_status_flags_t
List of Timer flags.
-
typedef void (*ctimer_callback_t)(uint32_t flags)
-
typedef struct _ctimer_match_config ctimer_match_config_t
Match configuration.
This structure holds the configuration settings for each match register.
-
typedef struct _ctimer_config ctimer_config_t
Timer configuration structure.
This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.
The configuration structure can be made constant so as to reside in flash.
-
void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config)
Setup the match register.
User configuration is used to setup the match value and action to be taken when a match occurs.
- Parameters:
base – Ctimer peripheral base address
matchChannel – Match register to configure
config – Pointer to the match configuration structure
-
uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel)
Get the status of output match.
This function gets the status of output MAT, whether or not this output is connected to a pin. This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.
- Parameters:
base – Ctimer peripheral base address
matchChannel – External match channel, user can obtain the status of multiple match channels at the same time by using the logic of “|” enumeration ctimer_external_match_t
- Returns:
The mask of external match channel status flags. Users need to use the _ctimer_external_match type to decode the return variables.
-
void CTIMER_SetupCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, ctimer_capture_edge_t edge, bool enableInt)
Setup the capture.
- Parameters:
base – Ctimer peripheral base address
capture – Capture channel to configure
edge – Edge on the channel that will trigger a capture
enableInt – Flag to enable channel interrupts, if enabled then the registered call back is called upon capture
-
static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)
Get the timer count value from TC register.
- Parameters:
base – Ctimer peripheral base address.
- Returns:
return the timer count value.
-
void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type)
Register callback.
- Parameters:
base – Ctimer peripheral base address
cb_func – callback function
cb_type – callback function type, singular or multiple
-
static inline void CTIMER_Reset(CTIMER_Type *base)
Reset the counter.
The timer counter and prescale counter are reset on the next positive edge of the APB clock.
- Parameters:
base – Ctimer peripheral base address
-
static inline void CTIMER_SetPrescale(CTIMER_Type *base, uint32_t prescale)
Setup the timer prescale value.
Specifies the maximum value for the Prescale Counter.
- Parameters:
base – Ctimer peripheral base address
prescale – Prescale value
-
static inline uint32_t CTIMER_GetCaptureValue(CTIMER_Type *base, ctimer_capture_channel_t capture)
Get capture channel value.
Get the counter/timer value on the corresponding capture channel.
- Parameters:
base – Ctimer peripheral base address
capture – Select capture channel
- Returns:
The timer count capture value.
-
static inline void CTIMER_EnableResetMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)
Enable reset match channel.
Set the specified match channel reset operation.
- Parameters:
base – Ctimer peripheral base address
match – match channel used
enable – Enable match channel reset operation.
-
static inline void CTIMER_EnableStopMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)
Enable stop match channel.
Set the specified match channel stop operation.
- Parameters:
base – Ctimer peripheral base address.
match – match channel used.
enable – Enable match channel stop operation.
-
static inline void CTIMER_EnableMatchChannelReload(CTIMER_Type *base, ctimer_match_t match, bool enable)
Enable reload channel falling edge.
Enable the specified match channel reload match shadow value.
- Parameters:
base – Ctimer peripheral base address.
match – match channel used.
enable – Enable .
-
static inline void CTIMER_EnableRisingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)
Enable capture channel rising edge.
Sets the specified capture channel for rising edge capture.
- Parameters:
base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable rising edge capture.
-
static inline void CTIMER_EnableFallingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)
Enable capture channel falling edge.
Sets the specified capture channel for falling edge capture.
- Parameters:
base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable falling edge capture.
-
static inline void CTIMER_SetShadowValue(CTIMER_Type *base, ctimer_match_t match, uint32_t matchvalue)
Set the specified match shadow channel.
- Parameters:
base – Ctimer peripheral base address.
match – match channel used.
matchvalue – Reload the value of the corresponding match register.
-
struct _ctimer_match_config
- #include <fsl_ctimer.h>
Match configuration.
This structure holds the configuration settings for each match register.
Public Members
-
uint32_t matchValue
This is stored in the match register
-
bool enableCounterReset
true: Match will reset the counter false: Match will not reser the counter
-
bool enableCounterStop
true: Match will stop the counter false: Match will not stop the counter
-
ctimer_match_output_control_t outControl
Action to be taken on a match on the EM bit/output
-
bool outPinInitState
Initial value of the EM bit/output
-
bool enableInterrupt
true: Generate interrupt upon match false: Do not generate interrupt on match
-
uint32_t matchValue
-
struct _ctimer_config
- #include <fsl_ctimer.h>
Timer configuration structure.
This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.
The configuration structure can be made constant so as to reside in flash.
Public Members
-
ctimer_timer_mode_t mode
Timer mode
-
ctimer_capture_channel_t input
Input channel to increment the timer, used only in timer modes that rely on this input signal to increment TC
-
uint32_t prescale
Prescale value
-
ctimer_timer_mode_t mode
DMA: Direct Memory Access Controller Driver
-
void DMA_Init(DMA_Type *base)
Initializes DMA peripheral.
This function enable the DMA clock, set descriptor table and enable DMA peripheral.
- Parameters:
base – DMA peripheral base address.
-
void DMA_Deinit(DMA_Type *base)
Deinitializes DMA peripheral.
This function gates the DMA clock.
- Parameters:
base – DMA peripheral base address.
-
void DMA_InstallDescriptorMemory(DMA_Type *base, void *addr)
Install DMA descriptor memory.
This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, althrough current DMA driver has a default DMA descriptor buffer, but it support one DMA descriptor for one channel only.
- Parameters:
base – DMA base address.
addr – DMA descriptor address
-
static inline bool DMA_ChannelIsActive(DMA_Type *base, uint32_t channel)
Return whether DMA channel is processing transfer.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
- Returns:
True for active state, false otherwise.
-
static inline bool DMA_ChannelIsBusy(DMA_Type *base, uint32_t channel)
Return whether DMA channel is busy.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
- Returns:
True for busy state, false otherwise.
-
static inline void DMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel)
Enables the interrupt source for the DMA transfer.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
-
static inline void DMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel)
Disables the interrupt source for the DMA transfer.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
-
static inline void DMA_EnableChannel(DMA_Type *base, uint32_t channel)
Enable DMA channel.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
-
static inline void DMA_DisableChannel(DMA_Type *base, uint32_t channel)
Disable DMA channel.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
-
static inline void DMA_EnableChannelPeriphRq(DMA_Type *base, uint32_t channel)
Set PERIPHREQEN of channel configuration register.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
-
static inline void DMA_DisableChannelPeriphRq(DMA_Type *base, uint32_t channel)
Get PERIPHREQEN value of channel configuration register.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
- Returns:
True for enabled PeriphRq, false for disabled.
-
void DMA_ConfigureChannelTrigger(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger)
Set trigger settings of DMA channel.
- Deprecated:
Do not use this function. It has been superceded by DMA_SetChannelConfig.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
trigger – trigger configuration.
-
void DMA_SetChannelConfig(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger, bool isPeriph)
set channel config.
This function provide a interface to configure channel configuration reisters.
- Parameters:
base – DMA base address.
channel – DMA channel number.
trigger – channel configurations structure.
isPeriph – true is periph request, false is not.
-
static inline uint32_t DMA_SetChannelXferConfig(bool reload, bool clrTrig, bool intA, bool intB, uint8_t width, uint8_t srcInc, uint8_t dstInc, uint32_t bytes)
DMA channel xfer transfer configurations.
- Parameters:
reload – true is reload link descriptor after current exhaust, false is not
clrTrig – true is clear trigger status, wait software trigger, false is not
intA – enable interruptA
intB – enable interruptB
width – transfer width
srcInc – source address interleave size
dstInc – destination address interleave size
bytes – transfer bytes
- Returns:
The vaule of xfer config
-
uint32_t DMA_GetRemainingBytes(DMA_Type *base, uint32_t channel)
Gets the remaining bytes of the current DMA descriptor transfer.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
- Returns:
The number of bytes which have not been transferred yet.
-
static inline void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority)
Set priority of channel configuration register.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
priority – Channel priority value.
-
static inline dma_priority_t DMA_GetChannelPriority(DMA_Type *base, uint32_t channel)
Get priority of channel configuration register.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
- Returns:
Channel priority value.
-
static inline void DMA_SetChannelConfigValid(DMA_Type *base, uint32_t channel)
Set channel configuration valid.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
-
static inline void DMA_DoChannelSoftwareTrigger(DMA_Type *base, uint32_t channel)
Do software trigger for the channel.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
-
static inline void DMA_LoadChannelTransferConfig(DMA_Type *base, uint32_t channel, uint32_t xfer)
Load channel transfer configurations.
- Parameters:
base – DMA peripheral base address.
channel – DMA channel number.
xfer – transfer configurations.
-
void DMA_CreateDescriptor(dma_descriptor_t *desc, dma_xfercfg_t *xfercfg, void *srcAddr, void *dstAddr, void *nextDesc)
Create application specific DMA descriptor to be used in a chain in transfer.
- Deprecated:
Do not use this function. It has been superceded by DMA_SetupDescriptor.
- Parameters:
desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcAddr – Address of last item to transmit
dstAddr – Address of last item to receive.
nextDesc – Address of next descriptor in chain.
-
void DMA_SetupDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)
setup dma descriptor
Note: This function do not support configure wrap descriptor.
- Parameters:
desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.
-
void DMA_SetupChannelDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc, dma_burst_wrap_t wrapType, uint32_t burstSize)
setup dma channel descriptor
Note: This function support configure wrap descriptor.
- Parameters:
desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.
wrapType – burst wrap type.
burstSize – burst size, reference _dma_burst_size.
-
void DMA_LoadChannelDescriptor(DMA_Type *base, uint32_t channel, dma_descriptor_t *descriptor)
load channel transfer decriptor.
This function can be used to load desscriptor to driver internal channel descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:
for the polling transfer, application can allocate a local descriptor memory table to prepare a descriptor firstly and then call this api to load the configured descriptor to driver descriptor table.
DMA_Init(DMA0); DMA_EnableChannel(DMA0, DEMO_DMA_CHANNEL); DMA_SetupDescriptor(desc, xferCfg, s_srcBuffer, &s_destBuffer[0], NULL); DMA_LoadChannelDescriptor(DMA0, DEMO_DMA_CHANNEL, (dma_descriptor_t *)desc); DMA_DoChannelSoftwareTrigger(DMA0, DEMO_DMA_CHANNEL); while(DMA_ChannelIsBusy(DMA0, DEMO_DMA_CHANNEL)) {}
- Parameters:
base – DMA base address.
channel – DMA channel.
descriptor – configured DMA descriptor.
-
void DMA_AbortTransfer(dma_handle_t *handle)
Abort running transfer by handle.
This function aborts DMA transfer specified by handle.
- Parameters:
handle – DMA handle pointer.
-
void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel)
Creates the DMA handle.
This function is called if using transaction API for DMA. This function initializes the internal state of DMA handle.
- Parameters:
handle – DMA handle pointer. The DMA handle stores callback function and parameters.
base – DMA peripheral base address.
channel – DMA channel number.
-
void DMA_SetCallback(dma_handle_t *handle, dma_callback callback, void *userData)
Installs a callback function for the DMA transfer.
This callback is called in DMA IRQ handler. Use the callback to do something after the current major loop transfer completes.
- Parameters:
handle – DMA handle pointer.
callback – DMA callback function pointer.
userData – Parameter for callback function.
-
void DMA_PrepareTransfer(dma_transfer_config_t *config, void *srcAddr, void *dstAddr, uint32_t byteWidth, uint32_t transferBytes, dma_transfer_type_t type, void *nextDesc)
Prepares the DMA transfer structure.
- Deprecated:
Do not use this function. It has been superceded by DMA_PrepareChannelTransfer. This function prepares the transfer configuration structure according to the user input.
Note
The data address and the data width must be consistent. For example, if the SRC is 4 bytes, so the source address must be 4 bytes aligned, or it shall result in source address error(SAE).
- Parameters:
config – The user configuration structure of type dma_transfer_t.
srcAddr – DMA transfer source address.
dstAddr – DMA transfer destination address.
byteWidth – DMA transfer destination address width(bytes).
transferBytes – DMA transfer bytes to be transferred.
type – DMA transfer type.
nextDesc – Chain custom descriptor to transfer.
-
void DMA_PrepareChannelTransfer(dma_channel_config_t *config, void *srcStartAddr, void *dstStartAddr, uint32_t xferCfg, dma_transfer_type_t type, dma_channel_trigger_t *trigger, void *nextDesc)
Prepare channel transfer configurations.
This function used to prepare channel transfer configurations.
- Parameters:
config – Pointer to DMA channel transfer configuration structure.
srcStartAddr – source start address.
dstStartAddr – destination start address.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
type – transfer type.
trigger – DMA channel trigger configurations.
nextDesc – address of next descriptor.
-
status_t DMA_SubmitTransfer(dma_handle_t *handle, dma_transfer_config_t *config)
Submits the DMA transfer request.
- Deprecated:
Do not use this function. It has been superceded by DMA_SubmitChannelTransfer.
This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.
- Parameters:
handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.
- Return values:
kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.
-
void DMA_SubmitChannelTransferParameter(dma_handle_t *handle, uint32_t xferCfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)
Submit channel transfer paramter directly.
This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:
for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.
DMA_SetChannelConfig(base, channel, trigger, isPeriph); DMA_CreateHandle(handle, base, channel) DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, NULL); DMA_StartTransfer(handle)
for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.
define link descriptor table in application with macro DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[3]); DMA_SetupDescriptor(nextDesc0, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc1); DMA_SetupDescriptor(nextDesc1, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc2); DMA_SetupDescriptor(nextDesc2, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, NULL); DMA_SetChannelConfig(base, channel, trigger, isPeriph); DMA_CreateHandle(handle, base, channel) DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc0); DMA_StartTransfer(handle);
- Parameters:
handle – Pointer to DMA handle.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
srcStartAddr – source start address.
dstStartAddr – destination start address.
nextDesc – address of next descriptor.
-
void DMA_SubmitChannelDescriptor(dma_handle_t *handle, dma_descriptor_t *descriptor)
Submit channel descriptor.
This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, this functiono is typical for the ping pong case:
for the ping pong case, application should responsible for the descriptor, for example, application should prepare two descriptor table with macro.
define link descriptor table in application with macro DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[2]); DMA_SetupDescriptor(nextDesc0, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc1); DMA_SetupDescriptor(nextDesc1, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc0); DMA_SetChannelConfig(base, channel, trigger, isPeriph); DMA_CreateHandle(handle, base, channel) DMA_SubmitChannelDescriptor(handle, nextDesc0); DMA_StartTransfer(handle);
- Parameters:
handle – Pointer to DMA handle.
descriptor – descriptor to submit.
-
status_t DMA_SubmitChannelTransfer(dma_handle_t *handle, dma_channel_config_t *config)
Submits the DMA channel transfer request.
This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time. It is used for the case:
for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.
DMA_CreateHandle(handle, base, channel) DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,NULL); DMA_SubmitChannelTransfer(handle, config) DMA_StartTransfer(handle)
for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.
define link descriptor table in application with macro DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc); DMA_SetupDescriptor(nextDesc0, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc1); DMA_SetupDescriptor(nextDesc1, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc2); DMA_SetupDescriptor(nextDesc2, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, NULL); DMA_CreateHandle(handle, base, channel) DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0); DMA_SubmitChannelTransfer(handle, config) DMA_StartTransfer(handle)
for the ping pong case, application should responsible for link descriptor, for example, application should prepare two descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.
define link descriptor table in application with macro DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc); DMA_SetupDescriptor(nextDesc0, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc1); DMA_SetupDescriptor(nextDesc1, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes), srcStartAddr, dstStartAddr, nextDesc0); DMA_CreateHandle(handle, base, channel) DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0); DMA_SubmitChannelTransfer(handle, config) DMA_StartTransfer(handle)
- Parameters:
handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.
- Return values:
kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.
-
void DMA_StartTransfer(dma_handle_t *handle)
DMA start transfer.
This function enables the channel request. User can call this function after submitting the transfer request It will trigger transfer start with software trigger only when hardware trigger is not used.
- Parameters:
handle – DMA handle pointer.
-
void DMA_IRQHandle(DMA_Type *base)
DMA IRQ handler for descriptor transfer complete.
This function clears the channel major interrupt flag and call the callback function if it is not NULL.
- Parameters:
base – DMA base address.
-
FSL_DMA_DRIVER_VERSION
DMA driver version.
Version 2.5.3.
_dma_transfer_status DMA transfer status
Values:
-
enumerator kStatus_DMA_Busy
Channel is busy and can’t handle the transfer request.
-
enumerator kStatus_DMA_Busy
_dma_addr_interleave_size dma address interleave size
Values:
-
enumerator kDMA_AddressInterleave0xWidth
dma source/destination address no interleave
-
enumerator kDMA_AddressInterleave1xWidth
dma source/destination address interleave 1xwidth
-
enumerator kDMA_AddressInterleave2xWidth
dma source/destination address interleave 2xwidth
-
enumerator kDMA_AddressInterleave4xWidth
dma source/destination address interleave 3xwidth
-
enumerator kDMA_AddressInterleave0xWidth
_dma_transfer_width dma transfer width
Values:
-
enumerator kDMA_Transfer8BitWidth
dma channel transfer bit width is 8 bit
-
enumerator kDMA_Transfer16BitWidth
dma channel transfer bit width is 16 bit
-
enumerator kDMA_Transfer32BitWidth
dma channel transfer bit width is 32 bit
-
enumerator kDMA_Transfer8BitWidth
-
enum _dma_priority
DMA channel priority.
Values:
-
enumerator kDMA_ChannelPriority0
Highest channel priority - priority 0
-
enumerator kDMA_ChannelPriority1
Channel priority 1
-
enumerator kDMA_ChannelPriority2
Channel priority 2
-
enumerator kDMA_ChannelPriority3
Channel priority 3
-
enumerator kDMA_ChannelPriority4
Channel priority 4
-
enumerator kDMA_ChannelPriority5
Channel priority 5
-
enumerator kDMA_ChannelPriority6
Channel priority 6
-
enumerator kDMA_ChannelPriority7
Lowest channel priority - priority 7
-
enumerator kDMA_ChannelPriority0
-
enum _dma_int
DMA interrupt flags.
Values:
-
enumerator kDMA_IntA
DMA interrupt flag A
-
enumerator kDMA_IntB
DMA interrupt flag B
-
enumerator kDMA_IntError
DMA interrupt flag error
-
enumerator kDMA_IntA
-
enum _dma_trigger_type
DMA trigger type.
Values:
-
enumerator kDMA_NoTrigger
Trigger is disabled
-
enumerator kDMA_LowLevelTrigger
Low level active trigger
-
enumerator kDMA_HighLevelTrigger
High level active trigger
-
enumerator kDMA_FallingEdgeTrigger
Falling edge active trigger
-
enumerator kDMA_RisingEdgeTrigger
Rising edge active trigger
-
enumerator kDMA_NoTrigger
_dma_burst_size DMA burst size
Values:
-
enumerator kDMA_BurstSize1
burst size 1 transfer
-
enumerator kDMA_BurstSize2
burst size 2 transfer
-
enumerator kDMA_BurstSize4
burst size 4 transfer
-
enumerator kDMA_BurstSize8
burst size 8 transfer
-
enumerator kDMA_BurstSize16
burst size 16 transfer
-
enumerator kDMA_BurstSize32
burst size 32 transfer
-
enumerator kDMA_BurstSize64
burst size 64 transfer
-
enumerator kDMA_BurstSize128
burst size 128 transfer
-
enumerator kDMA_BurstSize256
burst size 256 transfer
-
enumerator kDMA_BurstSize512
burst size 512 transfer
-
enumerator kDMA_BurstSize1024
burst size 1024 transfer
-
enumerator kDMA_BurstSize1
-
enum _dma_trigger_burst
DMA trigger burst.
Values:
-
enumerator kDMA_SingleTransfer
Single transfer
-
enumerator kDMA_LevelBurstTransfer
Burst transfer driven by level trigger
-
enumerator kDMA_EdgeBurstTransfer1
Perform 1 transfer by edge trigger
-
enumerator kDMA_EdgeBurstTransfer2
Perform 2 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer4
Perform 4 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer8
Perform 8 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer16
Perform 16 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer32
Perform 32 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer64
Perform 64 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer128
Perform 128 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer256
Perform 256 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer512
Perform 512 transfers by edge trigger
-
enumerator kDMA_EdgeBurstTransfer1024
Perform 1024 transfers by edge trigger
-
enumerator kDMA_SingleTransfer
-
enum _dma_burst_wrap
DMA burst wrapping.
Values:
-
enumerator kDMA_NoWrap
Wrapping is disabled
-
enumerator kDMA_SrcWrap
Wrapping is enabled for source
-
enumerator kDMA_DstWrap
Wrapping is enabled for destination
-
enumerator kDMA_SrcAndDstWrap
Wrapping is enabled for source and destination
-
enumerator kDMA_NoWrap
-
enum _dma_transfer_type
DMA transfer type.
Values:
-
enumerator kDMA_MemoryToMemory
Transfer from memory to memory (increment source and destination)
-
enumerator kDMA_PeripheralToMemory
Transfer from peripheral to memory (increment only destination)
-
enumerator kDMA_MemoryToPeripheral
Transfer from memory to peripheral (increment only source)
-
enumerator kDMA_StaticToStatic
Peripheral to static memory (do not increment source or destination)
-
enumerator kDMA_MemoryToMemory
-
typedef struct _dma_descriptor dma_descriptor_t
DMA descriptor structure.
-
typedef struct _dma_xfercfg dma_xfercfg_t
DMA transfer configuration.
-
typedef enum _dma_priority dma_priority_t
DMA channel priority.
-
typedef enum _dma_int dma_irq_t
DMA interrupt flags.
-
typedef enum _dma_trigger_type dma_trigger_type_t
DMA trigger type.
-
typedef enum _dma_trigger_burst dma_trigger_burst_t
DMA trigger burst.
-
typedef enum _dma_burst_wrap dma_burst_wrap_t
DMA burst wrapping.
-
typedef enum _dma_transfer_type dma_transfer_type_t
DMA transfer type.
-
typedef struct _dma_channel_trigger dma_channel_trigger_t
DMA channel trigger.
-
typedef struct _dma_channel_config dma_channel_config_t
DMA channel trigger.
-
typedef struct _dma_transfer_config dma_transfer_config_t
DMA transfer configuration.
-
typedef void (*dma_callback)(struct _dma_handle *handle, void *userData, bool transferDone, uint32_t intmode)
Define Callback function for DMA.
-
typedef struct _dma_handle dma_handle_t
DMA transfer handle structure.
-
DMA_MAX_TRANSFER_COUNT
DMA max transfer size.
-
FSL_FEATURE_DMA_NUMBER_OF_CHANNELSn(x)
DMA channel numbers.
-
FSL_FEATURE_DMA_MAX_CHANNELS
-
FSL_FEATURE_DMA_ALL_CHANNELS
-
FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE
DMA head link descriptor table align size.
-
DMA_ALLOCATE_HEAD_DESCRIPTORS(name, number)
DMA head descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.
- Parameters:
name – Allocate decriptor name.
number – Number of descriptor to be allocated.
-
DMA_ALLOCATE_HEAD_DESCRIPTORS_AT_NONCACHEABLE(name, number)
DMA head descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.
- Parameters:
name – Allocate decriptor name.
number – Number of descriptor to be allocated.
-
DMA_ALLOCATE_LINK_DESCRIPTORS(name, number)
DMA link descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.
- Parameters:
name – Allocate decriptor name.
number – Number of descriptor to be allocated.
-
DMA_ALLOCATE_LINK_DESCRIPTORS_AT_NONCACHEABLE(name, number)
DMA link descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.
- Parameters:
name – Allocate decriptor name.
number – Number of descriptor to be allocated.
-
DMA_ALLOCATE_DATA_TRANSFER_BUFFER(name, width)
DMA transfer buffer address need to align with the transfer width.
-
DMA_CHANNEL_GROUP(channel)
-
DMA_CHANNEL_INDEX(base, channel)
-
DMA_COMMON_REG_GET(base, channel, reg)
DMA linked descriptor address algin size.
-
DMA_COMMON_CONST_REG_GET(base, channel, reg)
-
DMA_COMMON_REG_SET(base, channel, reg, value)
-
DMA_DESCRIPTOR_END_ADDRESS(start, inc, bytes, width)
DMA descriptor end address calculate.
- Parameters:
start – start address
inc – address interleave size
bytes – transfer bytes
width – transfer width
-
DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes)
-
struct _dma_descriptor
- #include <fsl_dma.h>
DMA descriptor structure.
Public Members
-
volatile uint32_t xfercfg
Transfer configuration
-
void *srcEndAddr
Last source address of DMA transfer
-
void *dstEndAddr
Last destination address of DMA transfer
-
void *linkToNextDesc
Address of next DMA descriptor in chain
-
volatile uint32_t xfercfg
-
struct _dma_xfercfg
- #include <fsl_dma.h>
DMA transfer configuration.
Public Members
-
bool valid
Descriptor is ready to transfer
-
bool reload
Reload channel configuration register after current descriptor is exhausted
-
bool swtrig
Perform software trigger. Transfer if fired when ‘valid’ is set
-
bool clrtrig
Clear trigger
-
bool intA
Raises IRQ when transfer is done and set IRQA status register flag
-
bool intB
Raises IRQ when transfer is done and set IRQB status register flag
-
uint8_t byteWidth
Byte width of data to transfer
-
uint8_t srcInc
Increment source address by ‘srcInc’ x ‘byteWidth’
-
uint8_t dstInc
Increment destination address by ‘dstInc’ x ‘byteWidth’
-
uint16_t transferCount
Number of transfers
-
bool valid
-
struct _dma_channel_trigger
- #include <fsl_dma.h>
DMA channel trigger.
Public Members
-
dma_trigger_type_t type
Select hardware trigger as edge triggered or level triggered.
-
dma_trigger_burst_t burst
Select whether hardware triggers cause a single or burst transfer.
-
dma_burst_wrap_t wrap
Select wrap type, source wrap or dest wrap, or both.
-
dma_trigger_type_t type
-
struct _dma_channel_config
- #include <fsl_dma.h>
DMA channel trigger.
Public Members
-
void *srcStartAddr
Source data address
-
void *dstStartAddr
Destination data address
-
void *nextDesc
Chain custom descriptor
-
uint32_t xferCfg
channel transfer configurations
-
dma_channel_trigger_t *trigger
DMA trigger type
-
bool isPeriph
select the request type
-
void *srcStartAddr
-
struct _dma_transfer_config
- #include <fsl_dma.h>
DMA transfer configuration.
Public Members
-
uint8_t *srcAddr
Source data address
-
uint8_t *dstAddr
Destination data address
-
uint8_t *nextDesc
Chain custom descriptor
-
dma_xfercfg_t xfercfg
Transfer options
-
bool isPeriph
DMA transfer is driven by peripheral
-
uint8_t *srcAddr
-
struct _dma_handle
- #include <fsl_dma.h>
DMA transfer handle structure.
Public Members
-
dma_callback callback
Callback function. Invoked when transfer of descriptor with interrupt flag finishes
-
void *userData
Callback function parameter
-
DMA_Type *base
DMA peripheral base address
-
uint8_t channel
DMA channel number
-
dma_callback callback
DMIC: Digital Microphone
DMIC DMA Driver
-
status_t DMIC_TransferCreateHandleDMA(DMIC_Type *base, dmic_dma_handle_t *handle, dmic_dma_transfer_callback_t callback, void *userData, dma_handle_t *rxDmaHandle)
Initializes the DMIC handle which is used in transactional functions.
- Parameters:
base – DMIC peripheral base address.
handle – Pointer to dmic_dma_handle_t structure.
callback – Callback function.
userData – User data.
rxDmaHandle – User-requested DMA handle for RX DMA transfer.
-
status_t DMIC_TransferReceiveDMA(DMIC_Type *base, dmic_dma_handle_t *handle, dmic_transfer_t *xfer, uint32_t channel)
Receives data using DMA.
This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.
- Parameters:
base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – DMIC DMA transfer structure. See dmic_transfer_t.
channel – DMIC start channel number.
- Return values:
kStatus_Success –
-
void DMIC_TransferAbortReceiveDMA(DMIC_Type *base, dmic_dma_handle_t *handle)
Aborts the received data using DMA.
This function aborts the received data using DMA.
- Parameters:
base – DMIC peripheral base address
handle – Pointer to dmic_dma_handle_t structure
-
status_t DMIC_TransferGetReceiveCountDMA(DMIC_Type *base, dmic_dma_handle_t *handle, uint32_t *count)
Get the number of bytes that have been received.
This function gets the number of bytes that have been received.
- Parameters:
base – DMIC peripheral base address.
handle – DMIC handle pointer.
count – Receive bytes count.
- Return values:
kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;
-
void DMIC_InstallDMADescriptorMemory(dmic_dma_handle_t *handle, void *linkAddr, size_t linkNum)
Install DMA descriptor memory.
This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, it should be called after DMIC_TransferCreateHandleDMA. User should be take care about the address of DMA descriptor pool which required align with 16BYTE at least.
- Parameters:
handle – Pointer to DMA channel transfer handle.
linkAddr – DMA link descriptor address.
linkNum – DMA link descriptor number.
-
FSL_DMIC_DMA_DRIVER_VERSION
DMIC DMA driver version 2.4.0.
-
typedef struct _dmic_transfer dmic_transfer_t
DMIC transfer structure.
-
typedef struct _dmic_dma_handle dmic_dma_handle_t
-
typedef void (*dmic_dma_transfer_callback_t)(DMIC_Type *base, dmic_dma_handle_t *handle, status_t status, void *userData)
DMIC transfer callback function.
-
struct _dmic_transfer
- #include <fsl_dmic_dma.h>
DMIC transfer structure.
Public Members
-
void *data
The buffer of data to be transfer.
-
uint8_t dataWidth
DMIC support 16bit/32bit
-
size_t dataSize
The byte count to be transfer.
-
uint8_t dataAddrInterleaveSize
destination address interleave size
-
struct _dmic_transfer *linkTransfer
use to support link transfer
-
void *data
-
struct _dmic_dma_handle
- #include <fsl_dmic_dma.h>
DMIC DMA handle.
Public Members
-
DMIC_Type *base
DMIC peripheral base address.
-
dma_handle_t *rxDmaHandle
The DMA RX channel used.
-
dmic_dma_transfer_callback_t callback
Callback function.
-
void *userData
DMIC callback function parameter.
-
size_t transferSize
Size of the data to receive.
-
volatile uint8_t state
Internal state of DMIC DMA transfer
-
uint32_t channel
DMIC channel used.
-
bool isChannelValid
DMIC channel initialization flag
-
dma_descriptor_t *desLink
descriptor pool pointer
-
size_t linkNum
number of descriptor in descriptors pool
-
DMIC_Type *base
DMIC Driver
-
uint32_t DMIC_GetInstance(DMIC_Type *base)
Get the DMIC instance from peripheral base address.
- Parameters:
base – DMIC peripheral base address.
- Returns:
DMIC instance.
-
void DMIC_Init(DMIC_Type *base)
Turns DMIC Clock on.
- Parameters:
base – : DMIC base
- Returns:
Nothing
-
void DMIC_DeInit(DMIC_Type *base)
Turns DMIC Clock off.
- Parameters:
base – : DMIC base
- Returns:
Nothing
-
void DMIC_ConfigIO(DMIC_Type *base, dmic_io_t config)
Configure DMIC io.
- Deprecated:
Do not use this function. It has been superceded by DMIC_SetIOCFG
- Parameters:
base – : The base address of DMIC interface
config – : DMIC io configuration
- Returns:
Nothing
-
static inline void DMIC_SetIOCFG(DMIC_Type *base, uint32_t sel)
Stereo PDM select.
- Parameters:
base – : The base address of DMIC interface
sel – : Reference dmic_io_t, can be a single or combination value of dmic_io_t.
- Returns:
Nothing
-
void DMIC_SetOperationMode(DMIC_Type *base, operation_mode_t mode)
Set DMIC operating mode.
- Deprecated:
Do not use this function. It has been superceded by DMIC_EnableChannelInterrupt, DMIC_EnableChannelDma.
- Parameters:
base – : The base address of DMIC interface
mode – : DMIC mode
- Returns:
Nothing
-
void DMIC_Use2fs(DMIC_Type *base, bool use2fs)
Configure Clock scaling.
- Parameters:
base – : The base address of DMIC interface
use2fs – : clock scaling
- Returns:
Nothing
-
void DMIC_CfgChannelDc(DMIC_Type *base, dmic_channel_t channel, dc_removal_t dc_cut_level, uint32_t post_dc_gain_reduce, bool saturate16bit)
Configure DMIC channel.
- Parameters:
base – : The base address of DMIC interface
channel – : DMIC channel
dc_cut_level – : dc_removal_t, Cut off Frequency
post_dc_gain_reduce – : Fine gain adjustment in the form of a number of bits to downshift.
saturate16bit – : If selects 16-bit saturation.
-
void DMIC_ConfigChannel(DMIC_Type *base, dmic_channel_t channel, stereo_side_t side, dmic_channel_config_t *channel_config)
Configure DMIC channel.
- Parameters:
base – : The base address of DMIC interface
channel – : DMIC channel
side – : stereo_side_t, choice of left or right
channel_config – : Channel configuration
- Returns:
Nothing
-
void DMIC_EnableChannnel(DMIC_Type *base, uint32_t channelmask)
Enable a particualr channel.
- Parameters:
base – : The base address of DMIC interface
channelmask – reference _dmic_channel_mask
- Returns:
Nothing
-
void DMIC_FifoChannel(DMIC_Type *base, uint32_t channel, uint32_t trig_level, uint32_t enable, uint32_t resetn)
Configure fifo settings for DMIC channel.
- Parameters:
base – : The base address of DMIC interface
channel – : DMIC channel
trig_level – : FIFO trigger level
enable – : FIFO level
resetn – : FIFO reset
- Returns:
Nothing
-
static inline void DMIC_EnableChannelInterrupt(DMIC_Type *base, dmic_channel_t channel, bool enable)
Enable a particualr channel interrupt request.
- Parameters:
base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable
-
static inline void DMIC_EnableChannelDma(DMIC_Type *base, dmic_channel_t channel, bool enable)
Enable a particualr channel dma request.
- Parameters:
base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable
-
static inline void DMIC_EnableChannelFifo(DMIC_Type *base, dmic_channel_t channel, bool enable)
Enable a particualr channel fifo.
- Parameters:
base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable
-
static inline void DMIC_DoFifoReset(DMIC_Type *base, dmic_channel_t channel)
Channel fifo reset.
- Parameters:
base – : The base address of DMIC interface
channel – : Channel selection
-
static inline uint32_t DMIC_FifoGetStatus(DMIC_Type *base, uint32_t channel)
Get FIFO status.
- Parameters:
base – : The base address of DMIC interface
channel – : DMIC channel
- Returns:
FIFO status
-
static inline void DMIC_FifoClearStatus(DMIC_Type *base, uint32_t channel, uint32_t mask)
Clear FIFO status.
- Parameters:
base – : The base address of DMIC interface
channel – : DMIC channel
mask – : Bits to be cleared
- Returns:
FIFO status
-
static inline uint32_t DMIC_FifoGetData(DMIC_Type *base, uint32_t channel)
Get FIFO data.
- Parameters:
base – : The base address of DMIC interface
channel – : DMIC channel
- Returns:
FIFO data
-
static inline uint32_t DMIC_FifoGetAddress(DMIC_Type *base, uint32_t channel)
Get FIFO address.
- Parameters:
base – : The base address of DMIC interface
channel – : DMIC channel
- Returns:
FIFO data
-
void DMIC_EnableIntCallback(DMIC_Type *base, dmic_callback_t cb)
Enable callback.
This function enables the interrupt for the selected DMIC peripheral. The callback function is not enabled until this function is called.
- Parameters:
base – Base address of the DMIC peripheral.
cb – callback Pointer to store callback function.
- Return values:
None. –
-
void DMIC_DisableIntCallback(DMIC_Type *base, dmic_callback_t cb)
Disable callback.
This function disables the interrupt for the selected DMIC peripheral.
- Parameters:
base – Base address of the DMIC peripheral.
cb – callback Pointer to store callback function..
- Return values:
None. –
-
static inline void DMIC_SetGainNoiseEstHwvad(DMIC_Type *base, uint32_t value)
Sets the gain value for the noise estimator.
- Parameters:
base – DMIC base pointer
value – gain value for the noise estimator.
- Return values:
None. –
-
static inline void DMIC_SetGainSignalEstHwvad(DMIC_Type *base, uint32_t value)
Sets the gain value for the signal estimator.
- Parameters:
base – DMIC base pointer
value – gain value for the signal estimator.
- Return values:
None. –
-
static inline void DMIC_SetFilterCtrlHwvad(DMIC_Type *base, uint32_t value)
Sets the hwvad filter cutoff frequency parameter.
- Parameters:
base – DMIC base pointer
value – cut off frequency value.
- Return values:
None. –
-
static inline void DMIC_SetInputGainHwvad(DMIC_Type *base, uint32_t value)
Sets the input gain of hwvad.
- Parameters:
base – DMIC base pointer
value – input gain value for hwvad.
- Return values:
None. –
-
static inline void DMIC_CtrlClrIntrHwvad(DMIC_Type *base, bool st10)
Clears hwvad internal interrupt flag.
- Parameters:
base – DMIC base pointer
st10 – bit value.
- Return values:
None. –
-
static inline void DMIC_FilterResetHwvad(DMIC_Type *base, bool rstt)
Resets hwvad filters.
- Parameters:
base – DMIC base pointer
rstt – Reset bit value.
- Return values:
None. –
-
static inline uint16_t DMIC_GetNoiseEnvlpEst(DMIC_Type *base)
Gets the value from output of the filter z7.
- Parameters:
base – DMIC base pointer
- Return values:
output – of filter z7.
-
void DMIC_HwvadEnableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb)
Enable hwvad callback.
This function enables the hwvad interrupt for the selected DMIC peripheral. The callback function is not enabled until this function is called.
- Parameters:
base – Base address of the DMIC peripheral.
vadcb – callback Pointer to store callback function.
- Return values:
None. –
-
void DMIC_HwvadDisableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb)
Disable callback.
This function disables the hwvad interrupt for the selected DMIC peripheral.
- Parameters:
base – Base address of the DMIC peripheral.
vadcb – callback Pointer to store callback function..
- Return values:
None. –
-
FSL_DMIC_DRIVER_VERSION
DMIC driver version 2.3.2.
_dmic_status DMIC transfer status.
Values:
-
enumerator kStatus_DMIC_Busy
DMIC is busy
-
enumerator kStatus_DMIC_Idle
DMIC is idle
-
enumerator kStatus_DMIC_OverRunError
DMIC over run Error
-
enumerator kStatus_DMIC_UnderRunError
DMIC under run Error
-
enumerator kStatus_DMIC_Busy
-
enum _operation_mode
DMIC different operation modes.
Values:
-
enumerator kDMIC_OperationModeInterrupt
Interrupt mode
-
enumerator kDMIC_OperationModeDma
DMA mode
-
enumerator kDMIC_OperationModeInterrupt
-
enum _stereo_side
DMIC left/right values.
Values:
-
enumerator kDMIC_Left
Left Stereo channel
-
enumerator kDMIC_Right
Right Stereo channel
-
enumerator kDMIC_Left
-
enum pdm_div_t
DMIC Clock pre-divider values.
Values:
-
enumerator kDMIC_PdmDiv1
DMIC pre-divider set in divide by 1
-
enumerator kDMIC_PdmDiv2
DMIC pre-divider set in divide by 2
-
enumerator kDMIC_PdmDiv3
DMIC pre-divider set in divide by 3
-
enumerator kDMIC_PdmDiv4
DMIC pre-divider set in divide by 4
-
enumerator kDMIC_PdmDiv6
DMIC pre-divider set in divide by 6
-
enumerator kDMIC_PdmDiv8
DMIC pre-divider set in divide by 8
-
enumerator kDMIC_PdmDiv12
DMIC pre-divider set in divide by 12
-
enumerator kDMIC_PdmDiv16
DMIC pre-divider set in divide by 16
-
enumerator kDMIC_PdmDiv24
DMIC pre-divider set in divide by 24
-
enumerator kDMIC_PdmDiv32
DMIC pre-divider set in divide by 32
-
enumerator kDMIC_PdmDiv48
DMIC pre-divider set in divide by 48
-
enumerator kDMIC_PdmDiv64
DMIC pre-divider set in divide by 64
-
enumerator kDMIC_PdmDiv96
DMIC pre-divider set in divide by 96
-
enumerator kDMIC_PdmDiv128
DMIC pre-divider set in divide by 128
-
enumerator kDMIC_PdmDiv1
-
enum _compensation
Pre-emphasis Filter coefficient value for 2FS and 4FS modes.
Values:
-
enumerator kDMIC_CompValueZero
Compensation 0
-
enumerator kDMIC_CompValueNegativePoint16
Compensation -0.16
-
enumerator kDMIC_CompValueNegativePoint15
Compensation -0.15
-
enumerator kDMIC_CompValueNegativePoint13
Compensation -0.13
-
enumerator kDMIC_CompValueZero
-
enum _dc_removal
DMIC DC filter control values.
Values:
-
enumerator kDMIC_DcNoRemove
Flat response no filter
-
enumerator kDMIC_DcCut155
Cut off Frequency is 155 Hz
-
enumerator kDMIC_DcCut78
Cut off Frequency is 78 Hz
-
enumerator kDMIC_DcCut39
Cut off Frequency is 39 Hz
-
enumerator kDMIC_DcNoRemove
-
enum _dmic_io
DMIC IO configiration.
Values:
-
enumerator kDMIC_PdmDual
Two separate pairs of PDM wires
-
enumerator kDMIC_PdmStereo
Stereo data0
-
enumerator kDMIC_PdmBypass
Clk Bypass clocks both channels
-
enumerator kDMIC_PdmBypassClk0
Clk Bypass clocks only channel0
-
enumerator kDMIC_PdmBypassClk1
Clk Bypas clocks only channel1
-
enumerator kDMIC_PdmDual
-
enum _dmic_channel
DMIC Channel number.
Values:
-
enumerator kDMIC_Channel0
DMIC channel 0
-
enumerator kDMIC_Channel1
DMIC channel 1
-
enumerator kDMIC_Channel0
_dmic_channel_mask DMIC Channel mask.
Values:
-
enumerator kDMIC_EnableChannel0
DMIC channel 0 mask
-
enumerator kDMIC_EnableChannel1
DMIC channel 1 mask
-
enumerator kDMIC_EnableChannel0
-
enum _dmic_phy_sample_rate
DMIC and decimator sample rates.
Values:
-
enumerator kDMIC_PhyFullSpeed
Decimator gets one sample per each chosen clock edge of PDM interface
-
enumerator kDMIC_PhyHalfSpeed
PDM clock to Microphone is halved, decimator receives each sample twice
-
enumerator kDMIC_PhyFullSpeed
-
typedef enum _operation_mode operation_mode_t
DMIC different operation modes.
-
typedef enum _stereo_side stereo_side_t
DMIC left/right values.
-
typedef enum _compensation compensation_t
Pre-emphasis Filter coefficient value for 2FS and 4FS modes.
-
typedef enum _dc_removal dc_removal_t
DMIC DC filter control values.
-
typedef enum _dmic_io dmic_io_t
DMIC IO configiration.
-
typedef enum _dmic_channel dmic_channel_t
DMIC Channel number.
-
typedef enum _dmic_phy_sample_rate dmic_phy_sample_rate_t
DMIC and decimator sample rates.
-
typedef struct _dmic_channel_config dmic_channel_config_t
DMIC Channel configuration structure.
-
typedef void (*dmic_callback_t)(void)
DMIC Callback function.
-
typedef void (*dmic_hwvad_callback_t)(void)
HWVAD Callback function.
-
struct _dmic_channel_config
- #include <fsl_dmic.h>
DMIC Channel configuration structure.
Public Members
-
pdm_div_t divhfclk
DMIC Clock pre-divider values
-
uint32_t osr
oversampling rate(CIC decimation rate) for PCM
-
int32_t gainshft
4FS PCM data gain control
-
compensation_t preac2coef
Pre-emphasis Filter coefficient value for 2FS
-
compensation_t preac4coef
Pre-emphasis Filter coefficient value for 4FS
-
dc_removal_t dc_cut_level
DMIC DC filter control values.
-
uint32_t post_dc_gain_reduce
Fine gain adjustment in the form of a number of bits to downshift
-
dmic_phy_sample_rate_t sample_rate
DMIC and decimator sample rates
-
bool saturate16bit
Selects 16-bit saturation. 0 means results roll over if out range and do not saturate. 1 means if the result overflows, it saturates at 0xFFFF for positive overflow and 0x8000 for negative overflow.
-
pdm_div_t divhfclk
EMC: External Memory Controller Driver
-
void EMC_Init(EMC_Type *base, emc_basic_config_t *config)
Initializes the basic for EMC. This function ungates the EMC clock, initializes the emc system configure and enable the EMC module. This function must be called in the first step to initialize the external memory.
- Parameters:
base – EMC peripheral base address.
config – The EMC basic configuration.
-
void EMC_DynamicMemInit(EMC_Type *base, emc_dynamic_timing_config_t *timing, emc_dynamic_chip_config_t *config, uint32_t totalChips)
Initializes the dynamic memory controller. This function initializes the dynamic memory controller in external memory controller. This function must be called after EMC_Init and before accessing the external dynamic memory.
- Parameters:
base – EMC peripheral base address.
timing – The timing and latency for dynamica memory controller setting. It shall be used for all dynamica memory chips, threfore the worst timing value for all used chips must be given.
config – The EMC dynamic memory controller chip independent configuration pointer. This configuration pointer is actually pointer to a configration array. the array number depends on the “totalChips”.
totalChips – The total dynamic memory chip numbers been used or the length of the “emc_dynamic_chip_config_t” type memory.
-
void EMC_StaticMemInit(EMC_Type *base, uint32_t *extWait_Ns, emc_static_chip_config_t *config, uint32_t totalChips)
Initializes the static memory controller. This function initializes the static memory controller in external memory controller. This function must be called after EMC_Init and before accessing the external static memory.
- Parameters:
base – EMC peripheral base address.
extWait_Ns – The extended wait timeout or the read/write transfer time. This is common for all static memory chips and set with NULL if not required.
config – The EMC static memory controller chip independent configuration pointer. This configuration pointer is actually pointer to a configration array. the array number depends on the “totalChips”.
totalChips – The total static memory chip numbers been used or the length of the “emc_static_chip_config_t” type memory.
-
void EMC_Deinit(EMC_Type *base)
Deinitializes the EMC module and gates the clock. This function gates the EMC controller clock. As a result, the EMC module doesn’t work after calling this function.
- Parameters:
base – EMC peripheral base address.
-
static inline void EMC_Enable(EMC_Type *base, bool enable)
Enables/disables the EMC module.
- Parameters:
base – EMC peripheral base address.
enable – True enable EMC module, false disable.
-
static inline void EMC_EnableDynamicMemControl(EMC_Type *base, bool enable)
Enables/disables the EMC Dynaimc memory controller.
- Parameters:
base – EMC peripheral base address.
enable – True enable EMC dynamic memory controller, false disable.
-
static inline void EMC_MirrorChipAddr(EMC_Type *base, bool enable)
Enables/disables the EMC address mirror. Enable the address mirror the EMC_CS1is mirrored to both EMC_CS0 and EMC_DYCS0 memory areas. Disable the address mirror enables EMC_cS0 and EMC_DYCS0 memory to be accessed.
- Parameters:
base – EMC peripheral base address.
enable – True enable the address mirror, false disable the address mirror.
-
static inline void EMC_EnterSelfRefreshCommand(EMC_Type *base, bool enable)
Enter the self-refresh mode for dynamic memory controller. This function provided self-refresh mode enter or exit for application.
- Parameters:
base – EMC peripheral base address.
enable – True enter the self-refresh mode, false to exit self-refresh and enter the normal mode.
-
static inline bool EMC_IsInSelfrefreshMode(EMC_Type *base)
Get the operating mode of the EMC. This function can be used to get the operating mode of the EMC.
- Parameters:
base – EMC peripheral base address.
- Returns:
The EMC in self-refresh mode if true, else in normal mode.
-
static inline void EMC_EnterLowPowerMode(EMC_Type *base, bool enable)
Enter/exit the low-power mode.
- Parameters:
base – EMC peripheral base address.
enable – True Enter the low-power mode, false exit low-power mode and return to normal mode.
-
FSL_EMC_DRIVER_VERSION
EMC driver version.
-
enum _emc_static_memwidth
Define EMC memory width for static memory device.
Values:
-
enumerator kEMC_8BitWidth
8 bit memory width.
-
enumerator kEMC_16BitWidth
16 bit memory width.
-
enumerator kEMC_32BitWidth
32 bit memory width.
-
enumerator kEMC_8BitWidth
-
enum _emc_static_special_config
Define EMC static configuration.
Values:
-
enumerator kEMC_AsynchronosPageEnable
Enable the asynchronous page mode. page length four.
-
enumerator kEMC_ActiveHighChipSelect
Chip select active high.
-
enumerator kEMC_ByteLaneStateAllLow
Reads/writes the respective valuie bits in BLS3:0 are low.
-
enumerator kEMC_ExtWaitEnable
Extended wait enable.
-
enumerator kEMC_BufferEnable
Buffer enable.
-
enumerator kEMC_AsynchronosPageEnable
-
enum _emc_dynamic_device
EMC dynamic memory device.
Values:
-
enumerator kEMC_Sdram
Dynamic memory device: SDRAM.
-
enumerator kEMC_Lpsdram
Dynamic memory device: Low-power SDRAM.
-
enumerator kEMC_Sdram
-
enum _emc_dynamic_read
EMC dynamic read strategy.
Values:
-
enumerator kEMC_NoDelay
No delay.
-
enumerator kEMC_Cmddelay
Command delayed strategy, using EMCCLKDELAY.
-
enumerator kEMC_CmdDelayPulseOneclk
Command delayed strategy pluse one clock cycle using EMCCLKDELAY.
-
enumerator kEMC_CmddelayPulsetwoclk
Command delayed strategy pulse two clock cycle using EMCCLKDELAY.
-
enumerator kEMC_NoDelay
-
enum _emc_endian_mode
EMC endian mode.
Values:
-
enumerator kEMC_LittleEndian
Little endian mode.
-
enumerator kEMC_BigEndian
Big endian mode.
-
enumerator kEMC_LittleEndian
-
enum _emc_fbclk_src
EMC Feedback clock input source select.
Values:
-
enumerator kEMC_IntloopbackEmcclk
Use the internal loop back from EMC_CLK output.
-
enumerator kEMC_EMCFbclkInput
Use the external EMC_FBCLK input.
-
enumerator kEMC_IntloopbackEmcclk
-
typedef enum _emc_static_memwidth emc_static_memwidth_t
Define EMC memory width for static memory device.
-
typedef enum _emc_static_special_config emc_static_special_config_t
Define EMC static configuration.
-
typedef enum _emc_dynamic_device emc_dynamic_device_t
EMC dynamic memory device.
-
typedef enum _emc_dynamic_read emc_dynamic_read_t
EMC dynamic read strategy.
-
typedef enum _emc_endian_mode emc_endian_mode_t
EMC endian mode.
-
typedef enum _emc_fbclk_src emc_fbclk_src_t
EMC Feedback clock input source select.
-
typedef struct _emc_dynamic_timing_config emc_dynamic_timing_config_t
EMC dynamic timing/delay configure structure.
-
typedef struct _emc_dynamic_chip_config emc_dynamic_chip_config_t
EMC dynamic memory controller independent chip configuration structure. Please take refer to the address mapping table in the RM in EMC chapter when you set the “devAddrMap”. Choose the right Bit 14 Bit12 ~ Bit 7 group in the table according to the bus width/banks/row/colum length for you device. Set devAddrMap with the value make up with the seven bits (bit14 bit12 ~ bit 7) and inset the bit 13 with 0. for example, if the bit 14 and bit12 ~ bit7 is 1000001 is choosen according to the 32bit high-performance bus width with 2 banks, 11 row lwngth, 8 column length. Set devAddrMap with 0x81.
-
typedef struct _emc_static_chip_config emc_static_chip_config_t
EMC static memory controller independent chip configuration structure.
-
typedef struct _emc_basic_config emc_basic_config_t
EMC module basic configuration structure.
Defines the static memory controller configure structure and uses the EMC_Init() function to make necessary initializations.
-
EMC_STATIC_MEMDEV_NUM
Define the chip numbers for dynamic and static memory devices.
-
EMC_DYNAMIC_MEMDEV_NUM
-
EMC_ADDRMAP_SHIFT
-
EMC_ADDRMAP_MASK
-
EMC_ADDRMAP(x)
-
EMC_HZ_ONEMHZ
-
EMC_MILLISECS_ONESEC
-
EMC_SDRAM_MODE_CL_SHIFT
-
EMC_SDRAM_MODE_CL_MASK
-
EMC_SDRAM_NOP_DELAY_US
EDMA_SDRAM NOP command wait us.
-
EMC_SDRAM_PRECHARGE_DELAY_US
EDMA_SDRAM precharge command wait us.
-
EMC_SDRAM_AUTO_REFRESH_DELAY_US
EDMA_SDRAM auto refresh wait us.
-
struct _emc_dynamic_timing_config
- #include <fsl_emc.h>
EMC dynamic timing/delay configure structure.
Public Members
-
uint32_t refreshPeriod_Nanosec
The refresh period in unit of nanosecond.
-
uint32_t tRp_Ns
Precharge command period in unit of nanosecond.
-
uint32_t tRas_Ns
Active to precharge command period in unit of nanosecond.
-
uint32_t tSrex_Ns
Self-refresh exit time in unit of nanosecond.
-
uint32_t tApr_Ns
Last data out to active command time in unit of nanosecond.
-
uint32_t tDal_Ns
Data-in to active command in unit of nanosecond.
-
uint32_t tWr_Ns
Write recovery time in unit of nanosecond.
-
uint32_t tRc_Ns
Active to active command period in unit of nanosecond.
-
uint32_t tRfc_Ns
Auto-refresh period and auto-refresh to active command period in unit of nanosecond.
-
uint32_t tXsr_Ns
Exit self-refresh to active command time in unit of nanosecond.
-
uint32_t tRrd_Ns
Active bank A to active bank B latency in unit of nanosecond.
-
uint8_t tMrd_Nclk
Load mode register to active command time in unit of EMCCLK cycles.
-
uint32_t refreshPeriod_Nanosec
-
struct _emc_dynamic_chip_config
- #include <fsl_emc.h>
EMC dynamic memory controller independent chip configuration structure. Please take refer to the address mapping table in the RM in EMC chapter when you set the “devAddrMap”. Choose the right Bit 14 Bit12 ~ Bit 7 group in the table according to the bus width/banks/row/colum length for you device. Set devAddrMap with the value make up with the seven bits (bit14 bit12 ~ bit 7) and inset the bit 13 with 0. for example, if the bit 14 and bit12 ~ bit7 is 1000001 is choosen according to the 32bit high-performance bus width with 2 banks, 11 row lwngth, 8 column length. Set devAddrMap with 0x81.
Public Members
-
uint8_t chipIndex
Chip Index, range from 0 ~ EMC_DYNAMIC_MEMDEV_NUM - 1.
-
emc_dynamic_device_t dynamicDevice
All chips shall use the same device setting. mixed use are not supported.
-
uint8_t rAS_Nclk
Active to read/write delay tRCD.
-
uint16_t sdramModeReg
Sdram mode register setting.
-
uint16_t sdramExtModeReg
Used for low-power sdram device. The extended mode register.
-
uint8_t devAddrMap
dynamic device address mapping, choose the address mapping for your specific device.
-
uint8_t chipIndex
-
struct _emc_static_chip_config
- #include <fsl_emc.h>
EMC static memory controller independent chip configuration structure.
Public Members
-
emc_static_memwidth_t memWidth
Memory width.
-
uint32_t specailConfig
Static configuration,a logical OR of “emc_static_special_config_t”.
-
uint32_t tWaitWriteEn_Ns
The delay form chip select to write enable in unit of nanosecond.
-
uint32_t tWaitOutEn_Ns
The delay from chip selcet to output enable in unit of nanosecond.
-
uint32_t tWaitReadNoPage_Ns
In No-page mode, the delay from chip select to read access in unit of nanosecond.
-
uint32_t tWaitReadPage_Ns
In page mode, the read after the first read wait states in unit of nanosecond.
-
uint32_t tWaitWrite_Ns
The delay from chip select to write access in unit of nanosecond.
-
uint32_t tWaitTurn_Ns
The Bus turn-around time in unit of nanosecond.
-
emc_static_memwidth_t memWidth
-
struct _emc_basic_config
- #include <fsl_emc.h>
EMC module basic configuration structure.
Defines the static memory controller configure structure and uses the EMC_Init() function to make necessary initializations.
Public Members
-
emc_endian_mode_t endian
Endian mode .
-
emc_fbclk_src_t fbClkSrc
The feedback clock source.
-
uint8_t emcClkDiv
EMC_CLK = AHB_CLK / (emc_clkDiv + 1).
-
emc_endian_mode_t endian
FLEXCOMM: FLEXCOMM Driver
FLEXCOMM Driver
-
FSL_FLEXCOMM_DRIVER_VERSION
FlexCOMM driver version 2.0.2.
-
enum FLEXCOMM_PERIPH_T
FLEXCOMM peripheral modes.
Values:
-
enumerator FLEXCOMM_PERIPH_NONE
No peripheral
-
enumerator FLEXCOMM_PERIPH_USART
USART peripheral
-
enumerator FLEXCOMM_PERIPH_SPI
SPI Peripheral
-
enumerator FLEXCOMM_PERIPH_I2C
I2C Peripheral
-
enumerator FLEXCOMM_PERIPH_I2S_TX
I2S TX Peripheral
-
enumerator FLEXCOMM_PERIPH_I2S_RX
I2S RX Peripheral
-
enumerator FLEXCOMM_PERIPH_NONE
-
typedef void (*flexcomm_irq_handler_t)(void *base, void *handle)
Typedef for interrupt handler.
-
IRQn_Type const kFlexcommIrqs[]
Array with IRQ number for each FLEXCOMM module.
-
uint32_t FLEXCOMM_GetInstance(void *base)
Returns instance number for FLEXCOMM module with given base address.
-
status_t FLEXCOMM_Init(void *base, FLEXCOMM_PERIPH_T periph)
Initializes FLEXCOMM and selects peripheral mode according to the second parameter.
-
void FLEXCOMM_SetIRQHandler(void *base, flexcomm_irq_handler_t handler, void *flexcommHandle)
Sets IRQ handler for given FLEXCOMM module. It is used by drivers register IRQ handler according to FLEXCOMM mode.
FMEAS: Frequency Measure Driver
-
static inline void FMEAS_StartMeasure(FMEAS_SYSCON_Type *base)
Starts a frequency measurement cycle.
- Parameters:
base – : SYSCON peripheral base address.
-
static inline bool FMEAS_IsMeasureComplete(FMEAS_SYSCON_Type *base)
Indicates when a frequency measurement cycle is complete.
- Parameters:
base – : SYSCON peripheral base address.
- Returns:
true if a measurement cycle is active, otherwise false.
-
uint32_t FMEAS_GetFrequency(FMEAS_SYSCON_Type *base, uint32_t refClockRate)
Returns the computed value for a frequency measurement cycle.
- Parameters:
base – : SYSCON peripheral base address.
refClockRate – : Reference clock rate used during the frequency measurement cycle.
- Returns:
Frequency in Hz.
-
FSL_FMEAS_DRIVER_VERSION
Defines LPC Frequency Measure driver version 2.1.1.
-
typedef SYSCON_Type FMEAS_SYSCON_Type
-
FMEAS_SYSCON_FREQMECTRL_CAPVAL_MASK
-
FMEAS_SYSCON_FREQMECTRL_CAPVAL_SHIFT
-
FMEAS_SYSCON_FREQMECTRL_CAPVAL
-
FMEAS_SYSCON_FREQMECTRL_PROG_MASK
-
FMEAS_SYSCON_FREQMECTRL_PROG_SHIFT
-
FMEAS_SYSCON_FREQMECTRL_PROG
GINT: Group GPIO Input Interrupt Driver
-
FSL_GINT_DRIVER_VERSION
Driver version.
-
enum _gint_comb
GINT combine inputs type.
Values:
-
enumerator kGINT_CombineOr
A grouped interrupt is generated when any one of the enabled inputs is active
-
enumerator kGINT_CombineAnd
A grouped interrupt is generated when all enabled inputs are active
-
enumerator kGINT_CombineOr
-
enum _gint_trig
GINT trigger type.
Values:
-
enumerator kGINT_TrigEdge
Edge triggered based on polarity
-
enumerator kGINT_TrigLevel
Level triggered based on polarity
-
enumerator kGINT_TrigEdge
-
enum _gint_port
Values:
-
enumerator kGINT_Port0
-
enumerator kGINT_Port1
-
enumerator kGINT_Port0
-
typedef enum _gint_comb gint_comb_t
GINT combine inputs type.
-
typedef enum _gint_trig gint_trig_t
GINT trigger type.
-
typedef enum _gint_port gint_port_t
-
typedef void (*gint_cb_t)(void)
GINT Callback function.
-
void GINT_Init(GINT_Type *base)
Initialize GINT peripheral.
This function initializes the GINT peripheral and enables the clock.
- Parameters:
base – Base address of the GINT peripheral.
- Return values:
None. –
-
void GINT_SetCtrl(GINT_Type *base, gint_comb_t comb, gint_trig_t trig, gint_cb_t callback)
Setup GINT peripheral control parameters.
This function sets the control parameters of GINT peripheral.
- Parameters:
base – Base address of the GINT peripheral.
comb – Controls if the enabled inputs are logically ORed or ANDed for interrupt generation.
trig – Controls if the enabled inputs are level or edge sensitive based on polarity.
callback – This function is called when configured group interrupt is generated.
- Return values:
None. –
-
void GINT_GetCtrl(GINT_Type *base, gint_comb_t *comb, gint_trig_t *trig, gint_cb_t *callback)
Get GINT peripheral control parameters.
This function returns the control parameters of GINT peripheral.
- Parameters:
base – Base address of the GINT peripheral.
comb – Pointer to store combine input value.
trig – Pointer to store trigger value.
callback – Pointer to store callback function.
- Return values:
None. –
-
void GINT_ConfigPins(GINT_Type *base, gint_port_t port, uint32_t polarityMask, uint32_t enableMask)
Configure GINT peripheral pins.
This function enables and controls the polarity of enabled pin(s) of a given port.
- Parameters:
base – Base address of the GINT peripheral.
port – Port number.
polarityMask – Each bit position selects the polarity of the corresponding enabled pin. 0 = The pin is active LOW. 1 = The pin is active HIGH.
enableMask – Each bit position selects if the corresponding pin is enabled or not. 0 = The pin is disabled. 1 = The pin is enabled.
- Return values:
None. –
-
void GINT_GetConfigPins(GINT_Type *base, gint_port_t port, uint32_t *polarityMask, uint32_t *enableMask)
Get GINT peripheral pin configuration.
This function returns the pin configuration of a given port.
- Parameters:
base – Base address of the GINT peripheral.
port – Port number.
polarityMask – Pointer to store the polarity mask Each bit position indicates the polarity of the corresponding enabled pin. 0 = The pin is active LOW. 1 = The pin is active HIGH.
enableMask – Pointer to store the enable mask. Each bit position indicates if the corresponding pin is enabled or not. 0 = The pin is disabled. 1 = The pin is enabled.
- Return values:
None. –
-
void GINT_EnableCallback(GINT_Type *base)
Enable callback.
This function enables the interrupt for the selected GINT peripheral. Although the pin(s) are monitored as soon as they are enabled, the callback function is not enabled until this function is called.
- Parameters:
base – Base address of the GINT peripheral.
- Return values:
None. –
-
void GINT_DisableCallback(GINT_Type *base)
Disable callback.
This function disables the interrupt for the selected GINT peripheral. Although the pins are still being monitored but the callback function is not called.
- Parameters:
base – Base address of the peripheral.
- Return values:
None. –
-
static inline void GINT_ClrStatus(GINT_Type *base)
Clear GINT status.
This function clears the GINT status bit.
- Parameters:
base – Base address of the GINT peripheral.
- Return values:
None. –
-
static inline uint32_t GINT_GetStatus(GINT_Type *base)
Get GINT status.
This function returns the GINT status.
- Parameters:
base – Base address of the GINT peripheral.
- Return values:
status – = 0 No group interrupt request. = 1 Group interrupt request active.
-
void GINT_Deinit(GINT_Type *base)
Deinitialize GINT peripheral.
This function disables the GINT clock.
- Parameters:
base – Base address of the GINT peripheral.
- Return values:
None. –
I2C: Inter-Integrated Circuit Driver
I2C DMA Driver
-
void I2C_MasterTransferCreateHandleDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_dma_transfer_callback_t callback, void *userData, dma_handle_t *dmaHandle)
Init the I2C handle which is used in transactional functions.
- Parameters:
base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
callback – pointer to user callback function
userData – user param passed to the callback function
dmaHandle – DMA handle pointer
-
status_t I2C_MasterTransferDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_transfer_t *xfer)
Performs a master dma non-blocking transfer on the I2C bus.
- Parameters:
base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
xfer – pointer to transfer structure of i2c_master_transfer_t
- Return values:
kStatus_Success – Sucessully complete the data transmission.
kStatus_I2C_Busy – Previous transmission still not finished.
kStatus_I2C_Timeout – Transfer error, wait signal timeout.
kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.
kStataus_I2C_Nak – Transfer error, receive Nak during transfer.
-
status_t I2C_MasterTransferGetCountDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, size_t *count)
Get master transfer status during a dma non-blocking transfer.
- Parameters:
base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
count – Number of bytes transferred so far by the non-blocking transaction.
-
void I2C_MasterTransferAbortDMA(I2C_Type *base, i2c_master_dma_handle_t *handle)
Abort a master dma non-blocking transfer in a early time.
- Parameters:
base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
-
FSL_I2C_DMA_DRIVER_VERSION
I2C DMA driver version.
-
typedef struct _i2c_master_dma_handle i2c_master_dma_handle_t
I2C master dma handle typedef.
-
typedef void (*i2c_master_dma_transfer_callback_t)(I2C_Type *base, i2c_master_dma_handle_t *handle, status_t status, void *userData)
I2C master dma transfer callback typedef.
-
typedef void (*flexcomm_i2c_dma_master_irq_handler_t)(I2C_Type *base, i2c_master_dma_handle_t *handle)
Typedef for master dma handler.
-
I2C_MAX_DMA_TRANSFER_COUNT
Maximum lenght of single DMA transfer (determined by capability of the DMA engine)
-
struct _i2c_master_dma_handle
- #include <fsl_i2c_dma.h>
I2C master dma transfer structure.
Public Members
-
uint8_t state
Transfer state machine current state.
-
uint32_t transferCount
Indicates progress of the transfer
-
uint32_t remainingBytesDMA
Remaining byte count to be transferred using DMA.
-
uint8_t *buf
Buffer pointer for current state.
-
bool checkAddrNack
Whether to check the nack signal is detected during addressing.
-
dma_handle_t *dmaHandle
The DMA handler used.
-
i2c_master_transfer_t transfer
Copy of the current transfer info.
-
i2c_master_dma_transfer_callback_t completionCallback
Callback function called after dma transfer finished.
-
void *userData
Callback parameter passed to callback function.
-
uint8_t state
I2C Driver
-
FSL_I2C_DRIVER_VERSION
I2C driver version.
I2C status return codes.
Values:
-
enumerator kStatus_I2C_Busy
The master is already performing a transfer.
-
enumerator kStatus_I2C_Idle
The slave driver is idle.
-
enumerator kStatus_I2C_Nak
The slave device sent a NAK in response to a byte.
-
enumerator kStatus_I2C_InvalidParameter
Unable to proceed due to invalid parameter.
-
enumerator kStatus_I2C_BitError
Transferred bit was not seen on the bus.
-
enumerator kStatus_I2C_ArbitrationLost
Arbitration lost error.
-
enumerator kStatus_I2C_NoTransferInProgress
Attempt to abort a transfer when one is not in progress.
-
enumerator kStatus_I2C_DmaRequestFail
DMA request failed.
-
enumerator kStatus_I2C_StartStopError
Start and stop error.
-
enumerator kStatus_I2C_UnexpectedState
Unexpected state.
-
enumerator kStatus_I2C_Timeout
Timeout when waiting for I2C master/slave pending status to set to continue transfer.
-
enumerator kStatus_I2C_Addr_Nak
NAK received for Address
-
enumerator kStatus_I2C_EventTimeout
Timeout waiting for bus event.
-
enumerator kStatus_I2C_SclLowTimeout
Timeout SCL signal remains low.
-
enumerator kStatus_I2C_Busy
-
enum _i2c_status_flags
I2C status flags.
Note
These enums are meant to be OR’d together to form a bit mask.
Values:
-
enumerator kI2C_MasterPendingFlag
The I2C module is waiting for software interaction. bit 0
-
enumerator kI2C_MasterArbitrationLostFlag
The arbitration of the bus was lost. There was collision on the bus. bit 4
-
enumerator kI2C_MasterStartStopErrorFlag
There was an error during start or stop phase of the transaction. bit 6
-
enumerator kI2C_MasterIdleFlag
The I2C master idle status. bit 5
-
enumerator kI2C_MasterRxReadyFlag
The I2C master rx ready status. bit 1
-
enumerator kI2C_MasterTxReadyFlag
The I2C master tx ready status. bit 2
-
enumerator kI2C_MasterAddrNackFlag
The I2C master address nack status. bit 7
-
enumerator kI2C_MasterDataNackFlag
The I2C master data nack status. bit 3
-
enumerator kI2C_SlavePendingFlag
The I2C module is waiting for software interaction. bit 8
-
enumerator kI2C_SlaveNotStretching
Indicates whether the slave is currently stretching clock (0 = yes, 1 = no). bit 11
-
enumerator kI2C_SlaveSelected
Indicates whether the slave is selected by an address match. bit 14
-
enumerator kI2C_SaveDeselected
Indicates that slave was previously deselected (deselect event took place, w1c). bit 15
-
enumerator kI2C_SlaveAddressedFlag
One of the I2C slave’s 4 addresses is matched. bit 22
-
enumerator kI2C_SlaveReceiveFlag
Slave receive data available. bit 9
-
enumerator kI2C_SlaveTransmitFlag
Slave data can be transmitted. bit 10
-
enumerator kI2C_SlaveAddress0MatchFlag
Slave address0 match. bit 20
-
enumerator kI2C_SlaveAddress1MatchFlag
Slave address1 match. bit 12
-
enumerator kI2C_SlaveAddress2MatchFlag
Slave address2 match. bit 13
-
enumerator kI2C_SlaveAddress3MatchFlag
Slave address3 match. bit 21
-
enumerator kI2C_MonitorReadyFlag
The I2C monitor ready interrupt. bit 16
-
enumerator kI2C_MonitorOverflowFlag
The monitor data overrun interrupt. bit 17
-
enumerator kI2C_MonitorActiveFlag
The monitor is active. bit 18
-
enumerator kI2C_MonitorIdleFlag
The monitor idle interrupt. bit 19
-
enumerator kI2C_EventTimeoutFlag
The bus event timeout interrupt. bit 24
-
enumerator kI2C_SclTimeoutFlag
The SCL timeout interrupt. bit 25
-
enumerator kI2C_MasterAllClearFlags
-
enumerator kI2C_SlaveAllClearFlags
-
enumerator kI2C_CommonAllClearFlags
-
enumerator kI2C_MasterPendingFlag
-
enum _i2c_interrupt_enable
I2C interrupt enable.
Note
These enums are meant to be OR’d together to form a bit mask.
Values:
-
enumerator kI2C_MasterPendingInterruptEnable
The I2C master communication pending interrupt.
-
enumerator kI2C_MasterArbitrationLostInterruptEnable
The I2C master arbitration lost interrupt.
-
enumerator kI2C_MasterStartStopErrorInterruptEnable
The I2C master start/stop timing error interrupt.
-
enumerator kI2C_SlavePendingInterruptEnable
The I2C slave communication pending interrupt.
-
enumerator kI2C_SlaveNotStretchingInterruptEnable
The I2C slave not streching interrupt, deep-sleep mode can be entered only when this interrupt occurs.
-
enumerator kI2C_SlaveDeselectedInterruptEnable
The I2C slave deselection interrupt.
-
enumerator kI2C_MonitorReadyInterruptEnable
The I2C monitor ready interrupt.
-
enumerator kI2C_MonitorOverflowInterruptEnable
The monitor data overrun interrupt.
-
enumerator kI2C_MonitorIdleInterruptEnable
The monitor idle interrupt.
-
enumerator kI2C_EventTimeoutInterruptEnable
The bus event timeout interrupt.
-
enumerator kI2C_SclTimeoutInterruptEnable
The SCL timeout interrupt.
-
enumerator kI2C_MasterAllInterruptEnable
-
enumerator kI2C_SlaveAllInterruptEnable
-
enumerator kI2C_CommonAllInterruptEnable
-
enumerator kI2C_MasterPendingInterruptEnable
-
I2C_RETRY_TIMES
Retry times for waiting flag.
-
I2C_MASTER_TRANSMIT_IGNORE_LAST_NACK
Whether to ignore the nack signal of the last byte during master transmit.
-
I2C_STAT_MSTCODE_IDLE
Master Idle State Code
-
I2C_STAT_MSTCODE_RXREADY
Master Receive Ready State Code
-
I2C_STAT_MSTCODE_TXREADY
Master Transmit Ready State Code
-
I2C_STAT_MSTCODE_NACKADR
Master NACK by slave on address State Code
-
I2C_STAT_MSTCODE_NACKDAT
Master NACK by slave on data State Code
-
I2C_STAT_SLVST_ADDR
-
I2C_STAT_SLVST_RX
-
I2C_STAT_SLVST_TX
I2C Master Driver
-
void I2C_MasterGetDefaultConfig(i2c_master_config_t *masterConfig)
Provides a default configuration for the I2C master peripheral.
This function provides the following default configuration for the I2C master peripheral:
masterConfig->enableMaster = true; masterConfig->baudRate_Bps = 100000U; masterConfig->enableTimeout = false;
After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with I2C_MasterInit().
- Parameters:
masterConfig – [out] User provided configuration structure for default values. Refer to i2c_master_config_t.
-
void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)
Initializes the I2C master peripheral.
This function enables the peripheral clock and initializes the I2C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.
- Parameters:
base – The I2C peripheral base address.
masterConfig – User provided peripheral configuration. Use I2C_MasterGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.
-
void I2C_MasterDeinit(I2C_Type *base)
Deinitializes the I2C master peripheral.
This function disables the I2C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.
- Parameters:
base – The I2C peripheral base address.
-
uint32_t I2C_GetInstance(I2C_Type *base)
Returns an instance number given a base address.
If an invalid base address is passed, debug builds will assert. Release builds will just return instance number 0.
- Parameters:
base – The I2C peripheral base address.
- Returns:
I2C instance number starting from 0.
-
static inline void I2C_MasterReset(I2C_Type *base)
Performs a software reset.
Restores the I2C master peripheral to reset conditions.
- Parameters:
base – The I2C peripheral base address.
-
static inline void I2C_MasterEnable(I2C_Type *base, bool enable)
Enables or disables the I2C module as master.
- Parameters:
base – The I2C peripheral base address.
enable – Pass true to enable or false to disable the specified I2C as master.
-
uint32_t I2C_GetStatusFlags(I2C_Type *base)
Gets the I2C status flags.
A bit mask with the state of all I2C status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.
See also
_i2c_status_flags.
- Parameters:
base – The I2C peripheral base address.
- Returns:
State of the status flags:
1: related status flag is set.
0: related status flag is not set.
-
static inline void I2C_ClearStatusFlags(I2C_Type *base, uint32_t statusMask)
Clears the I2C status flag state.
Refer to kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags to see the clearable flags. Attempts to clear other flags has no effect.
See also
_i2c_status_flags, _i2c_master_status_flags and _i2c_slave_status_flags.
- Parameters:
base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of the members in kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags. You may pass the result of a previous call to I2C_GetStatusFlags().
-
static inline void I2C_MasterClearStatusFlags(I2C_Type *base, uint32_t statusMask)
Clears the I2C master status flag state.
- Deprecated:
Do not use this function. It has been superceded by I2C_ClearStatusFlags The following status register flags can be cleared:
kI2C_MasterArbitrationLostFlag
kI2C_MasterStartStopErrorFlag
Attempts to clear other flags has no effect.
See also
_i2c_status_flags.
- Parameters:
base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_status_flags enumerators OR’d together. You may pass the result of a previous call to I2C_GetStatusFlags().
-
static inline void I2C_EnableInterrupts(I2C_Type *base, uint32_t interruptMask)
Enables the I2C interrupt requests.
- Parameters:
base – The I2C peripheral base address.
interruptMask – Bit mask of interrupts to enable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.
-
static inline void I2C_DisableInterrupts(I2C_Type *base, uint32_t interruptMask)
Disables the I2C interrupt requests.
- Parameters:
base – The I2C peripheral base address.
interruptMask – Bit mask of interrupts to disable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.
-
static inline uint32_t I2C_GetEnabledInterrupts(I2C_Type *base)
Returns the set of currently enabled I2C interrupt requests.
- Parameters:
base – The I2C peripheral base address.
- Returns:
A bitmask composed of _i2c_interrupt_enable enumerators OR’d together to indicate the set of enabled interrupts.
-
void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
Sets the I2C bus frequency for master transactions.
The I2C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.
- Parameters:
base – The I2C peripheral base address.
srcClock_Hz – I2C functional clock frequency in Hertz.
baudRate_Bps – Requested bus frequency in bits per second.
-
void I2C_MasterSetTimeoutValue(I2C_Type *base, uint8_t timeout_Ms, uint32_t srcClock_Hz)
Sets the I2C bus timeout value.
If the SCL signal remains low or bus does not have event longer than the timeout value, kI2C_SclTimeoutFlag or kI2C_EventTimeoutFlag is set. This can indicete the bus is held by slave or any fault occurs to the I2C module.
- Parameters:
base – The I2C peripheral base address.
timeout_Ms – Timeout value in millisecond.
srcClock_Hz – I2C functional clock frequency in Hertz.
-
static inline bool I2C_MasterGetBusIdleState(I2C_Type *base)
Returns whether the bus is idle.
Requires the master mode to be enabled.
- Parameters:
base – The I2C peripheral base address.
- Return values:
true – Bus is busy.
false – Bus is idle.
-
status_t I2C_MasterStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)
Sends a START on the I2C bus.
This function is used to initiate a new master mode transfer by sending the START signal. The slave address is sent following the I2C START signal.
- Parameters:
base – I2C peripheral base pointer
address – 7-bit slave device address.
direction – Master transfer directions(transmit/receive).
- Return values:
kStatus_Success – Successfully send the start signal.
kStatus_I2C_Busy – Current bus is busy.
-
status_t I2C_MasterStop(I2C_Type *base)
Sends a STOP signal on the I2C bus.
- Return values:
kStatus_Success – Successfully send the stop signal.
kStatus_I2C_Timeout – Send stop signal failed, timeout.
-
static inline status_t I2C_MasterRepeatedStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)
Sends a REPEATED START on the I2C bus.
- Parameters:
base – I2C peripheral base pointer
address – 7-bit slave device address.
direction – Master transfer directions(transmit/receive).
- Return values:
kStatus_Success – Successfully send the start signal.
kStatus_I2C_Busy – Current bus is busy but not occupied by current I2C master.
-
status_t I2C_MasterWriteBlocking(I2C_Type *base, const void *txBuff, size_t txSize, uint32_t flags)
Performs a polling send transfer on the I2C bus.
Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_I2C_Nak.
- Parameters:
base – The I2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.
flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag
- Return values:
kStatus_Success – Data was sent successfully.
kStatus_I2C_Busy – Another master is currently utilizing the bus.
kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_I2C_ArbitrationLost – Arbitration lost error.
-
status_t I2C_MasterReadBlocking(I2C_Type *base, void *rxBuff, size_t rxSize, uint32_t flags)
Performs a polling receive transfer on the I2C bus.
- Parameters:
base – The I2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.
flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag
- Return values:
kStatus_Success – Data was received successfully.
kStatus_I2C_Busy – Another master is currently utilizing the bus.
kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_I2C_ArbitrationLost – Arbitration lost error.
-
status_t I2C_MasterTransferBlocking(I2C_Type *base, i2c_master_transfer_t *xfer)
Performs a master polling transfer on the I2C bus.
Note
The API does not return until the transfer succeeds or fails due to arbitration lost or receiving a NAK.
- Parameters:
base – I2C peripheral base address.
xfer – Pointer to the transfer structure.
- Return values:
kStatus_Success – Successfully complete the data transmission.
kStatus_I2C_Busy – Previous transmission still not finished.
kStatus_I2C_Timeout – Transfer error, wait signal timeout.
kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.
kStataus_I2C_Nak – Transfer error, receive NAK during transfer.
kStataus_I2C_Addr_Nak – Transfer error, receive NAK during addressing.
-
void I2C_MasterTransferCreateHandle(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_callback_t callback, void *userData)
Creates a new handle for the I2C master non-blocking APIs.
The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_MasterTransferAbort() API shall be called.
- Parameters:
base – The I2C peripheral base address.
handle – [out] Pointer to the I2C master driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.
-
status_t I2C_MasterTransferNonBlocking(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_t *xfer)
Performs a non-blocking transaction on the I2C bus.
- Parameters:
base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
xfer – The pointer to the transfer descriptor.
- Return values:
kStatus_Success – The transaction was started successfully.
kStatus_I2C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.
-
status_t I2C_MasterTransferGetCount(I2C_Type *base, i2c_master_handle_t *handle, size_t *count)
Returns number of bytes transferred so far.
- Parameters:
base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
count – [out] Number of bytes transferred so far by the non-blocking transaction.
- Return values:
kStatus_Success –
kStatus_I2C_Busy –
-
status_t I2C_MasterTransferAbort(I2C_Type *base, i2c_master_handle_t *handle)
Terminates a non-blocking I2C master transmission early.
Note
It is not safe to call this function from an IRQ handler that has a higher priority than the I2C peripheral’s IRQ priority.
- Parameters:
base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
- Return values:
kStatus_Success – A transaction was successfully aborted.
kStatus_I2C_Timeout – Timeout during polling for flags.
-
void I2C_MasterTransferHandleIRQ(I2C_Type *base, i2c_master_handle_t *handle)
Reusable routine to handle master interrupts.
Note
This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality.
- Parameters:
base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
-
enum _i2c_direction
Direction of master and slave transfers.
Values:
-
enumerator kI2C_Write
Master transmit.
-
enumerator kI2C_Read
Master receive.
-
enumerator kI2C_Write
-
enum _i2c_master_transfer_flags
Transfer option flags.
Note
These enumerations are intended to be OR’d together to form a bit mask of options for the _i2c_master_transfer::flags field.
Values:
-
enumerator kI2C_TransferDefaultFlag
Transfer starts with a start signal, stops with a stop signal.
-
enumerator kI2C_TransferNoStartFlag
Don’t send a start condition, address, and sub address
-
enumerator kI2C_TransferRepeatedStartFlag
Send a repeated start condition
-
enumerator kI2C_TransferNoStopFlag
Don’t send a stop condition.
-
enumerator kI2C_TransferDefaultFlag
-
enum _i2c_transfer_states
States for the state machine used by transactional APIs.
Values:
-
enumerator kIdleState
-
enumerator kTransmitSubaddrState
-
enumerator kTransmitDataState
-
enumerator kReceiveDataBeginState
-
enumerator kReceiveDataState
-
enumerator kReceiveLastDataState
-
enumerator kStartState
-
enumerator kStopState
-
enumerator kWaitForCompletionState
-
enumerator kIdleState
-
typedef enum _i2c_direction i2c_direction_t
Direction of master and slave transfers.
-
typedef struct _i2c_master_config i2c_master_config_t
Structure with settings to initialize the I2C master module.
This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash.
-
typedef struct _i2c_master_transfer i2c_master_transfer_t
I2C master transfer typedef.
-
typedef struct _i2c_master_handle i2c_master_handle_t
I2C master handle typedef.
-
typedef void (*i2c_master_transfer_callback_t)(I2C_Type *base, i2c_master_handle_t *handle, status_t completionStatus, void *userData)
Master completion callback function pointer type.
This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to I2C_MasterTransferCreateHandle().
- Param base:
The I2C peripheral base address.
- Param completionStatus:
Either kStatus_Success or an error code describing how the transfer completed.
- Param userData:
Arbitrary pointer-sized value passed from the application.
-
struct _i2c_master_config
- #include <fsl_i2c.h>
Structure with settings to initialize the I2C master module.
This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash.
Public Members
-
bool enableMaster
Whether to enable master mode.
-
uint32_t baudRate_Bps
Desired baud rate in bits per second.
-
bool enableTimeout
Enable internal timeout function.
-
uint8_t timeout_Ms
Event timeout and SCL low timeout value.
-
bool enableMaster
-
struct _i2c_master_transfer
- #include <fsl_i2c.h>
Non-blocking transfer descriptor structure.
This structure is used to pass transaction parameters to the I2C_MasterTransferNonBlocking() API.
Public Members
-
uint32_t flags
Bit mask of options for the transfer. See enumeration _i2c_master_transfer_flags for available options. Set to 0 or kI2C_TransferDefaultFlag for normal transfers.
-
uint8_t slaveAddress
The 7-bit slave address.
-
i2c_direction_t direction
Either kI2C_Read or kI2C_Write.
-
uint32_t subaddress
Sub address. Transferred MSB first.
-
size_t subaddressSize
Length of sub address to send in bytes. Maximum size is 4 bytes.
-
void *data
Pointer to data to transfer.
-
size_t dataSize
Number of bytes to transfer.
-
uint32_t flags
-
struct _i2c_master_handle
- #include <fsl_i2c.h>
Driver handle for master non-blocking APIs.
Note
The contents of this structure are private and subject to change.
Public Members
-
uint8_t state
Transfer state machine current state.
-
uint32_t transferCount
Indicates progress of the transfer
-
uint32_t remainingBytes
Remaining byte count in current state.
-
uint8_t *buf
Buffer pointer for current state.
-
bool checkAddrNack
Whether to check the nack signal is detected during addressing.
-
i2c_master_transfer_t transfer
Copy of the current transfer info.
-
i2c_master_transfer_callback_t completionCallback
Callback function pointer.
-
void *userData
Application data passed to callback.
-
uint8_t state
I2C Slave Driver
-
void I2C_SlaveGetDefaultConfig(i2c_slave_config_t *slaveConfig)
Provides a default configuration for the I2C slave peripheral.
This function provides the following default configuration for the I2C slave peripheral:
slaveConfig->enableSlave = true; slaveConfig->address0.disable = false; slaveConfig->address0.address = 0u; slaveConfig->address1.disable = true; slaveConfig->address2.disable = true; slaveConfig->address3.disable = true; slaveConfig->busSpeed = kI2C_SlaveStandardMode;
After calling this function, override any settings to customize the configuration, prior to initializing the master driver with I2C_SlaveInit(). Be sure to override at least the address0.address member of the configuration structure with the desired slave address.
- Parameters:
slaveConfig – [out] User provided configuration structure that is set to default values. Refer to i2c_slave_config_t.
-
status_t I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig, uint32_t srcClock_Hz)
Initializes the I2C slave peripheral.
This function enables the peripheral clock and initializes the I2C slave peripheral as described by the user provided configuration.
- Parameters:
base – The I2C peripheral base address.
slaveConfig – User provided peripheral configuration. Use I2C_SlaveGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate CLKDIV value to provide enough data setup time for master when slave stretches the clock.
-
void I2C_SlaveSetAddress(I2C_Type *base, i2c_slave_address_register_t addressRegister, uint8_t address, bool addressDisable)
Configures Slave Address n register.
This function writes new value to Slave Address register.
- Parameters:
base – The I2C peripheral base address.
addressRegister – The module supports multiple address registers. The parameter determines which one shall be changed.
address – The slave address to be stored to the address register for matching.
addressDisable – Disable matching of the specified address register.
-
void I2C_SlaveDeinit(I2C_Type *base)
Deinitializes the I2C slave peripheral.
This function disables the I2C slave peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.
- Parameters:
base – The I2C peripheral base address.
-
static inline void I2C_SlaveEnable(I2C_Type *base, bool enable)
Enables or disables the I2C module as slave.
- Parameters:
base – The I2C peripheral base address.
enable – True to enable or flase to disable.
-
static inline void I2C_SlaveClearStatusFlags(I2C_Type *base, uint32_t statusMask)
Clears the I2C status flag state.
The following status register flags can be cleared:
slave deselected flag
Attempts to clear other flags has no effect.
See also
_i2c_slave_flags.
- Parameters:
base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_slave_flags enumerators OR’d together. You may pass the result of a previous call to I2C_SlaveGetStatusFlags().
-
status_t I2C_SlaveWriteBlocking(I2C_Type *base, const uint8_t *txBuff, size_t txSize)
Performs a polling send transfer on the I2C bus.
The function executes blocking address phase and blocking data phase.
- Parameters:
base – The I2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.
- Returns:
kStatus_Success Data has been sent.
- Returns:
kStatus_Fail Unexpected slave state (master data write while master read from slave is expected).
-
status_t I2C_SlaveReadBlocking(I2C_Type *base, uint8_t *rxBuff, size_t rxSize)
Performs a polling receive transfer on the I2C bus.
The function executes blocking address phase and blocking data phase.
- Parameters:
base – The I2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.
- Returns:
kStatus_Success Data has been received.
- Returns:
kStatus_Fail Unexpected slave state (master data read while master write to slave is expected).
-
void I2C_SlaveTransferCreateHandle(I2C_Type *base, i2c_slave_handle_t *handle, i2c_slave_transfer_callback_t callback, void *userData)
Creates a new handle for the I2C slave non-blocking APIs.
The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_SlaveTransferAbort() API shall be called.
- Parameters:
base – The I2C peripheral base address.
handle – [out] Pointer to the I2C slave driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.
-
status_t I2C_SlaveTransferNonBlocking(I2C_Type *base, i2c_slave_handle_t *handle, uint32_t eventMask)
Starts accepting slave transfers.
Call this API after calling I2C_SlaveInit() and I2C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that was passed into the call to I2C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.
If no slave Tx transfer is busy, a master read from slave request invokes kI2C_SlaveTransmitEvent callback. If no slave Rx transfer is busy, a master write to slave request invokes kI2C_SlaveReceiveEvent callback.
The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.
- Parameters:
base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.
- Return values:
kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.
-
status_t I2C_SlaveSetSendBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, const void *txData, size_t txSize, uint32_t eventMask)
Starts accepting master read from slave requests.
The function can be called in response to kI2C_SlaveTransmitEvent callback to start a new slave Tx transfer from within the transfer callback.
The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.
- Parameters:
base – The I2C peripheral base address.
transfer – Pointer to i2c_slave_transfer_t structure.
txData – Pointer to data to send to master.
txSize – Size of txData in bytes.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.
- Return values:
kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.
-
status_t I2C_SlaveSetReceiveBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *rxData, size_t rxSize, uint32_t eventMask)
Starts accepting master write to slave requests.
The function can be called in response to kI2C_SlaveReceiveEvent callback to start a new slave Rx transfer from within the transfer callback.
The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.
- Parameters:
base – The I2C peripheral base address.
transfer – Pointer to i2c_slave_transfer_t structure.
rxData – Pointer to data to store data from master.
rxSize – Size of rxData in bytes.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.
- Return values:
kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.
-
static inline uint32_t I2C_SlaveGetReceivedAddress(I2C_Type *base, volatile i2c_slave_transfer_t *transfer)
Returns the slave address sent by the I2C master.
This function should only be called from the address match event callback kI2C_SlaveAddressMatchEvent.
- Parameters:
base – The I2C peripheral base address.
transfer – The I2C slave transfer.
- Returns:
The 8-bit address matched by the I2C slave. Bit 0 contains the R/w direction bit, and the 7-bit slave address is in the upper 7 bits.
-
void I2C_SlaveTransferAbort(I2C_Type *base, i2c_slave_handle_t *handle)
Aborts the slave non-blocking transfers.
Note
This API could be called at any time to stop slave for handling the bus events.
- Parameters:
base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.
- Return values:
kStatus_Success –
kStatus_I2C_Idle –
-
status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count)
Gets the slave transfer remaining bytes during a interrupt non-blocking transfer.
- Parameters:
base – I2C base pointer.
handle – pointer to i2c_slave_handle_t structure.
count – Number of bytes transferred so far by the non-blocking transaction.
- Return values:
kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.
-
void I2C_SlaveTransferHandleIRQ(I2C_Type *base, i2c_slave_handle_t *handle)
Reusable routine to handle slave interrupts.
Note
This function does not need to be called unless you are reimplementing the non blocking API’s interrupt handler routines to add special functionality.
- Parameters:
base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.
-
enum _i2c_slave_address_register
I2C slave address register.
Values:
-
enumerator kI2C_SlaveAddressRegister0
Slave Address 0 register.
-
enumerator kI2C_SlaveAddressRegister1
Slave Address 1 register.
-
enumerator kI2C_SlaveAddressRegister2
Slave Address 2 register.
-
enumerator kI2C_SlaveAddressRegister3
Slave Address 3 register.
-
enumerator kI2C_SlaveAddressRegister0
-
enum _i2c_slave_address_qual_mode
I2C slave address match options.
Values:
-
enumerator kI2C_QualModeMask
The SLVQUAL0 field (qualAddress) is used as a logical mask for matching address0.
-
enumerator kI2C_QualModeExtend
The SLVQUAL0 (qualAddress) field is used to extend address 0 matching in a range of addresses.
-
enumerator kI2C_QualModeMask
-
enum _i2c_slave_bus_speed
I2C slave bus speed options.
Values:
-
enumerator kI2C_SlaveStandardMode
-
enumerator kI2C_SlaveFastMode
-
enumerator kI2C_SlaveFastModePlus
-
enumerator kI2C_SlaveHsMode
-
enumerator kI2C_SlaveStandardMode
-
enum _i2c_slave_transfer_event
Set of events sent to the callback for non blocking slave transfers.
These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.
Note
These enumerations are meant to be OR’d together to form a bit mask of events.
Values:
-
enumerator kI2C_SlaveAddressMatchEvent
Received the slave address after a start or repeated start.
-
enumerator kI2C_SlaveTransmitEvent
Callback is requested to provide data to transmit (slave-transmitter role).
-
enumerator kI2C_SlaveReceiveEvent
Callback is requested to provide a buffer in which to place received data (slave-receiver role).
-
enumerator kI2C_SlaveCompletionEvent
All data in the active transfer have been consumed.
-
enumerator kI2C_SlaveDeselectedEvent
The slave function has become deselected (SLVSEL flag changing from 1 to 0.
-
enumerator kI2C_SlaveAllEvents
Bit mask of all available events.
-
enumerator kI2C_SlaveAddressMatchEvent
-
enum _i2c_slave_fsm
I2C slave software finite state machine states.
Values:
-
enumerator kI2C_SlaveFsmAddressMatch
-
enumerator kI2C_SlaveFsmReceive
-
enumerator kI2C_SlaveFsmTransmit
-
enumerator kI2C_SlaveFsmAddressMatch
-
typedef enum _i2c_slave_address_register i2c_slave_address_register_t
I2C slave address register.
-
typedef struct _i2c_slave_address i2c_slave_address_t
Data structure with 7-bit Slave address and Slave address disable.
-
typedef enum _i2c_slave_address_qual_mode i2c_slave_address_qual_mode_t
I2C slave address match options.
-
typedef enum _i2c_slave_bus_speed i2c_slave_bus_speed_t
I2C slave bus speed options.
-
typedef struct _i2c_slave_config i2c_slave_config_t
Structure with settings to initialize the I2C slave module.
This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash.
-
typedef enum _i2c_slave_transfer_event i2c_slave_transfer_event_t
Set of events sent to the callback for non blocking slave transfers.
These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.
Note
These enumerations are meant to be OR’d together to form a bit mask of events.
-
typedef struct _i2c_slave_handle i2c_slave_handle_t
I2C slave handle typedef.
-
typedef struct _i2c_slave_transfer i2c_slave_transfer_t
I2C slave transfer structure.
-
typedef void (*i2c_slave_transfer_callback_t)(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *userData)
Slave event callback function pointer type.
This callback is used only for the slave non-blocking transfer API. To install a callback, use the I2C_SlaveSetCallback() function after you have created a handle.
- Param base:
Base address for the I2C instance on which the event occurred.
- Param transfer:
Pointer to transfer descriptor containing values passed to and/or from the callback.
- Param userData:
Arbitrary pointer-sized value passed from the application.
-
typedef enum _i2c_slave_fsm i2c_slave_fsm_t
I2C slave software finite state machine states.
-
typedef void (*flexcomm_i2c_master_irq_handler_t)(I2C_Type *base, i2c_master_handle_t *handle)
Typedef for master interrupt handler.
-
typedef void (*flexcomm_i2c_slave_irq_handler_t)(I2C_Type *base, i2c_slave_handle_t *handle)
Typedef for slave interrupt handler.
-
struct _i2c_slave_address
- #include <fsl_i2c.h>
Data structure with 7-bit Slave address and Slave address disable.
Public Members
-
uint8_t address
7-bit Slave address SLVADR.
-
bool addressDisable
Slave address disable SADISABLE.
-
uint8_t address
-
struct _i2c_slave_config
- #include <fsl_i2c.h>
Structure with settings to initialize the I2C slave module.
This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash.
Public Members
-
i2c_slave_address_t address0
Slave’s 7-bit address and disable.
-
i2c_slave_address_t address1
Alternate slave 7-bit address and disable.
-
i2c_slave_address_t address2
Alternate slave 7-bit address and disable.
-
i2c_slave_address_t address3
Alternate slave 7-bit address and disable.
-
i2c_slave_address_qual_mode_t qualMode
Qualify mode for slave address 0.
-
uint8_t qualAddress
Slave address qualifier for address 0.
-
i2c_slave_bus_speed_t busSpeed
Slave bus speed mode. If the slave function stretches SCL to allow for software response, it must provide sufficient data setup time to the master before releasing the stretched clock. This is accomplished by inserting one clock time of CLKDIV at that point. The busSpeed value is used to configure CLKDIV such that one clock time is greater than the tSU;DAT value noted in the I2C bus specification for the I2C mode that is being used. If the busSpeed mode is unknown at compile time, use the longest data setup time kI2C_SlaveStandardMode (250 ns)
-
bool enableSlave
Enable slave mode.
-
i2c_slave_address_t address0
-
struct _i2c_slave_transfer
- #include <fsl_i2c.h>
I2C slave transfer structure.
Public Members
-
i2c_slave_handle_t *handle
Pointer to handle that contains this transfer.
-
i2c_slave_transfer_event_t event
Reason the callback is being invoked.
-
uint8_t receivedAddress
Matching address send by master. 7-bits plus R/nW bit0
-
uint32_t eventMask
Mask of enabled events.
-
uint8_t *rxData
Transfer buffer for receive data
-
const uint8_t *txData
Transfer buffer for transmit data
-
size_t txSize
Transfer size
-
size_t rxSize
Transfer size
-
size_t transferredCount
Number of bytes transferred during this transfer.
-
status_t completionStatus
Success or error code describing how the transfer completed. Only applies for kI2C_SlaveCompletionEvent.
-
i2c_slave_handle_t *handle
-
struct _i2c_slave_handle
- #include <fsl_i2c.h>
I2C slave handle structure.
Note
The contents of this structure are private and subject to change.
Public Members
-
volatile i2c_slave_transfer_t transfer
I2C slave transfer.
-
volatile bool isBusy
Whether transfer is busy.
-
volatile i2c_slave_fsm_t slaveFsm
slave transfer state machine.
-
i2c_slave_transfer_callback_t callback
Callback function called at transfer event.
-
void *userData
Callback parameter passed to callback.
-
volatile i2c_slave_transfer_t transfer
I2S: I2S Driver
I2S DMA Driver
-
void I2S_TxTransferCreateHandleDMA(I2S_Type *base, i2s_dma_handle_t *handle, dma_handle_t *dmaHandle, i2s_dma_transfer_callback_t callback, void *userData)
Initializes handle for transfer of audio data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
dmaHandle – pointer to dma handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.
-
status_t I2S_TxTransferSendDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t transfer)
Begins or queue sending of the given data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.
- Return values:
kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with unsent buffers.
-
void I2S_TransferAbortDMA(I2S_Type *base, i2s_dma_handle_t *handle)
Aborts transfer of data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
-
void I2S_RxTransferCreateHandleDMA(I2S_Type *base, i2s_dma_handle_t *handle, dma_handle_t *dmaHandle, i2s_dma_transfer_callback_t callback, void *userData)
Initializes handle for reception of audio data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
dmaHandle – pointer to dma handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.
-
status_t I2S_RxTransferReceiveDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t transfer)
Begins or queue reception of data into given buffer.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.
- Return values:
kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with buffers which are not full.
-
void I2S_DMACallback(dma_handle_t *handle, void *userData, bool transferDone, uint32_t tcds)
Invoked from DMA interrupt handler.
- Parameters:
handle – pointer to DMA handle structure.
userData – argument for user callback.
transferDone – if transfer was done.
tcds –
-
void I2S_TransferInstallLoopDMADescriptorMemory(i2s_dma_handle_t *handle, void *dmaDescriptorAddr, size_t dmaDescriptorNum)
Install DMA descriptor memory for loop transfer only.
This function used to register DMA descriptor memory for the i2s loop dma transfer.
It must be callbed before I2S_TransferSendLoopDMA/I2S_TransferReceiveLoopDMA and after I2S_RxTransferCreateHandleDMA/I2S_TxTransferCreateHandleDMA.
User should be take care about the address of DMA descriptor pool which required align with 16BYTE at least.
- Parameters:
handle – Pointer to i2s DMA transfer handle.
dmaDescriptorAddr – DMA descriptor start address.
dmaDescriptorNum – DMA descriptor number.
-
status_t I2S_TransferSendLoopDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t *xfer, uint32_t loopTransferCount)
Send link transfer data using DMA.
This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.
This function support loop transfer, such as A->B->…->A, the loop transfer chain will be converted into a chain of descriptor and submit to dma. Application must be aware of that the more counts of the loop transfer, then more DMA descriptor memory required, user can use function I2S_InstallDMADescriptorMemory to register the dma descriptor memory.
As the DMA support maximum 1024 transfer count, so application must be aware of that this transfer function support maximum 1024 samples in each transfer, otherwise assert error or error status will be returned. Once the loop transfer start, application can use function I2S_TransferAbortDMA to stop the loop transfer.
- Parameters:
base – I2S peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – I2S DMA transfer structure. See i2s_transfer_t.
loopTransferCount – loop count
- Return values:
kStatus_Success –
-
status_t I2S_TransferReceiveLoopDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t *xfer, uint32_t loopTransferCount)
Receive link transfer data using DMA.
This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.
This function support loop transfer, such as A->B->…->A, the loop transfer chain will be converted into a chain of descriptor and submit to dma. Application must be aware of that the more counts of the loop transfer, then more DMA descriptor memory required, user can use function I2S_InstallDMADescriptorMemory to register the dma descriptor memory.
As the DMA support maximum 1024 transfer count, so application must be aware of that this transfer function support maximum 1024 samples in each transfer, otherwise assert error or error status will be returned. Once the loop transfer start, application can use function I2S_TransferAbortDMA to stop the loop transfer.
- Parameters:
base – I2S peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – I2S DMA transfer structure. See i2s_transfer_t.
loopTransferCount – loop count
- Return values:
kStatus_Success –
-
FSL_I2S_DMA_DRIVER_VERSION
I2S DMA driver version 2.3.3.
-
typedef struct _i2s_dma_handle i2s_dma_handle_t
Members not to be accessed / modified outside of the driver.
-
typedef void (*i2s_dma_transfer_callback_t)(I2S_Type *base, i2s_dma_handle_t *handle, status_t completionStatus, void *userData)
Callback function invoked from DMA API on completion.
- Param base:
I2S base pointer.
- Param handle:
pointer to I2S transaction.
- Param completionStatus:
status of the transaction.
- Param userData:
optional pointer to user arguments data.
-
struct _i2s_dma_handle
- #include <fsl_i2s_dma.h>
i2s dma handle
Public Members
-
uint32_t state
Internal state of I2S DMA transfer
-
uint8_t bytesPerFrame
bytes per frame
-
i2s_dma_transfer_callback_t completionCallback
Callback function pointer
-
void *userData
Application data passed to callback
-
dma_handle_t *dmaHandle
DMA handle
-
volatile i2s_transfer_t i2sQueue[(4U)]
Transfer queue storing transfer buffers
-
volatile uint8_t queueUser
Queue index where user’s next transfer will be stored
-
volatile uint8_t queueDriver
Queue index of buffer actually used by the driver
-
dma_descriptor_t *i2sLoopDMADescriptor
descriptor pool pointer
-
size_t i2sLoopDMADescriptorNum
number of descriptor in descriptors pool
-
uint32_t state
I2S Driver
-
void I2S_TxInit(I2S_Type *base, const i2s_config_t *config)
Initializes the FLEXCOMM peripheral for I2S transmit functionality.
Ungates the FLEXCOMM clock and configures the module for I2S transmission using a configuration structure. The configuration structure can be custom filled or set with default values by I2S_TxGetDefaultConfig().
Note
This API should be called at the beginning of the application to use the I2S driver.
- Parameters:
base – I2S base pointer.
config – pointer to I2S configuration structure.
-
void I2S_RxInit(I2S_Type *base, const i2s_config_t *config)
Initializes the FLEXCOMM peripheral for I2S receive functionality.
Ungates the FLEXCOMM clock and configures the module for I2S receive using a configuration structure. The configuration structure can be custom filled or set with default values by I2S_RxGetDefaultConfig().
Note
This API should be called at the beginning of the application to use the I2S driver.
- Parameters:
base – I2S base pointer.
config – pointer to I2S configuration structure.
-
void I2S_TxGetDefaultConfig(i2s_config_t *config)
Sets the I2S Tx configuration structure to default values.
This API initializes the configuration structure for use in I2S_TxInit(). The initialized structure can remain unchanged in I2S_TxInit(), or it can be modified before calling I2S_TxInit(). Example:
i2s_config_t config; I2S_TxGetDefaultConfig(&config);
Default values:
config->masterSlave = kI2S_MasterSlaveNormalMaster; config->mode = kI2S_ModeI2sClassic; config->rightLow = false; config->leftJust = false; config->pdmData = false; config->sckPol = false; config->wsPol = false; config->divider = 1; config->oneChannel = false; config->dataLength = 16; config->frameLength = 32; config->position = 0; config->watermark = 4; config->txEmptyZero = true; config->pack48 = false;
- Parameters:
config – pointer to I2S configuration structure.
-
void I2S_RxGetDefaultConfig(i2s_config_t *config)
Sets the I2S Rx configuration structure to default values.
This API initializes the configuration structure for use in I2S_RxInit(). The initialized structure can remain unchanged in I2S_RxInit(), or it can be modified before calling I2S_RxInit(). Example:
i2s_config_t config; I2S_RxGetDefaultConfig(&config);
Default values:
config->masterSlave = kI2S_MasterSlaveNormalSlave; config->mode = kI2S_ModeI2sClassic; config->rightLow = false; config->leftJust = false; config->pdmData = false; config->sckPol = false; config->wsPol = false; config->divider = 1; config->oneChannel = false; config->dataLength = 16; config->frameLength = 32; config->position = 0; config->watermark = 4; config->txEmptyZero = false; config->pack48 = false;
- Parameters:
config – pointer to I2S configuration structure.
-
void I2S_Deinit(I2S_Type *base)
De-initializes the I2S peripheral.
This API gates the FLEXCOMM clock. The I2S module can’t operate unless I2S_TxInit or I2S_RxInit is called to enable the clock.
- Parameters:
base – I2S base pointer.
-
void I2S_SetBitClockRate(I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers)
Transmitter/Receiver bit clock rate configurations.
- Parameters:
base – SAI base pointer.
sourceClockHz – bit clock source frequency.
sampleRate – audio data sample rate.
bitWidth – audio data bitWidth.
channelNumbers – audio channel numbers.
-
void I2S_TxTransferCreateHandle(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_callback_t callback, void *userData)
Initializes handle for transfer of audio data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.
-
status_t I2S_TxTransferNonBlocking(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_t transfer)
Begins or queue sending of the given data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.
- Return values:
kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with unsent buffers.
-
void I2S_TxTransferAbort(I2S_Type *base, i2s_handle_t *handle)
Aborts sending of data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
-
void I2S_RxTransferCreateHandle(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_callback_t callback, void *userData)
Initializes handle for reception of audio data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.
-
status_t I2S_RxTransferNonBlocking(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_t transfer)
Begins or queue reception of data into given buffer.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.
- Return values:
kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with buffers which are not full.
-
void I2S_RxTransferAbort(I2S_Type *base, i2s_handle_t *handle)
Aborts receiving of data.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
-
status_t I2S_TransferGetCount(I2S_Type *base, i2s_handle_t *handle, size_t *count)
Returns number of bytes transferred so far.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
count – [out] number of bytes transferred so far by the non-blocking transaction.
- Return values:
kStatus_Success –
kStatus_NoTransferInProgress – there is no non-blocking transaction currently in progress.
-
status_t I2S_TransferGetErrorCount(I2S_Type *base, i2s_handle_t *handle, size_t *count)
Returns number of buffer underruns or overruns.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
count – [out] number of transmit errors encountered so far by the non-blocking transaction.
- Return values:
kStatus_Success –
kStatus_NoTransferInProgress – there is no non-blocking transaction currently in progress.
-
static inline void I2S_Enable(I2S_Type *base)
Enables I2S operation.
- Parameters:
base – I2S base pointer.
-
void I2S_EnableSecondaryChannel(I2S_Type *base, uint32_t channel, bool oneChannel, uint32_t position)
Enables I2S secondary channel.
- Parameters:
base – I2S base pointer.
channel – seondary channel channel number, reference _i2s_secondary_channel.
oneChannel – true is treated as single channel, functionality left channel for this pair.
position – define the location within the frame of the data, should not bigger than 0x1FFU.
-
static inline void I2S_DisableSecondaryChannel(I2S_Type *base, uint32_t channel)
Disables I2S secondary channel.
- Parameters:
base – I2S base pointer.
channel – seondary channel channel number, reference _i2s_secondary_channel.
-
static inline void I2S_Disable(I2S_Type *base)
Disables I2S operation.
- Parameters:
base – I2S base pointer.
-
static inline void I2S_EnableInterrupts(I2S_Type *base, uint32_t interruptMask)
Enables I2S FIFO interrupts.
- Parameters:
base – I2S base pointer.
interruptMask – bit mask of interrupts to enable. See i2s_flags_t for the set of constants that should be OR’d together to form the bit mask.
-
static inline void I2S_DisableInterrupts(I2S_Type *base, uint32_t interruptMask)
Disables I2S FIFO interrupts.
- Parameters:
base – I2S base pointer.
interruptMask – bit mask of interrupts to enable. See i2s_flags_t for the set of constants that should be OR’d together to form the bit mask.
-
static inline uint32_t I2S_GetEnabledInterrupts(I2S_Type *base)
Returns the set of currently enabled I2S FIFO interrupts.
- Parameters:
base – I2S base pointer.
- Returns:
A bitmask composed of i2s_flags_t enumerators OR’d together to indicate the set of enabled interrupts.
-
status_t I2S_EmptyTxFifo(I2S_Type *base)
Flush the valid data in TX fifo.
- Parameters:
base – I2S base pointer.
- Returns:
kStatus_Fail empty TX fifo failed, kStatus_Success empty tx fifo success.
-
void I2S_TxHandleIRQ(I2S_Type *base, i2s_handle_t *handle)
Invoked from interrupt handler when transmit FIFO level decreases.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
-
void I2S_RxHandleIRQ(I2S_Type *base, i2s_handle_t *handle)
Invoked from interrupt handler when receive FIFO level decreases.
- Parameters:
base – I2S base pointer.
handle – pointer to handle structure.
-
FSL_I2S_DRIVER_VERSION
I2S driver version 2.3.2.
_i2s_status I2S status codes.
Values:
-
enumerator kStatus_I2S_BufferComplete
Transfer from/into a single buffer has completed
-
enumerator kStatus_I2S_Done
All buffers transfers have completed
-
enumerator kStatus_I2S_Busy
Already performing a transfer and cannot queue another buffer
-
enumerator kStatus_I2S_BufferComplete
-
enum _i2s_flags
I2S flags.
Note
These enums are meant to be OR’d together to form a bit mask.
Values:
-
enumerator kI2S_TxErrorFlag
TX error interrupt
-
enumerator kI2S_TxLevelFlag
TX level interrupt
-
enumerator kI2S_RxErrorFlag
RX error interrupt
-
enumerator kI2S_RxLevelFlag
RX level interrupt
-
enumerator kI2S_TxErrorFlag
-
enum _i2s_master_slave
Master / slave mode.
Values:
-
enumerator kI2S_MasterSlaveNormalSlave
Normal slave
-
enumerator kI2S_MasterSlaveWsSyncMaster
WS synchronized master
-
enumerator kI2S_MasterSlaveExtSckMaster
Master using existing SCK
-
enumerator kI2S_MasterSlaveNormalMaster
Normal master
-
enumerator kI2S_MasterSlaveNormalSlave
-
enum _i2s_mode
I2S mode.
Values:
-
enumerator kI2S_ModeI2sClassic
I2S classic mode
-
enumerator kI2S_ModeDspWs50
DSP mode, WS having 50% duty cycle
-
enumerator kI2S_ModeDspWsShort
DSP mode, WS having one clock long pulse
-
enumerator kI2S_ModeDspWsLong
DSP mode, WS having one data slot long pulse
-
enumerator kI2S_ModeI2sClassic
_i2s_secondary_channel I2S secondary channel.
Values:
-
enumerator kI2S_SecondaryChannel1
secondary channel 1
-
enumerator kI2S_SecondaryChannel2
secondary channel 2
-
enumerator kI2S_SecondaryChannel3
secondary channel 3
-
enumerator kI2S_SecondaryChannel1
-
typedef enum _i2s_flags i2s_flags_t
I2S flags.
Note
These enums are meant to be OR’d together to form a bit mask.
-
typedef enum _i2s_master_slave i2s_master_slave_t
Master / slave mode.
-
typedef enum _i2s_mode i2s_mode_t
I2S mode.
-
typedef struct _i2s_config i2s_config_t
I2S configuration structure.
-
typedef struct _i2s_transfer i2s_transfer_t
Buffer to transfer from or receive audio data into.
-
typedef struct _i2s_handle i2s_handle_t
Transactional state of the intialized transfer or receive I2S operation.
-
typedef void (*i2s_transfer_callback_t)(I2S_Type *base, i2s_handle_t *handle, status_t completionStatus, void *userData)
Callback function invoked from transactional API on completion of a single buffer transfer.
- Param base:
I2S base pointer.
- Param handle:
pointer to I2S transaction.
- Param completionStatus:
status of the transaction.
- Param userData:
optional pointer to user arguments data.
-
I2S_NUM_BUFFERS
Number of buffers .
-
struct _i2s_config
- #include <fsl_i2s.h>
I2S configuration structure.
Public Members
-
i2s_master_slave_t masterSlave
Master / slave configuration
-
i2s_mode_t mode
I2S mode
-
bool rightLow
Right channel data in low portion of FIFO
-
bool leftJust
Left justify data in FIFO
-
bool pdmData
Data source is the D-Mic subsystem
-
bool sckPol
SCK polarity
-
bool wsPol
WS polarity
-
uint16_t divider
Flexcomm function clock divider (1 - 4096)
-
bool oneChannel
true mono, false stereo
-
uint8_t dataLength
Data length (4 - 32)
-
uint16_t frameLength
Frame width (4 - 512)
-
uint16_t position
Data position in the frame
-
uint8_t watermark
FIFO trigger level
-
bool txEmptyZero
Transmit zero when buffer becomes empty or last item
-
bool pack48
Packing format for 48-bit data (false - 24 bit values, true - alternating 32-bit and 16-bit values)
-
i2s_master_slave_t masterSlave
-
struct _i2s_transfer
- #include <fsl_i2s.h>
Buffer to transfer from or receive audio data into.
Public Members
-
uint8_t *data
Pointer to data buffer.
-
size_t dataSize
Buffer size in bytes.
-
uint8_t *data
-
struct _i2s_handle
- #include <fsl_i2s.h>
Members not to be accessed / modified outside of the driver.
Public Members
-
volatile uint32_t state
State of transfer
-
i2s_transfer_callback_t completionCallback
Callback function pointer
-
void *userData
Application data passed to callback
-
bool oneChannel
true mono, false stereo
-
uint8_t dataLength
Data length (4 - 32)
-
bool pack48
Packing format for 48-bit data (false - 24 bit values, true - alternating 32-bit and 16-bit values)
-
uint8_t watermark
FIFO trigger level
-
bool useFifo48H
When dataLength 17-24: true use FIFOWR48H, false use FIFOWR
-
volatile i2s_transfer_t i2sQueue[(4U)]
Transfer queue storing transfer buffers
-
volatile uint8_t queueUser
Queue index where user’s next transfer will be stored
-
volatile uint8_t queueDriver
Queue index of buffer actually used by the driver
-
volatile uint32_t errorCount
Number of buffer underruns/overruns
-
volatile uint32_t transferCount
Number of bytes transferred
-
volatile uint32_t state
IAP: In Application Programming Driver
-
status_t IAP_ReadPartID(uint32_t *partID)
Read part identification number.
This function is used to read the part identification number.
- Parameters:
partID – Address to store the part identification number.
- Return values:
kStatus_IAP_Success – Api has been executed successfully.
-
status_t IAP_ReadBootCodeVersion(uint32_t *bootCodeVersion)
Read boot code version number.
This function is used to read the boot code version number.
note Boot code version is two 32-bit words. Word 0 is the major version, word 1 is the minor version.
- Parameters:
bootCodeVersion – Address to store the boot code version.
- Return values:
kStatus_IAP_Success – Api has been executed successfully.
-
void IAP_ReinvokeISP(uint8_t ispType, uint32_t *status)
Reinvoke ISP.
This function is used to invoke the boot loader in ISP mode. It maps boot vectors and configures the peripherals for ISP.
note The error response will be returned when IAP is disabled or an invalid ISP type selection appears. The call won’t return unless an error occurs, so there can be no status code.
- Parameters:
ispType – ISP type selection.
status – store the possible status.
- Return values:
kStatus_IAP_ReinvokeISPConfig – reinvoke configuration error.
-
status_t IAP_ReadUniqueID(uint32_t *uniqueID)
Read unique identification.
This function is used to read the unique id.
- Parameters:
uniqueID – store the uniqueID.
- Return values:
kStatus_IAP_Success – Api has been executed successfully.
-
FSL_IAP_DRIVER_VERSION
iap status codes.
Values:
-
enumerator kStatus_IAP_Success
Api is executed successfully
-
enumerator kStatus_IAP_InvalidCommand
Invalid command
-
enumerator kStatus_IAP_SrcAddrError
Source address is not on word boundary
-
enumerator kStatus_IAP_DstAddrError
Destination address is not on a correct boundary
-
enumerator kStatus_IAP_SrcAddrNotMapped
Source address is not mapped in the memory map
-
enumerator kStatus_IAP_DstAddrNotMapped
Destination address is not mapped in the memory map
-
enumerator kStatus_IAP_CountError
Byte count is not multiple of 4 or is not a permitted value
-
enumerator kStatus_IAP_InvalidSector
Sector/page number is invalid or end sector/page number is greater than start sector/page number
-
enumerator kStatus_IAP_SectorNotblank
One or more sectors are not blank
-
enumerator kStatus_IAP_NotPrepared
Command to prepare sector for write operation has not been executed
-
enumerator kStatus_IAP_CompareError
Destination and source memory contents do not match
-
enumerator kStatus_IAP_Busy
Flash programming hardware interface is busy
-
enumerator kStatus_IAP_ParamError
Insufficient number of parameters or invalid parameter
-
enumerator kStatus_IAP_AddrError
Address is not on word boundary
-
enumerator kStatus_IAP_AddrNotMapped
Address is not mapped in the memory map
-
enumerator kStatus_IAP_NoPower
Flash memory block is powered down
-
enumerator kStatus_IAP_NoClock
Flash memory block or controller is not clocked
-
enumerator kStatus_IAP_ReinvokeISPConfig
Reinvoke configuration error
-
enumerator kStatus_IAP_Success
-
enum _iap_commands
iap command codes.
Values:
-
enumerator kIapCmd_IAP_ReadFactorySettings
Read the factory settings
-
enumerator kIapCmd_IAP_PrepareSectorforWrite
Prepare Sector for write
-
enumerator kIapCmd_IAP_CopyRamToFlash
Copy RAM to flash
-
enumerator kIapCmd_IAP_EraseSector
Erase Sector
-
enumerator kIapCmd_IAP_BlankCheckSector
Blank check sector
-
enumerator kIapCmd_IAP_ReadPartId
Read part id
-
enumerator kIapCmd_IAP_Read_BootromVersion
Read bootrom version
-
enumerator kIapCmd_IAP_Compare
Compare
-
enumerator kIapCmd_IAP_ReinvokeISP
Reinvoke ISP
-
enumerator kIapCmd_IAP_ReadUid
Read Uid
-
enumerator kIapCmd_IAP_ErasePage
Erase Page
-
enumerator kIapCmd_IAP_ReadSignature
Read Signature
-
enumerator kIapCmd_IAP_ExtendedReadSignature
Extended Read Signature
-
enumerator kIapCmd_IAP_ReadEEPROMPage
Read EEPROM page
-
enumerator kIapCmd_IAP_WriteEEPROMPage
Write EEPROM page
-
enumerator kIapCmd_IAP_ReadFactorySettings
-
enum _flash_access_time
Flash memory access time.
Values:
-
enumerator kFlash_IAP_OneSystemClockTime
-
enumerator kFlash_IAP_TwoSystemClockTime
1 system clock flash access time
-
enumerator kFlash_IAP_ThreeSystemClockTime
2 system clock flash access time
-
enumerator kFlash_IAP_OneSystemClockTime
INPUTMUX: Input Multiplexing Driver
-
enum _inputmux_connection_t
INPUTMUX connections type.
Values:
-
enumerator kINPUTMUX_SctGpi0ToSct0
SCT INMUX.
-
enumerator kINPUTMUX_SctGpi1ToSct0
-
enumerator kINPUTMUX_SctGpi2ToSct0
-
enumerator kINPUTMUX_SctGpi3ToSct0
-
enumerator kINPUTMUX_SctGpi4ToSct0
-
enumerator kINPUTMUX_SctGpi5ToSct0
-
enumerator kINPUTMUX_SctGpi6ToSct0
-
enumerator kINPUTMUX_SctGpi7ToSct0
-
enumerator kINPUTMUX_T0Out0ToSct0
-
enumerator kINPUTMUX_T1Out0ToSct0
-
enumerator kINPUTMUX_T2Out0ToSct0
-
enumerator kINPUTMUX_T3Out0ToSct0
-
enumerator kINPUTMUX_T4Out0ToSct0
-
enumerator kINPUTMUX_AdcThcmpIrqToSct0
-
enumerator kINPUTMUX_GpioIntBmatchToSct0
-
enumerator kINPUTMUX_Usb0FrameToggleToSct0
-
enumerator kINPUTMUX_Usb1FrameToggleToSct0
-
enumerator kINPUTMUX_ArmTxevToSct0
-
enumerator kINPUTMUX_DebugHaltedToSct0
-
enumerator kINPUTMUX_SmartCard0TxActivreToSct0
-
enumerator kINPUTMUX_SmartCard0RxActivreToSct0
-
enumerator kINPUTMUX_SmartCard1TxActivreToSct0
-
enumerator kINPUTMUX_SmartCard1RxActivreToSct0
-
enumerator kINPUTMUX_I2s6SclkToSct0
-
enumerator kINPUTMUX_I2sS7clkToSct0
Frequency measure.
-
enumerator kINPUTMUX_MainOscToFreqmeas
-
enumerator kINPUTMUX_Fro12MhzToFreqmeas
-
enumerator kINPUTMUX_Fro96MhzToFreqmeas
-
enumerator kINPUTMUX_WdtOscToFreqmeas
-
enumerator kINPUTMUX_32KhzOscToFreqmeas
-
enumerator kINPUTMUX_MainClkToFreqmeas
-
enumerator kINPUTMUX_FreqmeGpioClk_a
-
enumerator kINPUTMUX_FreqmeGpioClk_b
Pin Interrupt.
-
enumerator kINPUTMUX_GpioPort0Pin0ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin1ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin2ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin3ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin4ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin5ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin6ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin7ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin8ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin9ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin10ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin11ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin12ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin13ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin14ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin15ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin16ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin17ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin18ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin19ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin20ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin21ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin22ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin23ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin24ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin25ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin26ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin27ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin28ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin29ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin30ToPintsel
-
enumerator kINPUTMUX_GpioPort0Pin31ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin0ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin1ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin2ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin3ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin4ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin5ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin6ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin7ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin8ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin9ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin10ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin11ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin12ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin13ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin14ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin15ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin16ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin17ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin18ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin19ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin20ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin21ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin22ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin23ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin24ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin25ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin26ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin27ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin28ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin29ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin30ToPintsel
-
enumerator kINPUTMUX_GpioPort1Pin31ToPintsel
DMA ITRIG.
-
enumerator kINPUTMUX_Adc0SeqaIrqToDma
-
enumerator kINPUTMUX_Adc0SeqbIrqToDma
-
enumerator kINPUTMUX_Sct0DmaReq0ToDma
-
enumerator kINPUTMUX_Sct0DmaReq1ToDma
-
enumerator kINPUTMUX_PinInt0ToDma
-
enumerator kINPUTMUX_PinInt1ToDma
-
enumerator kINPUTMUX_PinInt2ToDma
-
enumerator kINPUTMUX_PinInt3ToDma
-
enumerator kINPUTMUX_Ctimer0M0ToDma
-
enumerator kINPUTMUX_Ctimer0M1ToDma
-
enumerator kINPUTMUX_Ctimer1M0ToDma
-
enumerator kINPUTMUX_Ctimer1M1ToDma
-
enumerator kINPUTMUX_Ctimer2M0ToDma
-
enumerator kINPUTMUX_Ctimer2M1ToDma
-
enumerator kINPUTMUX_Ctimer3M0ToDma
-
enumerator kINPUTMUX_Ctimer3M1ToDma
-
enumerator kINPUTMUX_Ctimer4M0ToDma
-
enumerator kINPUTMUX_Ctimer4M1ToDma
-
enumerator kINPUTMUX_Otrig0ToDma
-
enumerator kINPUTMUX_Otrig1ToDma
-
enumerator kINPUTMUX_Otrig2ToDma
-
enumerator kINPUTMUX_Otrig3ToDma
-
enumerator AES256_INPUT_DMA_REQ
-
enumerator AES256_OUTPUT_DMA_REQ
DMA OTRIG.
-
enumerator kINPUTMUX_DmaFlexcomm0RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm0TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm1RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm1TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm2RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm2TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm3RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm3TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm4RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm4TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm5RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm5TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm6RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm6TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm7RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm7TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaDmic0Ch0TrigoutToTriginChannels
-
enumerator kINPUTMUX_Dmamic0Ch1TrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaSpifi0TrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaSha_TrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm8RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm8TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm9RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm9TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaSmartcard0RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaSmartcard0TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaSmartcard1RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaSmartcard1TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm10RxTrigoutToTriginChannels
-
enumerator kINPUTMUX_DmaFlexcomm10TxTrigoutToTriginChannels
-
enumerator kINPUTMUX_SctGpi0ToSct0
-
typedef enum _inputmux_connection_t inputmux_connection_t
INPUTMUX connections type.
-
SCT0_PMUX_ID
Periphinmux IDs.
-
PINTSEL_PMUX_ID
-
DMA_TRIG0_PMUX_ID
-
DMA_OTRIG_PMUX_ID
-
FREQMEAS_PMUX_ID
-
PMUX_SHIFT
-
FSL_INPUTMUX_DRIVER_VERSION
Group interrupt driver version for SDK.
-
void INPUTMUX_Init(INPUTMUX_Type *base)
Initialize INPUTMUX peripheral.
This function enables the INPUTMUX clock.
- Parameters:
base – Base address of the INPUTMUX peripheral.
- Return values:
None. –
-
void INPUTMUX_AttachSignal(INPUTMUX_Type *base, uint16_t index, inputmux_connection_t connection)
Attaches a signal.
This function attaches multiplexed signals from INPUTMUX to target signals. For example, to attach GPIO PORT0 Pin 5 to PINT peripheral, do the following:
In this example, INTMUX has 8 registers for PINT, PINT_SEL0~PINT_SEL7. With parameterINPUTMUX_AttachSignal(INPUTMUX, 2, kINPUTMUX_GpioPort0Pin5ToPintsel);
index
specified as 2, this function configures register PINT_SEL2.- Parameters:
base – Base address of the INPUTMUX peripheral.
index – The serial number of destination register in the group of INPUTMUX registers with same name.
connection – Applies signal from source signals collection to target signal.
- Return values:
None. –
-
void INPUTMUX_Deinit(INPUTMUX_Type *base)
Deinitialize INPUTMUX peripheral.
This function disables the INPUTMUX clock.
- Parameters:
base – Base address of the INPUTMUX peripheral.
- Return values:
None. –
Common Driver
-
FSL_COMMON_DRIVER_VERSION
common driver version.
-
DEBUG_CONSOLE_DEVICE_TYPE_NONE
No debug console.
-
DEBUG_CONSOLE_DEVICE_TYPE_UART
Debug console based on UART.
-
DEBUG_CONSOLE_DEVICE_TYPE_LPUART
Debug console based on LPUART.
-
DEBUG_CONSOLE_DEVICE_TYPE_LPSCI
Debug console based on LPSCI.
-
DEBUG_CONSOLE_DEVICE_TYPE_USBCDC
Debug console based on USBCDC.
-
DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM
Debug console based on FLEXCOMM.
-
DEBUG_CONSOLE_DEVICE_TYPE_IUART
Debug console based on i.MX UART.
-
DEBUG_CONSOLE_DEVICE_TYPE_VUSART
Debug console based on LPC_VUSART.
-
DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART
Debug console based on LPC_USART.
-
DEBUG_CONSOLE_DEVICE_TYPE_SWO
Debug console based on SWO.
-
DEBUG_CONSOLE_DEVICE_TYPE_QSCI
Debug console based on QSCI.
-
MIN(a, b)
Computes the minimum of a and b.
-
MAX(a, b)
Computes the maximum of a and b.
-
UINT16_MAX
Max value of uint16_t type.
-
UINT32_MAX
Max value of uint32_t type.
-
SDK_ATOMIC_LOCAL_ADD(addr, val)
Add value val from the variable at address address.
-
SDK_ATOMIC_LOCAL_SUB(addr, val)
Subtract value val to the variable at address address.
-
SDK_ATOMIC_LOCAL_SET(addr, bits)
Set the bits specifiled by bits to the variable at address address.
-
SDK_ATOMIC_LOCAL_CLEAR(addr, bits)
Clear the bits specifiled by bits to the variable at address address.
-
SDK_ATOMIC_LOCAL_TOGGLE(addr, bits)
Toggle the bits specifiled by bits to the variable at address address.
-
SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits)
For the variable at address address, clear the bits specifiled by clearBits and set the bits specifiled by setBits.
-
SDK_ATOMIC_LOCAL_COMPARE_AND_SET(addr, expected, newValue)
For the variable at address address, check whether the value equal to expected. If value same as expected then update newValue to address and return true , else return false .
-
SDK_ATOMIC_LOCAL_TEST_AND_SET(addr, newValue)
For the variable at address address, set as newValue value and return old value.
-
USEC_TO_COUNT(us, clockFreqInHz)
Macro to convert a microsecond period to raw count value
-
COUNT_TO_USEC(count, clockFreqInHz)
Macro to convert a raw count value to microsecond
-
MSEC_TO_COUNT(ms, clockFreqInHz)
Macro to convert a millisecond period to raw count value
-
COUNT_TO_MSEC(count, clockFreqInHz)
Macro to convert a raw count value to millisecond
-
SDK_ISR_EXIT_BARRIER
-
SDK_SIZEALIGN(var, alignbytes)
Macro to define a variable with L1 d-cache line size alignment
Macro to define a variable with L2 cache line size alignment
Macro to change a value to a given size aligned value
-
AT_NONCACHEABLE_SECTION(var)
Define a variable var, and place it in non-cacheable section.
-
AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes)
Define a variable var, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.
-
AT_NONCACHEABLE_SECTION_INIT(var)
Define a variable var with initial value, and place it in non-cacheable section.
-
AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes)
Define a variable var with initial value, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.
-
enum _status_groups
Status group numbers.
Values:
-
enumerator kStatusGroup_Generic
Group number for generic status codes.
-
enumerator kStatusGroup_FLASH
Group number for FLASH status codes.
-
enumerator kStatusGroup_LPSPI
Group number for LPSPI status codes.
-
enumerator kStatusGroup_FLEXIO_SPI
Group number for FLEXIO SPI status codes.
-
enumerator kStatusGroup_DSPI
Group number for DSPI status codes.
-
enumerator kStatusGroup_FLEXIO_UART
Group number for FLEXIO UART status codes.
-
enumerator kStatusGroup_FLEXIO_I2C
Group number for FLEXIO I2C status codes.
-
enumerator kStatusGroup_LPI2C
Group number for LPI2C status codes.
-
enumerator kStatusGroup_UART
Group number for UART status codes.
-
enumerator kStatusGroup_I2C
Group number for UART status codes.
-
enumerator kStatusGroup_LPSCI
Group number for LPSCI status codes.
-
enumerator kStatusGroup_LPUART
Group number for LPUART status codes.
-
enumerator kStatusGroup_SPI
Group number for SPI status code.
-
enumerator kStatusGroup_XRDC
Group number for XRDC status code.
-
enumerator kStatusGroup_SEMA42
Group number for SEMA42 status code.
-
enumerator kStatusGroup_SDHC
Group number for SDHC status code
-
enumerator kStatusGroup_SDMMC
Group number for SDMMC status code
-
enumerator kStatusGroup_SAI
Group number for SAI status code
-
enumerator kStatusGroup_MCG
Group number for MCG status codes.
-
enumerator kStatusGroup_SCG
Group number for SCG status codes.
-
enumerator kStatusGroup_SDSPI
Group number for SDSPI status codes.
-
enumerator kStatusGroup_FLEXIO_I2S
Group number for FLEXIO I2S status codes
-
enumerator kStatusGroup_FLEXIO_MCULCD
Group number for FLEXIO LCD status codes
-
enumerator kStatusGroup_FLASHIAP
Group number for FLASHIAP status codes
-
enumerator kStatusGroup_FLEXCOMM_I2C
Group number for FLEXCOMM I2C status codes
-
enumerator kStatusGroup_I2S
Group number for I2S status codes
-
enumerator kStatusGroup_IUART
Group number for IUART status codes
-
enumerator kStatusGroup_CSI
Group number for CSI status codes
-
enumerator kStatusGroup_MIPI_DSI
Group number for MIPI DSI status codes
-
enumerator kStatusGroup_SDRAMC
Group number for SDRAMC status codes.
-
enumerator kStatusGroup_POWER
Group number for POWER status codes.
-
enumerator kStatusGroup_ENET
Group number for ENET status codes.
-
enumerator kStatusGroup_PHY
Group number for PHY status codes.
-
enumerator kStatusGroup_TRGMUX
Group number for TRGMUX status codes.
-
enumerator kStatusGroup_SMARTCARD
Group number for SMARTCARD status codes.
-
enumerator kStatusGroup_LMEM
Group number for LMEM status codes.
-
enumerator kStatusGroup_QSPI
Group number for QSPI status codes.
-
enumerator kStatusGroup_DMA
Group number for DMA status codes.
-
enumerator kStatusGroup_EDMA
Group number for EDMA status codes.
-
enumerator kStatusGroup_DMAMGR
Group number for DMAMGR status codes.
-
enumerator kStatusGroup_FLEXCAN
Group number for FlexCAN status codes.
-
enumerator kStatusGroup_LTC
Group number for LTC status codes.
-
enumerator kStatusGroup_FLEXIO_CAMERA
Group number for FLEXIO CAMERA status codes.
-
enumerator kStatusGroup_LPC_SPI
Group number for LPC_SPI status codes.
-
enumerator kStatusGroup_LPC_USART
Group number for LPC_USART status codes.
-
enumerator kStatusGroup_DMIC
Group number for DMIC status codes.
-
enumerator kStatusGroup_SDIF
Group number for SDIF status codes.
-
enumerator kStatusGroup_SPIFI
Group number for SPIFI status codes.
-
enumerator kStatusGroup_OTP
Group number for OTP status codes.
-
enumerator kStatusGroup_MCAN
Group number for MCAN status codes.
-
enumerator kStatusGroup_CAAM
Group number for CAAM status codes.
-
enumerator kStatusGroup_ECSPI
Group number for ECSPI status codes.
-
enumerator kStatusGroup_USDHC
Group number for USDHC status codes.
-
enumerator kStatusGroup_LPC_I2C
Group number for LPC_I2C status codes.
-
enumerator kStatusGroup_DCP
Group number for DCP status codes.
-
enumerator kStatusGroup_MSCAN
Group number for MSCAN status codes.
-
enumerator kStatusGroup_ESAI
Group number for ESAI status codes.
-
enumerator kStatusGroup_FLEXSPI
Group number for FLEXSPI status codes.
-
enumerator kStatusGroup_MMDC
Group number for MMDC status codes.
-
enumerator kStatusGroup_PDM
Group number for MIC status codes.
-
enumerator kStatusGroup_SDMA
Group number for SDMA status codes.
-
enumerator kStatusGroup_ICS
Group number for ICS status codes.
-
enumerator kStatusGroup_SPDIF
Group number for SPDIF status codes.
-
enumerator kStatusGroup_LPC_MINISPI
Group number for LPC_MINISPI status codes.
-
enumerator kStatusGroup_HASHCRYPT
Group number for Hashcrypt status codes
-
enumerator kStatusGroup_LPC_SPI_SSP
Group number for LPC_SPI_SSP status codes.
-
enumerator kStatusGroup_I3C
Group number for I3C status codes
-
enumerator kStatusGroup_LPC_I2C_1
Group number for LPC_I2C_1 status codes.
-
enumerator kStatusGroup_NOTIFIER
Group number for NOTIFIER status codes.
-
enumerator kStatusGroup_DebugConsole
Group number for debug console status codes.
-
enumerator kStatusGroup_SEMC
Group number for SEMC status codes.
-
enumerator kStatusGroup_ApplicationRangeStart
Starting number for application groups.
-
enumerator kStatusGroup_IAP
Group number for IAP status codes
-
enumerator kStatusGroup_SFA
Group number for SFA status codes
-
enumerator kStatusGroup_SPC
Group number for SPC status codes.
-
enumerator kStatusGroup_PUF
Group number for PUF status codes.
-
enumerator kStatusGroup_TOUCH_PANEL
Group number for touch panel status codes
-
enumerator kStatusGroup_VBAT
Group number for VBAT status codes
-
enumerator kStatusGroup_XSPI
Group number for XSPI status codes
-
enumerator kStatusGroup_PNGDEC
Group number for PNGDEC status codes
-
enumerator kStatusGroup_JPEGDEC
Group number for JPEGDEC status codes
-
enumerator kStatusGroup_HAL_GPIO
Group number for HAL GPIO status codes.
-
enumerator kStatusGroup_HAL_UART
Group number for HAL UART status codes.
-
enumerator kStatusGroup_HAL_TIMER
Group number for HAL TIMER status codes.
-
enumerator kStatusGroup_HAL_SPI
Group number for HAL SPI status codes.
-
enumerator kStatusGroup_HAL_I2C
Group number for HAL I2C status codes.
-
enumerator kStatusGroup_HAL_FLASH
Group number for HAL FLASH status codes.
-
enumerator kStatusGroup_HAL_PWM
Group number for HAL PWM status codes.
-
enumerator kStatusGroup_HAL_RNG
Group number for HAL RNG status codes.
-
enumerator kStatusGroup_HAL_I2S
Group number for HAL I2S status codes.
-
enumerator kStatusGroup_HAL_ADC_SENSOR
Group number for HAL ADC SENSOR status codes.
-
enumerator kStatusGroup_TIMERMANAGER
Group number for TiMER MANAGER status codes.
-
enumerator kStatusGroup_SERIALMANAGER
Group number for SERIAL MANAGER status codes.
-
enumerator kStatusGroup_LED
Group number for LED status codes.
-
enumerator kStatusGroup_BUTTON
Group number for BUTTON status codes.
-
enumerator kStatusGroup_EXTERN_EEPROM
Group number for EXTERN EEPROM status codes.
-
enumerator kStatusGroup_SHELL
Group number for SHELL status codes.
-
enumerator kStatusGroup_MEM_MANAGER
Group number for MEM MANAGER status codes.
-
enumerator kStatusGroup_LIST
Group number for List status codes.
-
enumerator kStatusGroup_OSA
Group number for OSA status codes.
-
enumerator kStatusGroup_COMMON_TASK
Group number for Common task status codes.
-
enumerator kStatusGroup_MSG
Group number for messaging status codes.
-
enumerator kStatusGroup_SDK_OCOTP
Group number for OCOTP status codes.
-
enumerator kStatusGroup_SDK_FLEXSPINOR
Group number for FLEXSPINOR status codes.
-
enumerator kStatusGroup_CODEC
Group number for codec status codes.
-
enumerator kStatusGroup_ASRC
Group number for codec status ASRC.
-
enumerator kStatusGroup_OTFAD
Group number for codec status codes.
-
enumerator kStatusGroup_SDIOSLV
Group number for SDIOSLV status codes.
-
enumerator kStatusGroup_MECC
Group number for MECC status codes.
-
enumerator kStatusGroup_ENET_QOS
Group number for ENET_QOS status codes.
-
enumerator kStatusGroup_LOG
Group number for LOG status codes.
-
enumerator kStatusGroup_I3CBUS
Group number for I3CBUS status codes.
-
enumerator kStatusGroup_QSCI
Group number for QSCI status codes.
-
enumerator kStatusGroup_ELEMU
Group number for ELEMU status codes.
-
enumerator kStatusGroup_QUEUEDSPI
Group number for QSPI status codes.
-
enumerator kStatusGroup_POWER_MANAGER
Group number for POWER_MANAGER status codes.
-
enumerator kStatusGroup_IPED
Group number for IPED status codes.
-
enumerator kStatusGroup_ELS_PKC
Group number for ELS PKC status codes.
-
enumerator kStatusGroup_CSS_PKC
Group number for CSS PKC status codes.
-
enumerator kStatusGroup_HOSTIF
Group number for HOSTIF status codes.
-
enumerator kStatusGroup_CLIF
Group number for CLIF status codes.
-
enumerator kStatusGroup_BMA
Group number for BMA status codes.
-
enumerator kStatusGroup_NETC
Group number for NETC status codes.
-
enumerator kStatusGroup_ELE
Group number for ELE status codes.
-
enumerator kStatusGroup_GLIKEY
Group number for GLIKEY status codes.
-
enumerator kStatusGroup_AON_POWER
Group number for AON_POWER status codes.
-
enumerator kStatusGroup_AON_COMMON
Group number for AON_COMMON status codes.
-
enumerator kStatusGroup_ENDAT3
Group number for ENDAT3 status codes.
-
enumerator kStatusGroup_HIPERFACE
Group number for HIPERFACE status codes.
-
enumerator kStatusGroup_Generic
Generic status return codes.
Values:
-
enumerator kStatus_Success
Generic status for Success.
-
enumerator kStatus_Fail
Generic status for Fail.
-
enumerator kStatus_ReadOnly
Generic status for read only failure.
-
enumerator kStatus_OutOfRange
Generic status for out of range access.
-
enumerator kStatus_InvalidArgument
Generic status for invalid argument check.
-
enumerator kStatus_Timeout
Generic status for timeout.
-
enumerator kStatus_NoTransferInProgress
Generic status for no transfer in progress.
-
enumerator kStatus_Busy
Generic status for module is busy.
-
enumerator kStatus_NoData
Generic status for no data is found for the operation.
-
enumerator kStatus_Success
-
typedef int32_t status_t
Type used for all status and error return values.
-
void *SDK_Malloc(size_t size, size_t alignbytes)
Allocate memory with given alignment and aligned size.
This is provided to support the dynamically allocated memory used in cache-able region.
- Parameters:
size – The length required to malloc.
alignbytes – The alignment size.
- Return values:
The – allocated memory.
-
void SDK_Free(void *ptr)
Free memory.
- Parameters:
ptr – The memory to be release.
-
void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)
Delay at least for some time. Please note that, this API uses while loop for delay, different run-time environments make the time not precise, if precise delay count was needed, please implement a new delay function with hardware timer.
- Parameters:
delayTime_us – Delay time in unit of microsecond.
coreClock_Hz – Core clock frequency with Hz.
-
static inline status_t EnableIRQ(IRQn_Type interrupt)
Enable specific interrupt.
Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
- Parameters:
interrupt – The IRQ number.
- Return values:
kStatus_Success – Interrupt enabled successfully
kStatus_Fail – Failed to enable the interrupt
-
static inline status_t DisableIRQ(IRQn_Type interrupt)
Disable specific interrupt.
Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
- Parameters:
interrupt – The IRQ number.
- Return values:
kStatus_Success – Interrupt disabled successfully
kStatus_Fail – Failed to disable the interrupt
-
static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)
Enable the IRQ, and also set the interrupt priority.
Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
- Parameters:
interrupt – The IRQ to Enable.
priNum – Priority number set to interrupt controller register.
- Return values:
kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.
-
static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)
Set the IRQ priority.
Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
- Parameters:
interrupt – The IRQ to set.
priNum – Priority number set to interrupt controller register.
- Return values:
kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.
-
static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)
Clear the pending IRQ flag.
Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.
- Parameters:
interrupt – The flag which IRQ to clear.
- Return values:
kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.
-
static inline uint32_t DisableGlobalIRQ(void)
Disable the global IRQ.
Disable the global interrupt and return the current primask register. User is required to provided the primask register for the EnableGlobalIRQ().
- Returns:
Current primask value.
-
static inline void EnableGlobalIRQ(uint32_t primask)
Enable the global IRQ.
Set the primask register with the provided primask value but not just enable the primask. The idea is for the convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.
- Parameters:
primask – value of primask register to be restored. The primask value is supposed to be provided by the DisableGlobalIRQ().
-
void EnableDeepSleepIRQ(IRQn_Type interrupt)
Enable specific interrupt for wake-up from deep-sleep mode.
Enable the interrupt for wake-up from deep sleep mode. Some interrupts are typically used in sleep mode only and will not occur during deep-sleep mode because relevant clocks are stopped. However, it is possible to enable those clocks (significantly increasing power consumption in the reduced power mode), making these wake-ups possible.
Note
This function also enables the interrupt in the NVIC (EnableIRQ() is called internaly).
- Parameters:
interrupt – The IRQ number.
-
void DisableDeepSleepIRQ(IRQn_Type interrupt)
Disable specific interrupt for wake-up from deep-sleep mode.
Disable the interrupt for wake-up from deep sleep mode. Some interrupts are typically used in sleep mode only and will not occur during deep-sleep mode because relevant clocks are stopped. However, it is possible to enable those clocks (significantly increasing power consumption in the reduced power mode), making these wake-ups possible.
Note
This function also disables the interrupt in the NVIC (DisableIRQ() is called internaly).
- Parameters:
interrupt – The IRQ number.
-
static inline bool _SDK_AtomicLocalCompareAndSet(uint32_t *addr, uint32_t expected, uint32_t newValue)
-
static inline uint32_t _SDK_AtomicTestAndSet(uint32_t *addr, uint32_t newValue)
-
FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ
Macro to use the default weak IRQ handler in drivers.
-
MAKE_STATUS(group, code)
Construct a status code value from a group and code number.
-
MAKE_VERSION(major, minor, bugfix)
Construct the version number for drivers.
The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M) and 16-bit platforms(such as DSC).
| Unused || Major Version || Minor Version || Bug Fix | 31 25 24 17 16 9 8 0
-
ARRAY_SIZE(x)
Computes the number of elements in an array.
-
UINT64_H(X)
Macro to get upper 32 bits of a 64-bit value
-
UINT64_L(X)
Macro to get lower 32 bits of a 64-bit value
-
SUPPRESS_FALL_THROUGH_WARNING()
For switch case code block, if case section ends without “break;” statement, there wil be fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc. To suppress this warning, “SUPPRESS_FALL_THROUGH_WARNING();” need to be added at the end of each case section which misses “break;”statement.
-
MSDK_REG_SECURE_ADDR(x)
Convert the register address to the one used in secure mode.
-
MSDK_REG_NONSECURE_ADDR(x)
Convert the register address to the one used in non-secure mode.
ADC: 12-bit SAR Analog-to-Digital Converter Driver
-
void ADC_Init(ADC_Type *base, const adc_config_t *config)
Initialize the ADC module.
- Parameters:
base – ADC peripheral base address.
config – Pointer to configuration structure, see to adc_config_t.
-
void ADC_Deinit(ADC_Type *base)
Deinitialize the ADC module.
- Parameters:
base – ADC peripheral base address.
-
void ADC_GetDefaultConfig(adc_config_t *config)
Gets an available pre-defined settings for initial configuration.
This function initializes the initial configuration structure with an available settings. The default values are:
config->clockMode = kADC_ClockSynchronousMode; config->clockDividerNumber = 0U; config->resolution = kADC_Resolution12bit; config->enableBypassCalibration = false; config->sampleTimeNumber = 0U; config->extendSampleTimeNumber = kADC_ExtendSampleTimeNotUsed;
- Parameters:
config – Pointer to configuration structure.
-
bool ADC_DoSelfCalibration(ADC_Type *base)
Do the hardware self-calibration.
- Deprecated:
Do not use this function. It has been superceded by ADC_DoOffsetCalibration.
To calibrate the ADC, set the ADC clock to 500 kHz. In order to achieve the specified ADC accuracy, the A/D converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.
- Parameters:
base – ADC peripheral base address.
- Return values:
true – Calibration succeed.
false – Calibration failed.
-
bool ADC_DoOffsetCalibration(ADC_Type *base, uint32_t frequency)
Do the hardware offset-calibration.
To calibrate the ADC, set the ADC clock to no more then 30 MHz. In order to achieve the specified ADC accuracy, the A/D converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.
- Parameters:
base – ADC peripheral base address.
frequency – The clock frequency that ADC operates at.
- Return values:
true – Calibration succeed.
false – Calibration failed.
-
static inline void ADC_EnableConvSeqA(ADC_Type *base, bool enable)
Enable the conversion sequence A.
In order to avoid spuriously triggering the sequence, the trigger to conversion sequence should be ready before the sequence is ready. when the sequence is disabled, the trigger would be ignored. Also, it is suggested to disable the sequence during changing the sequence’s setting.
- Parameters:
base – ADC peripheral base address.
enable – Switcher to enable the feature or not.
-
void ADC_SetConvSeqAConfig(ADC_Type *base, const adc_conv_seq_config_t *config)
Configure the conversion sequence A.
- Parameters:
base – ADC peripheral base address.
config – Pointer to configuration structure, see to adc_conv_seq_config_t.
-
static inline void ADC_DoSoftwareTriggerConvSeqA(ADC_Type *base)
Do trigger the sequence’s conversion by software.
- Parameters:
base – ADC peripheral base address.
-
static inline void ADC_EnableConvSeqABurstMode(ADC_Type *base, bool enable)
Enable the burst conversion of sequence A.
Enable the burst mode would cause the conversion sequence to be cntinuously cycled through. Other triggers would be ignored while this mode is enabled. Repeated conversions could be halted by disabling this mode. And the sequence currently in process will be completed before cnversions are terminated. Note that a new sequence could begin just before the burst mode is disabled.
- Parameters:
base – ADC peripheral base address.
enable – Switcher to enable this feature.
-
static inline void ADC_SetConvSeqAHighPriority(ADC_Type *base)
Set the high priority for conversion sequence A.
- Parameters:
base – ADC peripheral bass address.
-
static inline void ADC_EnableConvSeqB(ADC_Type *base, bool enable)
Enable the conversion sequence B.
In order to avoid spuriously triggering the sequence, the trigger to conversion sequence should be ready before the sequence is ready. when the sequence is disabled, the trigger would be ignored. Also, it is suggested to disable the sequence during changing the sequence’s setting.
- Parameters:
base – ADC peripheral base address.
enable – Switcher to enable the feature or not.
-
void ADC_SetConvSeqBConfig(ADC_Type *base, const adc_conv_seq_config_t *config)
Configure the conversion sequence B.
- Parameters:
base – ADC peripheral base address.
config – Pointer to configuration structure, see to adc_conv_seq_config_t.
-
static inline void ADC_DoSoftwareTriggerConvSeqB(ADC_Type *base)
Do trigger the sequence’s conversion by software.
- Parameters:
base – ADC peripheral base address.
-
static inline void ADC_EnableConvSeqBBurstMode(ADC_Type *base, bool enable)
Enable the burst conversion of sequence B.
Enable the burst mode would cause the conversion sequence to be continuously cycled through. Other triggers would be ignored while this mode is enabled. Repeated conversions could be halted by disabling this mode. And the sequence currently in process will be completed before cnversions are terminated. Note that a new sequence could begin just before the burst mode is disabled.
- Parameters:
base – ADC peripheral base address.
enable – Switcher to enable this feature.
-
static inline void ADC_SetConvSeqBHighPriority(ADC_Type *base)
Set the high priority for conversion sequence B.
- Parameters:
base – ADC peripheral bass address.
-
bool ADC_GetConvSeqAGlobalConversionResult(ADC_Type *base, adc_result_info_t *info)
Get the global ADC conversion infomation of sequence A.
- Parameters:
base – ADC peripheral base address.
info – Pointer to information structure, see to adc_result_info_t;
- Return values:
true – The conversion result is ready.
false – The conversion result is not ready yet.
-
bool ADC_GetConvSeqBGlobalConversionResult(ADC_Type *base, adc_result_info_t *info)
Get the global ADC conversion infomation of sequence B.
- Parameters:
base – ADC peripheral base address.
info – Pointer to information structure, see to adc_result_info_t;
- Return values:
true – The conversion result is ready.
false – The conversion result is not ready yet.
-
bool ADC_GetChannelConversionResult(ADC_Type *base, uint32_t channel, adc_result_info_t *info)
Get the channel’s ADC conversion completed under each conversion sequence.
- Parameters:
base – ADC peripheral base address.
channel – The indicated channel number.
info – Pointer to information structure, see to adc_result_info_t;
- Return values:
true – The conversion result is ready.
false – The conversion result is not ready yet.
-
static inline void ADC_SetThresholdPair0(ADC_Type *base, uint32_t lowValue, uint32_t highValue)
Set the threshhold pair 0 with low and high value.
- Parameters:
base – ADC peripheral base address.
lowValue – LOW threshold value.
highValue – HIGH threshold value.
-
static inline void ADC_SetThresholdPair1(ADC_Type *base, uint32_t lowValue, uint32_t highValue)
Set the threshhold pair 1 with low and high value.
- Parameters:
base – ADC peripheral base address.
lowValue – LOW threshold value. The available value is with 12-bit.
highValue – HIGH threshold value. The available value is with 12-bit.
-
static inline void ADC_SetChannelWithThresholdPair0(ADC_Type *base, uint32_t channelMask)
Set given channels to apply the threshold pare 0.
- Parameters:
base – ADC peripheral base address.
channelMask – Indicated channels’ mask.
-
static inline void ADC_SetChannelWithThresholdPair1(ADC_Type *base, uint32_t channelMask)
Set given channels to apply the threshold pare 1.
- Parameters:
base – ADC peripheral base address.
channelMask – Indicated channels’ mask.
-
static inline void ADC_EnableInterrupts(ADC_Type *base, uint32_t mask)
Enable interrupts for conversion sequences.
- Parameters:
base – ADC peripheral base address.
mask – Mask of interrupt mask value for global block except each channal, see to _adc_interrupt_enable.
-
static inline void ADC_DisableInterrupts(ADC_Type *base, uint32_t mask)
Disable interrupts for conversion sequence.
- Parameters:
base – ADC peripheral base address.
mask – Mask of interrupt mask value for global block except each channel, see to _adc_interrupt_enable.
-
static inline void ADC_EnableThresholdCompareInterrupt(ADC_Type *base, uint32_t channel, adc_threshold_interrupt_mode_t mode)
Enable the interrupt of threshold compare event for each channel.
- Parameters:
base – ADC peripheral base address.
channel – Channel number.
mode – Interrupt mode for threshold compare event, see to adc_threshold_interrupt_mode_t.
-
static inline uint32_t ADC_GetStatusFlags(ADC_Type *base)
Get status flags of ADC module.
- Parameters:
base – ADC peripheral base address.
- Returns:
Mask of status flags of module, see to _adc_status_flags.
-
static inline void ADC_ClearStatusFlags(ADC_Type *base, uint32_t mask)
Clear status flags of ADC module.
- Parameters:
base – ADC peripheral base address.
mask – Mask of status flags of module, see to _adc_status_flags.
-
FSL_ADC_DRIVER_VERSION
ADC driver version 2.6.0.
-
enum _adc_status_flags
Flags.
Values:
-
enumerator kADC_ThresholdCompareFlagOnChn0
Threshold comparison event on Channel 0.
-
enumerator kADC_ThresholdCompareFlagOnChn1
Threshold comparison event on Channel 1.
-
enumerator kADC_ThresholdCompareFlagOnChn2
Threshold comparison event on Channel 2.
-
enumerator kADC_ThresholdCompareFlagOnChn3
Threshold comparison event on Channel 3.
-
enumerator kADC_ThresholdCompareFlagOnChn4
Threshold comparison event on Channel 4.
-
enumerator kADC_ThresholdCompareFlagOnChn5
Threshold comparison event on Channel 5.
-
enumerator kADC_ThresholdCompareFlagOnChn6
Threshold comparison event on Channel 6.
-
enumerator kADC_ThresholdCompareFlagOnChn7
Threshold comparison event on Channel 7.
-
enumerator kADC_ThresholdCompareFlagOnChn8
Threshold comparison event on Channel 8.
-
enumerator kADC_ThresholdCompareFlagOnChn9
Threshold comparison event on Channel 9.
-
enumerator kADC_ThresholdCompareFlagOnChn10
Threshold comparison event on Channel 10.
-
enumerator kADC_ThresholdCompareFlagOnChn11
Threshold comparison event on Channel 11.
-
enumerator kADC_OverrunFlagForChn0
Mirror the OVERRUN status flag from the result register for ADC channel 0.
-
enumerator kADC_OverrunFlagForChn1
Mirror the OVERRUN status flag from the result register for ADC channel 1.
-
enumerator kADC_OverrunFlagForChn2
Mirror the OVERRUN status flag from the result register for ADC channel 2.
-
enumerator kADC_OverrunFlagForChn3
Mirror the OVERRUN status flag from the result register for ADC channel 3.
-
enumerator kADC_OverrunFlagForChn4
Mirror the OVERRUN status flag from the result register for ADC channel 4.
-
enumerator kADC_OverrunFlagForChn5
Mirror the OVERRUN status flag from the result register for ADC channel 5.
-
enumerator kADC_OverrunFlagForChn6
Mirror the OVERRUN status flag from the result register for ADC channel 6.
-
enumerator kADC_OverrunFlagForChn7
Mirror the OVERRUN status flag from the result register for ADC channel 7.
-
enumerator kADC_OverrunFlagForChn8
Mirror the OVERRUN status flag from the result register for ADC channel 8.
-
enumerator kADC_OverrunFlagForChn9
Mirror the OVERRUN status flag from the result register for ADC channel 9.
-
enumerator kADC_OverrunFlagForChn10
Mirror the OVERRUN status flag from the result register for ADC channel 10.
-
enumerator kADC_OverrunFlagForChn11
Mirror the OVERRUN status flag from the result register for ADC channel 11.
-
enumerator kADC_GlobalOverrunFlagForSeqA
Mirror the glabal OVERRUN status flag for conversion sequence A.
-
enumerator kADC_GlobalOverrunFlagForSeqB
Mirror the global OVERRUN status flag for conversion sequence B.
-
enumerator kADC_ConvSeqAInterruptFlag
Sequence A interrupt/DMA trigger.
-
enumerator kADC_ConvSeqBInterruptFlag
Sequence B interrupt/DMA trigger.
-
enumerator kADC_ThresholdCompareInterruptFlag
Threshold comparision interrupt flag.
-
enumerator kADC_OverrunInterruptFlag
Overrun interrupt flag.
-
enumerator kADC_ThresholdCompareFlagOnChn0
-
enum _adc_interrupt_enable
Interrupts.
Note
Not all the interrupt options are listed here
Values:
-
enumerator kADC_ConvSeqAInterruptEnable
Enable interrupt upon completion of each individual conversion in sequence A, or entire sequence.
-
enumerator kADC_ConvSeqBInterruptEnable
Enable interrupt upon completion of each individual conversion in sequence B, or entire sequence.
-
enumerator kADC_OverrunInterruptEnable
Enable the detection of an overrun condition on any of the channel data registers will cause an overrun interrupt/DMA trigger.
-
enumerator kADC_ConvSeqAInterruptEnable
-
enum _adc_clock_mode
Define selection of clock mode.
Values:
-
enumerator kADC_ClockSynchronousMode
The ADC clock would be derived from the system clock based on “clockDividerNumber”.
-
enumerator kADC_ClockAsynchronousMode
The ADC clock would be based on the SYSCON block’s divider.
-
enumerator kADC_ClockSynchronousMode
-
enum _adc_resolution
Define selection of resolution.
Values:
-
enumerator kADC_Resolution6bit
6-bit resolution.
-
enumerator kADC_Resolution8bit
8-bit resolution.
-
enumerator kADC_Resolution10bit
10-bit resolution.
-
enumerator kADC_Resolution12bit
12-bit resolution.
-
enumerator kADC_Resolution6bit
-
enum _adc_voltage_range
Definfe range of the analog supply voltage VDDA.
Values:
-
enumerator kADC_HighVoltageRange
-
enumerator kADC_LowVoltageRange
-
enumerator kADC_HighVoltageRange
-
enum _adc_trigger_polarity
Define selection of polarity of selected input trigger for conversion sequence.
Values:
-
enumerator kADC_TriggerPolarityNegativeEdge
A negative edge launches the conversion sequence on the trigger(s).
-
enumerator kADC_TriggerPolarityPositiveEdge
A positive edge launches the conversion sequence on the trigger(s).
-
enumerator kADC_TriggerPolarityNegativeEdge
-
enum _adc_priority
Define selection of conversion sequence’s priority.
Values:
-
enumerator kADC_PriorityLow
This sequence would be preempted when another sequence is started.
-
enumerator kADC_PriorityHigh
This sequence would preempt other sequence even when it is started.
-
enumerator kADC_PriorityLow
-
enum _adc_seq_interrupt_mode
Define selection of conversion sequence’s interrupt.
Values:
-
enumerator kADC_InterruptForEachConversion
The sequence interrupt/DMA trigger will be set at the end of each individual ADC conversion inside this conversion sequence.
-
enumerator kADC_InterruptForEachSequence
The sequence interrupt/DMA trigger will be set when the entire set of this sequence conversions completes.
-
enumerator kADC_InterruptForEachConversion
-
enum _adc_threshold_compare_status
Define status of threshold compare result.
Values:
-
enumerator kADC_ThresholdCompareInRange
LOW threshold <= conversion value <= HIGH threshold.
-
enumerator kADC_ThresholdCompareBelowRange
conversion value < LOW threshold.
-
enumerator kADC_ThresholdCompareAboveRange
conversion value > HIGH threshold.
-
enumerator kADC_ThresholdCompareInRange
-
enum _adc_threshold_crossing_status
Define status of threshold crossing detection result.
Values:
-
enumerator kADC_ThresholdCrossingNoDetected
No threshold Crossing detected.
-
enumerator kADC_ThresholdCrossingDownward
Downward Threshold Crossing detected.
-
enumerator kADC_ThresholdCrossingUpward
Upward Threshold Crossing Detected.
-
enumerator kADC_ThresholdCrossingNoDetected
-
enum _adc_threshold_interrupt_mode
Define interrupt mode for threshold compare event.
Values:
-
enumerator kADC_ThresholdInterruptDisabled
Threshold comparison interrupt is disabled.
-
enumerator kADC_ThresholdInterruptOnOutside
Threshold comparison interrupt is enabled on outside threshold.
-
enumerator kADC_ThresholdInterruptOnCrossing
Threshold comparison interrupt is enabled on crossing threshold.
-
enumerator kADC_ThresholdInterruptDisabled
-
enum _adc_inforesultshift
Define the info result mode of different resolution.
Values:
-
enumerator kADC_Resolution12bitInfoResultShift
Info result shift of Resolution12bit.
-
enumerator kADC_Resolution10bitInfoResultShift
Info result shift of Resolution10bit.
-
enumerator kADC_Resolution8bitInfoResultShift
Info result shift of Resolution8bit.
-
enumerator kADC_Resolution6bitInfoResultShift
Info result shift of Resolution6bit.
-
enumerator kADC_Resolution12bitInfoResultShift
-
enum _adc_tempsensor_common_mode
Define common modes for Temerature sensor.
Values:
-
enumerator kADC_HighNegativeOffsetAdded
Temperature sensor common mode: high negative offset added.
-
enumerator kADC_IntermediateNegativeOffsetAdded
Temperature sensor common mode: intermediate negative offset added.
-
enumerator kADC_NoOffsetAdded
Temperature sensor common mode: no offset added.
-
enumerator kADC_LowPositiveOffsetAdded
Temperature sensor common mode: low positive offset added.
-
enumerator kADC_HighNegativeOffsetAdded
-
enum _adc_second_control
Define source impedance modes for GPADC control.
Values:
-
enumerator kADC_Impedance621Ohm
Extand ADC sampling time according to source impedance 1: 0.621 kOhm.
-
enumerator kADC_Impedance55kOhm
Extand ADC sampling time according to source impedance 20 (default): 55 kOhm.
-
enumerator kADC_Impedance87kOhm
Extand ADC sampling time according to source impedance 31: 87 kOhm.
-
enumerator kADC_NormalFunctionalMode
TEST mode: Normal functional mode.
-
enumerator kADC_MultiplexeTestMode
TEST mode: Multiplexer test mode.
-
enumerator kADC_ADCInUnityGainMode
TEST mode: ADC in unity gain mode.
-
enumerator kADC_Impedance621Ohm
-
typedef enum _adc_clock_mode adc_clock_mode_t
Define selection of clock mode.
-
typedef enum _adc_resolution adc_resolution_t
Define selection of resolution.
-
typedef enum _adc_voltage_range adc_vdda_range_t
Definfe range of the analog supply voltage VDDA.
-
typedef enum _adc_trigger_polarity adc_trigger_polarity_t
Define selection of polarity of selected input trigger for conversion sequence.
-
typedef enum _adc_priority adc_priority_t
Define selection of conversion sequence’s priority.
-
typedef enum _adc_seq_interrupt_mode adc_seq_interrupt_mode_t
Define selection of conversion sequence’s interrupt.
-
typedef enum _adc_threshold_compare_status adc_threshold_compare_status_t
Define status of threshold compare result.
-
typedef enum _adc_threshold_crossing_status adc_threshold_crossing_status_t
Define status of threshold crossing detection result.
-
typedef enum _adc_threshold_interrupt_mode adc_threshold_interrupt_mode_t
Define interrupt mode for threshold compare event.
-
typedef enum _adc_inforesultshift adc_inforesult_t
Define the info result mode of different resolution.
-
typedef enum _adc_tempsensor_common_mode adc_tempsensor_common_mode_t
Define common modes for Temerature sensor.
-
typedef enum _adc_second_control adc_second_control_t
Define source impedance modes for GPADC control.
-
typedef struct _adc_config adc_config_t
Define structure for configuring the block.
-
typedef struct _adc_conv_seq_config adc_conv_seq_config_t
Define structure for configuring conversion sequence.
-
typedef struct _adc_result_info adc_result_info_t
Define structure of keeping conversion result information.
-
struct _adc_config
- #include <fsl_adc.h>
Define structure for configuring the block.
Public Members
-
adc_clock_mode_t clockMode
Select the clock mode for ADC converter.
-
uint32_t clockDividerNumber
This field is only available when using kADC_ClockSynchronousMode for “clockMode” field. The divider would be plused by 1 based on the value in this field. The available range is in 8 bits.
-
adc_resolution_t resolution
Select the conversion bits.
-
bool enableBypassCalibration
By default, a calibration cycle must be performed each time the chip is powered-up. Re-calibration may be warranted periodically - especially if operating conditions have changed. To enable this option would avoid the need to calibrate if offset error is not a concern in the application.
-
uint32_t sampleTimeNumber
By default, with value as “0U”, the sample period would be 2.5 ADC clocks. Then, to plus the “sampleTimeNumber” value here. The available value range is in 3 bits.
-
bool enableLowPowerMode
If disable low-power mode, ADC remains activated even when no conversions are requested. If enable low-power mode, The ADC is automatically powered-down when no conversions are taking place.
-
adc_vdda_range_t voltageRange
Configure the ADC for the appropriate operating range of the analog supply voltage VDDA. Failure to set the area correctly causes the ADC to return incorrect conversion results.
-
adc_clock_mode_t clockMode
-
struct _adc_conv_seq_config
- #include <fsl_adc.h>
Define structure for configuring conversion sequence.
Public Members
-
uint32_t channelMask
Selects which one or more of the ADC channels will be sampled and converted when this sequence is launched. The masked channels would be involved in current conversion sequence, beginning with the lowest-order. The available range is in 12-bit.
-
uint32_t triggerMask
Selects which one or more of the available hardware trigger sources will cause this conversion sequence to be initiated. The available range is 6-bit.
-
adc_trigger_polarity_t triggerPolarity
Select the trigger to launch conversion sequence.
-
bool enableSyncBypass
To enable this feature allows the hardware trigger input to bypass synchronization flip-flop stages and therefore shorten the time between the trigger input signal and the start of a conversion.
-
bool enableSingleStep
When enabling this feature, a trigger will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions.
-
adc_seq_interrupt_mode_t interruptMode
Select the interrpt/DMA trigger mode.
-
uint32_t channelMask
-
struct _adc_result_info
- #include <fsl_adc.h>
Define structure of keeping conversion result information.
Public Members
-
uint32_t result
Keep the conversion data value.
-
adc_threshold_compare_status_t thresholdCompareStatus
Keep the threshold compare status.
-
adc_threshold_crossing_status_t thresholdCorssingStatus
Keep the threshold crossing status.
-
uint32_t channelNumber
Keep the channel number for this conversion.
-
bool overrunFlag
Keep the status whether the conversion is overrun or not.
-
uint32_t result
ENET: Ethernet Driver
-
void ENET_GetDefaultConfig(enet_config_t *config)
Gets the ENET default configuration structure.
The purpose of this API is to get the default ENET configure structure for ENET_Init(). User may use the initialized structure unchanged in ENET_Init(), or modify some fields of the structure before calling ENET_Init(). Example:
enet_config_t config; ENET_GetDefaultConfig(&config);
- Parameters:
config – The ENET mac controller configuration structure pointer.
-
void ENET_Init(ENET_Type *base, const enet_config_t *config, uint8_t *macAddr, uint32_t refclkSrc_Hz)
Initializes the ENET module.
This function ungates the module clock and initializes it with the ENET basic configuration.
Note
As our transactional transmit API use the zero-copy transmit buffer. So there are two thing we emphasize here:
Tx buffer free/requeue for application should be done in the Tx interrupt handler. Please set callback: kENET_TxIntEvent with Tx buffer free/requeue process APIs.
The Tx interrupt is forced to open.
- Parameters:
base – ENET peripheral base address.
config – ENET mac configuration structure pointer. The “enet_config_t” type mac configuration return from ENET_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
macAddr – ENET mac address of Ethernet device. This MAC address should be provided.
refclkSrc_Hz – ENET input reference clock.
-
void ENET_Deinit(ENET_Type *base)
Deinitializes the ENET module.
This function gates the module clock and disables the ENET module.
- Parameters:
base – ENET peripheral base address.
-
status_t ENET_DescriptorInit(ENET_Type *base, enet_config_t *config, enet_buffer_config_t *bufferConfig)
Initialize for all ENET descriptors.
Note
This function finishes all Tx/Rx descriptors initialization. The descriptor initialization should be called after ENET_Init().
- Parameters:
base – ENET peripheral base address.
config – The configuration for ENET.
bufferConfig – All buffers configuration.
-
status_t ENET_RxBufferAllocAll(ENET_Type *base, enet_handle_t *handle)
Allocates Rx buffers for all BDs. It’s used for zero copy Rx. In zero copy Rx case, Rx buffers are dynamic. This function will populate initial buffers in all BDs for receiving. Then ENET_GetRxFrame() is used to get Rx frame with zero copy, it will allocate new buffer to replace the buffer in BD taken by application, application should free those buffers after they’re used.
Note
This function should be called after ENET_CreateHandler() and buffer allocating callback function should be ready.
- Parameters:
base – ENET peripheral base address.
handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
-
void ENET_RxBufferFreeAll(ENET_Type *base, enet_handle_t *handle)
Frees Rx buffers in all BDs. It’s used for zero copy Rx. In zero copy Rx case, Rx buffers are dynamic. This function will free left buffers in all BDs.
- Parameters:
base – ENET peripheral base address.
handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
-
void ENET_StartRxTx(ENET_Type *base, uint8_t txRingNum, uint8_t rxRingNum)
Starts the ENET Tx/Rx. This function enable the Tx/Rx and starts the Tx/Rx DMA. This shall be set after ENET initialization and before starting to receive the data.
Note
This must be called after all the ENET initilization. And should be called when the ENET receive/transmit is required.
- Parameters:
base – ENET peripheral base address.
rxRingNum – The number of the used Rx rings. It shall not be larger than the ENET_RING_NUM_MAX(2). If the ringNum is set with 1, the ring 0 will be used.
txRingNum – The number of the used Tx rings. It shall not be larger than the ENET_RING_NUM_MAX(2). If the ringNum is set with 1, the ring 0 will be used.
-
void ENET_SetISRHandler(ENET_Type *base, enet_isr_t ISRHandler)
Set the second level IRQ handler.
- Parameters:
base – ENET peripheral base address.
ISRHandler – The handler to install.
-
static inline void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex)
Sets the ENET MII speed and duplex.
This API is provided to dynamically change the speed and dulpex for MAC.
- Parameters:
base – ENET peripheral base address.
speed – The speed of the RMII mode.
duplex – The duplex of the RMII mode.
-
void ENET_SetSMI(ENET_Type *base)
Sets the ENET SMI(serial management interface)- MII management interface.
- Parameters:
base – ENET peripheral base address.
-
static inline bool ENET_IsSMIBusy(ENET_Type *base)
Checks if the SMI is busy.
- Parameters:
base – ENET peripheral base address.
- Returns:
The status of MII Busy status.
-
static inline uint16_t ENET_ReadSMIData(ENET_Type *base)
Reads data from the PHY register through SMI interface.
- Parameters:
base – ENET peripheral base address.
- Returns:
The data read from PHY
-
void ENET_StartSMIWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Sends the MDIO IEEE802.3 Clause 22 format write command.
- Parameters:
base – ENET peripheral base address.
phyAddr – The PHY address.
regAddr – The PHY register.
data – The data written to PHY.
-
void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr)
Sends the MDIO IEEE802.3 Clause 22 format read command.
- Parameters:
base – ENET peripheral base address.
phyAddr – The PHY address.
regAddr – The PHY register.
-
status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
MDIO write with IEEE802.3 Clause 22 format.
- Parameters:
base – ENET peripheral base address.
phyAddr – The PHY address.
regAddr – The PHY register.
data – The data written to PHY.
- Returns:
kStatus_Success MDIO access succeeds.
- Returns:
kStatus_Timeout MDIO access timeout.
-
status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData)
MDIO read with IEEE802.3 Clause 22 format.
- Parameters:
base – ENET peripheral base address.
phyAddr – The PHY address.
regAddr – The PHY register.
pData – The data read from PHY.
- Returns:
kStatus_Success MDIO access succeeds.
- Returns:
kStatus_Timeout MDIO access timeout.
-
uint32_t ENET_GetInstance(ENET_Type *base)
Get the ENET instance from peripheral base address.
- Parameters:
base – ENET peripheral base address.
- Returns:
ENET instance.
-
static inline void ENET_SetMacAddr(ENET_Type *base, uint8_t *macAddr)
Sets the ENET module Mac address.
- Parameters:
base – ENET peripheral base address.
macAddr – The six-byte Mac address pointer. The pointer is allocated by application and input into the API.
-
void ENET_GetMacAddr(ENET_Type *base, uint8_t *macAddr)
Gets the ENET module Mac address.
- Parameters:
base – ENET peripheral base address.
macAddr – The six-byte Mac address pointer. The pointer is allocated by application and input into the API.
-
static inline void ENET_AcceptAllMulticast(ENET_Type *base)
Enable ENET device to accept all multicast frames.
- Parameters:
base – ENET peripheral base address.
-
static inline void ENET_RejectAllMulticast(ENET_Type *base)
ENET device reject to accept all multicast frames.
- Parameters:
base – ENET peripheral base address.
-
void ENET_EnterPowerDown(ENET_Type *base, uint32_t *wakeFilter)
Set the MAC to enter into power down mode. the remote power wake up frame and magic frame can wake up the ENET from the power down mode.
- Parameters:
base – ENET peripheral base address.
wakeFilter – The wakeFilter provided to configure the wake up frame fitlter. Set the wakeFilter to NULL is not required. But if you have the filter requirement, please make sure the wakeFilter pointer shall be eight continous 32-bits configuration.
-
static inline void ENET_ExitPowerDown(ENET_Type *base)
Set the MAC to exit power down mode. Eixt from the power down mode and recover to normal work mode.
- Parameters:
base – ENET peripheral base address.
-
void ENET_EnableInterrupts(ENET_Type *base, uint32_t mask)
Enables the ENET DMA and MAC interrupts.
This function enables the ENET interrupt according to the provided mask. The mask is a logical OR of enet_dma_interrupt_enable_t and enet_mac_interrupt_enable_t. For example, to enable the dma and mac interrupt, do the following.
ENET_EnableInterrupts(ENET, kENET_DmaRx | kENET_DmaTx | kENET_MacPmt);
- Parameters:
base – ENET peripheral base address.
mask – ENET interrupts to enable. This is a logical OR of both enumeration :: enet_dma_interrupt_enable_t and enet_mac_interrupt_enable_t.
-
void ENET_DisableInterrupts(ENET_Type *base, uint32_t mask)
Disables the ENET DMA and MAC interrupts.
This function disables the ENET interrupt according to the provided mask. The mask is a logical OR of enet_dma_interrupt_enable_t and enet_mac_interrupt_enable_t. For example, to disable the dma and mac interrupt, do the following.
ENET_DisableInterrupts(ENET, kENET_DmaRx | kENET_DmaTx | kENET_MacPmt);
- Parameters:
base – ENET peripheral base address.
mask – ENET interrupts to disables. This is a logical OR of both enumeration :: enet_dma_interrupt_enable_t and enet_mac_interrupt_enable_t.
-
static inline uint32_t ENET_GetDmaInterruptStatus(ENET_Type *base, uint8_t channel)
Gets the ENET DMA interrupt status flag.
- Parameters:
base – ENET peripheral base address.
channel – The DMA Channel. Shall not be larger than ENET_RING_NUM_MAX.
- Returns:
The event status of the interrupt source. This is the logical OR of members of the enumeration :: enet_dma_interrupt_enable_t.
-
static inline void ENET_ClearDmaInterruptStatus(ENET_Type *base, uint8_t channel, uint32_t mask)
Clear the ENET DMA interrupt status flag.
- Parameters:
base – ENET peripheral base address.
channel – The DMA Channel. Shall not be larger than ENET_RING_NUM_MAX.
mask – The event status of the interrupt source. This is the logical OR of members of the enumeration :: enet_dma_interrupt_enable_t.
-
static inline uint32_t ENET_GetMacInterruptStatus(ENET_Type *base)
Gets the ENET MAC interrupt status flag.
- Parameters:
base – ENET peripheral base address.
- Returns:
The event status of the interrupt source. Use the enum in enet_mac_interrupt_enable_t and right shift ENET_MACINT_ENUM_OFFSET to mask the returned value to get the exact interrupt status.
-
void ENET_ClearMacInterruptStatus(ENET_Type *base, uint32_t mask)
Clears the ENET mac interrupt events status flag.
This function clears enabled ENET interrupts according to the provided mask. The mask is a logical OR of enumeration members. See the enet_mac_interrupt_enable_t. For example, to clear the TX frame interrupt and RX frame interrupt, do the following.
ENET_ClearMacInterruptStatus(ENET, kENET_MacPmt);
- Parameters:
base – ENET peripheral base address.
mask – ENET interrupt source to be cleared. This is the logical OR of members of the enumeration :: enet_mac_interrupt_enable_t.
-
static inline bool ENET_IsTxDescriptorDmaOwn(enet_tx_bd_struct_t *txDesc)
Get the Tx descriptor DMA Own flag.
- Parameters:
txDesc – The given Tx descriptor.
- Return values:
True – the dma own Tx descriptor, false application own Tx descriptor.
-
void ENET_SetupTxDescriptor(enet_tx_bd_struct_t *txDesc, void *buffer1, uint32_t bytes1, void *buffer2, uint32_t bytes2, uint32_t framelen, bool intEnable, bool tsEnable, enet_desc_flag_t flag, uint8_t slotNum)
Setup a given Tx descriptor. This function is a low level functional API to setup or prepare a given Tx descriptor.
Note
This must be called after all the ENET initilization. And should be called when the ENET receive/transmit is required. Transmit buffers are ‘zero-copy’ buffers, so the buffer must remain in memory until the packet has been fully transmitted. The buffers should be free or requeued in the transmit interrupt irq handler.
- Parameters:
txDesc – The given Tx descriptor.
buffer1 – The first buffer address in the descriptor.
bytes1 – The bytes in the fist buffer.
buffer2 – The second buffer address in the descriptor.
bytes2 – The bytes in the second buffer.
framelen – The length of the frame to be transmitted.
intEnable – Interrupt enable flag.
tsEnable – The timestamp enable.
flag – The flag of this Tx desciriptor, see “enet_desc_flag_t” .
slotNum – The slot num used for AV mode only.
-
static inline void ENET_UpdateTxDescriptorTail(ENET_Type *base, uint8_t channel, uint32_t txDescTailAddrAlign)
Update the Tx descriptor tail pointer. This function is a low level functional API to update the the Tx descriptor tail. This is called after you setup a new Tx descriptor to update the tail pointer to make the new descritor accessable by DMA.
- Parameters:
base – ENET peripheral base address.
channel – The Tx DMA channel.
txDescTailAddrAlign – The new Tx tail pointer address.
-
static inline void ENET_UpdateRxDescriptorTail(ENET_Type *base, uint8_t channel, uint32_t rxDescTailAddrAlign)
Update the Rx descriptor tail pointer. This function is a low level functional API to update the the Rx descriptor tail. This is called after you setup a new Rx descriptor to update the tail pointer to make the new descritor accessable by DMA and to anouse the Rx poll command for DMA.
- Parameters:
base – ENET peripheral base address.
channel – The Rx DMA channel.
rxDescTailAddrAlign – The new Rx tail pointer address.
-
static inline uint32_t ENET_GetRxDescriptor(enet_rx_bd_struct_t *rxDesc)
Gets the context in the ENET Rx descriptor. This function is a low level functional API to get the the status flag from a given Rx descriptor.
Note
This must be called after all the ENET initilization. And should be called when the ENET receive/transmit is required.
- Parameters:
rxDesc – The given Rx descriptor.
- Return values:
The – RDES3 regions for write-back format Rx buffer descriptor.
-
void ENET_UpdateRxDescriptor(enet_rx_bd_struct_t *rxDesc, void *buffer1, void *buffer2, bool intEnable, bool doubleBuffEnable)
Updates the buffers and the own status for a given Rx descriptor. This function is a low level functional API to Updates the buffers and the own status for a given Rx descriptor.
Note
This must be called after all the ENET initilization. And should be called when the ENET receive/transmit is required.
- Parameters:
rxDesc – The given Rx descriptor.
buffer1 – The first buffer address in the descriptor.
buffer2 – The second buffer address in the descriptor.
intEnable – Interrupt enable flag.
doubleBuffEnable – The double buffer enable flag.
-
void ENET_CreateHandler(ENET_Type *base, enet_handle_t *handle, enet_config_t *config, enet_buffer_config_t *bufferConfig, enet_callback_t callback, void *userData)
Create ENET Handler.
This is a transactional API and it’s provided to store all datas which are needed during the whole transactional process. This API should not be used when you use functional APIs to do data Tx/Rx. This is funtion will store many data/flag for transactional use.
- Parameters:
base – ENET peripheral base address.
handle – ENET handler.
config – ENET configuration.
bufferConfig – ENET buffer configuration.
callback – The callback function.
userData – The application data.
-
status_t ENET_GetRxFrameSize(ENET_Type *base, enet_handle_t *handle, uint32_t *length, uint8_t channel)
Gets the size of the read frame. This function gets a received frame size from the ENET buffer descriptors.
Note
The FCS of the frame is automatically removed by MAC and the size is the length without the FCS. After calling ENET_GetRxFrameSize, ENET_ReadFrame() should be called to update the receive buffers If the result is not “kStatus_ENET_RxFrameEmpty”.
- Parameters:
base – ENET peripheral base address.
handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
length – The length of the valid frame received.
channel – The DMAC channel for the Rx.
- Return values:
kStatus_ENET_RxFrameEmpty – No frame received. Should not call ENET_ReadFrame to read frame.
kStatus_ENET_RxFrameError – Data error happens. ENET_ReadFrame should be called with NULL data and NULL length to update the receive buffers.
kStatus_Success – Receive a frame Successfully then the ENET_ReadFrame should be called with the right data buffer and the captured data length input.
-
status_t ENET_ReadFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length, uint8_t channel, enet_ptp_time_t *timestamp)
Reads a frame from the ENET device. This function reads a frame from the ENET DMA descriptors. The ENET_GetRxFrameSize should be used to get the size of the prepared data buffer. For example use Rx dma channel 0:
uint32_t length; enet_handle_t g_handle; Comment: Get the received frame size firstly. status = ENET_GetRxFrameSize(&g_handle, &length, 0); if (length != 0) { Comment: Allocate memory here with the size of "length" uint8_t *data = memory allocate interface; if (!data) { ENET_ReadFrame(ENET, &g_handle, NULL, 0, 0); } else { status = ENET_ReadFrame(ENET, &g_handle, data, length, 0); } } else if (status == kStatus_ENET_RxFrameError) { Comment: Update the received buffer when a error frame is received. ENET_ReadFrame(ENET, &g_handle, NULL, 0, 0); }
- Parameters:
base – ENET peripheral base address.
handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
data – The data buffer provided by user to store the frame which memory size should be at least “length”.
length – The size of the data buffer which is still the length of the received frame.
channel – The Rx DMA channel. Shall not be larger than 2.
timestamp – The timestamp address to store received timestamp.
- Returns:
The execute status, successful or failure.
-
status_t ENET_GetRxFrame(ENET_Type *base, enet_handle_t *handle, enet_rx_frame_struct_t *rxFrame, uint8_t channel)
Receives one frame in specified BD ring with zero copy.
This function will use the user-defined allocate and free callback. Every time application gets one frame through this function, driver will allocate new buffers for the BDs whose buffers have been taken by application.
Note
This function will drop current frame and update related BDs as available for DMA if new buffers allocating fails. Application must provide a memory pool including at least BD number + 1 buffers(+2 if enable double buffer) to make this function work normally.
- Parameters:
base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
rxFrame – The received frame information structure provided by user.
channel – The Rx DMA channel. Shall not be larger than 2.
- Return values:
kStatus_Success – Succeed to get one frame and allocate new memory for Rx buffer.
kStatus_ENET_RxFrameEmpty – There’s no Rx frame in the BD.
kStatus_ENET_RxFrameError – There’s issue in this receiving. In this function, issue frame will be dropped.
kStatus_ENET_RxFrameDrop – There’s no new buffer memory for BD, dropped this frame.
-
status_t ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, enet_tx_frame_struct_t *txFrame, uint8_t channel)
Transmits an ENET frame.
Note
The CRC is automatically appended to the data. Input the data to send without the CRC. This API uses input buffer for Tx, application should reclaim the buffer after Tx is over.
- Parameters:
base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
txFrame – The Tx frame structure.
channel – Channel to send the frame, same with queue index.
- Return values:
kStatus_Success – Send frame succeed.
kStatus_ENET_TxFrameBusy – Transmit buffer descriptor is busy under transmission. The transmit busy happens when the data send rate is over the MAC capacity. The waiting mechanism is recommended to be added after each call return with kStatus_ENET_TxFrameBusy. Also need to pay attention to reclaim Tx frame after Tx is over.
kStatus_ENET_TxFrameOverLen – Transmit frme length exceeds the 0x3FFF limit defined by the driver.
-
void ENET_ReclaimTxDescriptor(ENET_Type *base, enet_handle_t *handle, uint8_t channel)
Reclaim Tx descriptors. This function is used to update the Tx descriptor status and store the Tx timestamp when the 1588 feature is enabled. This is called by the transmit interupt IRQ handler after the complete of a frame transmission.
- Parameters:
base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
channel – The Tx DMA channnel.
-
void ENET_IRQHandler(ENET_Type *base, enet_handle_t *handle)
The ENET IRQ handler.
- Parameters:
base – ENET peripheral base address.
handle – The ENET handler pointer.
-
FSL_ENET_DRIVER_VERSION
Defines the driver version.
-
ENET_RXDESCRIP_RD_BUFF1VALID_MASK
Defines for read format.
Buffer1 address valid.
-
ENET_RXDESCRIP_RD_BUFF2VALID_MASK
Buffer2 address valid.
-
ENET_RXDESCRIP_RD_IOC_MASK
Interrupt enable on complete.
-
ENET_RXDESCRIP_RD_OWN_MASK
Own bit.
-
ENET_RXDESCRIP_WR_ERR_MASK
Defines for write back format.
-
ENET_RXDESCRIP_WR_PYLOAD_MASK
-
ENET_RXDESCRIP_WR_PTPMSGTYPE_MASK
-
ENET_RXDESCRIP_WR_PTPTYPE_MASK
-
ENET_RXDESCRIP_WR_PTPVERSION_MASK
-
ENET_RXDESCRIP_WR_PTPTSA_MASK
-
ENET_RXDESCRIP_WR_PACKETLEN_MASK
-
ENET_RXDESCRIP_WR_ERRSUM_MASK
-
ENET_RXDESCRIP_WR_TYPE_MASK
-
ENET_RXDESCRIP_WR_DE_MASK
-
ENET_RXDESCRIP_WR_RE_MASK
-
ENET_RXDESCRIP_WR_OE_MASK
-
ENET_RXDESCRIP_WR_RS0V_MASK
-
ENET_RXDESCRIP_WR_RS1V_MASK
-
ENET_RXDESCRIP_WR_RS2V_MASK
-
ENET_RXDESCRIP_WR_LD_MASK
-
ENET_RXDESCRIP_WR_FD_MASK
-
ENET_RXDESCRIP_WR_CTXT_MASK
-
ENET_RXDESCRIP_WR_OWN_MASK
-
ENET_TXDESCRIP_RD_BL1_MASK
Defines for read format.
-
ENET_TXDESCRIP_RD_BL2_MASK
-
ENET_TXDESCRIP_RD_BL1(n)
-
ENET_TXDESCRIP_RD_BL2(n)
-
ENET_TXDESCRIP_RD_TTSE_MASK
-
ENET_TXDESCRIP_RD_IOC_MASK
-
ENET_TXDESCRIP_RD_FL_MASK
-
ENET_TXDESCRIP_RD_FL(n)
-
ENET_TXDESCRIP_RD_CIC(n)
-
ENET_TXDESCRIP_RD_TSE_MASK
-
ENET_TXDESCRIP_RD_SLOT(n)
-
ENET_TXDESCRIP_RD_SAIC(n)
-
ENET_TXDESCRIP_RD_CPC(n)
-
ENET_TXDESCRIP_RD_LDFD(n)
-
ENET_TXDESCRIP_RD_LD_MASK
-
ENET_TXDESCRIP_RD_FD_MASK
-
ENET_TXDESCRIP_RD_CTXT_MASK
-
ENET_TXDESCRIP_RD_OWN_MASK
-
ENET_TXDESCRIP_WB_TTSS_MASK
Defines for write back format.
-
ENET_ABNORM_INT_MASK
-
ENET_NORM_INT_MASK
-
ENET_FRAME_MAX_FRAMELEN
Default maximum ethernet frame size.
-
ENET_FCS_LEN
Ethernet Rx frame FCS length.
-
ENET_ADDR_ALIGNMENT
Recommended ethernet buffer alignment.
-
ENET_BUFF_ALIGNMENT
Receive buffer alignment shall be 4bytes-aligned.
-
ENET_RING_NUM_MAX
The maximum number of Tx/Rx descriptor rings.
-
ENET_MTL_RXFIFOSIZE
The Rx fifo size.
-
ENET_MTL_TXFIFOSIZE
The Tx fifo size.
-
ENET_MACINT_ENUM_OFFSET
The offset for mac interrupt in enum type.
-
ENET_FRAME_TX_LEN_LIMITATION
The Tx frame length software limitation.
-
ENET_FRAME_RX_ERROR_BITS(x)
The Rx frame error bits field.
Defines the status return codes for transaction.
Values:
-
enumerator kStatus_ENET_InitMemoryFail
Status code 4000. Init failed since buffer memory was not enough.
-
enumerator kStatus_ENET_RxFrameError
Status code 4001. A frame received but data error occurred.
-
enumerator kStatus_ENET_RxFrameFail
Status code 4002. Failed to receive a frame.
-
enumerator kStatus_ENET_RxFrameEmpty
Status code 4003. No frame arrived.
-
enumerator kStatus_ENET_RxFrameDrop
Status code 4004. Rx frame was dropped since there’s no buffer memory.
-
enumerator kStatus_ENET_TxFrameBusy
Status code 4005. There were no resources for Tx operation.
-
enumerator kStatus_ENET_TxFrameFail
Status code 4006. Transmit frame failed.
-
enumerator kStatus_ENET_TxFrameOverLen
Status code 4007. Failed to send an oversize frame.
-
enumerator kStatus_ENET_InitMemoryFail
-
enum _enet_mii_mode
Defines the MII/RMII mode for data interface between the MAC and the PHY.
Values:
-
enumerator kENET_MiiMode
MII mode for data interface.
-
enumerator kENET_RmiiMode
RMII mode for data interface.
-
enumerator kENET_MiiMode
-
enum _enet_mii_speed
Defines the 10/100 Mbps speed for the MII data interface.
Values:
-
enumerator kENET_MiiSpeed10M
Speed 10 Mbps.
-
enumerator kENET_MiiSpeed100M
Speed 100 Mbps.
-
enumerator kENET_MiiSpeed10M
-
enum _enet_mii_duplex
Defines the half or full duplex for the MII data interface.
Values:
-
enumerator kENET_MiiHalfDuplex
Half duplex mode.
-
enumerator kENET_MiiFullDuplex
Full duplex mode.
-
enumerator kENET_MiiHalfDuplex
-
enum _enet_mii_normal_opcode
Define the MII opcode for normal MDIO_CLAUSES_22 Frame.
Values:
-
enumerator kENET_MiiWriteFrame
Write frame operation for a valid MII management frame.
-
enumerator kENET_MiiReadFrame
Read frame operation for a valid MII management frame.
-
enumerator kENET_MiiWriteFrame
-
enum _enet_dma_burstlen
Define the DMA maximum transmit burst length.
Values:
-
enumerator kENET_BurstLen1
DMA burst length 1.
-
enumerator kENET_BurstLen2
DMA burst length 2.
-
enumerator kENET_BurstLen4
DMA burst length 4.
-
enumerator kENET_BurstLen8
DMA burst length 8.
-
enumerator kENET_BurstLen16
DMA burst length 16.
-
enumerator kENET_BurstLen32
DMA burst length 32.
-
enumerator kENET_BurstLen64
DMA burst length 64. eight times enabled.
-
enumerator kENET_BurstLen128
DMA burst length 128. eight times enabled.
-
enumerator kENET_BurstLen256
DMA burst length 256. eight times enabled.
-
enumerator kENET_BurstLen1
-
enum _enet_desc_flag
Define the flag for the descriptor.
Values:
-
enumerator kENET_MiddleFlag
It’s a middle descriptor of the frame.
-
enumerator kENET_LastFlagOnly
It’s the last descriptor of the frame.
-
enumerator kENET_FirstFlagOnly
It’s the first descriptor of the frame.
-
enumerator kENET_FirstLastFlag
It’s the first and last descriptor of the frame.
-
enumerator kENET_MiddleFlag
-
enum _enet_systime_op
Define the system time adjust operation control.
Values:
-
enumerator kENET_SystimeAdd
System time add to.
-
enumerator kENET_SystimeSubtract
System time subtract.
-
enumerator kENET_SystimeAdd
-
enum _enet_ts_rollover_type
Define the system time rollover control.
Values:
-
enumerator kENET_BinaryRollover
System time binary rollover.
-
enumerator kENET_DigitalRollover
System time digital rollover.
-
enumerator kENET_BinaryRollover
-
enum _enet_special_config
Defines some special configuration for ENET.
These control flags are provided for special user requirements. Normally, these is no need to set this control flags for ENET initialization. But if you have some special requirements, set the flags to specialControl in the enet_config_t.
Note
“kENET_StoreAndForward” is recommended to be set when the ENET_PTP1588FEATURE_REQUIRED is defined or else the timestamp will be mess-up when the overflow happens.
Values:
-
enumerator kENET_DescDoubleBuffer
The double buffer is used in the Tx/Rx descriptor.
-
enumerator kENET_StoreAndForward
The Rx/Tx store and forward enable.
-
enumerator kENET_PromiscuousEnable
The promiscuous enabled.
-
enumerator kENET_FlowControlEnable
The flow control enabled.
-
enumerator kENET_BroadCastRxDisable
The broadcast disabled.
-
enumerator kENET_MulticastAllEnable
All multicast are passed.
-
enumerator kENET_8023AS2KPacket
8023as support for 2K packets.
-
enumerator kENET_RxChecksumOffloadEnable
The Rx checksum offload enabled.
-
enumerator kENET_DescDoubleBuffer
-
enum _enet_dma_interrupt_enable
List of DMA interrupts supported by the ENET interrupt. This enumeration uses one-hot encoding to allow a logical OR of multiple members.
Values:
-
enumerator kENET_DmaTx
Tx interrupt.
-
enumerator kENET_DmaTxStop
Tx stop interrupt.
-
enumerator kENET_DmaTxBuffUnavail
Tx buffer unavailable.
-
enumerator kENET_DmaRx
Rx interrupt.
-
enumerator kENET_DmaRxBuffUnavail
Rx buffer unavailable.
-
enumerator kENET_DmaRxStop
Rx stop.
-
enumerator kENET_DmaRxWatchdogTimeout
Rx watchdog timeout.
-
enumerator kENET_DmaEarlyTx
Early transmit.
-
enumerator kENET_DmaEarlyRx
Early receive.
-
enumerator kENET_DmaBusErr
Fatal bus error.
-
enumerator kENET_DmaTx
-
enum _enet_mac_interrupt_enable
List of mac interrupts supported by the ENET interrupt. This enumeration uses one-hot encoding to allow a logical OR of multiple members.
Values:
-
enumerator kENET_MacPmt
-
enumerator kENET_MacTimestamp
-
enumerator kENET_MacPmt
-
enum _enet_event
Defines the common interrupt event for callback use.
Values:
-
enumerator kENET_RxIntEvent
Receive interrupt event.
-
enumerator kENET_TxIntEvent
Transmit interrupt event.
-
enumerator kENET_WakeUpIntEvent
Wake up interrupt event.
-
enumerator kENET_TimeStampIntEvent
Time stamp interrupt event.
-
enumerator kENET_RxIntEvent
-
enum _enet_dma_tx_sche
Define the DMA transmit arbitration for multi-queue.
Values:
-
enumerator kENET_FixPri
Fixed priority. channel 0 has lower priority than channel 1.
-
enumerator kENET_WeightStrPri
Weighted(burst length) strict priority.
-
enumerator kENET_WeightRoundRobin
Weighted (weight factor) round robin.
-
enumerator kENET_FixPri
-
enum _enet_mtl_multiqueue_txsche
Define the MTL Tx scheduling algorithm for multiple queues/rings.
Values:
-
enumerator kENET_txWeightRR
Tx weight round-robin.
-
enumerator kENET_txStrPrio
Tx strict priority.
-
enumerator kENET_txWeightRR
-
enum _enet_mtl_multiqueue_rxsche
Define the MTL Rx scheduling algorithm for multiple queues/rings.
Values:
-
enumerator kENET_rxStrPrio
Tx weight round-robin, Rx strict priority.
-
enumerator kENET_rxWeightStrPrio
Tx strict priority, Rx weight strict priority.
-
enumerator kENET_rxStrPrio
-
enum _enet_mtl_rxqueuemap
Define the MTL Rx queue and DMA channel mapping.
Values:
-
enumerator kENET_StaticDirctMap
The received fame in Rx Qn(n = 0,1) direclty map to dma channel n.
-
enumerator kENET_DynamicMap
The received frame in Rx Qn(n = 0,1) map to the dma channel m(m = 0,1) related with the same Mac.
-
enumerator kENET_StaticDirctMap
-
enum _enet_ptp_event_type
Defines the ENET PTP message related constant.
Values:
-
enumerator kENET_PtpEventMsgType
PTP event message type.
-
enumerator kENET_PtpSrcPortIdLen
PTP message sequence id length.
-
enumerator kENET_PtpEventPort
PTP event port number.
-
enumerator kENET_PtpGnrlPort
PTP general port number.
-
enumerator kENET_PtpEventMsgType
-
enum _enet_tx_offload
Define the Tx checksum offload options.
Values:
-
enumerator kENET_TxOffloadDisable
Disable Tx checksum offload.
-
enumerator kENET_TxOffloadIPHeader
Enable IP header checksum calculation and insertion.
-
enumerator kENET_TxOffloadIPHeaderPlusPayload
Enable IP header and payload checksum calculation and insertion.
-
enumerator kENET_TxOffloadAll
Enable IP header, payload and pseudo header checksum calculation and insertion.
-
enumerator kENET_TxOffloadDisable
-
typedef enum _enet_mii_mode enet_mii_mode_t
Defines the MII/RMII mode for data interface between the MAC and the PHY.
-
typedef enum _enet_mii_speed enet_mii_speed_t
Defines the 10/100 Mbps speed for the MII data interface.
-
typedef enum _enet_mii_duplex enet_mii_duplex_t
Defines the half or full duplex for the MII data interface.
-
typedef enum _enet_mii_normal_opcode enet_mii_normal_opcode_t
Define the MII opcode for normal MDIO_CLAUSES_22 Frame.
-
typedef enum _enet_dma_burstlen enet_dma_burstlen_t
Define the DMA maximum transmit burst length.
-
typedef enum _enet_desc_flag enet_desc_flag_t
Define the flag for the descriptor.
-
typedef enum _enet_systime_op enet_systime_op_t
Define the system time adjust operation control.
-
typedef enum _enet_ts_rollover_type enet_ts_rollover_type_t
Define the system time rollover control.
-
typedef enum _enet_special_config enet_special_config_t
Defines some special configuration for ENET.
These control flags are provided for special user requirements. Normally, these is no need to set this control flags for ENET initialization. But if you have some special requirements, set the flags to specialControl in the enet_config_t.
Note
“kENET_StoreAndForward” is recommended to be set when the ENET_PTP1588FEATURE_REQUIRED is defined or else the timestamp will be mess-up when the overflow happens.
-
typedef enum _enet_dma_interrupt_enable enet_dma_interrupt_enable_t
List of DMA interrupts supported by the ENET interrupt. This enumeration uses one-hot encoding to allow a logical OR of multiple members.
-
typedef enum _enet_mac_interrupt_enable enet_mac_interrupt_enable_t
List of mac interrupts supported by the ENET interrupt. This enumeration uses one-hot encoding to allow a logical OR of multiple members.
-
typedef enum _enet_event enet_event_t
Defines the common interrupt event for callback use.
-
typedef enum _enet_dma_tx_sche enet_dma_tx_sche_t
Define the DMA transmit arbitration for multi-queue.
-
typedef enum _enet_mtl_multiqueue_txsche enet_mtl_multiqueue_txsche_t
Define the MTL Tx scheduling algorithm for multiple queues/rings.
-
typedef enum _enet_mtl_multiqueue_rxsche enet_mtl_multiqueue_rxsche_t
Define the MTL Rx scheduling algorithm for multiple queues/rings.
-
typedef enum _enet_mtl_rxqueuemap enet_mtl_rxqueuemap_t
Define the MTL Rx queue and DMA channel mapping.
-
typedef enum _enet_ptp_event_type enet_ptp_event_type_t
Defines the ENET PTP message related constant.
-
typedef enum _enet_tx_offload enet_tx_offload_t
Define the Tx checksum offload options.
-
typedef struct _enet_rx_bd_struct enet_rx_bd_struct_t
Defines the receive descriptor structure It has the read-format and write-back format structures. They both have the same size with different region definition. So we define common name as the recive descriptor structure. When initialize the buffer descriptors, read-format region mask bits should be used. When Rx frame has been in the buffer descriptors, write-back format region store the Rx result information.
-
typedef struct _enet_tx_bd_struct enet_tx_bd_struct_t
Defines the transmit descriptor structure It has the read-format and write-back format structure. They both has the same size with different region definition. So we define common name as the transmit descriptor structure. When initialize the buffer descriptors for Tx, read-format region mask bits should be used. When frame has been transmitted, write-back format region store the Tx result information.
-
typedef struct _enet_tx_bd_config_struct enet_tx_bd_config_struct_t
Defines the Tx BD configuration structure.
-
typedef struct _enet_ptp_time enet_ptp_time_t
Defines the ENET PTP time stamp structure.
-
typedef struct enet_tx_reclaim_info enet_tx_reclaim_info_t
Defines the Tx reclaim information structure.
-
typedef struct _enet_tx_dirty_ring enet_tx_dirty_ring_t
Defines the ENET transmit dirty addresses ring/queue structure.
-
typedef struct _enet_buffer_config enet_buffer_config_t
Defines the buffer descriptor configure structure.
Notes:
The receive and transmit descriptor start address pointer and tail pointer must be word-aligned.
The recommended minimum Tx/Rx ring length is 4.
The Tx/Rx descriptor tail address shall be the address pointer to the address just after the end of the last last descriptor. because only the descriptors between the start address and the tail address will be used by DMA.
The decriptor address is the start address of all used contiguous memory. for example, the rxDescStartAddrAlign is the start address of rxRingLen contiguous descriptor memorise for Rx descriptor ring 0.
The “*rxBufferstartAddr” is the first element of rxRingLen (2*rxRingLen for double buffers) Rx buffers. It means the *rxBufferStartAddr is the Rx buffer for the first descriptor the *rxBufferStartAddr + 1 is the Rx buffer for the second descriptor or the Rx buffer for the second buffer in the first descriptor. So please make sure the rxBufferStartAddr is the address of a rxRingLen or 2*rxRingLen array.
-
typedef struct enet_multiqueue_config enet_multiqueue_config_t
Defines the configuration when multi-queue is used.
-
typedef void *(*enet_rx_alloc_callback_t)(ENET_Type *base, void *userData, uint8_t channel)
Defines the Rx memory buffer alloc function pointer.
-
typedef void (*enet_rx_free_callback_t)(ENET_Type *base, void *buffer, void *userData, uint8_t channel)
Defines the Rx memory buffer free function pointer.
-
typedef struct _enet_config enet_config_t
Defines the basic configuration structure for the ENET device.
Note:
Default the signal queue is used so the “multiqueueCfg” is set default with NULL. Set the pointer with a valid configration pointer if the multiple queues are required. If multiple queue is enabled, please make sure the buffer configuration for all are prepared also.
-
typedef struct _enet_handle enet_handle_t
-
typedef void (*enet_callback_t)(ENET_Type *base, enet_handle_t *handle, enet_event_t event, uint8_t channel, enet_tx_reclaim_info_t *txReclaimInfo, void *userData)
ENET callback function.
-
typedef struct _enet_tx_bd_ring enet_tx_bd_ring_t
Defines the ENET transmit buffer descriptor ring/queue structure.
-
typedef struct _enet_rx_bd_ring enet_rx_bd_ring_t
Defines the ENET receive buffer descriptor ring/queue structure.
-
typedef struct _enet_buffer_struct enet_buffer_struct_t
-
typedef struct _enet_rx_frame_attribute_struct enet_rx_frame_attribute_t
Rx frame attribute structure.
-
typedef struct _enet_rx_frame_error enet_rx_frame_error_t
Defines the Rx frame error structure.
-
typedef struct _enet_rx_frame_struct enet_rx_frame_struct_t
Defines the Rx frame data structure.
-
typedef struct _enet_tx_config_struct enet_tx_config_struct_t
-
typedef struct _enet_tx_frame_struct enet_tx_frame_struct_t
-
typedef void (*enet_isr_t)(ENET_Type *base, enet_handle_t *handle)
-
const clock_ip_name_t s_enetClock[]
Pointers to enet clocks for each instance.
-
struct _enet_rx_bd_struct
- #include <fsl_enet.h>
Defines the receive descriptor structure It has the read-format and write-back format structures. They both have the same size with different region definition. So we define common name as the recive descriptor structure. When initialize the buffer descriptors, read-format region mask bits should be used. When Rx frame has been in the buffer descriptors, write-back format region store the Rx result information.
Public Members
- __IO uint32_t rdes0
Receive descriptor 0
- __IO uint32_t rdes1
Receive descriptor 1
- __IO uint32_t rdes2
Receive descriptor 2
- __IO uint32_t rdes3
Receive descriptor 3
-
struct _enet_tx_bd_struct
- #include <fsl_enet.h>
Defines the transmit descriptor structure It has the read-format and write-back format structure. They both has the same size with different region definition. So we define common name as the transmit descriptor structure. When initialize the buffer descriptors for Tx, read-format region mask bits should be used. When frame has been transmitted, write-back format region store the Tx result information.
Public Members
- __IO uint32_t tdes0
Transmit descriptor 0
- __IO uint32_t tdes1
Transmit descriptor 1
- __IO uint32_t tdes2
Transmit descriptor 2
- __IO uint32_t tdes3
Transmit descriptor 3
-
struct _enet_tx_bd_config_struct
- #include <fsl_enet.h>
Defines the Tx BD configuration structure.
Public Members
-
void *buffer1
The first buffer address in the descriptor.
-
uint32_t bytes1
The bytes in the fist buffer.
-
void *buffer2
The second buffer address in the descriptor.
-
uint32_t bytes2
The bytes in the second buffer.
-
uint32_t framelen
The length of the frame to be transmitted.
-
bool intEnable
Interrupt enable flag.
-
bool tsEnable
The timestamp enable.
-
enet_tx_offload_t txOffloadOps
The Tx checksum offload option, only vaild for Queue 0.
-
enet_desc_flag_t flag
The flag of this tx desciriptor, see “enet_qos_desc_flag”.
-
uint8_t slotNum
The slot number used for AV mode only.
-
void *buffer1
-
struct _enet_ptp_time
- #include <fsl_enet.h>
Defines the ENET PTP time stamp structure.
Public Members
-
uint64_t second
Second.
-
uint32_t nanosecond
Nanosecond.
-
uint64_t second
-
struct enet_tx_reclaim_info
- #include <fsl_enet.h>
Defines the Tx reclaim information structure.
Public Members
-
void *context
User specified data, could be buffer address for free
-
bool isTsAvail
Flag indicates timestamp available status
-
enet_ptp_time_t timeStamp
Timestamp of frame
-
void *context
-
struct _enet_tx_dirty_ring
- #include <fsl_enet.h>
Defines the ENET transmit dirty addresses ring/queue structure.
Public Members
-
enet_tx_reclaim_info_t *txDirtyBase
Dirty buffer descriptor base address pointer.
-
uint16_t txGenIdx
Tx generate index.
-
uint16_t txConsumIdx
Tx consume index.
-
uint16_t txRingLen
Tx ring length.
-
bool isFull
Tx ring is full flag, add this parameter to avoid waste one element.
-
enet_tx_reclaim_info_t *txDirtyBase
-
struct _enet_buffer_config
- #include <fsl_enet.h>
Defines the buffer descriptor configure structure.
Notes:
The receive and transmit descriptor start address pointer and tail pointer must be word-aligned.
The recommended minimum Tx/Rx ring length is 4.
The Tx/Rx descriptor tail address shall be the address pointer to the address just after the end of the last last descriptor. because only the descriptors between the start address and the tail address will be used by DMA.
The decriptor address is the start address of all used contiguous memory. for example, the rxDescStartAddrAlign is the start address of rxRingLen contiguous descriptor memorise for Rx descriptor ring 0.
The “*rxBufferstartAddr” is the first element of rxRingLen (2*rxRingLen for double buffers) Rx buffers. It means the *rxBufferStartAddr is the Rx buffer for the first descriptor the *rxBufferStartAddr + 1 is the Rx buffer for the second descriptor or the Rx buffer for the second buffer in the first descriptor. So please make sure the rxBufferStartAddr is the address of a rxRingLen or 2*rxRingLen array.
Public Members
-
uint8_t rxRingLen
The length of receive buffer descriptor ring.
-
uint8_t txRingLen
The length of transmit buffer descriptor ring.
-
enet_tx_bd_struct_t *txDescStartAddrAlign
Aligned transmit descriptor start address.
-
enet_tx_bd_struct_t *txDescTailAddrAlign
Aligned transmit descriptor tail address.
-
enet_tx_reclaim_info_t *txDirtyStartAddr
Start address of the dirty Tx frame information.
-
enet_rx_bd_struct_t *rxDescStartAddrAlign
Aligned receive descriptor start address.
-
enet_rx_bd_struct_t *rxDescTailAddrAlign
Aligned receive descriptor tail address.
-
uint32_t *rxBufferStartAddr
Start address of the Rx buffers.
-
uint32_t rxBuffSizeAlign
Aligned receive data buffer size.
-
struct enet_multiqueue_config
- #include <fsl_enet.h>
Defines the configuration when multi-queue is used.
Public Members
-
enet_dma_tx_sche_t dmaTxSche
Transmit arbitation.
-
enet_dma_burstlen_t burstLen
Burset len for the queue 1.
-
uint8_t txdmaChnWeight[(2U)]
Transmit channel weight.
-
enet_mtl_multiqueue_txsche_t mtltxSche
Transmit schedule for multi-queue.
-
enet_mtl_multiqueue_rxsche_t mtlrxSche
Receive schedule for multi-queue.
-
uint8_t rxqueweight[(2U)]
Refer to the MTL RxQ Control register.
-
uint32_t txqueweight[(2U)]
Refer to the MTL TxQ Quantum Weight register.
-
uint8_t rxqueuePrio[(2U)]
Receive queue priority.
-
uint8_t txqueuePrio[(2U)]
Refer to Transmit Queue Priority Mapping register.
-
enet_mtl_rxqueuemap_t mtlrxQuemap
Rx queue DMA Channel mapping.
-
enet_dma_tx_sche_t dmaTxSche
-
struct _enet_config
- #include <fsl_enet.h>
Defines the basic configuration structure for the ENET device.
Note:
Default the signal queue is used so the “multiqueueCfg” is set default with NULL. Set the pointer with a valid configration pointer if the multiple queues are required. If multiple queue is enabled, please make sure the buffer configuration for all are prepared also.
Public Members
-
uint16_t specialControl
The logicl or of enet_special_config_t
-
enet_multiqueue_config_t *multiqueueCfg
Use both Tx/Rx queue(dma channel) 0 and 1.
-
uint32_t interrupt
MAC interrupt source. A logical OR of enet_dma_interrupt_enable_t and enet_mac_interrupt_enable_t.
-
enet_mii_mode_t miiMode
MII mode.
-
enet_mii_speed_t miiSpeed
MII Speed.
-
enet_mii_duplex_t miiDuplex
MII duplex.
-
uint16_t pauseDuration
Used in the Tx flow control frame, only valid when kENET_FlowControlEnable is set.
-
enet_rx_alloc_callback_t rxBuffAlloc
Callback to alloc memory, must be provided for zero-copy Rx.
-
enet_rx_free_callback_t rxBuffFree
Callback to free memory, must be provided for zero-copy Rx.
-
struct _enet_tx_bd_ring
- #include <fsl_enet.h>
Defines the ENET transmit buffer descriptor ring/queue structure.
Public Members
-
enet_tx_bd_struct_t *txBdBase
Buffer descriptor base address pointer.
-
uint16_t txGenIdx
Tx generate index.
-
uint16_t txConsumIdx
Tx consum index.
-
volatile uint16_t txDescUsed
Tx descriptor used number.
-
uint16_t txRingLen
Tx ring length.
-
enet_tx_bd_struct_t *txBdBase
-
struct _enet_rx_bd_ring
- #include <fsl_enet.h>
Defines the ENET receive buffer descriptor ring/queue structure.
Public Members
-
enet_rx_bd_struct_t *rxBdBase
Buffer descriptor base address pointer.
-
uint16_t rxGenIdx
The current available receive buffer descriptor pointer.
-
uint16_t rxRingLen
Receive ring length.
-
uint32_t rxBuffSizeAlign
Receive buffer size.
-
enet_rx_bd_struct_t *rxBdBase
-
struct _enet_handle
- #include <fsl_enet.h>
Defines the ENET handler structure.
Public Members
-
bool multiQueEnable
Multi-queue enable status.
-
bool doubleBuffEnable
The double buffer enable status.
-
bool rxintEnable
Rx interrupt enable status.
-
enet_rx_bd_ring_t rxBdRing[(2U)]
Receive buffer descriptor.
-
enet_tx_bd_ring_t txBdRing[(2U)]
Transmit buffer descriptor.
-
enet_tx_dirty_ring_t txDirtyRing[(2U)]
Transmit dirty buffers addresses.
-
uint32_t *rxBufferStartAddr[(2U)]
The Init-Rx buffers used for reinit corrupted BD due to write-back operation.
-
uint32_t txLenLimitation[(2U)]
Tx frame length limitation.
-
enet_callback_t callback
Callback function.
-
void *userData
Callback function parameter.
-
enet_rx_alloc_callback_t rxBuffAlloc
Callback to alloc memory, must be provided for zero-copy Rx.
-
enet_rx_free_callback_t rxBuffFree
Callback to free memory, must be provided for zero-copy Rx.
-
bool multiQueEnable
-
struct _enet_buffer_struct
- #include <fsl_enet.h>
Public Members
-
void *buffer
The buffer stores the whole or partial frame.
-
uint16_t length
The byte length of this buffer.
-
void *buffer
-
struct _enet_rx_frame_attribute_struct
- #include <fsl_enet.h>
Rx frame attribute structure.
Public Members
-
bool isTsAvail
Rx frame timestamp is available or not.
-
enet_ptp_time_t timestamp
The nanosecond part timestamp of this Rx frame.
-
bool isTsAvail
-
struct _enet_rx_frame_error
- #include <fsl_enet.h>
Defines the Rx frame error structure.
Public Members
-
bool statsDribbleErr
The received packet has a non-integer multiple of bytes (odd nibbles).
-
bool statsRxErr
Receive error.
-
bool statsOverflowErr
Rx FIFO overflow error.
-
bool statsWatchdogTimeoutErr
Receive watchdog timeout.
-
bool statsGaintPacketErr
Receive error.
-
bool statsRxFcsErr
Receive CRC error.
-
bool statsDribbleErr
-
struct _enet_rx_frame_struct
- #include <fsl_enet.h>
Defines the Rx frame data structure.
Public Members
-
enet_buffer_struct_t *rxBuffArray
Rx frame buffer structure.
-
uint16_t totLen
Rx frame total length.
-
enet_rx_frame_attribute_t rxAttribute
Rx frame attribute structure.
-
enet_rx_frame_error_t rxFrameError
Rx frame error.
-
enet_buffer_struct_t *rxBuffArray
-
struct _enet_tx_config_struct
- #include <fsl_enet.h>
Public Members
-
uint8_t intEnable
Enable interrupt every time one BD is completed.
-
uint8_t tsEnable
Transmit timestamp enable.
-
uint8_t slotNum
Slot number control bits in AV mode.
-
enet_tx_offload_t txOffloadOps
Tx checksum offload option.
-
uint8_t intEnable
-
struct _enet_tx_frame_struct
- #include <fsl_enet.h>
Public Members
-
enet_buffer_struct_t *txBuffArray
Tx frame buffer structure.
-
uint32_t txBuffNum
Buffer number of this Tx frame.
-
enet_tx_config_struct_t txConfig
Tx extra configuation.
-
void *context
Driver reclaims and gives it in Tx over callback.
-
enet_buffer_struct_t *txBuffArray
GPIO: General Purpose I/O
-
void GPIO_PortInit(GPIO_Type *base, uint32_t port)
Initializes the GPIO peripheral.
This function ungates the GPIO clock.
- Parameters:
base – GPIO peripheral base pointer.
port – GPIO port number.
-
void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config)
Initializes a GPIO pin used by the board.
To initialize the GPIO, define a pin configuration, either input or output, in the user file. Then, call the GPIO_PinInit() function.
This is an example to define an input pin or output pin configuration:
Define a digital input pin configuration, gpio_pin_config_t config = { kGPIO_DigitalInput, 0, } Define a digital output pin configuration, gpio_pin_config_t config = { kGPIO_DigitalOutput, 0, }
- Parameters:
base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number
config – GPIO pin configuration pointer
-
static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)
Sets the output level of the one GPIO pin to the logic 1 or 0.
- Parameters:
base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number
output – GPIO pin output logic level.
0: corresponding pin output low-logic level.
1: corresponding pin output high-logic level.
-
static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)
Reads the current input value of the GPIO PIN.
- Parameters:
base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number
- Return values:
GPIO – port input value
0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.
-
FSL_GPIO_DRIVER_VERSION
LPC GPIO driver version.
-
enum _gpio_pin_direction
LPC GPIO direction definition.
Values:
-
enumerator kGPIO_DigitalInput
Set current pin as digital input
-
enumerator kGPIO_DigitalOutput
Set current pin as digital output
-
enumerator kGPIO_DigitalInput
-
typedef enum _gpio_pin_direction gpio_pin_direction_t
LPC GPIO direction definition.
-
typedef struct _gpio_pin_config gpio_pin_config_t
The GPIO pin configuration structure.
Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused.
-
static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)
Sets the output level of the multiple GPIO pins to the logic 1.
- Parameters:
base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro
-
static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)
Sets the output level of the multiple GPIO pins to the logic 0.
- Parameters:
base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro
-
static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)
Reverses current output logic of the multiple GPIO pins.
- Parameters:
base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro
-
struct _gpio_pin_config
- #include <fsl_gpio.h>
The GPIO pin configuration structure.
Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused.
Public Members
-
gpio_pin_direction_t pinDirection
GPIO direction, input or output
-
uint8_t outputLogic
Set default output logic, no use in input
-
gpio_pin_direction_t pinDirection
IOCON: I/O pin configuration
-
FSL_IOCON_DRIVER_VERSION
IOCON driver version.
-
typedef struct _iocon_group iocon_group_t
Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format.
- __STATIC_INLINE void IOCON_PinMuxSet (IOCON_Type *base, uint8_t port, uint8_t pin, uint32_t modefunc)
Sets I/O Control pin mux.
- Parameters:
base – : The base of IOCON peripheral on the chip
port – : GPIO port to mux
pin – : GPIO pin to mux
modefunc – : OR’ed values of type IOCON_*
- Returns:
Nothing
- __STATIC_INLINE void IOCON_SetPinMuxing (IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)
Set all I/O Control pin muxing.
- Parameters:
base – : The base of IOCON peripheral on the chip
pinArray – : Pointer to array of pin mux selections
arrayLength – : Number of entries in pinArray
- Returns:
Nothing
-
FSL_COMPONENT_ID
-
IOCON_FUNC0
IOCON function and mode selection definitions.
Note
See the User Manual for specific modes and functions supported by the various pins. Selects pin function 0
-
IOCON_FUNC1
Selects pin function 1
-
IOCON_FUNC2
Selects pin function 2
-
IOCON_FUNC3
Selects pin function 3
-
IOCON_FUNC4
Selects pin function 4
-
IOCON_FUNC5
Selects pin function 5
-
IOCON_FUNC6
Selects pin function 6
-
IOCON_FUNC7
Selects pin function 7
-
struct _iocon_group
- #include <fsl_iocon.h>
Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format.
LCDC: LCD Controller Driver
-
status_t LCDC_Init(LCD_Type *base, const lcdc_config_t *config, uint32_t srcClock_Hz)
Initialize the LCD module.
- Parameters:
base – LCD peripheral base address.
config – Pointer to configuration structure, see to lcdc_config_t.
srcClock_Hz – The LCD input clock (LCDCLK) frequency in Hz.
- Return values:
kStatus_Success – LCD is initialized successfully.
kStatus_InvalidArgument – Initlialize failed because of invalid argument.
-
void LCDC_Deinit(LCD_Type *base)
Deinitialize the LCD module.
- Parameters:
base – LCD peripheral base address.
-
void LCDC_GetDefaultConfig(lcdc_config_t *config)
Gets default pre-defined settings for initial configuration.
This function initializes the configuration structure. The default values are:
config->panelClock_Hz = 0U; config->ppl = 0U; config->hsw = 0U; config->hfp = 0U; config->hbp = 0U; config->lpp = 0U; config->vsw = 0U; config->vfp = 0U; config->vbp = 0U; config->acBiasFreq = 1U; config->polarityFlags = 0U; config->enableLineEnd = false; config->lineEndDelay = 0U; config->upperPanelAddr = 0U; config->lowerPanelAddr = 0U; config->bpp = kLCDC_1BPP; config->dataFormat = kLCDC_LittleEndian; config->swapRedBlue = false; config->display = kLCDC_DisplayTFT;
- Parameters:
config – Pointer to configuration structure.
-
static inline void LCDC_Start(LCD_Type *base)
Start to output LCD timing signal.
The LCD power up sequence should be:
Apply power to LCD, here all output signals are held low.
When LCD power stablized, call LCDC_Start to output the timing signals.
Apply contrast voltage to LCD panel. Delay if the display requires.
Call LCDC_PowerUp.
- Parameters:
base – LCD peripheral base address.
-
static inline void LCDC_Stop(LCD_Type *base)
Stop the LCD timing signal.
The LCD power down sequence should be:
Call LCDC_PowerDown.
Delay if the display requires. Disable contrast voltage to LCD panel.
Call LCDC_Stop to disable the timing signals.
Disable power to LCD.
- Parameters:
base – LCD peripheral base address.
-
static inline void LCDC_PowerUp(LCD_Type *base)
Power up the LCD and output the pixel signal.
- Parameters:
base – LCD peripheral base address.
-
static inline void LCDC_PowerDown(LCD_Type *base)
Power down the LCD and disable the output pixel signal.
- Parameters:
base – LCD peripheral base address.
-
void LCDC_SetPanelAddr(LCD_Type *base, lcdc_panel_t panel, uint32_t addr)
Sets panel frame base address.
- Parameters:
base – LCD peripheral base address.
panel – Which panel to set.
addr – Frame base address, must be doubleword(64-bit) aligned.
-
void LCDC_SetPalette(LCD_Type *base, const uint32_t *palette, uint8_t count_words)
Sets palette.
- Parameters:
base – LCD peripheral base address.
palette – Pointer to the palette array.
count_words – Length of the palette array to set (how many words), it should not be larger than LCDC_PALETTE_SIZE_WORDS.
-
static inline void LCDC_SetVerticalInterruptMode(LCD_Type *base, lcdc_vertical_compare_interrupt_mode_t mode)
Sets the vertical compare interrupt mode.
- Parameters:
base – LCD peripheral base address.
mode – The vertical compare interrupt mode.
-
void LCDC_EnableInterrupts(LCD_Type *base, uint32_t mask)
Enable LCD interrupts.
Example to enable LCD base address update interrupt and vertical compare interrupt:
LCDC_EnableInterrupts(LCD, kLCDC_BaseAddrUpdateInterrupt | kLCDC_VerticalCompareInterrupt);
- Parameters:
base – LCD peripheral base address.
mask – Interrupts to enable, it is OR’ed value of _lcdc_interrupts.
-
void LCDC_DisableInterrupts(LCD_Type *base, uint32_t mask)
Disable LCD interrupts.
Example to disable LCD base address update interrupt and vertical compare interrupt:
LCDC_DisableInterrupts(LCD, kLCDC_BaseAddrUpdateInterrupt | kLCDC_VerticalCompareInterrupt);
- Parameters:
base – LCD peripheral base address.
mask – Interrupts to disable, it is OR’ed value of _lcdc_interrupts.
-
uint32_t LCDC_GetInterruptsPendingStatus(LCD_Type *base)
Get LCD interrupt pending status.
Example:
uint32_t status; status = LCDC_GetInterruptsPendingStatus(LCD); if (kLCDC_BaseAddrUpdateInterrupt & status) { LCD base address update interrupt occurred. } if (kLCDC_VerticalCompareInterrupt & status) { LCD vertical compare interrupt occurred. }
- Parameters:
base – LCD peripheral base address.
- Returns:
Interrupts pending status, it is OR’ed value of _lcdc_interrupts.
-
uint32_t LCDC_GetEnabledInterruptsPendingStatus(LCD_Type *base)
Get LCD enabled interrupt pending status.
This function is similar with LCDC_GetInterruptsPendingStatus, the only difference is, this function only returns the pending status of the interrupts that have been enabled using LCDC_EnableInterrupts.
- Parameters:
base – LCD peripheral base address.
- Returns:
Interrupts pending status, it is OR’ed value of _lcdc_interrupts.
-
void LCDC_ClearInterruptsStatus(LCD_Type *base, uint32_t mask)
Clear LCD interrupts pending status.
Example to clear LCD base address update interrupt and vertical compare interrupt pending status:
LCDC_ClearInterruptsStatus(LCD, kLCDC_BaseAddrUpdateInterrupt | kLCDC_VerticalCompareInterrupt);
- Parameters:
base – LCD peripheral base address.
mask – Interrupts to disable, it is OR’ed value of _lcdc_interrupts.
-
void LCDC_SetCursorConfig(LCD_Type *base, const lcdc_cursor_config_t *config)
Set the hardware cursor configuration.
This function should be called before enabling the hardware cursor. It supports initializing multiple cursor images at a time when using 32x32 pixels cursor.
For example:
uint32_t cursor0Img[LCDC_CURSOR_IMG_32X32_WORDS] = {...}; uint32_t cursor2Img[LCDC_CURSOR_IMG_32X32_WORDS] = {...}; lcdc_cursor_config_t cursorConfig; LCDC_CursorGetDefaultConfig(&cursorConfig); cursorConfig.image[0] = cursor0Img; cursorConfig.image[2] = cursor2Img; LCDC_SetCursorConfig(LCD, &cursorConfig); LCDC_ChooseCursor(LCD, 0); LCDC_SetCursorPosition(LCD, 0, 0); LCDC_EnableCursor(LCD);
In this example, cursor 0 and cursor 2 image data are initialized, but cursor 1 and cursor 3 image data are not initialized because image[1] and image[2] are all NULL. With this, application could initializes all cursor images it will use at the beginning and call LCDC_SetCursorImage directly to display the one which it needs.
- Parameters:
base – LCD peripheral base address.
config – Pointer to the hardware cursor configuration structure.
-
void LCDC_CursorGetDefaultConfig(lcdc_cursor_config_t *config)
Get the hardware cursor default configuration.
The default configuration values are:
config->size = kLCDC_CursorSize32; config->syncMode = kLCDC_CursorAsync; config->palette0.red = 0U; config->palette0.green = 0U; config->palette0.blue = 0U; config->palette1.red = 255U; config->palette1.green = 255U; config->palette1.blue = 255U; config->image[0] = (uint32_t *)0; config->image[1] = (uint32_t *)0; config->image[2] = (uint32_t *)0; config->image[3] = (uint32_t *)0;
- Parameters:
config – Pointer to the hardware cursor configuration structure.
-
static inline void LCDC_EnableCursor(LCD_Type *base, bool enable)
Enable or disable the cursor.
- Parameters:
base – LCD peripheral base address.
enable – True to enable, false to disable.
-
static inline void LCDC_ChooseCursor(LCD_Type *base, uint8_t index)
Choose which cursor to display.
When using 32x32 cursor, the number of cursors supports is LCDC_CURSOR_COUNT. When using 64x64 cursor, the LCD only supports one cursor. This function selects which cursor to display when using 32x32 cursor. When synchronization mode is kLCDC_CursorSync, the change effects in the next frame. When synchronization mode is kLCDC_CursorAsync, change effects immediately.
Note
The function LCDC_SetCursorPosition must be called after this function to show the new cursor.
- Parameters:
base – LCD peripheral base address.
index – Index of the cursor to display.
-
void LCDC_SetCursorPosition(LCD_Type *base, int32_t positionX, int32_t positionY)
Set the position of cursor.
When synchronization mode is kLCDC_CursorSync, position change effects in the next frame. When synchronization mode is kLCDC_CursorAsync, position change effects immediately.
- Parameters:
base – LCD peripheral base address.
positionX – X ordinate of the cursor top-left measured in pixels
positionY – Y ordinate of the cursor top-left measured in pixels
-
void LCDC_SetCursorImage(LCD_Type *base, lcdc_cursor_size_t size, uint8_t index, const uint32_t *image)
Set the cursor image.
The interrupt kLCDC_CursorInterrupt indicates that last cursor pixel is displayed. When the hardware cursor is enabled,
- Parameters:
base – LCD peripheral base address.
size – The cursor size.
index – Index of the cursor to set when using 32x32 cursor.
image – Pointer to the cursor image. When using 32x32 cursor, the image size should be LCDC_CURSOR_IMG_32X32_WORDS. When using 64x64 cursor, the image size should be LCDC_CURSOR_IMG_64X64_WORDS.
-
FSL_LCDC_DRIVER_VERSION
LCDC driver version.
-
enum _lcdc_polarity_flags
LCD sigal polarity flags.
Values:
-
enumerator kLCDC_InvertVsyncPolarity
Invert the VSYNC polarity, set to active low.
-
enumerator kLCDC_InvertHsyncPolarity
Invert the HSYNC polarity, set to active low.
-
enumerator kLCDC_InvertClkPolarity
Invert the panel clock polarity, set to drive data on falling edge.
-
enumerator kLCDC_InvertDePolarity
Invert the data enable (DE) polarity, set to active low.
-
enumerator kLCDC_InvertVsyncPolarity
-
enum _lcdc_bpp
LCD bits per pixel.
Values:
-
enumerator kLCDC_1BPP
1 bpp.
-
enumerator kLCDC_2BPP
2 bpp.
-
enumerator kLCDC_4BPP
4 bpp.
-
enumerator kLCDC_8BPP
8 bpp.
-
enumerator kLCDC_16BPP
16 bpp.
-
enumerator kLCDC_24BPP
24 bpp, TFT panel only.
-
enumerator kLCDC_16BPP565
16 bpp, 5:6:5 mode.
-
enumerator kLCDC_12BPP
12 bpp, 4:4:4 mode.
-
enumerator kLCDC_1BPP
-
enum _lcdc_display
The types of display panel.
Values:
-
enumerator kLCDC_DisplayTFT
Active matrix TFT panels with up to 24-bit bus interface.
-
enumerator kLCDC_DisplaySingleMonoSTN4Bit
Single-panel monochrome STN (4-bit bus interface).
-
enumerator kLCDC_DisplaySingleMonoSTN8Bit
Single-panel monochrome STN (8-bit bus interface).
-
enumerator kLCDC_DisplayDualMonoSTN4Bit
Dual-panel monochrome STN (4-bit bus interface).
-
enumerator kLCDC_DisplayDualMonoSTN8Bit
Dual-panel monochrome STN (8-bit bus interface).
-
enumerator kLCDC_DisplaySingleColorSTN8Bit
Single-panel color STN (8-bit bus interface).
-
enumerator kLCDC_DisplayDualColorSTN8Bit
Dual-panel coor STN (8-bit bus interface).
-
enumerator kLCDC_DisplayTFT
-
enum _lcdc_data_format
LCD panel buffer data format.
Values:
-
enumerator kLCDC_LittleEndian
Little endian byte, little endian pixel.
-
enumerator kLCDC_BigEndian
Big endian byte, big endian pixel.
-
enumerator kLCDC_WinCeMode
little-endian byte, big-endian pixel for Windows CE mode.
-
enumerator kLCDC_LittleEndian
-
enum _lcdc_vertical_compare_interrupt_mode
LCD vertical compare interrupt mode.
Values:
-
enumerator kLCDC_StartOfVsync
Generate vertical compare interrupt at start of VSYNC.
-
enumerator kLCDC_StartOfBackPorch
Generate vertical compare interrupt at start of back porch.
-
enumerator kLCDC_StartOfActiveVideo
Generate vertical compare interrupt at start of active video.
-
enumerator kLCDC_StartOfFrontPorch
Generate vertical compare interrupt at start of front porch.
-
enumerator kLCDC_StartOfVsync
-
enum _lcdc_interrupts
LCD interrupts.
Values:
-
enumerator kLCDC_CursorInterrupt
Cursor image read finished interrupt.
-
enumerator kLCDC_FifoUnderflowInterrupt
FIFO underflow interrupt.
-
enumerator kLCDC_BaseAddrUpdateInterrupt
Panel frame base address update interrupt.
-
enumerator kLCDC_VerticalCompareInterrupt
Vertical compare interrupt.
-
enumerator kLCDC_AhbErrorInterrupt
AHB master error interrupt.
-
enumerator kLCDC_CursorInterrupt
-
enum _lcdc_panel
LCD panel frame.
Values:
-
enumerator kLCDC_UpperPanel
Upper panel frame.
-
enumerator kLCDC_LowerPanel
Lower panel frame.
-
enumerator kLCDC_UpperPanel
-
enum _lcdc_cursor_size
LCD hardware cursor size.
Values:
-
enumerator kLCDC_CursorSize32
32x32 pixel cursor.
-
enumerator kLCDC_CursorSize64
64x64 pixel cursor.
-
enumerator kLCDC_CursorSize32
-
enum _lcdc_cursor_sync_mode
LCD hardware cursor frame synchronization mode.
Values:
-
enumerator kLCDC_CursorAsync
Cursor change will be displayed immediately.
-
enumerator kLCDC_CursorSync
Cursor change will be displayed in next frame.
-
enumerator kLCDC_CursorAsync
-
typedef enum _lcdc_bpp lcdc_bpp_t
LCD bits per pixel.
-
typedef enum _lcdc_display lcdc_display_t
The types of display panel.
-
typedef enum _lcdc_data_format lcdc_data_format_t
LCD panel buffer data format.
-
typedef struct _lcdc_config lcdc_config_t
LCD configuration structure.
-
typedef enum _lcdc_vertical_compare_interrupt_mode lcdc_vertical_compare_interrupt_mode_t
LCD vertical compare interrupt mode.
-
typedef enum _lcdc_panel lcdc_panel_t
LCD panel frame.
-
typedef enum _lcdc_cursor_size lcdc_cursor_size_t
LCD hardware cursor size.
-
typedef struct _lcdc_cursor_palette lcdc_cursor_palette_t
LCD hardware cursor palette.
-
typedef enum _lcdc_cursor_sync_mode lcdc_cursor_sync_mode_t
LCD hardware cursor frame synchronization mode.
-
typedef struct _lcdc_cursor_config lcdc_cursor_config_t
LCD hardware cursor configuration structure.
-
LCDC_CURSOR_COUNT
How many hardware cursors supports.
-
LCDC_CURSOR_IMG_BPP
LCD cursor image bits per pixel.
-
LCDC_CURSOR_IMG_32X32_WORDS
LCD 32x32 cursor image size in word(32-bit).
-
LCDC_CURSOR_IMG_64X64_WORDS
LCD 64x64 cursor image size in word(32-bit).
-
LCDC_PALETTE_SIZE_WORDS
LCD palette size in words(32-bit).
-
struct _lcdc_config
- #include <fsl_lcdc.h>
LCD configuration structure.
Public Members
-
uint32_t panelClock_Hz
Panel clock in Hz.
-
uint16_t ppl
Pixels per line, it must could be divided by 16.
-
uint8_t hsw
HSYNC pulse width.
-
uint8_t hfp
Horizontal front porch.
-
uint8_t hbp
Horizontal back porch.
-
uint16_t lpp
Lines per panal.
-
uint8_t vsw
VSYNC pulse width.
-
uint8_t vfp
Vrtical front porch.
-
uint8_t vbp
Vertical back porch.
-
uint8_t acBiasFreq
The number of line clocks between AC bias pin toggling. Only used for STN display.
-
uint16_t polarityFlags
OR’ed value of _lcdc_polarity_flags, used to contol the signal polarity.
-
bool enableLineEnd
Enable line end or not, the line end is a positive pulse with 4 panel clock.
-
uint8_t lineEndDelay
The panel clocks between the last pixel of line and the start of line end.
-
uint32_t upperPanelAddr
LCD upper panel base address, must be double-word(64-bit) align.
-
uint32_t lowerPanelAddr
LCD lower panel base address, must be double-word(64-bit) align.
-
lcdc_bpp_t bpp
LCD bits per pixel.
-
lcdc_data_format_t dataFormat
Data format.
-
bool swapRedBlue
Set true to use BGR format, set false to choose RGB format.
-
lcdc_display_t display
The display type.
-
uint32_t panelClock_Hz
-
struct _lcdc_cursor_palette
- #include <fsl_lcdc.h>
LCD hardware cursor palette.
Public Members
-
uint8_t red
Red color component.
-
uint8_t green
Red color component.
-
uint8_t blue
Red color component.
-
uint8_t red
-
struct _lcdc_cursor_config
- #include <fsl_lcdc.h>
LCD hardware cursor configuration structure.
Public Members
-
lcdc_cursor_size_t size
Cursor size.
-
lcdc_cursor_sync_mode_t syncMode
Cursor synchronization mode.
-
lcdc_cursor_palette_t palette0
Cursor palette 0.
-
lcdc_cursor_palette_t palette1
Cursor palette 1.
-
uint32_t *image[4U]
Pointer to cursor image data.
-
lcdc_cursor_size_t size
MCAN: Controller Area Network Driver
-
void MCAN_Init(CAN_Type *base, const mcan_config_t *config, uint32_t sourceClock_Hz)
Initializes an MCAN instance.
This function initializes the MCAN module with user-defined settings. This example shows how to set up the mcan_config_t parameters and how to call the MCAN_Init function by passing in these parameters.
mcan_config_t config; config->baudRateA = 500000U; config->baudRateD = 1000000U; config->enableCanfdNormal = false; config->enableCanfdSwitch = false; config->enableLoopBackInt = false; config->enableLoopBackExt = false; config->enableBusMon = false; MCAN_Init(CANFD0, &config, 8000000UL);
- Parameters:
base – MCAN peripheral base address.
config – Pointer to the user-defined configuration structure.
sourceClock_Hz – MCAN Protocol Engine clock source frequency in Hz.
-
void MCAN_Deinit(CAN_Type *base)
Deinitializes an MCAN instance.
This function deinitializes the MCAN module.
- Parameters:
base – MCAN peripheral base address.
-
void MCAN_GetDefaultConfig(mcan_config_t *config)
Gets the default configuration structure.
This function initializes the MCAN configuration structure to default values. The default values are as follows. config->baudRateA = 500000U; config->baudRateD = 1000000U; config->enableCanfdNormal = false; config->enableCanfdSwitch = false; config->enableLoopBackInt = false; config->enableLoopBackExt = false; config->enableBusMon = false;
- Parameters:
config – Pointer to the MCAN configuration structure.
-
static inline void MCAN_EnterInitialMode(CAN_Type *base)
MCAN enters initialization mode.
After enter initialization mode, users can write access to the protected configuration registers.
- Parameters:
base – MCAN peripheral base address.
-
static inline void MCAN_EnterNormalMode(CAN_Type *base)
MCAN enters normal mode.
After initialization, INIT bit in CCCR register must be cleared to enter normal mode thus synchronizes to the CAN bus and ready for communication.
- Parameters:
base – MCAN peripheral base address.
-
static inline void MCAN_SetMsgRAMBase(CAN_Type *base, uint32_t value)
Sets the MCAN Message RAM base address.
This function sets the Message RAM base address.
- Parameters:
base – MCAN peripheral base address.
value – Desired Message RAM base.
-
static inline uint32_t MCAN_GetMsgRAMBase(CAN_Type *base)
Gets the MCAN Message RAM base address.
This function gets the Message RAM base address.
- Parameters:
base – MCAN peripheral base address.
- Returns:
Message RAM base address.
-
bool MCAN_CalculateImprovedTimingValues(uint32_t baudRate, uint32_t sourceClock_Hz, mcan_timing_config_t *pconfig)
Calculates the improved timing values by specific baudrates for classical CAN.
- Parameters:
baudRate – The classical CAN speed in bps defined by user
sourceClock_Hz – The Source clock data speed in bps. Zero to disable baudrate switching
pconfig – Pointer to the MCAN timing configuration structure.
- Returns:
TRUE if timing configuration found, FALSE if failed to find configuration
-
bool MCAN_CalculateSpecifiedTimingValues(uint32_t sourceClock_Hz, mcan_timing_config_t *pconfig, const mcan_timing_param_t *pParamConfig)
Calculates the specified timing values for classical CAN with user-defined settings.
User can specify baudrates, sample point position, bus length, and transceiver propagation delay. This example shows how to set up the mcan_timing_param_t parameters and how to call the this function by passing in these parameters.
mcan_timing_config_t timing_config; mcan_timing_param_t timing_param; timing_param.busLength = 1U; timing_param.propTxRx = 230U; timing_param.nominalbaudRate = 500000U; timing_param.nominalSP = 800U; MCAN_CalculateSpecifiedTimingValues(MCAN_CLK_FREQ, &timing_config, &timing_param);
Note that due to integer division will sacrifice the precision, actual sample point may not equal to expected. If actual sample point is not in allowed 2% range, this function will return false. So it is better to select higher source clock when baudrate is relatively high. This will ensure more time quanta and higher precision of sample point. Parameter busLength and propTxRx are optional and intended to verify whether propagation delay is too long to corrupt sample point. User can set these parameter zero if you do not want to consider this factor.
- Parameters:
sourceClock_Hz – The Source clock data speed in bps.
pconfig – Pointer to the MCAN timing configuration structure.
config – Pointer to the MCAN timing parameters structure.
- Returns:
TRUE if timing configuration found, FALSE if failed to find configuration
-
void MCAN_SetArbitrationTimingConfig(CAN_Type *base, const mcan_timing_config_t *config)
Sets the MCAN protocol arbitration phase timing characteristic.
This function gives user settings to CAN bus timing characteristic. The function is for an experienced user. For less experienced users, call the MCAN_Init() and fill the baud rate field with a desired value. This provides the default arbitration phase timing characteristics.
Note that calling MCAN_SetArbitrationTimingConfig() overrides the baud rate set in MCAN_Init().
- Parameters:
base – MCAN peripheral base address.
config – Pointer to the timing configuration structure.
-
status_t MCAN_SetBaudRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Bps)
Set Baud Rate of MCAN classic mode.
This function set the baud rate of MCAN base on MCAN_CalculateImprovedTimingValues() API calculated timing values.
- Parameters:
base – MCAN peripheral base address.
sourceClock_Hz – Source Clock in Hz.
baudRate_Bps – Baud Rate in Bps.
- Returns:
kStatus_Success - Set CAN baud rate (only has Nominal phase) successfully.
-
bool MCAN_FDCalculateImprovedTimingValues(uint32_t baudRate, uint32_t baudRateFD, uint32_t sourceClock_Hz, mcan_timing_config_t *pconfig)
Calculates the improved timing values by specific baudrates for CANFD.
- Parameters:
baudRate – The CANFD bus control speed in bps defined by user
baudRateFD – The CANFD bus data speed in bps defined by user
sourceClock_Hz – The Source clock data speed in bps.
pconfig – Pointer to the MCAN timing configuration structure.
- Returns:
TRUE if timing configuration found, FALSE if failed to find configuration
-
bool MCAN_FDCalculateSpecifiedTimingValues(uint32_t sourceClock_Hz, mcan_timing_config_t *pconfig, const mcan_timing_param_t *pParamConfig)
Calculates the specified timing values for CANFD with user-defined settings.
User can specify baudrates, sample point position, bus length, and transceiver propagation delay. This example shows how to set up the mcan_timing_param_t parameters and how to call the this function by passing in these parameters.
mcan_timing_config_t timing_config; mcan_timing_param_t timing_param; timing_param.busLength = 1U; timing_param.propTxRx = 230U; timing_param.nominalbaudRate = 500000U; timing_param.nominalSP = 800U; timing_param.databaudRate = 4000000U; timing_param.dataSP = 700U; MCAN_FDCalculateSpecifiedTimingValues(MCAN_CLK_FREQ, &timing_config, &timing_param);
Note that due to integer division will sacrifice the precision, actual sample point may not equal to expected. So it is better to select higher source clock when baudrate is relatively high. Select higher nominal baudrate when source clock is relatively high because large clock predivider will lead to less time quanta in data phase. This function will set predivider in arbitration phase equal to data phase. These methods will ensure more time quanta and higher precision of sample point. Parameter busLength and propTxRx are optional and intended to verify whether propagation delay is too long to corrupt sample point. User can set these parameter zero if you do not want to consider this factor.
- Parameters:
sourceClock_Hz – The Source clock data speed in bps.
pconfig – Pointer to the MCAN timing configuration structure.
config – Pointer to the MCAN timing parameters structure.
- Returns:
TRUE if timing configuration found, FALSE if failed to find configuration
-
status_t MCAN_SetBaudRateFD(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t baudRateN_Bps, uint32_t baudRateD_Bps)
Set Baud Rate of MCAN FD mode.
This function set the baud rate of MCAN FD base on MCAN_FDCalculateImprovedTimingValues API calculated timing values.
- Parameters:
base – MCAN peripheral base address.
sourceClock_Hz – Source Clock in Hz.
baudRateN_Bps – Nominal Baud Rate in Bps.
baudRateD_Bps – Data Baud Rate in Bps.
- Returns:
kStatus_Success - Set CAN FD baud rate (include Nominal and Data phase) successfully.
-
void MCAN_SetDataTimingConfig(CAN_Type *base, const mcan_timing_config_t *config)
Sets the MCAN protocol data phase timing characteristic.
This function gives user settings to CAN bus timing characteristic. The function is for an experienced user. For less experienced users, call the MCAN_Init() and fill the baud rate field with a desired value. This provides the default data phase timing characteristics.
Note that calling MCAN_SetArbitrationTimingConfig() overrides the baud rate set in MCAN_Init().
- Parameters:
base – MCAN peripheral base address.
config – Pointer to the timing configuration structure.
-
void MCAN_SetRxFifo0Config(CAN_Type *base, const mcan_rx_fifo_config_t *config)
Configures an MCAN receive fifo 0 buffer.
This function sets start address, element size, watermark, operation mode and datafield size of the recieve fifo 0.
- Parameters:
base – MCAN peripheral base address.
config – The receive fifo 0 configuration structure.
-
void MCAN_SetRxFifo1Config(CAN_Type *base, const mcan_rx_fifo_config_t *config)
Configures an MCAN receive fifo 1 buffer.
This function sets start address, element size, watermark, operation mode and datafield size of the recieve fifo 1.
- Parameters:
base – MCAN peripheral base address.
config – The receive fifo 1 configuration structure.
-
void MCAN_SetRxBufferConfig(CAN_Type *base, const mcan_rx_buffer_config_t *config)
Configures an MCAN receive buffer.
This function sets start address and datafield size of the recieve buffer.
- Parameters:
base – MCAN peripheral base address.
config – The receive buffer configuration structure.
-
void MCAN_SetTxEventFifoConfig(CAN_Type *base, const mcan_tx_fifo_config_t *config)
Configures an MCAN transmit event fifo.
This function sets start address, element size, watermark of the transmit event fifo.
- Parameters:
base – MCAN peripheral base address.
config – The transmit event fifo configuration structure.
-
void MCAN_SetTxBufferConfig(CAN_Type *base, const mcan_tx_buffer_config_t *config)
Configures an MCAN transmit buffer.
This function sets start address, element size, fifo/queue mode and datafield size of the transmit buffer.
- Parameters:
base – MCAN peripheral base address.
config – The transmit buffer configuration structure.
-
void MCAN_SetFilterConfig(CAN_Type *base, const mcan_frame_filter_config_t *config)
Set filter configuration.
This function sets remote and non masking frames in global filter configuration, also the start address, list size in standard/extended ID filter configuration.
- Parameters:
base – MCAN peripheral base address.
config – The MCAN filter configuration.
-
status_t MCAN_SetMessageRamConfig(CAN_Type *base, const mcan_memory_config_t *config)
Set Message RAM related configuration.
Note
This function include Standard/extended ID filter, Rx FIFO 0/1, Rx buffer, Tx event FIFO and Tx buffer configurations
- Parameters:
base – MCAN peripheral base address.
config – The MCAN filter configuration.
- Return values:
kStatus_Success – - Message RAM related configuration Successfully.
kStatus_Fail – - Message RAM related configure fail due to wrong address parameter.
-
void MCAN_SetSTDFilterElement(CAN_Type *base, const mcan_frame_filter_config_t *config, const mcan_std_filter_element_config_t *filter, uint8_t idx)
Set standard message ID filter element configuration.
- Parameters:
base – MCAN peripheral base address.
config – The MCAN filter configuration.
filter – The MCAN standard message ID filter element configuration.
idx – The standard message ID filter element index.
-
void MCAN_SetEXTFilterElement(CAN_Type *base, const mcan_frame_filter_config_t *config, const mcan_ext_filter_element_config_t *filter, uint8_t idx)
Set extended message ID filter element configuration.
- Parameters:
base – MCAN peripheral base address.
config – The MCAN filter configuration.
filter – The MCAN extended message ID filter element configuration.
idx – The extended message ID filter element index.
-
static inline uint32_t MCAN_GetStatusFlag(CAN_Type *base, uint32_t mask)
Gets the MCAN module interrupt flags.
This function gets all MCAN interrupt status flags.
- Parameters:
base – MCAN peripheral base address.
mask – The ORed MCAN interrupt mask.
- Returns:
MCAN status flags which are ORed.
-
static inline void MCAN_ClearStatusFlag(CAN_Type *base, uint32_t mask)
Clears the MCAN module interrupt flags.
This function clears MCAN interrupt status flags.
- Parameters:
base – MCAN peripheral base address.
mask – The ORed MCAN interrupt mask.
-
static inline bool MCAN_GetRxBufferStatusFlag(CAN_Type *base, uint8_t idx)
Gets the new data flag of specific Rx Buffer.
This function gets new data flag of specific Rx Buffer.
- Parameters:
base – MCAN peripheral base address.
idx – Rx Buffer index.
- Returns:
Rx Buffer new data status flag.
-
static inline void MCAN_ClearRxBufferStatusFlag(CAN_Type *base, uint8_t idx)
Clears the new data flag of specific Rx Buffer.
This function clears new data flag of specific Rx Buffer.
- Parameters:
base – MCAN peripheral base address.
idx – Rx Buffer index.
-
static inline void MCAN_EnableInterrupts(CAN_Type *base, uint32_t line, uint32_t mask)
Enables MCAN interrupts according to the provided interrupt line and mask.
This function enables the MCAN interrupts according to the provided interrupt line and mask. The mask is a logical OR of enumeration members.
- Parameters:
base – MCAN peripheral base address.
line – Interrupt line number, 0 or 1.
mask – The interrupts to enable.
-
static inline void MCAN_EnableTransmitBufferInterrupts(CAN_Type *base, uint8_t idx)
Enables MCAN Tx Buffer interrupts according to the provided index.
This function enables the MCAN Tx Buffer interrupts.
- Parameters:
base – MCAN peripheral base address.
idx – Tx Buffer index.
-
static inline void MCAN_DisableTransmitBufferInterrupts(CAN_Type *base, uint8_t idx)
Disables MCAN Tx Buffer interrupts according to the provided index.
This function disables the MCAN Tx Buffer interrupts.
- Parameters:
base – MCAN peripheral base address.
idx – Tx Buffer index.
-
static inline void MCAN_DisableInterrupts(CAN_Type *base, uint32_t mask)
Disables MCAN interrupts according to the provided mask.
This function disables the MCAN interrupts according to the provided mask. The mask is a logical OR of enumeration members.
- Parameters:
base – MCAN peripheral base address.
mask – The interrupts to disable.
-
uint32_t MCAN_IsTransmitRequestPending(CAN_Type *base, uint8_t idx)
Gets the Tx buffer request pending status.
This function returns Tx Message Buffer transmission request pending status.
- Parameters:
base – MCAN peripheral base address.
idx – The MCAN Tx Buffer index.
-
uint32_t MCAN_IsTransmitOccurred(CAN_Type *base, uint8_t idx)
Gets the Tx buffer transmission occurred status.
This function returns Tx Message Buffer transmission occurred status.
- Parameters:
base – MCAN peripheral base address.
idx – The MCAN Tx Buffer index.
-
status_t MCAN_WriteTxBuffer(CAN_Type *base, uint8_t idx, const mcan_tx_buffer_frame_t *pTxFrame)
Writes an MCAN Message to the Transmit Buffer.
This function writes a CAN Message to the specified Transmit Message Buffer and changes the Message Buffer state to start CAN Message transmit. After that the function returns immediately.
- Parameters:
base – MCAN peripheral base address.
idx – The MCAN Tx Buffer index.
pTxFrame – Pointer to CAN message frame to be sent.
-
status_t MCAN_ReadRxBuffer(CAN_Type *base, uint8_t idx, mcan_rx_buffer_frame_t *pRxFrame)
Reads an MCAN Message from Rx Buffer.
This function reads a CAN message from the Rx Buffer in the Message RAM.
- Parameters:
base – MCAN peripheral base address.
idx – The MCAN Rx Buffer index.
pRxFrame – Pointer to CAN message frame structure for reception.
- Return values:
kStatus_Success – - Read Message from Rx Buffer successfully.
-
status_t MCAN_ReadRxFifo(CAN_Type *base, uint8_t fifoBlock, mcan_rx_buffer_frame_t *pRxFrame)
Reads an MCAN Message from Rx FIFO.
This function reads a CAN message from the Rx FIFO in the Message RAM.
- Parameters:
base – MCAN peripheral base address.
fifoBlock – Rx FIFO block 0 or 1.
pRxFrame – Pointer to CAN message frame structure for reception.
- Return values:
kStatus_Success – - Read Message from Rx FIFO successfully.
-
static inline void MCAN_TransmitAddRequest(CAN_Type *base, uint8_t idx)
Tx Buffer add request to send message out.
This function add sending request to corresponding Tx Buffer.
- Parameters:
base – MCAN peripheral base address.
idx – Tx Buffer index.
-
static inline void MCAN_TransmitCancelRequest(CAN_Type *base, uint8_t idx)
Tx Buffer cancel sending request.
This function clears Tx buffer request pending bit.
- Parameters:
base – MCAN peripheral base address.
idx – Tx Buffer index.
-
status_t MCAN_TransferSendBlocking(CAN_Type *base, uint8_t idx, mcan_tx_buffer_frame_t *pTxFrame)
Performs a polling send transaction on the CAN bus.
Note that a transfer handle does not need to be created before calling this API.
- Parameters:
base – MCAN peripheral base pointer.
idx – The MCAN buffer index.
pTxFrame – Pointer to CAN message frame to be sent.
- Return values:
kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.
-
status_t MCAN_TransferReceiveBlocking(CAN_Type *base, uint8_t idx, mcan_rx_buffer_frame_t *pRxFrame)
Performs a polling receive transaction on the CAN bus.
Note that a transfer handle does not need to be created before calling this API.
- Parameters:
base – MCAN peripheral base pointer.
idx – The MCAN buffer index.
pRxFrame – Pointer to CAN message frame structure for reception.
- Return values:
kStatus_Success – - Read Rx Message Buffer Successfully.
kStatus_Fail – - No new message.
-
status_t MCAN_TransferReceiveFifoBlocking(CAN_Type *base, uint8_t fifoBlock, mcan_rx_buffer_frame_t *pRxFrame)
Performs a polling receive transaction from Rx FIFO on the CAN bus.
Note that a transfer handle does not need to be created before calling this API.
- Parameters:
base – MCAN peripheral base pointer.
fifoBlock – Rx FIFO block, 0 or 1.
pRxFrame – Pointer to CAN message frame structure for reception.
- Return values:
kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - No new message in Rx FIFO.
-
void MCAN_TransferCreateHandle(CAN_Type *base, mcan_handle_t *handle, mcan_transfer_callback_t callback, void *userData)
Initializes the MCAN handle.
This function initializes the MCAN handle, which can be used for other MCAN transactional APIs. Usually, for a specified MCAN instance, call this API once to get the initialized handle.
- Parameters:
base – MCAN peripheral base address.
handle – MCAN handle pointer.
callback – The callback function.
userData – The parameter of the callback function.
-
status_t MCAN_TransferSendNonBlocking(CAN_Type *base, mcan_handle_t *handle, mcan_buffer_transfer_t *xfer)
Sends a message using IRQ.
This function sends a message using IRQ. This is a non-blocking function, which returns right away. When messages have been sent out, the send callback function is called.
- Parameters:
base – MCAN peripheral base address.
handle – MCAN handle pointer.
xfer – MCAN Buffer transfer structure. See the mcan_buffer_transfer_t.
- Return values:
kStatus_Success – Start Tx Buffer sending process successfully.
kStatus_Fail – Write Tx Buffer failed.
kStatus_MCAN_TxBusy – Tx Buffer is in use.
-
status_t MCAN_TransferReceiveFifoNonBlocking(CAN_Type *base, uint8_t fifoBlock, mcan_handle_t *handle, mcan_fifo_transfer_t *xfer)
Receives a message from Rx FIFO using IRQ.
This function receives a message using IRQ. This is a non-blocking function, which returns right away. When all messages have been received, the receive callback function is called.
- Parameters:
base – MCAN peripheral base address.
handle – MCAN handle pointer.
fifoBlock – Rx FIFO block, 0 or 1.
xfer – MCAN Rx FIFO transfer structure. See the mcan_fifo_transfer_t.
- Return values:
kStatus_Success – - Start Rx FIFO receiving process successfully.
kStatus_MCAN_RxFifo0Busy – - Rx FIFO 0 is currently in use.
kStatus_MCAN_RxFifo1Busy – - Rx FIFO 1 is currently in use.
-
void MCAN_TransferAbortSend(CAN_Type *base, mcan_handle_t *handle, uint8_t bufferIdx)
Aborts the interrupt driven message send process.
This function aborts the interrupt driven message send process.
- Parameters:
base – MCAN peripheral base address.
handle – MCAN handle pointer.
bufferIdx – The MCAN Buffer index.
-
void MCAN_TransferAbortReceiveFifo(CAN_Type *base, uint8_t fifoBlock, mcan_handle_t *handle)
Aborts the interrupt driven message receive from Rx FIFO process.
This function aborts the interrupt driven message receive from Rx FIFO process.
- Parameters:
base – MCAN peripheral base address.
fifoBlock – MCAN Fifo block, 0 or 1.
handle – MCAN handle pointer.
-
void MCAN_TransferHandleIRQ(CAN_Type *base, mcan_handle_t *handle)
MCAN IRQ handle function.
This function handles the MCAN Error, the Buffer, and the Rx FIFO IRQ request.
- Parameters:
base – MCAN peripheral base address.
handle – MCAN handle pointer.
-
FSL_MCAN_DRIVER_VERSION
MCAN driver version.
MCAN transfer status.
Values:
-
enumerator kStatus_MCAN_TxBusy
Tx Buffer is Busy.
-
enumerator kStatus_MCAN_TxIdle
Tx Buffer is Idle.
-
enumerator kStatus_MCAN_RxBusy
Rx Buffer is Busy.
-
enumerator kStatus_MCAN_RxIdle
Rx Buffer is Idle.
-
enumerator kStatus_MCAN_RxFifo0New
New message written to Rx FIFO 0.
-
enumerator kStatus_MCAN_RxFifo0Idle
Rx FIFO 0 is Idle.
-
enumerator kStatus_MCAN_RxFifo0Watermark
Rx FIFO 0 fill level reached watermark.
-
enumerator kStatus_MCAN_RxFifo0Full
Rx FIFO 0 full.
-
enumerator kStatus_MCAN_RxFifo0Lost
Rx FIFO 0 message lost.
-
enumerator kStatus_MCAN_RxFifo1New
New message written to Rx FIFO 1.
-
enumerator kStatus_MCAN_RxFifo1Idle
Rx FIFO 1 is Idle.
-
enumerator kStatus_MCAN_RxFifo1Watermark
Rx FIFO 1 fill level reached watermark.
-
enumerator kStatus_MCAN_RxFifo1Full
Rx FIFO 1 full.
-
enumerator kStatus_MCAN_RxFifo1Lost
Rx FIFO 1 message lost.
-
enumerator kStatus_MCAN_RxFifo0Busy
Rx FIFO 0 is busy.
-
enumerator kStatus_MCAN_RxFifo1Busy
Rx FIFO 1 is busy.
-
enumerator kStatus_MCAN_ErrorStatus
MCAN Module Error and Status.
-
enumerator kStatus_MCAN_UnHandled
UnHadled Interrupt asserted.
-
enumerator kStatus_MCAN_TxBusy
-
enum _mcan_flags
MCAN status flags.
This provides constants for the MCAN status flags for use in the MCAN functions. Note: The CPU read action clears MCAN_ErrorFlag, therefore user need to read MCAN_ErrorFlag and distinguish which error is occur using _mcan_error_flags enumerations.
Values:
-
enumerator kMCAN_AccesstoRsvdFlag
CAN Synchronization Status.
-
enumerator kMCAN_ProtocolErrDIntFlag
Tx Warning Interrupt Flag.
-
enumerator kMCAN_ProtocolErrAIntFlag
Rx Warning Interrupt Flag.
-
enumerator kMCAN_BusOffIntFlag
Tx Error Warning Status.
-
enumerator kMCAN_ErrorWarningIntFlag
Rx Error Warning Status.
-
enumerator kMCAN_ErrorPassiveIntFlag
Rx Error Warning Status.
-
enumerator kMCAN_AccesstoRsvdFlag
-
enum _mcan_rx_fifo_flags
MCAN Rx FIFO status flags.
The MCAN Rx FIFO Status enumerations are used to determine the status of the Rx FIFO.
Values:
-
enumerator kMCAN_RxFifo0NewFlag
Rx FIFO 0 new message flag.
-
enumerator kMCAN_RxFifo0WatermarkFlag
Rx FIFO 0 watermark reached flag.
-
enumerator kMCAN_RxFifo0FullFlag
Rx FIFO 0 full flag.
-
enumerator kMCAN_RxFifo0LostFlag
Rx FIFO 0 message lost flag.
-
enumerator kMCAN_RxFifo1NewFlag
Rx FIFO 0 new message flag.
-
enumerator kMCAN_RxFifo1WatermarkFlag
Rx FIFO 0 watermark reached flag.
-
enumerator kMCAN_RxFifo1FullFlag
Rx FIFO 0 full flag.
-
enumerator kMCAN_RxFifo1LostFlag
Rx FIFO 0 message lost flag.
-
enumerator kMCAN_RxFifo0NewFlag
-
enum _mcan_tx_flags
MCAN Tx status flags.
The MCAN Tx Status enumerations are used to determine the status of the Tx Buffer/Event FIFO.
Values:
-
enumerator kMCAN_TxTransmitCompleteFlag
Transmission completed flag.
-
enumerator kMCAN_TxTransmitCancelFinishFlag
Transmission cancellation finished flag.
-
enumerator kMCAN_TxEventFifoLostFlag
Tx Event FIFO element lost.
-
enumerator kMCAN_TxEventFifoFullFlag
Tx Event FIFO full.
-
enumerator kMCAN_TxEventFifoWatermarkFlag
Tx Event FIFO fill level reached watermark.
-
enumerator kMCAN_TxEventFifoNewFlag
Tx Handler wrote Tx Event FIFO element flag.
-
enumerator kMCAN_TxEventFifoEmptyFlag
Tx FIFO empty flag.
-
enumerator kMCAN_TxTransmitCompleteFlag
-
enum _mcan_interrupt_enable
MCAN interrupt configuration structure, default settings all disabled.
This structure contains the settings for all of the MCAN Module interrupt configurations.
Values:
-
enumerator kMCAN_BusOffInterruptEnable
Bus Off interrupt.
-
enumerator kMCAN_ErrorInterruptEnable
Error interrupt.
-
enumerator kMCAN_WarningInterruptEnable
Rx Warning interrupt.
-
enumerator kMCAN_BusOffInterruptEnable
-
enum _mcan_frame_idformat
MCAN frame format.
Values:
-
enumerator kMCAN_FrameIDStandard
Standard frame format attribute.
-
enumerator kMCAN_FrameIDExtend
Extend frame format attribute.
-
enumerator kMCAN_FrameIDStandard
-
enum _mcan_frame_type
MCAN frame type.
Values:
-
enumerator kMCAN_FrameTypeData
Data frame type attribute.
-
enumerator kMCAN_FrameTypeRemote
Remote frame type attribute.
-
enumerator kMCAN_FrameTypeData
-
enum _mcan_bytes_in_datafield
MCAN frame datafield size.
Values:
-
enumerator kMCAN_8ByteDatafield
8 byte data field.
-
enumerator kMCAN_12ByteDatafield
12 byte data field.
-
enumerator kMCAN_16ByteDatafield
16 byte data field.
-
enumerator kMCAN_20ByteDatafield
20 byte data field.
-
enumerator kMCAN_24ByteDatafield
24 byte data field.
-
enumerator kMCAN_32ByteDatafield
32 byte data field.
-
enumerator kMCAN_48ByteDatafield
48 byte data field.
-
enumerator kMCAN_64ByteDatafield
64 byte data field.
-
enumerator kMCAN_8ByteDatafield
-
enum _mcan_fifo_type
MCAN Rx FIFO block number.
Values:
-
enumerator kMCAN_Fifo0
CAN Rx FIFO 0.
-
enumerator kMCAN_Fifo1
CAN Rx FIFO 1.
-
enumerator kMCAN_Fifo0
-
enum _mcan_fifo_opmode_config
MCAN FIFO Operation Mode.
Values:
-
enumerator kMCAN_FifoBlocking
FIFO blocking mode.
-
enumerator kMCAN_FifoOverwrite
FIFO overwrite mode.
-
enumerator kMCAN_FifoBlocking
-
enum _mcan_txmode_config
MCAN Tx FIFO/Queue Mode.
Values:
-
enumerator kMCAN_txFifo
Tx FIFO operation.
-
enumerator kMCAN_txQueue
Tx Queue operation.
-
enumerator kMCAN_txFifo
-
enum _mcan_remote_frame_config
MCAN remote frames treatment.
Values:
-
enumerator kMCAN_filterFrame
Filter remote frames.
-
enumerator kMCAN_rejectFrame
Reject all remote frames.
-
enumerator kMCAN_filterFrame
-
enum _mcan_nonmasking_frame_config
MCAN non-masking frames treatment.
Values:
-
enumerator kMCAN_acceptinFifo0
Accept non-masking frames in Rx FIFO 0.
-
enumerator kMCAN_acceptinFifo1
Accept non-masking frames in Rx FIFO 1.
-
enumerator kMCAN_reject0
Reject non-masking frames.
-
enumerator kMCAN_reject1
Reject non-masking frames.
-
enumerator kMCAN_acceptinFifo0
-
enum _mcan_fec_config
MCAN Filter Element Configuration.
Values:
-
enumerator kMCAN_disable
Disable filter element.
-
enumerator kMCAN_storeinFifo0
Store in Rx FIFO 0 if filter matches.
-
enumerator kMCAN_storeinFifo1
Store in Rx FIFO 1 if filter matches.
-
enumerator kMCAN_reject
Reject ID if filter matches.
-
enumerator kMCAN_setprio
Set priority if filter matches.
-
enumerator kMCAN_setpriofifo0
Set priority and store in FIFO 0 if filter matches.
-
enumerator kMCAN_setpriofifo1
Set priority and store in FIFO 1 if filter matches.
-
enumerator kMCAN_storeinbuffer
Store into Rx Buffer or as debug message.
-
enumerator kMCAN_disable
-
enum _mcan_std_filter_type
MCAN Filter Type.
Values:
-
enumerator kMCAN_range
Range filter from SFID1 to SFID2.
-
enumerator kMCAN_dual
Dual ID filter for SFID1 or SFID2.
-
enumerator kMCAN_classic
Classic filter: SFID1 = filter, SFID2 = mask.
-
enumerator kMCAN_disableORrange2
Filter element disabled for standard filter or Range filter, XIDAM mask not applied for extended filter.
-
enumerator kMCAN_range
-
typedef enum _mcan_frame_idformat mcan_frame_idformat_t
MCAN frame format.
-
typedef enum _mcan_frame_type mcan_frame_type_t
MCAN frame type.
-
typedef enum _mcan_bytes_in_datafield mcan_bytes_in_datafield_t
MCAN frame datafield size.
-
typedef struct _mcan_tx_buffer_frame mcan_tx_buffer_frame_t
MCAN Tx Buffer structure.
-
typedef struct _mcan_rx_buffer_frame mcan_rx_buffer_frame_t
MCAN Rx FIFO/Buffer structure.
-
typedef enum _mcan_fifo_type mcan_fifo_type_t
MCAN Rx FIFO block number.
-
typedef enum _mcan_fifo_opmode_config mcan_fifo_opmode_config_t
MCAN FIFO Operation Mode.
-
typedef enum _mcan_txmode_config mcan_txmode_config_t
MCAN Tx FIFO/Queue Mode.
-
typedef enum _mcan_remote_frame_config mcan_remote_frame_config_t
MCAN remote frames treatment.
-
typedef enum _mcan_nonmasking_frame_config mcan_nonmasking_frame_config_t
MCAN non-masking frames treatment.
-
typedef enum _mcan_fec_config mcan_fec_config_t
MCAN Filter Element Configuration.
-
typedef struct _mcan_rx_fifo_config mcan_rx_fifo_config_t
MCAN Rx FIFO configuration.
-
typedef struct _mcan_rx_buffer_config mcan_rx_buffer_config_t
MCAN Rx Buffer configuration.
-
typedef struct _mcan_tx_fifo_config mcan_tx_fifo_config_t
MCAN Tx Event FIFO configuration.
-
typedef struct _mcan_tx_buffer_config mcan_tx_buffer_config_t
MCAN Tx Buffer configuration.
-
typedef enum _mcan_std_filter_type mcan_filter_type_t
MCAN Filter Type.
-
typedef struct _mcan_std_filter_element_config mcan_std_filter_element_config_t
MCAN Standard Message ID Filter Element.
-
typedef struct _mcan_ext_filter_element_config mcan_ext_filter_element_config_t
MCAN Extended Message ID Filter Element.
-
typedef struct _mcan_frame_filter_config mcan_frame_filter_config_t
MCAN Rx filter configuration.
-
typedef struct _mcan_timing_config mcan_timing_config_t
MCAN protocol timing characteristic configuration structure.
-
typedef struct _mcan_timing_param mcan_timing_param_t
MCAN bit timing parameter configuration structure.
-
typedef struct _mcan_memory_config mcan_memory_config_t
MCAN Message RAM related configuration structure.
-
typedef struct _mcan_config mcan_config_t
MCAN module configuration structure.
-
typedef struct _mcan_buffer_transfer mcan_buffer_transfer_t
MCAN Buffer transfer.
-
typedef struct _mcan_fifo_transfer mcan_fifo_transfer_t
MCAN Rx FIFO transfer.
-
typedef struct _mcan_handle mcan_handle_t
MCAN handle structure definition.
-
typedef void (*mcan_transfer_callback_t)(CAN_Type *base, mcan_handle_t *handle, status_t status, uint32_t result, void *userData)
MCAN transfer callback function.
The MCAN transfer callback returns a value from the underlying layer. If the status equals to kStatus_MCAN_ErrorStatus, the result parameter is the Content of MCAN status register which can be used to get the working status(or error status) of MCAN module. If the status equals to other MCAN Message Buffer transfer status, the result is the index of Message Buffer that generate transfer event. If the status equals to other MCAN Message Buffer transfer status, the result is meaningless and should be Ignored.
-
MCAN_RETRY_TIMES
-
struct _mcan_tx_buffer_frame
- #include <fsl_mcan.h>
MCAN Tx Buffer structure.
Public Members
-
uint8_t size
classical CAN is 8(bytes), FD is 12/64 such.
-
uint8_t size
-
struct _mcan_rx_buffer_frame
- #include <fsl_mcan.h>
MCAN Rx FIFO/Buffer structure.
Public Members
-
uint8_t size
classical CAN is 8(bytes), FD is 12/64 such.
-
uint8_t size
-
struct _mcan_rx_fifo_config
- #include <fsl_mcan.h>
MCAN Rx FIFO configuration.
Public Members
-
uint32_t address
FIFOn start address.
-
uint32_t elementSize
FIFOn element number.
-
uint32_t watermark
FIFOn watermark level.
-
mcan_fifo_opmode_config_t opmode
FIFOn blocking/overwrite mode.
-
mcan_bytes_in_datafield_t datafieldSize
Data field size per frame, size>8 is for CANFD.
-
uint32_t address
-
struct _mcan_rx_buffer_config
- #include <fsl_mcan.h>
MCAN Rx Buffer configuration.
Public Members
-
uint32_t address
Rx Buffer start address.
-
mcan_bytes_in_datafield_t datafieldSize
Data field size per frame, size>8 is for CANFD.
-
uint32_t address
-
struct _mcan_tx_fifo_config
- #include <fsl_mcan.h>
MCAN Tx Event FIFO configuration.
Public Members
-
uint32_t address
Event fifo start address.
-
uint32_t elementSize
FIFOn element number.
-
uint32_t watermark
FIFOn watermark level.
-
uint32_t address
-
struct _mcan_tx_buffer_config
- #include <fsl_mcan.h>
MCAN Tx Buffer configuration.
Public Members
-
uint32_t address
Tx Buffers Start Address.
-
uint32_t dedicatedSize
Number of Dedicated Transmit Buffers.
-
uint32_t fqSize
Transmit FIFO/Queue Size.
-
mcan_txmode_config_t mode
Tx FIFO/Queue Mode.
-
mcan_bytes_in_datafield_t datafieldSize
Data field size per frame, size>8 is for CANFD.
-
uint32_t address
-
struct _mcan_std_filter_element_config
- #include <fsl_mcan.h>
MCAN Standard Message ID Filter Element.
Public Members
-
uint32_t sfid2
Standard Filter ID 2.
-
uint32_t __pad0__
Reserved.
-
uint32_t sfid1
Standard Filter ID 1.
-
uint32_t sfec
Standard Filter Element Configuration.
-
uint32_t sft
Standard Filter Type.
-
uint32_t sfid2
-
struct _mcan_ext_filter_element_config
- #include <fsl_mcan.h>
MCAN Extended Message ID Filter Element.
Public Members
-
uint32_t efid1
Extended Filter ID 1.
-
uint32_t efec
Extended Filter Element Configuration.
-
uint32_t efid2
Extended Filter ID 2.
-
uint32_t __pad0__
Reserved.
-
uint32_t eft
Extended Filter Type.
-
uint32_t efid1
-
struct _mcan_frame_filter_config
- #include <fsl_mcan.h>
MCAN Rx filter configuration.
Public Members
-
uint32_t address
Filter start address.
-
uint32_t listSize
Filter list size.
-
mcan_frame_idformat_t idFormat
Frame format.
-
mcan_remote_frame_config_t remFrame
Remote frame treatment.
-
mcan_nonmasking_frame_config_t nmFrame
Non-masking frame treatment.
-
uint32_t address
-
struct _mcan_timing_config
- #include <fsl_mcan.h>
MCAN protocol timing characteristic configuration structure.
Public Members
-
uint16_t preDivider
Nominal Clock Pre-scaler Division Factor.
-
uint8_t rJumpwidth
Nominal Re-sync Jump Width.
-
uint8_t seg1
Nominal Time Segment 1.
-
uint8_t seg2
Nominal Time Segment 2.
-
uint16_t datapreDivider
Data Clock Pre-scaler Division Factor.
-
uint8_t datarJumpwidth
Data Re-sync Jump Width.
-
uint8_t dataseg1
Data Time Segment 1.
-
uint8_t dataseg2
Data Time Segment 2.
-
uint16_t preDivider
-
struct _mcan_timing_param
- #include <fsl_mcan.h>
MCAN bit timing parameter configuration structure.
Public Members
-
uint32_t busLength
Maximum Bus length in meter.
-
uint32_t propTxRx
Transceiver propagation delay in nanosecond.
-
uint32_t nominalbaudRate
Baud rate of Arbitration phase in bps.
-
uint32_t nominalSP
Sample point of Arbitration phase, range in 10 ~ 990, 800 means 80%.
-
uint32_t databaudRate
Baud rate of Data phase in bps.
-
uint32_t dataSP
Sample point of Data phase, range in 0 ~ 1000, 800 means 80%.
-
uint32_t busLength
-
struct _mcan_memory_config
- #include <fsl_mcan.h>
MCAN Message RAM related configuration structure.
Public Members
-
uint32_t baseAddr
Message RAM base address, should be 4k alignment.
-
uint32_t baseAddr
-
struct _mcan_config
- #include <fsl_mcan.h>
MCAN module configuration structure.
Public Members
-
uint32_t baudRateA
Baud rate of Arbitration phase in bps.
-
uint32_t baudRateD
Baud rate of Data phase in bps.
-
bool enableCanfdNormal
Enable or Disable CANFD normal.
-
bool enableCanfdSwitch
Enable or Disable CANFD with baudrate switch.
-
bool enableLoopBackInt
Enable or Disable Internal Back.
-
bool enableLoopBackExt
Enable or Disable External Loop Back.
-
bool enableBusMon
Enable or Disable Bus Monitoring Mode.
-
mcan_timing_config_t timingConfig
Protocol timing .
-
uint32_t baudRateA
-
struct _mcan_buffer_transfer
- #include <fsl_mcan.h>
MCAN Buffer transfer.
Public Members
-
mcan_tx_buffer_frame_t *frame
The buffer of CAN Message to be transfer.
-
uint8_t bufferIdx
The index of Message buffer used to transfer Message.
-
mcan_tx_buffer_frame_t *frame
-
struct _mcan_fifo_transfer
- #include <fsl_mcan.h>
MCAN Rx FIFO transfer.
Public Members
-
mcan_rx_buffer_frame_t *frame
The buffer of CAN Message to be received from Rx FIFO.
-
mcan_rx_buffer_frame_t *frame
-
struct _mcan_handle
- #include <fsl_mcan.h>
MCAN handle structure.
Public Members
-
mcan_transfer_callback_t callback
Callback function.
-
void *userData
MCAN callback function parameter.
-
mcan_tx_buffer_frame_t *volatile bufferFrameBuf[64]
The buffer for received data from Buffers.
-
mcan_rx_buffer_frame_t *volatile rxFifoFrameBuf
The buffer for received data from Rx FIFO.
-
volatile uint8_t bufferState[64]
Message Buffer transfer state.
-
volatile uint8_t rxFifoState
Rx FIFO transfer state.
-
mcan_transfer_callback_t callback
-
struct __unnamed11__
Public Members
-
uint32_t id
CAN Frame Identifier.
-
uint32_t rtr
CAN Frame Type(DATA or REMOTE).
-
uint32_t xtd
CAN Frame Type(STD or EXT).
-
uint32_t esi
CAN Frame Error State Indicator.
-
uint32_t id
-
struct __unnamed13__
Public Members
-
uint32_t dlc
Data Length Code 9 10 11 12 13 14 15 Number of data bytes 12 16 20 24 32 48 64
-
uint32_t brs
Bit Rate Switch.
-
uint32_t fdf
CAN FD format.
-
uint32_t __pad1__
Reserved.
-
uint32_t efc
Event FIFO control.
-
uint32_t mm
Message Marker.
-
uint32_t dlc
-
struct __unnamed15__
Public Members
-
uint32_t id
CAN Frame Identifier.
-
uint32_t rtr
CAN Frame Type(DATA or REMOTE).
-
uint32_t xtd
CAN Frame Type(STD or EXT).
-
uint32_t esi
CAN Frame Error State Indicator.
-
uint32_t id
-
struct __unnamed17__
Public Members
-
uint32_t rxts
Rx Timestamp.
-
uint32_t dlc
Data Length Code 9 10 11 12 13 14 15 Number of data bytes 12 16 20 24 32 48 64
-
uint32_t brs
Bit Rate Switch.
-
uint32_t fdf
CAN FD format.
-
uint32_t __pad0__
Reserved.
-
uint32_t fidx
Filter Index.
-
uint32_t anmf
Accepted Non-matching Frame.
-
uint32_t rxts
MRT: Multi-Rate Timer
-
void MRT_Init(MRT_Type *base, const mrt_config_t *config)
Ungates the MRT clock and configures the peripheral for basic operation.
Note
This API should be called at the beginning of the application using the MRT driver.
- Parameters:
base – Multi-Rate timer peripheral base address
config – Pointer to user’s MRT config structure. If MRT has MULTITASK bit field in MODCFG reigster, param config is useless.
-
void MRT_Deinit(MRT_Type *base)
Gate the MRT clock.
- Parameters:
base – Multi-Rate timer peripheral base address
-
static inline void MRT_GetDefaultConfig(mrt_config_t *config)
Fill in the MRT config struct with the default settings.
The default values are:
config->enableMultiTask = false;
- Parameters:
config – Pointer to user’s MRT config structure.
-
static inline void MRT_SetupChannelMode(MRT_Type *base, mrt_chnl_t channel, const mrt_timer_mode_t mode)
Sets up an MRT channel mode.
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Channel that is being configured.
mode – Timer mode to use for the channel.
-
static inline void MRT_EnableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)
Enables the MRT interrupt.
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The interrupts to enable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t
-
static inline void MRT_DisableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)
Disables the selected MRT interrupt.
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The interrupts to disable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t
-
static inline uint32_t MRT_GetEnabledInterrupts(MRT_Type *base, mrt_chnl_t channel)
Gets the enabled MRT interrupts.
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number
- Returns:
The enabled interrupts. This is the logical OR of members of the enumeration mrt_interrupt_enable_t
-
static inline uint32_t MRT_GetStatusFlags(MRT_Type *base, mrt_chnl_t channel)
Gets the MRT status flags.
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number
- Returns:
The status flags. This is the logical OR of members of the enumeration mrt_status_flags_t
-
static inline void MRT_ClearStatusFlags(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)
Clears the MRT status flags.
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The status flags to clear. This is a logical OR of members of the enumeration mrt_status_flags_t
-
void MRT_UpdateTimerPeriod(MRT_Type *base, mrt_chnl_t channel, uint32_t count, bool immediateLoad)
Used to update the timer period in units of count.
The new value will be immediately loaded or will be loaded at the end of the current time interval. For one-shot interrupt mode the new value will be immediately loaded.
Note
User can call the utility macros provided in fsl_common.h to convert to ticks
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number
count – Timer period in units of ticks
immediateLoad – true: Load the new value immediately into the TIMER register; false: Load the new value at the end of current timer interval
-
static inline uint32_t MRT_GetCurrentTimerCount(MRT_Type *base, mrt_chnl_t channel)
Reads the current timer counting value.
This function returns the real-time timer counting value, in a range from 0 to a timer period.
Note
User can call the utility macros provided in fsl_common.h to convert ticks to usec or msec
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number
- Returns:
Current timer counting value in ticks
-
static inline void MRT_StartTimer(MRT_Type *base, mrt_chnl_t channel, uint32_t count)
Starts the timer counting.
After calling this function, timers load period value, counts down to 0 and depending on the timer mode it will either load the respective start value again or stop.
Note
User can call the utility macros provided in fsl_common.h to convert to ticks
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number.
count – Timer period in units of ticks. Count can contain the LOAD bit, which control the force load feature.
-
static inline void MRT_StopTimer(MRT_Type *base, mrt_chnl_t channel)
Stops the timer counting.
This function stops the timer from counting.
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number.
-
static inline uint32_t MRT_GetIdleChannel(MRT_Type *base)
Find the available channel.
This function returns the lowest available channel number.
- Parameters:
base – Multi-Rate timer peripheral base address
-
static inline void MRT_ReleaseChannel(MRT_Type *base, mrt_chnl_t channel)
Release the channel when the timer is using the multi-task mode.
In multi-task mode, the INUSE flags allow more control over when MRT channels are released for further use. The user can hold on to a channel acquired by calling MRT_GetIdleChannel() for as long as it is needed and release it by calling this function. This removes the need to ask for an available channel for every use.
- Parameters:
base – Multi-Rate timer peripheral base address
channel – Timer channel number.
-
FSL_MRT_DRIVER_VERSION
-
enum _mrt_chnl
List of MRT channels.
Values:
-
enumerator kMRT_Channel_0
MRT channel number 0
-
enumerator kMRT_Channel_1
MRT channel number 1
-
enumerator kMRT_Channel_2
MRT channel number 2
-
enumerator kMRT_Channel_3
MRT channel number 3
-
enumerator kMRT_Channel_0
-
enum _mrt_timer_mode
List of MRT timer modes.
Values:
-
enumerator kMRT_RepeatMode
Repeat Interrupt mode
-
enumerator kMRT_OneShotMode
One-shot Interrupt mode
-
enumerator kMRT_OneShotStallMode
One-shot stall mode
-
enumerator kMRT_RepeatMode
-
enum _mrt_interrupt_enable
List of MRT interrupts.
Values:
-
enumerator kMRT_TimerInterruptEnable
Timer interrupt enable
-
enumerator kMRT_TimerInterruptEnable
-
enum _mrt_status_flags
List of MRT status flags.
Values:
-
enumerator kMRT_TimerInterruptFlag
Timer interrupt flag
-
enumerator kMRT_TimerRunFlag
Indicates state of the timer
-
enumerator kMRT_TimerInterruptFlag
-
typedef enum _mrt_chnl mrt_chnl_t
List of MRT channels.
-
typedef enum _mrt_timer_mode mrt_timer_mode_t
List of MRT timer modes.
-
typedef enum _mrt_interrupt_enable mrt_interrupt_enable_t
List of MRT interrupts.
-
typedef enum _mrt_status_flags mrt_status_flags_t
List of MRT status flags.
-
typedef struct _mrt_config mrt_config_t
MRT configuration structure.
This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.
The config struct can be made const so it resides in flash
-
struct _mrt_config
- #include <fsl_mrt.h>
MRT configuration structure.
This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.
The config struct can be made const so it resides in flash
Public Members
-
bool enableMultiTask
true: Timers run in multi-task mode; false: Timers run in hardware status mode
-
bool enableMultiTask
OTP: One-Time Programmable memory and API
-
FSL_OTP_DRIVER_VERSION
OTP driver version 2.0.1.
Current version: 2.0.1
Change log:
Version 2.0.1
Fixed MISRA-C 2012 violations.
Version 2.0.0
Initial version.
-
enum _otp_bank
Bank bit flags.
Values:
-
enumerator kOTP_Bank0
Bank 0.
-
enumerator kOTP_Bank1
Bank 1.
-
enumerator kOTP_Bank2
Bank 2.
-
enumerator kOTP_Bank3
Bank 3.
-
enumerator kOTP_Bank0
-
enum _otp_word
Bank word bit flags.
Values:
-
enumerator kOTP_Word0
Word 0.
-
enumerator kOTP_Word1
Word 1.
-
enumerator kOTP_Word2
Word 2.
-
enumerator kOTP_Word3
Word 3.
-
enumerator kOTP_Word0
-
enum _otp_lock
Lock modifications of a read or write access to a bank register.
Values:
-
enumerator kOTP_LockDontLock
Do not lock.
-
enumerator kOTP_LockLock
Lock till reset.
-
enumerator kOTP_LockDontLock
-
enum _otp_status
OTP error codes.
Values:
-
enumerator kStatus_OTP_WrEnableInvalid
Write enable invalid.
-
enumerator kStatus_OTP_SomeBitsAlreadyProgrammed
Some bits already programmed.
-
enumerator kStatus_OTP_AllDataOrMaskZero
All data or mask zero.
-
enumerator kStatus_OTP_WriteAccessLocked
Write access locked.
-
enumerator kStatus_OTP_ReadDataMismatch
Read data mismatch.
-
enumerator kStatus_OTP_UsbIdEnabled
USB ID enabled.
-
enumerator kStatus_OTP_EthMacEnabled
Ethernet MAC enabled.
-
enumerator kStatus_OTP_AesKeysEnabled
AES keys enabled.
-
enumerator kStatus_OTP_IllegalBank
Illegal bank.
-
enumerator kStatus_OTP_ShufflerConfigNotValid
Shuffler config not valid.
-
enumerator kStatus_OTP_ShufflerNotEnabled
Shuffler not enabled.
-
enumerator kStatus_OTP_ShufflerCanOnlyProgSingleKey
Shuffler can only program single key.
-
enumerator kStatus_OTP_IllegalProgramData
Illegal program data.
-
enumerator kStatus_OTP_ReadAccessLocked
Read access locked.
-
enumerator kStatus_OTP_WrEnableInvalid
-
typedef enum _otp_bank otp_bank_t
Bank bit flags.
-
typedef enum _otp_word otp_word_t
Bank word bit flags.
-
typedef enum _otp_lock otp_lock_t
Lock modifications of a read or write access to a bank register.
-
static inline status_t OTP_Init(void)
Initializes OTP controller.
- Returns:
kStatus_Success upon successful execution, error status otherwise.
-
static inline status_t OTP_EnableBankWriteMask(otp_bank_t bankMask)
Unlock one or more OTP banks for write access.
- Parameters:
bankMask – bit flag that specifies which banks to unlock.
- Returns:
kStatus_Success upon successful execution, error status otherwise.
-
static inline status_t OTP_DisableBankWriteMask(otp_bank_t bankMask)
Lock one or more OTP banks for write access.
- Parameters:
bankMask – bit flag that specifies which banks to lock.
- Returns:
kStatus_Success upon successful execution, error status otherwise.
-
static inline status_t OTP_EnableBankWriteLock(uint32_t bankIndex, otp_word_t regEnableMask, otp_word_t regDisableMask, otp_lock_t lockWrite)
Locks or unlocks write access to a register of an OTP bank and possibly lock un/locking of it.
- Parameters:
bankIndex – OTP bank index, 0 = bank 0, 1 = bank 1 etc.
regEnableMask – bit flag that specifies for which words to enable writing.
regDisableMask – bit flag that specifies for which words to disable writing.
lockWrite – specifies if access set can be modified or is locked till reset.
- Returns:
kStatus_Success upon successful execution, error status otherwise.
-
static inline status_t OTP_EnableBankReadLock(uint32_t bankIndex, otp_word_t regEnableMask, otp_word_t regDisableMask, otp_lock_t lockWrite)
Locks or unlocks read access to a register of an OTP bank and possibly lock un/locking of it.
- Parameters:
bankIndex – OTP bank index, 0 = bank 0, 1 = bank 1 etc.
regEnableMask – bit flag that specifies for which words to enable reading.
regDisableMask – bit flag that specifies for which words to disable reading.
lockWrite – specifies if access set can be modified or is locked till reset.
- Returns:
kStatus_Success upon successful execution, error status otherwise.
-
static inline status_t OTP_ProgramRegister(uint32_t bankIndex, uint32_t regIndex, uint32_t value)
Program a single register in an OTP bank.
- Parameters:
bankIndex – OTP bank index, 0 = bank 0, 1 = bank 1 etc.
regIndex – OTP register index.
value – value to write.
- Returns:
kStatus_Success upon successful execution, error status otherwise.
-
static inline uint32_t OTP_GetDriverVersion(void)
Returns the version of the OTP driver in ROM.
- Returns:
version.
-
FSL_COMPONENT_ID
-
_OTP_ERR_BASE
-
_OTP_MAKE_STATUS(errorCode)
PINT: Pin Interrupt and Pattern Match Driver
-
FSL_PINT_DRIVER_VERSION
-
enum _pint_pin_enable
PINT Pin Interrupt enable type.
Values:
-
enumerator kPINT_PinIntEnableNone
Do not generate Pin Interrupt
-
enumerator kPINT_PinIntEnableRiseEdge
Generate Pin Interrupt on rising edge
-
enumerator kPINT_PinIntEnableFallEdge
Generate Pin Interrupt on falling edge
-
enumerator kPINT_PinIntEnableBothEdges
Generate Pin Interrupt on both edges
-
enumerator kPINT_PinIntEnableLowLevel
Generate Pin Interrupt on low level
-
enumerator kPINT_PinIntEnableHighLevel
Generate Pin Interrupt on high level
-
enumerator kPINT_PinIntEnableNone
-
enum _pint_int
PINT Pin Interrupt type.
Values:
-
enumerator kPINT_PinInt0
Pin Interrupt 0
-
enumerator kPINT_PinInt0
-
enum _pint_pmatch_input_src
PINT Pattern Match bit slice input source type.
Values:
-
enumerator kPINT_PatternMatchInp0Src
Input source 0
-
enumerator kPINT_PatternMatchInp1Src
Input source 1
-
enumerator kPINT_PatternMatchInp2Src
Input source 2
-
enumerator kPINT_PatternMatchInp3Src
Input source 3
-
enumerator kPINT_PatternMatchInp4Src
Input source 4
-
enumerator kPINT_PatternMatchInp5Src
Input source 5
-
enumerator kPINT_PatternMatchInp6Src
Input source 6
-
enumerator kPINT_PatternMatchInp7Src
Input source 7
-
enumerator kPINT_SecPatternMatchInp0Src
Input source 0
-
enumerator kPINT_SecPatternMatchInp1Src
Input source 1
-
enumerator kPINT_PatternMatchInp0Src
-
enum _pint_pmatch_bslice
PINT Pattern Match bit slice type.
Values:
-
enumerator kPINT_PatternMatchBSlice0
Bit slice 0
-
enumerator kPINT_PatternMatchBSlice0
-
enum _pint_pmatch_bslice_cfg
PINT Pattern Match configuration type.
Values:
-
enumerator kPINT_PatternMatchAlways
Always Contributes to product term match
-
enumerator kPINT_PatternMatchStickyRise
Sticky Rising edge
-
enumerator kPINT_PatternMatchStickyFall
Sticky Falling edge
-
enumerator kPINT_PatternMatchStickyBothEdges
Sticky Rising or Falling edge
-
enumerator kPINT_PatternMatchHigh
High level
-
enumerator kPINT_PatternMatchLow
Low level
-
enumerator kPINT_PatternMatchNever
Never contributes to product term match
-
enumerator kPINT_PatternMatchBothEdges
Either rising or falling edge
-
enumerator kPINT_PatternMatchAlways
-
typedef enum _pint_pin_enable pint_pin_enable_t
PINT Pin Interrupt enable type.
-
typedef enum _pint_int pint_pin_int_t
PINT Pin Interrupt type.
-
typedef enum _pint_pmatch_input_src pint_pmatch_input_src_t
PINT Pattern Match bit slice input source type.
-
typedef enum _pint_pmatch_bslice pint_pmatch_bslice_t
PINT Pattern Match bit slice type.
-
typedef enum _pint_pmatch_bslice_cfg pint_pmatch_bslice_cfg_t
PINT Pattern Match configuration type.
-
typedef void (*pint_cb_t)(pint_pin_int_t pintr, uint32_t pmatch_status)
PINT Callback function.
-
typedef struct _pint_pmatch_cfg pint_pmatch_cfg_t
-
void PINT_Init(PINT_Type *base)
Initialize PINT peripheral.
This function initializes the PINT peripheral and enables the clock.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
void PINT_PinInterruptConfig(PINT_Type *base, pint_pin_int_t intr, pint_pin_enable_t enable, pint_cb_t callback)
Configure PINT peripheral pin interrupt.
This function configures a given pin interrupt.
- Parameters:
base – Base address of the PINT peripheral.
intr – Pin interrupt.
enable – Selects detection logic.
callback – Callback.
- Return values:
None. –
-
void PINT_PinInterruptGetConfig(PINT_Type *base, pint_pin_int_t pintr, pint_pin_enable_t *enable, pint_cb_t *callback)
Get PINT peripheral pin interrupt configuration.
This function returns the configuration of a given pin interrupt.
- Parameters:
base – Base address of the PINT peripheral.
pintr – Pin interrupt.
enable – Pointer to store the detection logic.
callback – Callback.
- Return values:
None. –
-
void PINT_PinInterruptClrStatus(PINT_Type *base, pint_pin_int_t pintr)
Clear Selected pin interrupt status only when the pin was triggered by edge-sensitive.
This function clears the selected pin interrupt status.
- Parameters:
base – Base address of the PINT peripheral.
pintr – Pin interrupt.
- Return values:
None. –
-
static inline uint32_t PINT_PinInterruptGetStatus(PINT_Type *base, pint_pin_int_t pintr)
Get Selected pin interrupt status.
This function returns the selected pin interrupt status.
- Parameters:
base – Base address of the PINT peripheral.
pintr – Pin interrupt.
- Return values:
status – = 0 No pin interrupt request. = 1 Selected Pin interrupt request active.
-
void PINT_PinInterruptClrStatusAll(PINT_Type *base)
Clear all pin interrupts status only when pins were triggered by edge-sensitive.
This function clears the status of all pin interrupts.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
static inline uint32_t PINT_PinInterruptGetStatusAll(PINT_Type *base)
Get all pin interrupts status.
This function returns the status of all pin interrupts.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
status – Each bit position indicates the status of corresponding pin interrupt. = 0 No pin interrupt request. = 1 Pin interrupt request active.
-
static inline void PINT_PinInterruptClrFallFlag(PINT_Type *base, pint_pin_int_t pintr)
Clear Selected pin interrupt fall flag.
This function clears the selected pin interrupt fall flag.
- Parameters:
base – Base address of the PINT peripheral.
pintr – Pin interrupt.
- Return values:
None. –
-
static inline uint32_t PINT_PinInterruptGetFallFlag(PINT_Type *base, pint_pin_int_t pintr)
Get selected pin interrupt fall flag.
This function returns the selected pin interrupt fall flag.
- Parameters:
base – Base address of the PINT peripheral.
pintr – Pin interrupt.
- Return values:
flag – = 0 Falling edge has not been detected. = 1 Falling edge has been detected.
-
static inline void PINT_PinInterruptClrFallFlagAll(PINT_Type *base)
Clear all pin interrupt fall flags.
This function clears the fall flag for all pin interrupts.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
static inline uint32_t PINT_PinInterruptGetFallFlagAll(PINT_Type *base)
Get all pin interrupt fall flags.
This function returns the fall flag of all pin interrupts.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
flags – Each bit position indicates the falling edge detection of the corresponding pin interrupt. 0 Falling edge has not been detected. = 1 Falling edge has been detected.
-
static inline void PINT_PinInterruptClrRiseFlag(PINT_Type *base, pint_pin_int_t pintr)
Clear Selected pin interrupt rise flag.
This function clears the selected pin interrupt rise flag.
- Parameters:
base – Base address of the PINT peripheral.
pintr – Pin interrupt.
- Return values:
None. –
-
static inline uint32_t PINT_PinInterruptGetRiseFlag(PINT_Type *base, pint_pin_int_t pintr)
Get selected pin interrupt rise flag.
This function returns the selected pin interrupt rise flag.
- Parameters:
base – Base address of the PINT peripheral.
pintr – Pin interrupt.
- Return values:
flag – = 0 Rising edge has not been detected. = 1 Rising edge has been detected.
-
static inline void PINT_PinInterruptClrRiseFlagAll(PINT_Type *base)
Clear all pin interrupt rise flags.
This function clears the rise flag for all pin interrupts.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
static inline uint32_t PINT_PinInterruptGetRiseFlagAll(PINT_Type *base)
Get all pin interrupt rise flags.
This function returns the rise flag of all pin interrupts.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
flags – Each bit position indicates the rising edge detection of the corresponding pin interrupt. 0 Rising edge has not been detected. = 1 Rising edge has been detected.
-
void PINT_PatternMatchConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)
Configure PINT pattern match.
This function configures a given pattern match bit slice.
- Parameters:
base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.
cfg – Pointer to bit slice configuration.
- Return values:
None. –
-
void PINT_PatternMatchGetConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)
Get PINT pattern match configuration.
This function returns the configuration of a given pattern match bit slice.
- Parameters:
base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.
cfg – Pointer to bit slice configuration.
- Return values:
None. –
-
static inline uint32_t PINT_PatternMatchGetStatus(PINT_Type *base, pint_pmatch_bslice_t bslice)
Get pattern match bit slice status.
This function returns the status of selected bit slice.
- Parameters:
base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.
- Return values:
status – = 0 Match has not been detected. = 1 Match has been detected.
-
static inline uint32_t PINT_PatternMatchGetStatusAll(PINT_Type *base)
Get status of all pattern match bit slices.
This function returns the status of all bit slices.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
status – Each bit position indicates the match status of corresponding bit slice. = 0 Match has not been detected. = 1 Match has been detected.
-
uint32_t PINT_PatternMatchResetDetectLogic(PINT_Type *base)
Reset pattern match detection logic.
This function resets the pattern match detection logic if any of the product term is matching.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
pmstatus – Each bit position indicates the match status of corresponding bit slice. = 0 Match was detected. = 1 Match was not detected.
-
static inline void PINT_PatternMatchEnable(PINT_Type *base)
Enable pattern match function.
This function enables the pattern match function.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
static inline void PINT_PatternMatchDisable(PINT_Type *base)
Disable pattern match function.
This function disables the pattern match function.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
static inline void PINT_PatternMatchEnableRXEV(PINT_Type *base)
Enable RXEV output.
This function enables the pattern match RXEV output.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
static inline void PINT_PatternMatchDisableRXEV(PINT_Type *base)
Disable RXEV output.
This function disables the pattern match RXEV output.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
void PINT_EnableCallback(PINT_Type *base)
Enable callback.
This function enables the interrupt for the selected PINT peripheral. Although the pin(s) are monitored as soon as they are enabled, the callback function is not enabled until this function is called.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
void PINT_DisableCallback(PINT_Type *base)
Disable callback.
This function disables the interrupt for the selected PINT peripheral. Although the pins are still being monitored but the callback function is not called.
- Parameters:
base – Base address of the peripheral.
- Return values:
None. –
-
void PINT_Deinit(PINT_Type *base)
Deinitialize PINT peripheral.
This function disables the PINT clock.
- Parameters:
base – Base address of the PINT peripheral.
- Return values:
None. –
-
void PINT_EnableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)
enable callback by pin index.
This function enables callback by pin index instead of enabling all pins.
- Parameters:
base – Base address of the peripheral.
pintIdx – pin index.
- Return values:
None. –
-
void PINT_DisableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)
disable callback by pin index.
This function disables callback by pin index instead of disabling all pins.
- Parameters:
base – Base address of the peripheral.
pintIdx – pin index.
- Return values:
None. –
-
PININT_BITSLICE_SRC_START
-
PININT_BITSLICE_SRC_MASK
-
PININT_BITSLICE_CFG_START
-
PININT_BITSLICE_CFG_MASK
-
PININT_BITSLICE_ENDP_MASK
-
PINT_PIN_INT_LEVEL
-
PINT_PIN_INT_EDGE
-
PINT_PIN_INT_FALL_OR_HIGH_LEVEL
-
PINT_PIN_INT_RISE
-
PINT_PIN_RISE_EDGE
-
PINT_PIN_FALL_EDGE
-
PINT_PIN_BOTH_EDGE
-
PINT_PIN_LOW_LEVEL
-
PINT_PIN_HIGH_LEVEL
-
struct _pint_pmatch_cfg
- #include <fsl_pint.h>
Power Driver
-
enum pd_bits
Values:
-
enumerator kPDRUNCFG_LP_REG
-
enumerator kPDRUNCFG_PD_FRO_EN
-
enumerator kPDRUNCFG_PD_TS
-
enumerator kPDRUNCFG_PD_BOD_RESET
-
enumerator kPDRUNCFG_PD_BOD_INTR
-
enumerator kPDRUNCFG_PD_VD2_ANA
-
enumerator kPDRUNCFG_PD_ADC0
-
enumerator kPDRUNCFG_PD_RAM0
-
enumerator kPDRUNCFG_PD_RAM1
-
enumerator kPDRUNCFG_PD_RAM2
-
enumerator kPDRUNCFG_PD_RAM3
-
enumerator kPDRUNCFG_PD_ROM
-
enumerator kPDRUNCFG_PD_VDDA
-
enumerator kPDRUNCFG_PD_WDT_OSC
-
enumerator kPDRUNCFG_PD_USB0_PHY
-
enumerator kPDRUNCFG_PD_SYS_PLL0
-
enumerator kPDRUNCFG_PD_VREFP
-
enumerator kPDRUNCFG_PD_FLASH_BG
-
enumerator kPDRUNCFG_PD_VD3
-
enumerator kPDRUNCFG_PD_VD4
-
enumerator kPDRUNCFG_PD_VD5
-
enumerator kPDRUNCFG_PD_VD6
-
enumerator kPDRUNCFG_REQ_DELAY
-
enumerator kPDRUNCFG_FORCE_RBB
-
enumerator kPDRUNCFG_PD_USB1_PHY
-
enumerator kPDRUNCFG_PD_USB_PLL
-
enumerator kPDRUNCFG_PD_AUDIO_PLL
-
enumerator kPDRUNCFG_PD_SYS_OSC
-
enumerator kPDRUNCFG_PD_EEPROM
-
enumerator kPDRUNCFG_PD_rng
-
enumerator kPDRUNCFG_ForceUnsigned
-
enumerator kPDRUNCFG_LP_REG
-
enum _power_mode_config
Values:
-
enumerator kPmu_Sleep
-
enumerator kPmu_Deep_Sleep
-
enumerator kPmu_Deep_PowerDown
-
enumerator kPmu_Sleep
-
enum _power_bod_status
The enumeration of BOD status flags.
Values:
-
enumerator kBod_ResetStatusFlag
BOD reset has occurred.
-
enumerator kBod_InterruptStatusFlag
BOD interrupt has occurred
-
enumerator kBod_ResetStatusFlag
-
enum _power_bod_reset_level
The enumeration of BOD reset level.
Values:
-
enumerator kBod_ResetLevel0
Reset Level0: 1.62V.
-
enumerator kBod_ResetLevel1
Reset Level0: 1.68V.
-
enumerator kBod_ResetLevel2
Reset Level0: 2.21V.
-
enumerator kBod_ResetLevel3
Reset Level0: 2.85V.
-
enumerator kBod_ResetLevel0
-
enum _power_bod_interrupt_level
The enumeration of BOD interrupt level.
Values:
-
enumerator kBod_InterruptLevel0
Interrupt level: 1.63V.
-
enumerator kBod_InterruptLevel1
Interrupt level: 1.68V.
-
enumerator kBod_InterruptLevel2
Interrupt level: 1.95V.
-
enumerator kBod_InterruptLevel3
Interrupt level: 2.86V.
-
enumerator kBod_InterruptLevel0
-
typedef enum pd_bits pd_bit_t
-
typedef enum _power_mode_config power_mode_cfg_t
-
typedef enum _power_bod_status power_bod_status_t
The enumeration of BOD status flags.
-
typedef enum _power_bod_reset_level power_bod_reset_level_t
The enumeration of BOD reset level.
-
typedef enum _power_bod_interrupt_level power_bod_interrupt_level_t
The enumeration of BOD interrupt level.
-
typedef struct _power_bod_config power_bod_config_t
The configuration of power bod, including reset level, interrupt level, and so on.
-
FSL_POWER_DRIVER_VERSION
power driver version 2.2.0.
-
MAKE_PD_BITS(reg, slot)
-
PDRCFG0
-
PDRCFG1
-
static inline void POWER_EnablePD(pd_bit_t en)
API to enable PDRUNCFG bit in the Syscon. Note that enabling the bit powers down the peripheral.
- Parameters:
en – peripheral for which to enable the PDRUNCFG bit
- Returns:
none
-
static inline void POWER_DisablePD(pd_bit_t en)
API to disable PDRUNCFG bit in the Syscon. Note that disabling the bit powers up the peripheral.
- Parameters:
en – peripheral for which to disable the PDRUNCFG bit
- Returns:
none
-
static inline void POWER_EnableDeepSleep(void)
API to enable deep sleep bit in the ARM Core.
- Returns:
none
-
static inline void POWER_DisableDeepSleep(void)
API to disable deep sleep bit in the ARM Core.
- Returns:
none
-
void POWER_OtpReload(void)
Power Library API to reload OTP. This API must be called if VD6 is power down and power back again since FROHF TRIM value is store in OTP. If not, when calling FROHF settng API in clock driver then the FROHF clock out put will be inaccurate.
- Returns:
none
-
void POWER_SetPLL(void)
Power Library API to power the PLLs.
- Returns:
none
-
void POWER_SetUsbPhy(void)
Power Library API to power the USB PHY.
- Returns:
none
-
void POWER_EnterPowerMode(power_mode_cfg_t mode, uint64_t exclude_from_pd)
Power Library API to enter different power modes.
- Parameters:
mode – Power mode.
exclude_from_pd – Bit mask of the PDRUNCFG0(low 32bits) and PDRUNCFG1(high 32bits) that needs to be powered on during power mode selected.
- Returns:
none
-
void POWER_EnterSleep(void)
Power Library API to enter sleep mode.
- Returns:
none
-
void POWER_EnterDeepSleep(uint64_t exclude_from_pd)
Power Library API to enter deep sleep mode.
- Parameters:
exclude_from_pd – Bit mask of the PDRUNCFG0(low 32bits) and PDRUNCFG1(high 32bits) bits that needs to be powered on during deep sleep
- Returns:
none
-
void POWER_EnterDeepPowerDown(uint64_t exclude_from_pd)
Power Library API to enter deep power down mode.
- Parameters:
exclude_from_pd – Bit mask of the PDRUNCFG0(low 32bits) and PDRUNCFG1(high 32bits) that needs to be powered on during deep power down mode, but this is has no effect as the voltages are cut off.
- Returns:
none
-
void POWER_SetVoltageForFreq(uint32_t freq)
Power Library API to choose normal regulation and set the voltage for the desired operating frequency.
- Parameters:
freq – - The desired frequency at which the part would like to operate, note that the voltage and flash wait states should be set before changing frequency
- Returns:
none
-
uint32_t POWER_GetLibVersion(void)
Power Library API to return the library version.
- Returns:
version number of the power library
-
void POWER_InitBod(const power_bod_config_t *bodConfig)
Initialize BOD, including enabling/disabling BOD interrupt, enabling/disabling BOD reset, setting BOD interrupt level, and reset level.
- Parameters:
bodConfig – Pointer the the structure power_bod_config_t.
-
void POWER_GetDefaultBodConfig(power_bod_config_t *bodConfig)
Get default BOD configuration.
bodConfig->enableReset = true; bodConfig->resetLevel = kBod_ResetLevel0; bodConfig->enableInterrupt = false; bodConfig->interruptLevel = kBod_InterruptLevel0;
- Parameters:
bodConfig – Pointer the the structure power_bod_config_t.
-
static inline void POWER_DeinitBod(void)
De-initialize BOD.
-
static inline uint32_t POWER_GetBodStatusFlags(void)
Get Bod status flags.
- Returns:
uint32_t
-
static inline void POWER_ClearBodStatusFlags(uint32_t mask)
Clear Bod status flags.
- Parameters:
mask – The mask of status flags to clear, should be the OR’ed value of power_bod_status_t.
-
bool enableReset
Enable/disable BOD reset function.
-
power_bod_reset_level_t resetLevel
BOD reset level, please refer to power_bod_reset_level_t.
-
bool enableInterrupt
Enable/disable BOD interrupt function.
-
power_bod_interrupt_level_t interruptLevel
BOD interrupt level, please refer to power_bod_interrupt_level_t.
-
struct _power_bod_config
- #include <fsl_power.h>
The configuration of power bod, including reset level, interrupt level, and so on.
PUF: Physical Unclonable Function
-
FSL_PUF_DRIVER_VERSION
PUF driver version. Version 2.1.6.
Current version: 2.1.6
Change log:
2.0.0
Initial version.
2.0.1
Fixed puf_wait_usec function optimization issue.
2.0.2
Add PUF configuration structure and support for PUF SRAM controller. Remove magic constants.
2.0.3
Fix MISRA C-2012 issue.
2.1.0
Align driver with PUF SRAM controller registers on LPCXpresso55s16.
Update initizalition logic .
2.1.1
Fix ARMGCC build warning .
2.1.2
Update: Add automatic big to little endian swap for user (pre-shared) keys destinated to secret hardware bus (PUF key index 0).
2.1.3
Fix MISRA C-2012 issue.
2.1.4
Replace register uint32_t ticksCount with volatile uint32_t ticksCount in puf_wait_usec() to prevent optimization out delay loop.
2.1.5
Use common SDK delay in puf_wait_usec()
2.1.6
Changed wait time in PUF_Init(), when initialization fails it will try PUF_Powercycle() with shorter time. If this shorter time will also fail, initialization will be tried with worst case time as before.
-
enum _puf_key_index_register
Values:
-
enumerator kPUF_KeyIndex_00
-
enumerator kPUF_KeyIndex_01
-
enumerator kPUF_KeyIndex_02
-
enumerator kPUF_KeyIndex_03
-
enumerator kPUF_KeyIndex_04
-
enumerator kPUF_KeyIndex_05
-
enumerator kPUF_KeyIndex_06
-
enumerator kPUF_KeyIndex_07
-
enumerator kPUF_KeyIndex_08
-
enumerator kPUF_KeyIndex_09
-
enumerator kPUF_KeyIndex_10
-
enumerator kPUF_KeyIndex_11
-
enumerator kPUF_KeyIndex_12
-
enumerator kPUF_KeyIndex_13
-
enumerator kPUF_KeyIndex_14
-
enumerator kPUF_KeyIndex_15
-
enumerator kPUF_KeyIndex_00
-
enum _puf_min_max
Values:
-
enumerator kPUF_KeySizeMin
-
enumerator kPUF_KeySizeMax
-
enumerator kPUF_KeyIndexMax
-
enumerator kPUF_KeySizeMin
-
enum _puf_key_slot
PUF key slot.
Values:
-
enumerator kPUF_KeySlot0
PUF key slot 0
-
enumerator kPUF_KeySlot1
PUF key slot 1
-
enumerator kPUF_KeySlot0
PUF status return codes.
Values:
-
enumerator kStatus_EnrollNotAllowed
-
enumerator kStatus_StartNotAllowed
-
enumerator kStatus_EnrollNotAllowed
-
typedef enum _puf_key_index_register puf_key_index_register_t
-
typedef enum _puf_min_max puf_min_max_t
-
typedef enum _puf_key_slot puf_key_slot_t
PUF key slot.
-
PUF_GET_KEY_CODE_SIZE_FOR_KEY_SIZE(x)
Get Key Code size in bytes from key size in bytes at compile time.
-
PUF_MIN_KEY_CODE_SIZE
-
PUF_ACTIVATION_CODE_SIZE
-
KEYSTORE_PUF_DISCHARGE_TIME_FIRST_TRY_MS
-
KEYSTORE_PUF_DISCHARGE_TIME_MAX_MS
-
struct puf_config_t
- #include <fsl_puf.h>
Reset Driver
-
enum _SYSCON_RSTn
Enumeration for peripheral reset control bits.
Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers
Values:
-
enumerator kSPIFI_RST_SHIFT_RSTn
SPIFI reset control
-
enumerator kMUX_RST_SHIFT_RSTn
Input mux reset control
-
enumerator kIOCON_RST_SHIFT_RSTn
IOCON reset control
-
enumerator kGPIO0_RST_SHIFT_RSTn
GPIO0 reset control
-
enumerator kGPIO1_RST_SHIFT_RSTn
GPIO1 reset control
-
enumerator kGPIO2_RST_SHIFT_RSTn
GPIO2 reset control
-
enumerator kGPIO3_RST_SHIFT_RSTn
GPIO3 reset control
-
enumerator kPINT_RST_SHIFT_RSTn
Pin interrupt (PINT) reset control
-
enumerator kGINT_RST_SHIFT_RSTn
Grouped interrupt (PINT) reset control.
-
enumerator kDMA_RST_SHIFT_RSTn
DMA reset control
-
enumerator kCRC_RST_SHIFT_RSTn
CRC reset control
-
enumerator kWWDT_RST_SHIFT_RSTn
Watchdog timer reset control
-
enumerator kADC0_RST_SHIFT_RSTn
ADC0 reset control
-
enumerator kMRT_RST_SHIFT_RSTn
Multi-rate timer (MRT) reset control
-
enumerator kSCT0_RST_SHIFT_RSTn
SCTimer/PWM 0 (SCT0) reset control
-
enumerator kMCAN0_RST_SHIFT_RSTn
MCAN0 reset control
-
enumerator kMCAN1_RST_SHIFT_RSTn
MCAN1 reset control
-
enumerator kUTICK_RST_SHIFT_RSTn
Micro-tick timer reset control
-
enumerator kFC0_RST_SHIFT_RSTn
Flexcomm Interface 0 reset control
-
enumerator kFC1_RST_SHIFT_RSTn
Flexcomm Interface 1 reset control
-
enumerator kFC2_RST_SHIFT_RSTn
Flexcomm Interface 2 reset control
-
enumerator kFC3_RST_SHIFT_RSTn
Flexcomm Interface 3 reset control
-
enumerator kFC4_RST_SHIFT_RSTn
Flexcomm Interface 4 reset control
-
enumerator kFC5_RST_SHIFT_RSTn
Flexcomm Interface 5 reset control
-
enumerator kFC6_RST_SHIFT_RSTn
Flexcomm Interface 6 reset control
-
enumerator kFC7_RST_SHIFT_RSTn
Flexcomm Interface 7 reset control
-
enumerator kDMIC_RST_SHIFT_RSTn
Digital microphone interface reset control
-
enumerator kCT32B2_RST_SHIFT_RSTn
CT32B2 reset control
-
enumerator kUSB0D_RST_SHIFT_RSTn
USB0D reset control
-
enumerator kCT32B0_RST_SHIFT_RSTn
CT32B0 reset control
-
enumerator kCT32B1_RST_SHIFT_RSTn
CT32B1 reset control
-
enumerator kLCD_RST_SHIFT_RSTn
LCD reset control
-
enumerator kSDIO_RST_SHIFT_RSTn
SDIO reset control
-
enumerator kUSB1H_RST_SHIFT_RSTn
USB1H reset control
-
enumerator kUSB1D_RST_SHIFT_RSTn
USB1D reset control
-
enumerator kUSB1RAM_RST_SHIFT_RSTn
USB1RAM reset control
-
enumerator kEMC_RST_SHIFT_RSTn
EMC reset control
-
enumerator kETH_RST_SHIFT_RSTn
ETH reset control
-
enumerator kGPIO4_RST_SHIFT_RSTn
GPIO4 reset control
-
enumerator kGPIO5_RST_SHIFT_RSTn
GPIO5 reset control
-
enumerator kAES_RST_SHIFT_RSTn
AES reset control
-
enumerator kOTP_RST_SHIFT_RSTn
OTP reset control
-
enumerator kRNG_RST_SHIFT_RSTn
RNG reset control
-
enumerator kFC8_RST_SHIFT_RSTn
Flexcomm Interface 8 reset control
-
enumerator kFC9_RST_SHIFT_RSTn
Flexcomm Interface 9 reset control
-
enumerator kUSB0HMR_RST_SHIFT_RSTn
USB0HMR reset control
-
enumerator kUSB0HSL_RST_SHIFT_RSTn
USB0HSL reset control
-
enumerator kSHA_RST_SHIFT_RSTn
SHA reset control
-
enumerator kSC0_RST_SHIFT_RSTn
SC0 reset control
-
enumerator kSC1_RST_SHIFT_RSTn
SC1 reset control
-
enumerator kFC10_RST_SHIFT_RSTn
Flexcomm Interface 10 reset control
-
enumerator kPUF_RST_SHIFT_RSTn
PUF reset control
-
enumerator kCT32B3_RST_SHIFT_RSTn
CT32B3 reset control
-
enumerator kCT32B4_RST_SHIFT_RSTn
CT32B4 reset control
-
enumerator kSPIFI_RST_SHIFT_RSTn
-
typedef enum _SYSCON_RSTn SYSCON_RSTn_t
Enumeration for peripheral reset control bits.
Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers
-
typedef SYSCON_RSTn_t reset_ip_name_t
-
void RESET_SetPeripheralReset(reset_ip_name_t peripheral)
Assert reset to peripheral.
Asserts reset signal to specified peripheral module.
- Parameters:
peripheral – Assert reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register.
-
void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)
Clear reset to peripheral.
Clears reset signal to specified peripheral module, allows it to operate.
- Parameters:
peripheral – Clear reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register.
-
void RESET_PeripheralReset(reset_ip_name_t peripheral)
Reset peripheral module.
Reset peripheral module.
- Parameters:
peripheral – Peripheral to reset. The enum argument contains encoding of reset register and reset bit position in the reset register.
-
static inline void RESET_ReleasePeripheralReset(reset_ip_name_t peripheral)
Release peripheral module.
Release peripheral module.
- Parameters:
peripheral – Peripheral to release. The enum argument contains encoding of reset register and reset bit position in the reset register.
-
FSL_RESET_DRIVER_VERSION
reset driver version 2.4.0
-
ADC_RSTS
Array initializers with peripheral reset bits
-
AES_RSTS
-
CRC_RSTS
-
CTIMER_RSTS
-
DMA_RSTS_N
-
DMIC_RSTS
-
EMC_RSTS
-
ETH_RST
-
FLEXCOMM_RSTS
-
GINT_RSTS
-
GPIO_RSTS_N
-
INPUTMUX_RSTS
-
IOCON_RSTS
-
FLASH_RSTS
-
LCD_RSTS
-
MRT_RSTS
-
MCAN_RSTS
-
OTP_RSTS
-
PINT_RSTS
-
RNG_RSTS
-
SDIO_RST
-
SCT_RSTS
-
SHA_RST
-
SPIFI_RSTS
-
USB0D_RST
-
USB0HMR_RST
-
USB0HSL_RST
-
USB1H_RST
-
USB1D_RST
-
USB1RAM_RST
-
UTICK_RSTS
-
WWDT_RSTS
-
USB1RAM_RSTS
-
USB1H_RSTS
-
USB1D_RSTS
-
USB0HSL_RSTS
-
USB0HMR_RSTS
-
USB0D_RSTS
-
SHA_RSTS
-
SDIO_RSTS
-
ETH_RSTS
RIT: Repetitive Interrupt Timer
-
void RIT_Init(RIT_Type *base, const rit_config_t *config)
Ungates the RIT clock, enables the RIT module, and configures the peripheral for basic operations.
Note
This API should be called at the beginning of the application using the RIT driver.
- Parameters:
base – RIT peripheral base address
config – Pointer to the user’s RIT config structure
-
void RIT_Deinit(RIT_Type *base)
Gates the RIT clock and disables the RIT module.
- Parameters:
base – RIT peripheral base address
-
void RIT_GetDefaultConfig(rit_config_t *config)
Fills in the RIT configuration structure with the default settings.
The default values are as follows.
config->enableRunInDebug = false;
- Parameters:
config – Pointer to the onfiguration structure.
-
static inline uint32_t RIT_GetStatusFlags(RIT_Type *base)
Gets the RIT status flags.
- Parameters:
base – RIT peripheral base address
- Returns:
The status flags. This is the logical OR of members of the enumeration rit_status_flags_t
-
static inline void RIT_ClearStatusFlags(RIT_Type *base, uint32_t mask)
Clears the RIT status flags.
- Parameters:
base – RIT peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration rit_status_flags_t
-
void RIT_SetTimerCompare(RIT_Type *base, uint64_t count)
Sets the timer period in units of count.
This function sets the RI compare value. If the counter value equals to the compare value, it will generate an interrupt.
Note
Users can call the utility macros provided in fsl_common.h to convert to ticks
- Parameters:
base – RIT peripheral base address
count – Timer period in units of ticks
-
void RIT_SetMaskBit(RIT_Type *base, uint64_t count)
Sets the mask bit of count compare.
This function sets the RI mask value. A 1 written to any bit will force the compare to be true for the corresponding bit of the counter and compare register (causes the comparison of the register bits to be always true).
Note
Users can call the utility macros provided in fsl_common.h to convert to ticks
- Parameters:
base – RIT peripheral base address
count – Timer period in units of ticks
-
uint64_t RIT_GetCompareTimerCount(RIT_Type *base)
Reads the current value of compare register.
Note
Users can call the utility macros provided in fsl_common.h to convert ticks to usec or msec
- Parameters:
base – RIT peripheral base address
- Returns:
Current RI compare value
-
uint64_t RIT_GetCounterTimerCount(RIT_Type *base)
Reads the current timer counting value of counter register.
This function returns the real-time timer counting value, in a range from 0 to a timer period.
Note
Users can call the utility macros provided in fsl_common.h to convert ticks to usec or msec
- Parameters:
base – RIT peripheral base address
- Returns:
Current timer counting value in ticks
-
uint64_t RIT_GetMaskTimerCount(RIT_Type *base)
Reads the current value of mask register.
Note
Users can call the utility macros provided in fsl_common.h to convert ticks to usec or msec
- Parameters:
base – RIT peripheral base address
- Returns:
Current RI mask value
-
static inline void RIT_StartTimer(RIT_Type *base)
Starts the timer counting.
After calling this function, timers load initial value(0U), count up to desired value or over-flow then the counter will count up again.
- Parameters:
base – RIT peripheral base address
-
static inline void RIT_StopTimer(RIT_Type *base)
Stops the timer counting.
This function stop timer counting. Timer reload their new value after the next time they call the RIT_StartTimer.
- Parameters:
base – RIT peripheral base address
-
FSL_RIT_DRIVER_VERSION
Version 2.1.1
-
enum _rit_status_flags
List of RIT status flags.
Values:
-
enumerator kRIT_TimerFlag
Timer flag
-
enumerator kRIT_TimerFlag
-
typedef enum _rit_status_flags rit_status_flags_t
List of RIT status flags.
-
typedef struct _rit_config rit_config_t
RIT config structure.
This structure holds the configuration settings for the RIT peripheral. To initialize this structure to reasonable defaults, call the RIT_GetDefaultConfig() function and pass a pointer to your config structure instance.
The config struct can be made const so it resides in flash
-
static inline void RIT_ClearCounter(RIT_Type *base, bool enable)
Sets the Timer Counter auto clear or not.
This function set the counter auto clear or not whenever the counter value equals the masked compare value specified by the contents of COMPVAL/COMPVAL_H and MASK/MASK_H registers..
- Deprecated:
Do not use this function. It has been superceded by RIT_SetCountAutoClear.
-
static inline void RIT_SetCountAutoClear(RIT_Type *base, bool enable)
Sets the Timer Counter auto clear or not.
This function set the counter auto clear or not whenever the counter value equals the masked compare value specified by the contents of COMPVAL/COMPVAL_H and MASK/MASK_H registers..
- Parameters:
base – RIT peripheral base address
enable – Enable/disable Counter auto clear when value equals the compare value.
true: Enable Counter auto clear.
false: Disable Counter auto clear.
-
struct _rit_config
- #include <fsl_rit.h>
RIT config structure.
This structure holds the configuration settings for the RIT peripheral. To initialize this structure to reasonable defaults, call the RIT_GetDefaultConfig() function and pass a pointer to your config structure instance.
The config struct can be made const so it resides in flash
Public Members
-
bool enableRunInDebug
true: The timer is halted when the processor is halted for debugging.; false: Debug has no effect on the timer operation.
-
bool enableRunInDebug
RNG: Random Number Generator
-
FSL_RNG_DRIVER_VERSION
RNG driver version 2.1.0.
Current version: 2.1.0
Change log:
Version 2.0.0
Initial version.
Version 2.1.0
Renamed function RNG_GetRandomData() to RNG_GetRandomDataWord(). Added function RNG_GetRandomData() which discarding next 32 words after reading RNG register which results into better entropy, as is recommended in UM.
API is aligned with other RNG driver, having similar functionality as other RNG/TRNG drivers.
-
status_t RNG_GetRandomData(void *data, size_t dataSize)
Gets random data.
This function gets random data from the RNG.
- Parameters:
data – Pointer address used to store random data.
dataSize – Size of the buffer pointed by the data parameter.
- Returns:
Status from operation
-
static inline uint32_t RNG_GetRandomDataWord(void)
Gets random data.
This function returns single 32 bit random number. For each read word next 32 words should be discarded to achieve better entropy.
- Returns:
random data
-
FSL_COMPONENT_ID
RTC: Real Time Clock
-
void RTC_Init(RTC_Type *base)
Un-gate the RTC clock and enable the RTC oscillator.
Note
This API should be called at the beginning of the application using the RTC driver.
- Parameters:
base – RTC peripheral base address
-
static inline void RTC_Deinit(RTC_Type *base)
Stop the timer and gate the RTC clock.
- Parameters:
base – RTC peripheral base address
-
status_t RTC_SetDatetime(RTC_Type *base, const rtc_datetime_t *datetime)
Set the RTC date and time according to the given time structure.
The RTC counter must be stopped prior to calling this function as writes to the RTC seconds register will fail if the RTC counter is running.
- Parameters:
base – RTC peripheral base address
datetime – Pointer to structure where the date and time details to set are stored
- Returns:
kStatus_Success: Success in setting the time and starting the RTC kStatus_InvalidArgument: Error because the datetime format is incorrect
-
void RTC_GetDatetime(RTC_Type *base, rtc_datetime_t *datetime)
Get the RTC time and stores it in the given time structure.
- Parameters:
base – RTC peripheral base address
datetime – Pointer to structure where the date and time details are stored.
-
status_t RTC_SetAlarm(RTC_Type *base, const rtc_datetime_t *alarmTime)
Set the RTC alarm time.
The function checks whether the specified alarm time is greater than the present time. If not, the function does not set the alarm and returns an error.
- Parameters:
base – RTC peripheral base address
alarmTime – Pointer to structure where the alarm time is stored.
- Returns:
kStatus_Success: success in setting the RTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed
-
void RTC_GetAlarm(RTC_Type *base, rtc_datetime_t *datetime)
Return the RTC alarm time.
- Parameters:
base – RTC peripheral base address
datetime – Pointer to structure where the alarm date and time details are stored.
-
static inline void RTC_EnableWakeupTimer(RTC_Type *base, bool enable)
Enable the RTC wake-up timer (1KHZ).
After calling this function, the RTC driver will use/un-use the RTC wake-up (1KHZ) at the same time.
- Parameters:
base – RTC peripheral base address
enable – Use/Un-use the RTC wake-up timer.
true: Use RTC wake-up timer at the same time.
false: Un-use RTC wake-up timer, RTC only use the normal seconds timer by default.
-
static inline uint32_t RTC_GetEnabledWakeupTimer(RTC_Type *base)
Get the enabled status of the RTC wake-up timer (1KHZ).
- Parameters:
base – RTC peripheral base address
- Returns:
The enabled status of RTC wake-up timer (1KHZ).
-
static inline void RTC_EnableWakeUpTimerInterruptFromDPD(RTC_Type *base, bool enable)
Enable the wake-up timer interrupt from deep power down mode.
- Parameters:
base – RTC peripheral base address
enable – Enable/Disable wake-up timer interrupt from deep power down mode.
true: Enable wake-up timer interrupt from deep power down mode.
false: Disable wake-up timer interrupt from deep power down mode.
-
static inline void RTC_EnableAlarmTimerInterruptFromDPD(RTC_Type *base, bool enable)
Enable the alarm timer interrupt from deep power down mode.
- Parameters:
base – RTC peripheral base address
enable – Enable/Disable alarm timer interrupt from deep power down mode.
true: Enable alarm timer interrupt from deep power down mode.
false: Disable alarm timer interrupt from deep power down mode.
-
static inline void RTC_EnableInterrupts(RTC_Type *base, uint32_t mask)
Enables the selected RTC interrupts.
- Deprecated:
Do not use this function. It has been superceded by RTC_EnableAlarmTimerInterruptFromDPD and RTC_EnableWakeUpTimerInterruptFromDPD
- Parameters:
base – RTC peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t
-
static inline void RTC_DisableInterrupts(RTC_Type *base, uint32_t mask)
Disables the selected RTC interrupts.
- Deprecated:
Do not use this function. It has been superceded by RTC_EnableAlarmTimerInterruptFromDPD and RTC_EnableWakeUpTimerInterruptFromDPD
- Parameters:
base – RTC peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t
-
static inline uint32_t RTC_GetEnabledInterrupts(RTC_Type *base)
Get the enabled RTC interrupts.
- Deprecated:
Do not use this function. It will be deleted in next release version.
- Parameters:
base – RTC peripheral base address
- Returns:
The enabled interrupts. This is the logical OR of members of the enumeration rtc_interrupt_enable_t
-
static inline uint32_t RTC_GetStatusFlags(RTC_Type *base)
Get the RTC status flags.
- Parameters:
base – RTC peripheral base address
- Returns:
The status flags. This is the logical OR of members of the enumeration rtc_status_flags_t
-
static inline void RTC_ClearStatusFlags(RTC_Type *base, uint32_t mask)
Clear the RTC status flags.
- Parameters:
base – RTC peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration rtc_status_flags_t
-
static inline void RTC_EnableTimer(RTC_Type *base, bool enable)
Enable the RTC timer counter.
After calling this function, the RTC inner counter increments once a second when only using the RTC seconds timer (1hz), while the RTC inner wake-up timer countdown once a millisecond when using RTC wake-up timer (1KHZ) at the same time. RTC timer contain two timers, one is the RTC normal seconds timer, the other one is the RTC wake-up timer, the RTC enable bit is the master switch for the whole RTC timer, so user can use the RTC seconds (1HZ) timer independly, but they can’t use the RTC wake-up timer (1KHZ) independently.
- Parameters:
base – RTC peripheral base address
enable – Enable/Disable RTC Timer counter.
true: Enable RTC Timer counter.
false: Disable RTC Timer counter.
-
static inline void RTC_StartTimer(RTC_Type *base)
Starts the RTC time counter.
- Deprecated:
Do not use this function. It has been superceded by RTC_EnableTimer
After calling this function, the timer counter increments once a second provided SR[TOF] or SR[TIF] are not set.
- Parameters:
base – RTC peripheral base address
-
static inline void RTC_StopTimer(RTC_Type *base)
Stops the RTC time counter.
- Deprecated:
Do not use this function. It has been superceded by RTC_EnableTimer
RTC’s seconds register can be written to only when the timer is stopped.
- Parameters:
base – RTC peripheral base address
-
FSL_RTC_DRIVER_VERSION
Version 2.2.0
-
enum _rtc_interrupt_enable
List of RTC interrupts.
Values:
-
enumerator kRTC_AlarmInterruptEnable
Alarm interrupt.
-
enumerator kRTC_WakeupInterruptEnable
Wake-up interrupt.
-
enumerator kRTC_AlarmInterruptEnable
-
enum _rtc_status_flags
List of RTC flags.
Values:
-
enumerator kRTC_AlarmFlag
Alarm flag
-
enumerator kRTC_WakeupFlag
1kHz wake-up timer flag
-
enumerator kRTC_AlarmFlag
-
typedef enum _rtc_interrupt_enable rtc_interrupt_enable_t
List of RTC interrupts.
-
typedef enum _rtc_status_flags rtc_status_flags_t
List of RTC flags.
-
typedef struct _rtc_datetime rtc_datetime_t
Structure is used to hold the date and time.
-
static inline void RTC_SetSecondsTimerMatch(RTC_Type *base, uint32_t matchValue)
Set the RTC seconds timer (1HZ) MATCH value.
- Parameters:
base – RTC peripheral base address
matchValue – The value to be set into the RTC MATCH register
-
static inline uint32_t RTC_GetSecondsTimerMatch(RTC_Type *base)
Read actual RTC seconds timer (1HZ) MATCH value.
- Parameters:
base – RTC peripheral base address
- Returns:
The actual RTC seconds timer (1HZ) MATCH value.
-
static inline void RTC_SetSecondsTimerCount(RTC_Type *base, uint32_t countValue)
Set the RTC seconds timer (1HZ) COUNT value.
- Parameters:
base – RTC peripheral base address
countValue – The value to be loaded into the RTC COUNT register
-
static inline uint32_t RTC_GetSecondsTimerCount(RTC_Type *base)
Read the actual RTC seconds timer (1HZ) COUNT value.
- Parameters:
base – RTC peripheral base address
- Returns:
The actual RTC seconds timer (1HZ) COUNT value.
-
static inline void RTC_SetWakeupCount(RTC_Type *base, uint16_t wakeupValue)
Enable the RTC wake-up timer (1KHZ) and set countdown value to the RTC WAKE register.
- Parameters:
base – RTC peripheral base address
wakeupValue – The value to be loaded into the WAKE register in RTC wake-up timer (1KHZ).
-
static inline uint16_t RTC_GetWakeupCount(RTC_Type *base)
Read the actual value from the WAKE register value in RTC wake-up timer (1KHZ)
Read the WAKE register twice and compare the result, if the value match,the time can be used.
- Parameters:
base – RTC peripheral base address
- Returns:
The actual value of the WAKE register value in RTC wake-up timer (1KHZ).
-
static inline void RTC_Reset(RTC_Type *base)
Perform a software reset on the RTC module.
This resets all RTC registers to their reset value. The bit is cleared by software explicitly clearing it.
- Parameters:
base – RTC peripheral base address
-
struct _rtc_datetime
- #include <fsl_rtc.h>
Structure is used to hold the date and time.
Public Members
-
uint16_t year
Range from 1970 to 2099.
-
uint8_t month
Range from 1 to 12.
-
uint8_t day
Range from 1 to 31 (depending on month).
-
uint8_t hour
Range from 0 to 23.
-
uint8_t minute
Range from 0 to 59.
-
uint8_t second
Range from 0 to 59.
-
uint16_t year
SCTimer: SCTimer/PWM (SCT)
-
status_t SCTIMER_Init(SCT_Type *base, const sctimer_config_t *config)
Ungates the SCTimer clock and configures the peripheral for basic operation.
Note
This API should be called at the beginning of the application using the SCTimer driver.
- Parameters:
base – SCTimer peripheral base address
config – Pointer to the user configuration structure.
- Returns:
kStatus_Success indicates success; Else indicates failure.
-
void SCTIMER_Deinit(SCT_Type *base)
Gates the SCTimer clock.
- Parameters:
base – SCTimer peripheral base address
-
void SCTIMER_GetDefaultConfig(sctimer_config_t *config)
Fills in the SCTimer configuration structure with the default settings.
The default values are:
config->enableCounterUnify = true; config->clockMode = kSCTIMER_System_ClockMode; config->clockSelect = kSCTIMER_Clock_On_Rise_Input_0; config->enableBidirection_l = false; config->enableBidirection_h = false; config->prescale_l = 0U; config->prescale_h = 0U; config->outInitState = 0U; config->inputsync = 0xFU;
- Parameters:
config – Pointer to the user configuration structure.
-
status_t SCTIMER_SetupPwm(SCT_Type *base, const sctimer_pwm_signal_param_t *pwmParams, sctimer_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, uint32_t *event)
Configures the PWM signal parameters.
Call this function to configure the PWM signal period, mode, duty cycle, and edge. This function will create 2 events; one of the events will trigger on match with the pulse value and the other will trigger when the counter matches the PWM period. The PWM period event is also used as a limit event to reset the counter or change direction. Both events are enabled for the same state. The state number can be retrieved by calling the function SCTIMER_GetCurrentStateNumber(). The counter is set to operate as one 32-bit counter (unify bit is set to 1). The counter operates in bi-directional mode when generating a center-aligned PWM.
Note
When setting PWM output from multiple output pins, they all should use the same PWM mode i.e all PWM’s should be either edge-aligned or center-aligned. When using this API, the PWM signal frequency of all the initialized channels must be the same. Otherwise all the initialized channels’ PWM signal frequency is equal to the last call to the API’s pwmFreq_Hz.
- Parameters:
base – SCTimer peripheral base address
pwmParams – PWM parameters to configure the output
mode – PWM operation mode, options available in enumeration sctimer_pwm_mode_t
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – SCTimer counter clock in Hz
event – Pointer to a variable where the PWM period event number is stored
- Returns:
kStatus_Success on success kStatus_Fail If we have hit the limit in terms of number of events created or if an incorrect PWM dutycylce is passed in.
-
void SCTIMER_UpdatePwmDutycycle(SCT_Type *base, sctimer_out_t output, uint8_t dutyCyclePercent, uint32_t event)
Updates the duty cycle of an active PWM signal.
Before calling this function, the counter is set to operate as one 32-bit counter (unify bit is set to 1).
- Parameters:
base – SCTimer peripheral base address
output – The output to configure
dutyCyclePercent – New PWM pulse width; the value should be between 1 to 100
event – Event number associated with this PWM signal. This was returned to the user by the function SCTIMER_SetupPwm().
-
static inline void SCTIMER_EnableInterrupts(SCT_Type *base, uint32_t mask)
Enables the selected SCTimer interrupts.
- Parameters:
base – SCTimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration sctimer_interrupt_enable_t
-
static inline void SCTIMER_DisableInterrupts(SCT_Type *base, uint32_t mask)
Disables the selected SCTimer interrupts.
- Parameters:
base – SCTimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration sctimer_interrupt_enable_t
-
static inline uint32_t SCTIMER_GetEnabledInterrupts(SCT_Type *base)
Gets the enabled SCTimer interrupts.
- Parameters:
base – SCTimer peripheral base address
- Returns:
The enabled interrupts. This is the logical OR of members of the enumeration sctimer_interrupt_enable_t
-
static inline uint32_t SCTIMER_GetStatusFlags(SCT_Type *base)
Gets the SCTimer status flags.
- Parameters:
base – SCTimer peripheral base address
- Returns:
The status flags. This is the logical OR of members of the enumeration sctimer_status_flags_t
-
static inline void SCTIMER_ClearStatusFlags(SCT_Type *base, uint32_t mask)
Clears the SCTimer status flags.
- Parameters:
base – SCTimer peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration sctimer_status_flags_t
-
static inline void SCTIMER_StartTimer(SCT_Type *base, uint32_t countertoStart)
Starts the SCTimer counter.
Note
In 16-bit mode, we can enable both Counter_L and Counter_H, In 32-bit mode, we only can select Counter_U.
- Parameters:
base – SCTimer peripheral base address
countertoStart – The SCTimer counters to enable. This is a logical OR of members of the enumeration sctimer_counter_t.
-
static inline void SCTIMER_StopTimer(SCT_Type *base, uint32_t countertoStop)
Halts the SCTimer counter.
- Parameters:
base – SCTimer peripheral base address
countertoStop – The SCTimer counters to stop. This is a logical OR of members of the enumeration sctimer_counter_t.
-
status_t SCTIMER_CreateAndScheduleEvent(SCT_Type *base, sctimer_event_t howToMonitor, uint32_t matchValue, uint32_t whichIO, sctimer_counter_t whichCounter, uint32_t *event)
Create an event that is triggered on a match or IO and schedule in current state.
This function will configure an event using the options provided by the user. If the event type uses the counter match, then the function will set the user provided match value into a match register and put this match register number into the event control register. The event is enabled for the current state and the event number is increased by one at the end. The function returns the event number; this event number can be used to configure actions to be done when this event is triggered.
- Parameters:
base – SCTimer peripheral base address
howToMonitor – Event type; options are available in the enumeration sctimer_interrupt_enable_t
matchValue – The match value that will be programmed to a match register
whichIO – The input or output that will be involved in event triggering. This field is ignored if the event type is “match only”
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Pointer to a variable where the new event number is stored
- Returns:
kStatus_Success on success kStatus_Error if we have hit the limit in terms of number of events created or if we have reached the limit in terms of number of match registers
-
void SCTIMER_ScheduleEvent(SCT_Type *base, uint32_t event)
Enable an event in the current state.
This function will allow the event passed in to trigger in the current state. The event must be created earlier by either calling the function SCTIMER_SetupPwm() or function SCTIMER_CreateAndScheduleEvent() .
- Parameters:
base – SCTimer peripheral base address
event – Event number to enable in the current state
-
status_t SCTIMER_IncreaseState(SCT_Type *base)
Increase the state by 1.
All future events created by calling the function SCTIMER_ScheduleEvent() will be enabled in this new state.
- Parameters:
base – SCTimer peripheral base address
- Returns:
kStatus_Success on success kStatus_Error if we have hit the limit in terms of states used
-
uint32_t SCTIMER_GetCurrentState(SCT_Type *base)
Provides the current state.
User can use this to set the next state by calling the function SCTIMER_SetupNextStateAction().
- Parameters:
base – SCTimer peripheral base address
- Returns:
The current state
-
static inline void SCTIMER_SetCounterState(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t state)
Set the counter current state.
The function is to set the state variable bit field of STATE register. Writing to the STATE_L, STATE_H, or unified register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
state – The counter current state number (only support range from 0~31).
-
static inline uint16_t SCTIMER_GetCounterState(SCT_Type *base, sctimer_counter_t whichCounter)
Get the counter current state value.
The function is to get the state variable bit field of STATE register.
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
- Returns:
The the counter current state value.
-
status_t SCTIMER_SetupCaptureAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t *captureRegister, uint32_t event)
Setup capture of the counter value on trigger of a selected event.
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
captureRegister – Pointer to a variable where the capture register number will be returned. User can read the captured value from this register when the specified event is triggered.
event – Event number that will trigger the capture
- Returns:
kStatus_Success on success kStatus_Error if we have hit the limit in terms of number of match/capture registers available
-
void SCTIMER_SetCallback(SCT_Type *base, sctimer_event_callback_t callback, uint32_t event)
Receive noticification when the event trigger an interrupt.
If the interrupt for the event is enabled by the user, then a callback can be registered which will be invoked when the event is triggered
- Parameters:
base – SCTimer peripheral base address
event – Event number that will trigger the interrupt
callback – Function to invoke when the event is triggered
-
static inline void SCTIMER_SetupStateLdMethodAction(SCT_Type *base, uint32_t event, bool fgLoad)
Change the load method of transition to the specified state.
Change the load method of transition, it will be triggered by the event number that is passed in by the user.
- Parameters:
base – SCTimer peripheral base address
event – Event number that will change the method to trigger the state transition
fgLoad – The method to load highest-numbered event occurring for that state to the STATE register.
true: Load the STATEV value to STATE when the event occurs to be the next state.
false: Add the STATEV value to STATE when the event occurs to be the next state.
-
static inline void SCTIMER_SetupNextStateActionwithLdMethod(SCT_Type *base, uint32_t nextState, uint32_t event, bool fgLoad)
Transition to the specified state with Load method.
This transition will be triggered by the event number that is passed in by the user, the method decide how to load the highest-numbered event occurring for that state to the STATE register.
- Parameters:
base – SCTimer peripheral base address
nextState – The next state SCTimer will transition to
event – Event number that will trigger the state transition
fgLoad – The method to load the highest-numbered event occurring for that state to the STATE register.
true: Load the STATEV value to STATE when the event occurs to be the next state.
false: Add the STATEV value to STATE when the event occurs to be the next state.
-
static inline void SCTIMER_SetupNextStateAction(SCT_Type *base, uint32_t nextState, uint32_t event)
Transition to the specified state.
- Deprecated:
Do not use this function. It has been superceded by SCTIMER_SetupNextStateActionwithLdMethod
This transition will be triggered by the event number that is passed in by the user.
- Parameters:
base – SCTimer peripheral base address
nextState – The next state SCTimer will transition to
event – Event number that will trigger the state transition
-
static inline void SCTIMER_SetupEventActiveDirection(SCT_Type *base, sctimer_event_active_direction_t activeDirection, uint32_t event)
Setup event active direction when the counters are operating in BIDIR mode.
- Parameters:
base – SCTimer peripheral base address
activeDirection – Event generation active direction, see sctimer_event_active_direction_t.
event – Event number that need setup the active direction.
-
static inline void SCTIMER_SetupOutputSetAction(SCT_Type *base, uint32_t whichIO, uint32_t event)
Set the Output.
This output will be set when the event number that is passed in by the user is triggered.
- Parameters:
base – SCTimer peripheral base address
whichIO – The output to set
event – Event number that will trigger the output change
-
static inline void SCTIMER_SetupOutputClearAction(SCT_Type *base, uint32_t whichIO, uint32_t event)
Clear the Output.
This output will be cleared when the event number that is passed in by the user is triggered.
- Parameters:
base – SCTimer peripheral base address
whichIO – The output to clear
event – Event number that will trigger the output change
-
void SCTIMER_SetupOutputToggleAction(SCT_Type *base, uint32_t whichIO, uint32_t event)
Toggle the output level.
This change in the output level is triggered by the event number that is passed in by the user.
- Parameters:
base – SCTimer peripheral base address
whichIO – The output to toggle
event – Event number that will trigger the output change
-
static inline void SCTIMER_SetupCounterLimitAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)
Limit the running counter.
The counter is limited when the event number that is passed in by the user is triggered.
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be limited
-
static inline void SCTIMER_SetupCounterStopAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)
Stop the running counter.
The counter is stopped when the event number that is passed in by the user is triggered.
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be stopped
-
static inline void SCTIMER_SetupCounterStartAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)
Re-start the stopped counter.
The counter will re-start when the event number that is passed in by the user is triggered.
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to re-start
-
static inline void SCTIMER_SetupCounterHaltAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)
Halt the running counter.
The counter is disabled (halted) when the event number that is passed in by the user is triggered. When the counter is halted, all further events are disabled. The HALT condition can only be removed by calling the SCTIMER_StartTimer() function.
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be halted
-
static inline void SCTIMER_SetupDmaTriggerAction(SCT_Type *base, uint32_t dmaNumber, uint32_t event)
Generate a DMA request.
DMA request will be triggered by the event number that is passed in by the user.
- Parameters:
base – SCTimer peripheral base address
dmaNumber – The DMA request to generate
event – Event number that will trigger the DMA request
-
static inline void SCTIMER_SetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t value)
Set the value of counter.
The function is to set the value of Count register, Writing to the COUNT_L, COUNT_H, or unified register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
value – the counter value update to the COUNT register.
-
static inline uint32_t SCTIMER_GetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter)
Get the value of counter.
The function is to read the value of Count register, software can read the counter registers at any time..
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
- Returns:
The value of counter selected.
-
static inline void SCTIMER_SetEventInState(SCT_Type *base, uint32_t event, uint32_t state)
Set the state mask bit field of EV_STATE register.
- Parameters:
base – SCTimer peripheral base address
event – The EV_STATE register be set.
state – The state value in which the event is enabled to occur.
-
static inline void SCTIMER_ClearEventInState(SCT_Type *base, uint32_t event, uint32_t state)
Clear the state mask bit field of EV_STATE register.
- Parameters:
base – SCTimer peripheral base address
event – The EV_STATE register be clear.
state – The state value in which the event is disabled to occur.
-
static inline bool SCTIMER_GetEventInState(SCT_Type *base, uint32_t event, uint32_t state)
Get the state mask bit field of EV_STATE register.
Note
This function is to check whether the event is enabled in a specific state.
- Parameters:
base – SCTimer peripheral base address
event – The EV_STATE register be read.
state – The state value.
- Returns:
The the state mask bit field of EV_STATE register.
true: The event is enable in state.
false: The event is disable in state.
-
static inline uint32_t SCTIMER_GetCaptureValue(SCT_Type *base, sctimer_counter_t whichCounter, uint8_t capChannel)
Get the value of capture register.
This function returns the captured value upon occurrence of the events selected by the corresponding Capture Control registers occurred.
- Parameters:
base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
capChannel – SCTimer capture register of capture channel.
- Returns:
The SCTimer counter value at which this register was last captured.
-
void SCTIMER_EventHandleIRQ(SCT_Type *base)
SCTimer interrupt handler.
- Parameters:
base – SCTimer peripheral base address.
-
FSL_SCTIMER_DRIVER_VERSION
Version
-
enum _sctimer_pwm_mode
SCTimer PWM operation modes.
Values:
-
enumerator kSCTIMER_EdgeAlignedPwm
Edge-aligned PWM
-
enumerator kSCTIMER_CenterAlignedPwm
Center-aligned PWM
-
enumerator kSCTIMER_EdgeAlignedPwm
-
enum _sctimer_counter
SCTimer counters type.
Values:
-
enumerator kSCTIMER_Counter_L
16-bit Low counter.
-
enumerator kSCTIMER_Counter_H
16-bit High counter.
-
enumerator kSCTIMER_Counter_U
32-bit Unified counter.
-
enumerator kSCTIMER_Counter_L
-
enum _sctimer_input
List of SCTimer input pins.
Values:
-
enumerator kSCTIMER_Input_0
SCTIMER input 0
-
enumerator kSCTIMER_Input_1
SCTIMER input 1
-
enumerator kSCTIMER_Input_2
SCTIMER input 2
-
enumerator kSCTIMER_Input_3
SCTIMER input 3
-
enumerator kSCTIMER_Input_4
SCTIMER input 4
-
enumerator kSCTIMER_Input_5
SCTIMER input 5
-
enumerator kSCTIMER_Input_6
SCTIMER input 6
-
enumerator kSCTIMER_Input_7
SCTIMER input 7
-
enumerator kSCTIMER_Input_0
-
enum _sctimer_out
List of SCTimer output pins.
Values:
-
enumerator kSCTIMER_Out_0
SCTIMER output 0
-
enumerator kSCTIMER_Out_1
SCTIMER output 1
-
enumerator kSCTIMER_Out_2
SCTIMER output 2
-
enumerator kSCTIMER_Out_3
SCTIMER output 3
-
enumerator kSCTIMER_Out_4
SCTIMER output 4
-
enumerator kSCTIMER_Out_5
SCTIMER output 5
-
enumerator kSCTIMER_Out_6
SCTIMER output 6
-
enumerator kSCTIMER_Out_7
SCTIMER output 7
-
enumerator kSCTIMER_Out_8
SCTIMER output 8
-
enumerator kSCTIMER_Out_9
SCTIMER output 9
-
enumerator kSCTIMER_Out_0
-
enum _sctimer_pwm_level_select
SCTimer PWM output pulse mode: high-true, low-true or no output.
Values:
-
enumerator kSCTIMER_LowTrue
Low true pulses
-
enumerator kSCTIMER_HighTrue
High true pulses
-
enumerator kSCTIMER_LowTrue
-
enum _sctimer_clock_mode
SCTimer clock mode options.
Values:
-
enumerator kSCTIMER_System_ClockMode
System Clock Mode
-
enumerator kSCTIMER_Sampled_ClockMode
Sampled System Clock Mode
-
enumerator kSCTIMER_Input_ClockMode
SCT Input Clock Mode
-
enumerator kSCTIMER_Asynchronous_ClockMode
Asynchronous Mode
-
enumerator kSCTIMER_System_ClockMode
-
enum _sctimer_clock_select
SCTimer clock select options.
Values:
-
enumerator kSCTIMER_Clock_On_Rise_Input_0
Rising edges on input 0
-
enumerator kSCTIMER_Clock_On_Fall_Input_0
Falling edges on input 0
-
enumerator kSCTIMER_Clock_On_Rise_Input_1
Rising edges on input 1
-
enumerator kSCTIMER_Clock_On_Fall_Input_1
Falling edges on input 1
-
enumerator kSCTIMER_Clock_On_Rise_Input_2
Rising edges on input 2
-
enumerator kSCTIMER_Clock_On_Fall_Input_2
Falling edges on input 2
-
enumerator kSCTIMER_Clock_On_Rise_Input_3
Rising edges on input 3
-
enumerator kSCTIMER_Clock_On_Fall_Input_3
Falling edges on input 3
-
enumerator kSCTIMER_Clock_On_Rise_Input_4
Rising edges on input 4
-
enumerator kSCTIMER_Clock_On_Fall_Input_4
Falling edges on input 4
-
enumerator kSCTIMER_Clock_On_Rise_Input_5
Rising edges on input 5
-
enumerator kSCTIMER_Clock_On_Fall_Input_5
Falling edges on input 5
-
enumerator kSCTIMER_Clock_On_Rise_Input_6
Rising edges on input 6
-
enumerator kSCTIMER_Clock_On_Fall_Input_6
Falling edges on input 6
-
enumerator kSCTIMER_Clock_On_Rise_Input_7
Rising edges on input 7
-
enumerator kSCTIMER_Clock_On_Fall_Input_7
Falling edges on input 7
-
enumerator kSCTIMER_Clock_On_Rise_Input_0
-
enum _sctimer_conflict_resolution
SCTimer output conflict resolution options.
Specifies what action should be taken if multiple events dictate that a given output should be both set and cleared at the same time
Values:
-
enumerator kSCTIMER_ResolveNone
No change
-
enumerator kSCTIMER_ResolveSet
Set output
-
enumerator kSCTIMER_ResolveClear
Clear output
-
enumerator kSCTIMER_ResolveToggle
Toggle output
-
enumerator kSCTIMER_ResolveNone
-
enum _sctimer_event_active_direction
List of SCTimer event generation active direction when the counters are operating in BIDIR mode.
Values:
-
enumerator kSCTIMER_ActiveIndependent
This event is triggered regardless of the count direction.
-
enumerator kSCTIMER_ActiveInCountUp
This event is triggered only during up-counting when BIDIR = 1.
-
enumerator kSCTIMER_ActiveInCountDown
This event is triggered only during down-counting when BIDIR = 1.
-
enumerator kSCTIMER_ActiveIndependent
-
enum _sctimer_event
List of SCTimer event types.
Values:
-
enumerator kSCTIMER_InputLowOrMatchEvent
-
enumerator kSCTIMER_InputRiseOrMatchEvent
-
enumerator kSCTIMER_InputFallOrMatchEvent
-
enumerator kSCTIMER_InputHighOrMatchEvent
-
enumerator kSCTIMER_MatchEventOnly
-
enumerator kSCTIMER_InputLowEvent
-
enumerator kSCTIMER_InputRiseEvent
-
enumerator kSCTIMER_InputFallEvent
-
enumerator kSCTIMER_InputHighEvent
-
enumerator kSCTIMER_InputLowAndMatchEvent
-
enumerator kSCTIMER_InputRiseAndMatchEvent
-
enumerator kSCTIMER_InputFallAndMatchEvent
-
enumerator kSCTIMER_InputHighAndMatchEvent
-
enumerator kSCTIMER_OutputLowOrMatchEvent
-
enumerator kSCTIMER_OutputRiseOrMatchEvent
-
enumerator kSCTIMER_OutputFallOrMatchEvent
-
enumerator kSCTIMER_OutputHighOrMatchEvent
-
enumerator kSCTIMER_OutputLowEvent
-
enumerator kSCTIMER_OutputRiseEvent
-
enumerator kSCTIMER_OutputFallEvent
-
enumerator kSCTIMER_OutputHighEvent
-
enumerator kSCTIMER_OutputLowAndMatchEvent
-
enumerator kSCTIMER_OutputRiseAndMatchEvent
-
enumerator kSCTIMER_OutputFallAndMatchEvent
-
enumerator kSCTIMER_OutputHighAndMatchEvent
-
enumerator kSCTIMER_InputLowOrMatchEvent
-
enum _sctimer_interrupt_enable
List of SCTimer interrupts.
Values:
-
enumerator kSCTIMER_Event0InterruptEnable
Event 0 interrupt
-
enumerator kSCTIMER_Event1InterruptEnable
Event 1 interrupt
-
enumerator kSCTIMER_Event2InterruptEnable
Event 2 interrupt
-
enumerator kSCTIMER_Event3InterruptEnable
Event 3 interrupt
-
enumerator kSCTIMER_Event4InterruptEnable
Event 4 interrupt
-
enumerator kSCTIMER_Event5InterruptEnable
Event 5 interrupt
-
enumerator kSCTIMER_Event6InterruptEnable
Event 6 interrupt
-
enumerator kSCTIMER_Event7InterruptEnable
Event 7 interrupt
-
enumerator kSCTIMER_Event8InterruptEnable
Event 8 interrupt
-
enumerator kSCTIMER_Event9InterruptEnable
Event 9 interrupt
-
enumerator kSCTIMER_Event10InterruptEnable
Event 10 interrupt
-
enumerator kSCTIMER_Event11InterruptEnable
Event 11 interrupt
-
enumerator kSCTIMER_Event12InterruptEnable
Event 12 interrupt
-
enumerator kSCTIMER_Event0InterruptEnable
-
enum _sctimer_status_flags
List of SCTimer flags.
Values:
-
enumerator kSCTIMER_Event0Flag
Event 0 Flag
-
enumerator kSCTIMER_Event1Flag
Event 1 Flag
-
enumerator kSCTIMER_Event2Flag
Event 2 Flag
-
enumerator kSCTIMER_Event3Flag
Event 3 Flag
-
enumerator kSCTIMER_Event4Flag
Event 4 Flag
-
enumerator kSCTIMER_Event5Flag
Event 5 Flag
-
enumerator kSCTIMER_Event6Flag
Event 6 Flag
-
enumerator kSCTIMER_Event7Flag
Event 7 Flag
-
enumerator kSCTIMER_Event8Flag
Event 8 Flag
-
enumerator kSCTIMER_Event9Flag
Event 9 Flag
-
enumerator kSCTIMER_Event10Flag
Event 10 Flag
-
enumerator kSCTIMER_Event11Flag
Event 11 Flag
-
enumerator kSCTIMER_Event12Flag
Event 12 Flag
-
enumerator kSCTIMER_BusErrorLFlag
Bus error due to write when L counter was not halted
-
enumerator kSCTIMER_BusErrorHFlag
Bus error due to write when H counter was not halted
-
enumerator kSCTIMER_Event0Flag
-
typedef enum _sctimer_pwm_mode sctimer_pwm_mode_t
SCTimer PWM operation modes.
-
typedef enum _sctimer_counter sctimer_counter_t
SCTimer counters type.
-
typedef enum _sctimer_input sctimer_input_t
List of SCTimer input pins.
-
typedef enum _sctimer_out sctimer_out_t
List of SCTimer output pins.
-
typedef enum _sctimer_pwm_level_select sctimer_pwm_level_select_t
SCTimer PWM output pulse mode: high-true, low-true or no output.
-
typedef struct _sctimer_pwm_signal_param sctimer_pwm_signal_param_t
Options to configure a SCTimer PWM signal.
-
typedef enum _sctimer_clock_mode sctimer_clock_mode_t
SCTimer clock mode options.
-
typedef enum _sctimer_clock_select sctimer_clock_select_t
SCTimer clock select options.
-
typedef enum _sctimer_conflict_resolution sctimer_conflict_resolution_t
SCTimer output conflict resolution options.
Specifies what action should be taken if multiple events dictate that a given output should be both set and cleared at the same time
-
typedef enum _sctimer_event_active_direction sctimer_event_active_direction_t
List of SCTimer event generation active direction when the counters are operating in BIDIR mode.
-
typedef enum _sctimer_event sctimer_event_t
List of SCTimer event types.
-
typedef void (*sctimer_event_callback_t)(void)
SCTimer callback typedef.
-
typedef enum _sctimer_interrupt_enable sctimer_interrupt_enable_t
List of SCTimer interrupts.
-
typedef enum _sctimer_status_flags sctimer_status_flags_t
List of SCTimer flags.
-
typedef struct _sctimer_config sctimer_config_t
SCTimer configuration structure.
This structure holds the configuration settings for the SCTimer peripheral. To initialize this structure to reasonable defaults, call the SCTMR_GetDefaultConfig() function and pass a pointer to the configuration structure instance.
The configuration structure can be made constant so as to reside in flash.
-
SCT_EV_STATE_STATEMSKn(x)
-
struct _sctimer_pwm_signal_param
- #include <fsl_sctimer.h>
Options to configure a SCTimer PWM signal.
Public Members
-
sctimer_out_t output
The output pin to use to generate the PWM signal
-
sctimer_pwm_level_select_t level
PWM output active level select.
-
uint8_t dutyCyclePercent
PWM pulse width, value should be between 0 to 100 0 = always inactive signal (0% duty cycle) 100 = always active signal (100% duty cycle).
-
sctimer_out_t output
-
struct _sctimer_config
- #include <fsl_sctimer.h>
SCTimer configuration structure.
This structure holds the configuration settings for the SCTimer peripheral. To initialize this structure to reasonable defaults, call the SCTMR_GetDefaultConfig() function and pass a pointer to the configuration structure instance.
The configuration structure can be made constant so as to reside in flash.
Public Members
-
bool enableCounterUnify
true: SCT operates as a unified 32-bit counter; false: SCT operates as two 16-bit counters. User can use the 16-bit low counter and the 16-bit high counters at the same time; for Hardware limit, user can not use unified 32-bit counter and any 16-bit low/high counter at the same time.
-
sctimer_clock_mode_t clockMode
SCT clock mode value
-
sctimer_clock_select_t clockSelect
SCT clock select value
-
bool enableBidirection_l
true: Up-down count mode for the L or unified counter false: Up count mode only for the L or unified counter
-
bool enableBidirection_h
true: Up-down count mode for the H or unified counter false: Up count mode only for the H or unified counter. This field is used only if the enableCounterUnify is set to false
-
uint8_t prescale_l
Prescale value to produce the L or unified counter clock
-
uint8_t prescale_h
Prescale value to produce the H counter clock. This field is used only if the enableCounterUnify is set to false
-
uint8_t outInitState
Defines the initial output value
-
uint8_t inputsync
SCT INSYNC value, INSYNC field in the CONFIG register, from bit9 to bit 16. it is used to define synchronization for input N: bit 9 = input 0 bit 10 = input 1 bit 11 = input 2 bit 12 = input 3 All other bits are reserved (bit13 ~bit 16). How User to set the the value for the member inputsync. IE: delay for input0, and input 1, bypasses for input 2 and input 3 MACRO definition in user level. #define INPUTSYNC0 (0U) #define INPUTSYNC1 (1U) #define INPUTSYNC2 (2U) #define INPUTSYNC3 (3U) User Code. sctimerInfo.inputsync = (1 << INPUTSYNC2) | (1 << INPUTSYNC3);
-
bool enableCounterUnify
SDIF: SD/MMC/SDIO card interface
-
FSL_SDIF_DRIVER_VERSION
Driver version 2.0.15.
_sdif_status SDIF status
Values:
-
enumerator kStatus_SDIF_DescriptorBufferLenError
Set DMA descriptor failed
-
enumerator kStatus_SDIF_InvalidArgument
invalid argument status
-
enumerator kStatus_SDIF_SyncCmdTimeout
sync command to CIU timeout status
-
enumerator kStatus_SDIF_SendCmdFail
send command to card fail
-
enumerator kStatus_SDIF_SendCmdErrorBufferFull
send command to card fail, due to command buffer full user need to resend this command
-
enumerator kStatus_SDIF_DMATransferFailWithFBE
DMA transfer data fail with fatal bus error , to do with this error :issue a hard reset/controller reset
-
enumerator kStatus_SDIF_DMATransferDescriptorUnavailable
DMA descriptor unavailable
-
enumerator kStatus_SDIF_DataTransferFail
transfer data fail
-
enumerator kStatus_SDIF_ResponseError
response error
-
enumerator kStatus_SDIF_DMAAddrNotAlign
DMA address not align
-
enumerator kStatus_SDIF_BusyTransferring
SDIF transfer busy status
-
enumerator kStatus_SDIF_DataTransferSuccess
transfer data success
-
enumerator kStatus_SDIF_SendCmdSuccess
transfer command success
-
enumerator kStatus_SDIF_DescriptorBufferLenError
_sdif_capability_flag Host controller capabilities flag mask
Values:
-
enumerator kSDIF_SupportHighSpeedFlag
Support high-speed
-
enumerator kSDIF_SupportDmaFlag
Support DMA
-
enumerator kSDIF_SupportSuspendResumeFlag
Support suspend/resume
-
enumerator kSDIF_SupportV330Flag
Support voltage 3.3V
-
enumerator kSDIF_Support4BitFlag
Support 4 bit mode
-
enumerator kSDIF_Support8BitFlag
Support 8 bit mode
-
enumerator kSDIF_SupportHighSpeedFlag
_sdif_reset_type define the reset type
Values:
-
enumerator kSDIF_ResetController
reset controller,will reset: BIU/CIU interface CIU and state machine,ABORT_READ_DATA,SEND_IRQ_RESPONSE and READ_WAIT bits of control register,START_CMD bit of the command register
-
enumerator kSDIF_ResetFIFO
reset data FIFO
-
enumerator kSDIF_ResetDMAInterface
reset DMA interface
-
enumerator kSDIF_ResetAll
reset all
-
enumerator kSDIF_ResetController
-
enum _sdif_bus_width
define the card bus width type
Values:
-
enumerator kSDIF_Bus1BitWidth
1bit bus width, 1bit mode and 4bit mode share one register bit
-
enumerator kSDIF_Bus4BitWidth
4bit mode mask
-
enumerator kSDIF_Bus8BitWidth
support 8 bit mode
-
enumerator kSDIF_Bus1BitWidth
_sdif_command_flags define the command flags
Values:
-
enumerator kSDIF_CmdResponseExpect
command request response
-
enumerator kSDIF_CmdResponseLengthLong
command response length long
-
enumerator kSDIF_CmdCheckResponseCRC
request check command response CRC
-
enumerator kSDIF_DataExpect
request data transfer,either read/write
-
enumerator kSDIF_DataWriteToCard
data transfer direction
-
enumerator kSDIF_DataStreamTransfer
data transfer mode :stream/block transfer command
-
enumerator kSDIF_DataTransferAutoStop
data transfer with auto stop at the end of
-
enumerator kSDIF_WaitPreTransferComplete
wait pre transfer complete before sending this cmd
-
enumerator kSDIF_TransferStopAbort
when host issue stop or abort cmd to stop data transfer ,this bit should set so that cmd/data state-machines of CIU can return to idle correctly
-
enumerator kSDIF_SendInitialization
send initialization 80 clocks for SD card after power on
-
enumerator kSDIF_CmdUpdateClockRegisterOnly
send cmd update the CIU clock register only
-
enumerator kSDIF_CmdtoReadCEATADevice
host is perform read access to CE-ATA device
-
enumerator kSDIF_CmdExpectCCS
command expect command completion signal signal
-
enumerator kSDIF_BootModeEnable
this bit should only be set for mandatory boot mode
-
enumerator kSDIF_BootModeExpectAck
boot mode expect ack
-
enumerator kSDIF_BootModeDisable
when software set this bit along with START_CMD, CIU terminates the boot operation
-
enumerator kSDIF_BootModeAlternate
select boot mode ,alternate or mandatory
-
enumerator kSDIF_CmdVoltageSwitch
this bit set for CMD11 only
-
enumerator kSDIF_CmdDataUseHoldReg
cmd and data send to card through the HOLD register
-
enumerator kSDIF_CmdResponseExpect
_sdif_command_type The command type
Values:
-
enumerator kCARD_CommandTypeNormal
Normal command
-
enumerator kCARD_CommandTypeSuspend
Suspend command
-
enumerator kCARD_CommandTypeResume
Resume command
-
enumerator kCARD_CommandTypeAbort
Abort command
-
enumerator kCARD_CommandTypeNormal
_sdif_response_type The command response type.
Define the command response type from card to host controller.
Values:
-
enumerator kCARD_ResponseTypeNone
Response type: none
-
enumerator kCARD_ResponseTypeR1
Response type: R1
-
enumerator kCARD_ResponseTypeR1b
Response type: R1b
-
enumerator kCARD_ResponseTypeR2
Response type: R2
-
enumerator kCARD_ResponseTypeR3
Response type: R3
-
enumerator kCARD_ResponseTypeR4
Response type: R4
-
enumerator kCARD_ResponseTypeR5
Response type: R5
-
enumerator kCARD_ResponseTypeR5b
Response type: R5b
-
enumerator kCARD_ResponseTypeR6
Response type: R6
-
enumerator kCARD_ResponseTypeR7
Response type: R7
-
enumerator kCARD_ResponseTypeNone
_sdif_interrupt_mask define the interrupt mask flags
Values:
-
enumerator kSDIF_CardDetect
mask for card detect
-
enumerator kSDIF_ResponseError
command response error
-
enumerator kSDIF_CommandDone
command transfer over
-
enumerator kSDIF_DataTransferOver
data transfer over flag
-
enumerator kSDIF_WriteFIFORequest
write FIFO request
-
enumerator kSDIF_ReadFIFORequest
read FIFO request
-
enumerator kSDIF_ResponseCRCError
response CRC error
-
enumerator kSDIF_DataCRCError
data CRC error
-
enumerator kSDIF_ResponseTimeout
response timeout
-
enumerator kSDIF_DataReadTimeout
read data timeout
-
enumerator kSDIF_DataStarvationByHostTimeout
data starvation by host time out
-
enumerator kSDIF_FIFOError
indicate the FIFO under run or overrun error
-
enumerator kSDIF_HardwareLockError
hardware lock write error
-
enumerator kSDIF_DataStartBitError
start bit error
-
enumerator kSDIF_AutoCmdDone
indicate the auto command done
-
enumerator kSDIF_DataEndBitError
end bit error
-
enumerator kSDIF_SDIOInterrupt
interrupt from the SDIO card
-
enumerator kSDIF_CommandTransferStatus
command transfer status collection
-
enumerator kSDIF_DataTransferStatus
data transfer status collection
-
enumerator kSDIF_DataTransferError
-
enumerator kSDIF_AllInterruptStatus
all interrupt mask
-
enumerator kSDIF_CardDetect
_sdif_dma_status define the internal DMA status flags
Values:
-
enumerator kSDIF_DMATransFinishOneDescriptor
DMA transfer finished for one DMA descriptor
-
enumerator kSDIF_DMARecvFinishOneDescriptor
DMA receive finished for one DMA descriptor
-
enumerator kSDIF_DMAFatalBusError
DMA fatal bus error
-
enumerator kSDIF_DMADescriptorUnavailable
DMA descriptor unavailable
-
enumerator kSDIF_DMACardErrorSummary
card error summary
-
enumerator kSDIF_NormalInterruptSummary
normal interrupt summary
-
enumerator kSDIF_AbnormalInterruptSummary
abnormal interrupt summary
-
enumerator kSDIF_DMAAllStatus
-
enumerator kSDIF_DMATransFinishOneDescriptor
_sdif_dma_descriptor_flag define the internal DMA descriptor flag
- Deprecated:
Do not use this enum anymore, please use SDIF_DMA_DESCRIPTOR_XXX_FLAG instead.
Values:
-
enumerator kSDIF_DisableCompleteInterrupt
disable the complete interrupt flag for the ends in the buffer pointed to by this descriptor
-
enumerator kSDIF_DMADescriptorDataBufferEnd
indicate this descriptor contain the last data buffer of data
-
enumerator kSDIF_DMADescriptorDataBufferStart
indicate this descriptor contain the first data buffer of data,if first buffer size is 0,next descriptor contain the begin of the data
-
enumerator kSDIF_DMASecondAddrChained
indicate that the second addr in the descriptor is the next descriptor addr not the data buffer
-
enumerator kSDIF_DMADescriptorEnd
indicate that the descriptor list reached its final descriptor
-
enumerator kSDIF_DMADescriptorOwnByDMA
indicate the descriptor is own by SD/MMC DMA
-
enum _sdif_dma_mode
define the internal DMA mode
Values:
-
enumerator kSDIF_ChainDMAMode
-
enumerator kSDIF_DualDMAMode
-
enumerator kSDIF_ChainDMAMode
-
typedef enum _sdif_bus_width sdif_bus_width_t
define the card bus width type
-
typedef enum _sdif_dma_mode sdif_dma_mode_t
define the internal DMA mode
-
typedef struct _sdif_dma_descriptor sdif_dma_descriptor_t
define the internal DMA descriptor
-
typedef struct _sdif_dma_config sdif_dma_config_t
Defines the internal DMA configure structure.
-
typedef struct _sdif_data sdif_data_t
Card data descriptor.
-
typedef struct _sdif_command sdif_command_t
Card command descriptor.
Define card command-related attribute.
-
typedef struct _sdif_transfer sdif_transfer_t
Transfer state.
-
typedef struct _sdif_config sdif_config_t
Data structure to initialize the sdif.
-
typedef struct _sdif_capability sdif_capability_t
SDIF capability information. Defines a structure to get the capability information of SDIF.
-
typedef struct _sdif_transfer_callback sdif_transfer_callback_t
sdif callback functions.
-
typedef struct _sdif_handle sdif_handle_t
sdif handle
Defines the structure to save the sdif state information and callback function. The detail interrupt status when send command or transfer data can be obtained from interruptFlags field by using mask defined in sdif_interrupt_flag_t;
Note
All the fields except interruptFlags and transferredWords must be allocated by the user.
-
typedef status_t (*sdif_transfer_function_t)(SDIF_Type *base, sdif_transfer_t *content)
sdif transfer function.
-
typedef struct _sdif_host sdif_host_t
sdif host descriptor
-
void SDIF_Init(SDIF_Type *base, sdif_config_t *config)
SDIF module initialization function.
Configures the SDIF according to the user configuration.
- Parameters:
base – SDIF peripheral base address.
config – SDIF configuration information.
-
void SDIF_Deinit(SDIF_Type *base)
SDIF module deinit function. user should call this function follow with IP reset.
- Parameters:
base – SDIF peripheral base address.
-
bool SDIF_SendCardActive(SDIF_Type *base, uint32_t timeout)
SDIF send initialize 80 clocks for SD card after initial.
- Parameters:
base – SDIF peripheral base address.
timeout – timeout value
-
static inline void SDIF_EnableCardClock(SDIF_Type *base, bool enable)
SDIF module enable/disable card clock.
- Parameters:
base – SDIF peripheral base address.
enable – enable/disable flag
-
static inline void SDIF_EnableLowPowerMode(SDIF_Type *base, bool enable)
SDIF module enable/disable module disable the card clock to enter low power mode when card is idle,for SDIF cards, if interrupts must be detected, clock should not be stopped.
- Parameters:
base – SDIF peripheral base address.
enable – enable/disable flag
-
static inline void SDIF_EnableCardPower(SDIF_Type *base, bool enable)
enable/disable the card power. once turn power on, software should wait for regulator/switch ramp-up time before trying to initialize card.
- Parameters:
base – SDIF peripheral base address.
enable – enable/disable flag.
-
void SDIF_SetCardBusWidth(SDIF_Type *base, sdif_bus_width_t type)
set card data bus width
- Parameters:
base – SDIF peripheral base address.
type – bus width type
-
static inline uint32_t SDIF_DetectCardInsert(SDIF_Type *base, bool data3)
SDIF module detect card insert status function.
- Parameters:
base – SDIF peripheral base address.
data3 – indicate use data3 as card insert detect pin
- Return values:
1 – card is inserted 0 card is removed
-
uint32_t SDIF_SetCardClock(SDIF_Type *base, uint32_t srcClock_Hz, uint32_t target_HZ)
Sets the card bus clock frequency.
- Parameters:
base – SDIF peripheral base address.
srcClock_Hz – SDIF source clock frequency united in Hz.
target_HZ – card bus clock frequency united in Hz.
- Returns:
The nearest frequency of busClock_Hz configured to SD bus.
-
bool SDIF_Reset(SDIF_Type *base, uint32_t mask, uint32_t timeout)
reset the different block of the interface.
- Parameters:
base – SDIF peripheral base address.
mask – indicate which block to reset.
timeout – timeout value,set to wait the bit self clear
- Returns:
reset result.
-
static inline uint32_t SDIF_GetCardWriteProtect(SDIF_Type *base)
get the card write protect status
- Parameters:
base – SDIF peripheral base address.
-
static inline void SDIF_AssertHardwareReset(SDIF_Type *base)
toggle state on hardware reset PIN This is used which card has a reset PIN typically.
- Parameters:
base – SDIF peripheral base address.
-
status_t SDIF_SendCommand(SDIF_Type *base, sdif_command_t *cmd, uint32_t timeout)
send command to the card
This api include polling the status of the bit START_COMMAND, if 0 used as timeout value, then this function will return directly without polling the START_CMD status.
- Parameters:
base – SDIF peripheral base address.
cmd – configuration collection
timeout – the timeout value of polling START_CMD auto clear status.
- Returns:
command excute status
-
static inline void SDIF_EnableGlobalInterrupt(SDIF_Type *base, bool enable)
SDIF enable/disable global interrupt.
- Parameters:
base – SDIF peripheral base address.
enable – enable/disable flag
-
static inline void SDIF_EnableInterrupt(SDIF_Type *base, uint32_t mask)
SDIF enable interrupt.
- Parameters:
base – SDIF peripheral base address.
mask – mask
-
static inline void SDIF_DisableInterrupt(SDIF_Type *base, uint32_t mask)
SDIF disable interrupt.
- Parameters:
base – SDIF peripheral base address.
mask – mask
-
static inline uint32_t SDIF_GetInterruptStatus(SDIF_Type *base)
SDIF get interrupt status.
- Parameters:
base – SDIF peripheral base address.
-
static inline uint32_t SDIF_GetEnabledInterruptStatus(SDIF_Type *base)
SDIF get enabled interrupt status.
- Parameters:
base – SDIF peripheral base address.
-
static inline void SDIF_ClearInterruptStatus(SDIF_Type *base, uint32_t mask)
SDIF clear interrupt status.
- Parameters:
base – SDIF peripheral base address.
mask – mask to clear
-
void SDIF_TransferCreateHandle(SDIF_Type *base, sdif_handle_t *handle, sdif_transfer_callback_t *callback, void *userData)
Creates the SDIF handle. register call back function for interrupt and enable the interrupt.
- Parameters:
base – SDIF peripheral base address.
handle – SDIF handle pointer.
callback – Structure pointer to contain all callback functions.
userData – Callback function parameter.
-
static inline void SDIF_EnableDmaInterrupt(SDIF_Type *base, uint32_t mask)
SDIF enable DMA interrupt.
- Parameters:
base – SDIF peripheral base address.
mask – mask to set
-
static inline void SDIF_DisableDmaInterrupt(SDIF_Type *base, uint32_t mask)
SDIF disable DMA interrupt.
- Parameters:
base – SDIF peripheral base address.
mask – mask to clear
-
static inline uint32_t SDIF_GetInternalDMAStatus(SDIF_Type *base)
SDIF get internal DMA status.
- Parameters:
base – SDIF peripheral base address.
- Returns:
the internal DMA status register
-
static inline uint32_t SDIF_GetEnabledDMAInterruptStatus(SDIF_Type *base)
SDIF get enabled internal DMA interrupt status.
- Parameters:
base – SDIF peripheral base address.
- Returns:
the internal DMA status register
-
static inline void SDIF_ClearInternalDMAStatus(SDIF_Type *base, uint32_t mask)
SDIF clear internal DMA status.
- Parameters:
base – SDIF peripheral base address.
mask – mask to clear
-
status_t SDIF_InternalDMAConfig(SDIF_Type *base, sdif_dma_config_t *config, const uint32_t *data, uint32_t dataSize)
SDIF internal DMA config function.
- Parameters:
base – SDIF peripheral base address.
config – DMA configuration collection
data – buffer pointer
dataSize – buffer size
-
static inline void SDIF_EnableInternalDMA(SDIF_Type *base, bool enable)
SDIF internal DMA enable.
- Parameters:
base – SDIF peripheral base address.
enable – internal DMA enable or disable flag.
-
static inline void SDIF_SendReadWait(SDIF_Type *base)
SDIF send read wait to SDIF card function.
- Parameters:
base – SDIF peripheral base address.
-
bool SDIF_AbortReadData(SDIF_Type *base, uint32_t timeout)
SDIF abort the read data when SDIF card is in suspend state Once assert this bit,data state machine will be reset which is waiting for the next blocking data,used in SDIO card suspend sequence,should call after suspend cmd send.
- Parameters:
base – SDIF peripheral base address.
timeout – timeout value to wait this bit self clear which indicate the data machine reset to idle
-
static inline void SDIF_EnableCEATAInterrupt(SDIF_Type *base, bool enable)
SDIF enable/disable CE-ATA card interrupt this bit should set together with the card register.
- Parameters:
base – SDIF peripheral base address.
enable – enable/disable flag
-
status_t SDIF_TransferNonBlocking(SDIF_Type *base, sdif_handle_t *handle, sdif_dma_config_t *dmaConfig, sdif_transfer_t *transfer)
SDIF transfer function data/cmd in a non-blocking way this API should be use in interrupt mode, when use this API user must call SDIF_TransferCreateHandle first, all status check through interrupt.
- Parameters:
base – SDIF peripheral base address.
handle – handle
dmaConfig – config structure This parameter can be config as:
NULL In this condition, polling transfer mode is selected
avaliable DMA config In this condition, DMA transfer mode is selected
transfer – transfer configuration collection
-
status_t SDIF_TransferBlocking(SDIF_Type *base, sdif_dma_config_t *dmaConfig, sdif_transfer_t *transfer)
SDIF transfer function data/cmd in a blocking way.
- Parameters:
base – SDIF peripheral base address.
dmaConfig – config structure
NULL In this condition, polling transfer mode is selected
avaliable DMA config In this condition, DMA transfer mode is selected
transfer – transfer configuration collection
-
status_t SDIF_ReleaseDMADescriptor(SDIF_Type *base, sdif_dma_config_t *dmaConfig)
SDIF release the DMA descriptor to DMA engine this function should be called when DMA descriptor unavailable status occurs.
- Parameters:
base – SDIF peripheral base address.
dmaConfig – DMA config pointer
-
void SDIF_GetCapability(SDIF_Type *base, sdif_capability_t *capability)
SDIF return the controller capability.
- Parameters:
base – SDIF peripheral base address.
capability – capability pointer
-
static inline uint32_t SDIF_GetControllerStatus(SDIF_Type *base)
SDIF return the controller status.
- Parameters:
base – SDIF peripheral base address.
-
static inline void SDIF_SendCCSD(SDIF_Type *base, bool withAutoStop)
SDIF send command complete signal disable to CE-ATA card.
- Parameters:
base – SDIF peripheral base address.
withAutoStop – auto stop flag
-
void SDIF_ConfigClockDelay(uint32_t target_HZ, uint32_t divider)
SDIF config the clock delay This function is used to config the cclk_in delay to sample and driver the data ,should meet the min setup time and hold time, and user need to config this parameter according to your board setting.
- Parameters:
target_HZ – freq work mode
divider – not used in this function anymore, use DELAY value instead of phase directly.
-
SDIF_CLOCK_RANGE_NEED_DELAY
SDIOCLKCTRL setting Below clock delay setting should depend on specific platform, so it can be redefined when timing mismatch issue occur. Such as: response error/CRC error and so on.
clock range value which need to add delay to avoid timing issue
-
SDIF_HIGHSPEED_SAMPLE_DELAY
High speed mode clk_sample fixed delay.
12 * 250ps = 3ns
-
SDIF_HIGHSPEED_DRV_DELAY
High speed mode clk_drv fixed delay.
31 * 250ps = 7.75ns
-
SDIF_HIGHSPEED_SAMPLE_PHASE_SHIFT
High speed mode clk_sample phase shift.
-
SDIF_HIGHSPEED_DRV_PHASE_SHIFT
High speed mode clk_drv phase shift.
-
SDIF_DEFAULT_MODE_SAMPLE_DELAY
default mode sample fixed delay
12 * 250ps = 3ns
-
SDIF_DEFAULT_MODE_DRV_DELAY
31 * 250ps = 7.75ns
-
SDIF_INTERNAL_DMA_ADDR_ALIGN
SDIF internal DMA descriptor address and the data buffer address align.
-
SDIF_DMA_DESCRIPTOR_DISABLE_COMPLETE_INT_FLAG
SDIF DMA descriptor flag.
-
SDIF_DMA_DESCRIPTOR_DATA_BUFFER_END_FLAG
-
SDIF_DMA_DESCRIPTOR_DATA_BUFFER_START_FLAG
-
SDIF_DMA_DESCRIPTOR_SECOND_ADDR_CHAIN_FLAG
-
SDIF_DMA_DESCRIPTOR_DESCRIPTOR_END_FLAG
-
SDIF_DMA_DESCRIPTOR_OWN_BY_DMA_FLAG
-
struct _sdif_dma_descriptor
- #include <fsl_sdif.h>
define the internal DMA descriptor
Public Members
-
uint32_t dmaDesAttribute
internal DMA attribute control and status
-
uint32_t dmaDataBufferSize
internal DMA transfer buffer size control
-
const uint32_t *dmaDataBufferAddr0
internal DMA buffer 0 addr ,the buffer size must be 32bit aligned
-
const uint32_t *dmaDataBufferAddr1
internal DMA buffer 1 addr ,the buffer size must be 32bit aligned
-
uint32_t dmaDesAttribute
-
struct _sdif_dma_config
- #include <fsl_sdif.h>
Defines the internal DMA configure structure.
Public Members
-
bool enableFixBurstLen
fix burst len enable/disable flag,When set, the AHB will use only SINGLE, INCR4, INCR8 or INCR16 during start of normal burst transfers. When reset, the AHB will use SINGLE and INCR burst transfer operations
-
sdif_dma_mode_t mode
define the DMA mode
-
uint8_t dmaDesSkipLen
define the descriptor skip length ,the length between two descriptor this field is special for dual DMA mode
-
uint32_t *dmaDesBufferStartAddr
internal DMA descriptor start address
-
uint32_t dmaDesBufferLen
internal DMA buffer descriptor buffer len ,user need to pay attention to the dma descriptor buffer length if it is bigger enough for your transfer
-
bool enableFixBurstLen
-
struct _sdif_data
- #include <fsl_sdif.h>
Card data descriptor.
Public Members
-
bool streamTransfer
indicate this is a stream data transfer command
-
bool enableAutoCommand12
indicate if auto stop will send when data transfer over
-
bool enableIgnoreError
indicate if enable ignore error when transfer data
-
size_t blockSize
Block size, take care when configure this parameter
-
uint32_t blockCount
Block count
-
uint32_t *rxData
data buffer to receive
-
const uint32_t *txData
data buffer to transfer
-
bool streamTransfer
-
struct _sdif_command
- #include <fsl_sdif.h>
Card command descriptor.
Define card command-related attribute.
Public Members
-
uint32_t index
Command index
-
uint32_t argument
Command argument
-
uint32_t response[4U]
Response for this command
-
uint32_t type
define the command type
-
uint32_t responseType
Command response type
-
uint32_t flags
Cmd flags
-
uint32_t responseErrorFlags
response error flags, need to check the flags when receive the cmd response
-
uint32_t index
-
struct _sdif_transfer
- #include <fsl_sdif.h>
Transfer state.
-
struct _sdif_config
- #include <fsl_sdif.h>
Data structure to initialize the sdif.
Public Members
-
uint8_t responseTimeout
command response timeout value
-
uint32_t cardDetDebounce_Clock
define the debounce clock count which will used in card detect logic,typical value is 5-25ms
-
uint32_t dataTimeout
data timeout value
-
uint8_t responseTimeout
-
struct _sdif_capability
- #include <fsl_sdif.h>
SDIF capability information. Defines a structure to get the capability information of SDIF.
Public Members
-
uint32_t sdVersion
support SD card/sdio version
-
uint32_t mmcVersion
support emmc card version
-
uint32_t maxBlockLength
Maximum block length united as byte
-
uint32_t maxBlockCount
Maximum byte count can be transfered
-
uint32_t flags
Capability flags to indicate the support information
-
uint32_t sdVersion
-
struct _sdif_transfer_callback
- #include <fsl_sdif.h>
sdif callback functions.
Public Members
-
void (*cardInserted)(SDIF_Type *base, void *userData)
card insert call back
-
void (*cardRemoved)(SDIF_Type *base, void *userData)
card remove call back
-
void (*SDIOInterrupt)(SDIF_Type *base, void *userData)
SDIO card interrupt occurs
-
void (*DMADesUnavailable)(SDIF_Type *base, void *userData)
DMA descriptor unavailable
-
void (*CommandReload)(SDIF_Type *base, void *userData)
command buffer full,need re-load
-
void (*TransferComplete)(SDIF_Type *base, void *handle, status_t status, void *userData)
Transfer complete callback
-
void (*cardInserted)(SDIF_Type *base, void *userData)
-
struct _sdif_handle
- #include <fsl_sdif.h>
sdif handle
Defines the structure to save the sdif state information and callback function. The detail interrupt status when send command or transfer data can be obtained from interruptFlags field by using mask defined in sdif_interrupt_flag_t;
Note
All the fields except interruptFlags and transferredWords must be allocated by the user.
Public Members
-
sdif_data_t *volatile data
Data to transfer
-
sdif_command_t *volatile command
Command to send
-
volatile uint32_t transferredWords
Words transferred by polling way
-
sdif_transfer_callback_t callback
Callback function
-
void *userData
Parameter for transfer complete callback
-
sdif_data_t *volatile data
-
struct _sdif_host
- #include <fsl_sdif.h>
sdif host descriptor
Public Members
-
SDIF_Type *base
sdif peripheral base address
-
uint32_t sourceClock_Hz
sdif source clock frequency united in Hz
-
sdif_config_t config
sdif configuration
-
sdif_transfer_function_t transfer
sdif transfer function
-
sdif_capability_t capability
sdif capability information
-
SDIF_Type *base
SHA: SHA encryption decryption driver
-
FSL_SHA_DRIVER_VERSION
Defines LPC SHA driver version 2.3.2.
Current version: 2.3.2
Change log:
Version 2.0.0
Initial version
Version 2.1.0
Updated “sha_ldm_stm_16_words” “sha_one_block” API to match QN9090. QN9090 has no ALIAS register.
Added “SHA_ClkInit” “SHA_ClkInit”
Version 2.1.1
MISRA C-2012 issue fixed: rule 10.3, 10.4, 11.9, 14.4, 16.4 and 17.7.
Version 2.2.0
Support MEMADDR pseudo DMA for loading input data in SHA_Update function (LPCXpresso54018 and LPCXpresso54628).
Version 2.2.1
MISRA C-2012 issue fix.
Version 2.2.2 Modified SHA_Finish function. While using pseudo DMA with maximum optimization, compiler optimize out condition. Which caused block in this function and did not check state, which has been set in interrupt.
Version 2.3.0 Modified SHA_Update to use blocking version of AHB Master mode when its available on chip. Added SHA_UpdateNonBlocking() function which uses nonblocking AHB Master mode. Fixed incorrect calculation of SHA when calling SHA_Update multiple times when is CPU used to load data. Added Reset into SHA_ClkInit and SHA_ClkDeinit function.
Version 2.3.1 Modified sha_process_message_data_master() to ensure that MEMCTRL will be written within 64 cycles of writing last word to INDATA as is mentioned in errata, even with different optimization levels.
Version 2.3.2 Add -O2 optimization for GCC to sha_process_message_data_master(), because without it the function hangs under some conditions.
-
enum _sha_algo_t
Supported cryptographic block cipher functions for HASH creation
Values:
-
enumerator kSHA_Sha1
SHA_1
-
enumerator kSHA_Sha256
SHA_256
-
enumerator kSHA_Sha1
-
typedef enum _sha_algo_t sha_algo_t
Supported cryptographic block cipher functions for HASH creation
-
typedef struct _sha_ctx_t sha_ctx_t
Storage type used to save hash context.
-
typedef void (*sha_callback_t)(SHA_Type *base, sha_ctx_t *ctx, status_t status, void *userData)
background hash callback function.
-
SHA_CTX_SIZE
SHA Context size.
-
struct _sha_ctx_t
- #include <fsl_sha.h>
Storage type used to save hash context.
Sha_algorithm_level_api
-
status_t SHA_Init(SHA_Type *base, sha_ctx_t *ctx, sha_algo_t algo)
Initialize HASH context.
This function initializes new hash context.
- Parameters:
base – SHA peripheral base address
ctx – [out] Output hash context
algo – Underlaying algorithm to use for hash computation. Either SHA-1 or SHA-256.
- Returns:
Status of initialization
-
status_t SHA_Update(SHA_Type *base, sha_ctx_t *ctx, const uint8_t *message, size_t messageSize)
Add data to current HASH.
Add data to current HASH. This can be called repeatedly with an arbitrary amount of data to be hashed.
- Parameters:
base – SHA peripheral base address
ctx – [inout] HASH context
message – Input message
messageSize – Size of input message in bytes
- Returns:
Status of the hash update operation
-
status_t SHA_Finish(SHA_Type *base, sha_ctx_t *ctx, uint8_t *output, size_t *outputSize)
Finalize hashing.
Outputs the final hash and erases the context. SHA-1 or SHA-256 padding bits are automatically added by this function.
- Parameters:
base – SHA peripheral base address
ctx – [inout] HASH context
output – [out] Output hash data
outputSize – [inout] On input, determines the size of bytes of the output array. On output, tells how many bytes have been written to output.
- Returns:
Status of the hash finish operation
-
void SHA_SetCallback(SHA_Type *base, sha_ctx_t *ctx, sha_callback_t callback, void *userData)
Initializes the SHA handle for background hashing.
This function initializes the hash context for background hashing (Non-blocking) APIs. This is less typical interface to hash function, but can be used for parallel processing, when main CPU has something else to do. Example is digital signature RSASSA-PKCS1-V1_5-VERIFY((n,e),M,S) algorithm, where background hashing of M can be started, then CPU can compute S^e mod n (in parallel with background hashing) and once the digest becomes available, CPU can proceed to comparison of EM with EM’.
- Parameters:
base – SHA peripheral base address.
ctx – [out] Hash context.
callback – Callback function.
userData – User data (to be passed as an argument to callback function, once callback is invoked from isr).
-
status_t SHA_UpdateNonBlocking(SHA_Type *base, sha_ctx_t *ctx, const uint8_t *input, size_t inputSize)
Create running hash on given data.
Configures the SHA to compute new running hash as AHB master and returns immediately. SHA AHB Master mode supports only aligned
input
address and can be called only once per continuous block of data. Every call to this function must be preceded with SHA_Init() and finished with _SHA_Finish(). Once callback function is invoked by SHA isr, it should set a flag for the main application to finalize the hashing (padding) and to read out the final digest by calling SHA_Finish().- Parameters:
base – SHA peripheral base address
ctx – Specifies callback. Last incomplete 512-bit block of the input is copied into clear buffer for padding.
input – 32-bit word aligned pointer to Input data.
inputSize – Size of input data in bytes (must be word aligned)
- Returns:
Status of the hash update operation.
-
void SHA_ClkInit(SHA_Type *base)
Start SHA clock.
Start SHA clock
- Parameters:
base – SHA peripheral base address
-
void SHA_ClkDeinit(SHA_Type *base)
Stop SHA clock.
Stop SHA clock
- Parameters:
base – SHA peripheral base address
SPI: Serial Peripheral Interface Driver
SPI DMA Driver
-
status_t SPI_MasterTransferCreateHandleDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_dma_callback_t callback, void *userData, dma_handle_t *txHandle, dma_handle_t *rxHandle)
Initialize the SPI master DMA handle.
This function initializes the SPI master DMA handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, user need only call this API once to get the initialized handle.
- Parameters:
base – SPI peripheral base address.
handle – SPI handle pointer.
callback – User callback function called at the end of a transfer.
userData – User data for callback.
txHandle – DMA handle pointer for SPI Tx, the handle shall be static allocated by users.
rxHandle – DMA handle pointer for SPI Rx, the handle shall be static allocated by users.
-
status_t SPI_MasterTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_transfer_t *xfer)
Perform a non-blocking SPI transfer using DMA.
Note
This interface returned immediately after transfer initiates, users should call SPI_GetTransferStatus to poll the transfer status to check whether SPI transfer finished.
- Parameters:
base – SPI peripheral base address.
handle – SPI DMA handle pointer.
xfer – Pointer to dma transfer structure.
- Return values:
kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_SPI_Busy – SPI is not idle, is running another transfer.
-
status_t SPI_MasterHalfDuplexTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_half_duplex_transfer_t *xfer)
Transfers a block of data using a DMA method.
This function using polling way to do the first half transimission and using DMA way to do the srcond half transimission, the transfer mechanism is half-duplex. When do the second half transimission, code will return right away. When all data is transferred, the callback function is called.
- Parameters:
base – SPI base pointer
handle – A pointer to the spi_master_dma_handle_t structure which stores the transfer state.
xfer – A pointer to the spi_half_duplex_transfer_t structure.
- Returns:
status of status_t.
-
static inline status_t SPI_SlaveTransferCreateHandleDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_dma_callback_t callback, void *userData, dma_handle_t *txHandle, dma_handle_t *rxHandle)
Initialize the SPI slave DMA handle.
This function initializes the SPI slave DMA handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, user need only call this API once to get the initialized handle.
- Parameters:
base – SPI peripheral base address.
handle – SPI handle pointer.
callback – User callback function called at the end of a transfer.
userData – User data for callback.
txHandle – DMA handle pointer for SPI Tx, the handle shall be static allocated by users.
rxHandle – DMA handle pointer for SPI Rx, the handle shall be static allocated by users.
-
static inline status_t SPI_SlaveTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_transfer_t *xfer)
Perform a non-blocking SPI transfer using DMA.
Note
This interface returned immediately after transfer initiates, users should call SPI_GetTransferStatus to poll the transfer status to check whether SPI transfer finished.
- Parameters:
base – SPI peripheral base address.
handle – SPI DMA handle pointer.
xfer – Pointer to dma transfer structure.
- Return values:
kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_SPI_Busy – SPI is not idle, is running another transfer.
-
void SPI_MasterTransferAbortDMA(SPI_Type *base, spi_dma_handle_t *handle)
Abort a SPI transfer using DMA.
- Parameters:
base – SPI peripheral base address.
handle – SPI DMA handle pointer.
-
status_t SPI_MasterTransferGetCountDMA(SPI_Type *base, spi_dma_handle_t *handle, size_t *count)
Gets the master DMA transfer remaining bytes.
This function gets the master DMA transfer remaining bytes.
- Parameters:
base – SPI peripheral base address.
handle – A pointer to the spi_dma_handle_t structure which stores the transfer state.
count – A number of bytes transferred by the non-blocking transaction.
- Returns:
status of status_t.
-
static inline void SPI_SlaveTransferAbortDMA(SPI_Type *base, spi_dma_handle_t *handle)
Abort a SPI transfer using DMA.
- Parameters:
base – SPI peripheral base address.
handle – SPI DMA handle pointer.
-
static inline status_t SPI_SlaveTransferGetCountDMA(SPI_Type *base, spi_dma_handle_t *handle, size_t *count)
Gets the slave DMA transfer remaining bytes.
This function gets the slave DMA transfer remaining bytes.
- Parameters:
base – SPI peripheral base address.
handle – A pointer to the spi_dma_handle_t structure which stores the transfer state.
count – A number of bytes transferred by the non-blocking transaction.
- Returns:
status of status_t.
-
FSL_SPI_DMA_DRIVER_VERSION
SPI DMA driver version 2.1.1.
-
typedef struct _spi_dma_handle spi_dma_handle_t
-
typedef void (*spi_dma_callback_t)(SPI_Type *base, spi_dma_handle_t *handle, status_t status, void *userData)
SPI DMA callback called at the end of transfer.
-
struct _spi_dma_handle
- #include <fsl_spi_dma.h>
SPI DMA transfer handle, users should not touch the content of the handle.
Public Members
-
volatile bool txInProgress
Send transfer finished
-
volatile bool rxInProgress
Receive transfer finished
-
uint8_t bytesPerFrame
Bytes in a frame for SPI transfer
-
uint8_t lastwordBytes
The Bytes of lastword for master
-
dma_handle_t *txHandle
DMA handler for SPI send
-
dma_handle_t *rxHandle
DMA handler for SPI receive
-
spi_dma_callback_t callback
Callback for SPI DMA transfer
-
void *userData
User Data for SPI DMA callback
-
uint32_t state
Internal state of SPI DMA transfer
-
size_t transferSize
Bytes need to be transfer
-
uint32_t instance
Index of SPI instance
-
const uint8_t *txNextData
The pointer of next time tx data
-
const uint8_t *txEndData
The pointer of end of data
-
uint8_t *rxNextData
The pointer of next time rx data
-
uint8_t *rxEndData
The pointer of end of rx data
-
uint32_t dataBytesEveryTime
Bytes in a time for DMA transfer, default is DMA_MAX_TRANSFER_COUNT
-
volatile bool txInProgress
SPI Driver
-
FSL_SPI_DRIVER_VERSION
SPI driver version.
-
enum _spi_xfer_option
SPI transfer option.
Values:
-
enumerator kSPI_FrameDelay
A delay may be inserted, defined in the DLY register.
-
enumerator kSPI_FrameAssert
SSEL will be deasserted at the end of a transfer
-
enumerator kSPI_FrameDelay
-
enum _spi_shift_direction
SPI data shifter direction options.
Values:
-
enumerator kSPI_MsbFirst
Data transfers start with most significant bit.
-
enumerator kSPI_LsbFirst
Data transfers start with least significant bit.
-
enumerator kSPI_MsbFirst
-
enum _spi_clock_polarity
SPI clock polarity configuration.
Values:
-
enumerator kSPI_ClockPolarityActiveHigh
Active-high SPI clock (idles low).
-
enumerator kSPI_ClockPolarityActiveLow
Active-low SPI clock (idles high).
-
enumerator kSPI_ClockPolarityActiveHigh
-
enum _spi_clock_phase
SPI clock phase configuration.
Values:
-
enumerator kSPI_ClockPhaseFirstEdge
First edge on SCK occurs at the middle of the first cycle of a data transfer.
-
enumerator kSPI_ClockPhaseSecondEdge
First edge on SCK occurs at the start of the first cycle of a data transfer.
-
enumerator kSPI_ClockPhaseFirstEdge
-
enum _spi_txfifo_watermark
txFIFO watermark values
Values:
-
enumerator kSPI_TxFifo0
SPI tx watermark is empty
-
enumerator kSPI_TxFifo1
SPI tx watermark at 1 item
-
enumerator kSPI_TxFifo2
SPI tx watermark at 2 items
-
enumerator kSPI_TxFifo3
SPI tx watermark at 3 items
-
enumerator kSPI_TxFifo4
SPI tx watermark at 4 items
-
enumerator kSPI_TxFifo5
SPI tx watermark at 5 items
-
enumerator kSPI_TxFifo6
SPI tx watermark at 6 items
-
enumerator kSPI_TxFifo7
SPI tx watermark at 7 items
-
enumerator kSPI_TxFifo0
-
enum _spi_rxfifo_watermark
rxFIFO watermark values
Values:
-
enumerator kSPI_RxFifo1
SPI rx watermark at 1 item
-
enumerator kSPI_RxFifo2
SPI rx watermark at 2 items
-
enumerator kSPI_RxFifo3
SPI rx watermark at 3 items
-
enumerator kSPI_RxFifo4
SPI rx watermark at 4 items
-
enumerator kSPI_RxFifo5
SPI rx watermark at 5 items
-
enumerator kSPI_RxFifo6
SPI rx watermark at 6 items
-
enumerator kSPI_RxFifo7
SPI rx watermark at 7 items
-
enumerator kSPI_RxFifo8
SPI rx watermark at 8 items
-
enumerator kSPI_RxFifo1
-
enum _spi_data_width
Transfer data width.
Values:
-
enumerator kSPI_Data4Bits
4 bits data width
-
enumerator kSPI_Data5Bits
5 bits data width
-
enumerator kSPI_Data6Bits
6 bits data width
-
enumerator kSPI_Data7Bits
7 bits data width
-
enumerator kSPI_Data8Bits
8 bits data width
-
enumerator kSPI_Data9Bits
9 bits data width
-
enumerator kSPI_Data10Bits
10 bits data width
-
enumerator kSPI_Data11Bits
11 bits data width
-
enumerator kSPI_Data12Bits
12 bits data width
-
enumerator kSPI_Data13Bits
13 bits data width
-
enumerator kSPI_Data14Bits
14 bits data width
-
enumerator kSPI_Data15Bits
15 bits data width
-
enumerator kSPI_Data16Bits
16 bits data width
-
enumerator kSPI_Data4Bits
-
enum _spi_ssel
Slave select.
Values:
-
enumerator kSPI_Ssel0
Slave select 0
-
enumerator kSPI_Ssel1
Slave select 1
-
enumerator kSPI_Ssel2
Slave select 2
-
enumerator kSPI_Ssel3
Slave select 3
-
enumerator kSPI_Ssel0
-
enum _spi_spol
ssel polarity
Values:
-
enumerator kSPI_Spol0ActiveHigh
-
enumerator kSPI_Spol1ActiveHigh
-
enumerator kSPI_Spol3ActiveHigh
-
enumerator kSPI_SpolActiveAllHigh
-
enumerator kSPI_SpolActiveAllLow
-
enumerator kSPI_Spol0ActiveHigh
SPI transfer status.
Values:
-
enumerator kStatus_SPI_Busy
SPI bus is busy
-
enumerator kStatus_SPI_Idle
SPI is idle
-
enumerator kStatus_SPI_Error
SPI error
-
enumerator kStatus_SPI_BaudrateNotSupport
Baudrate is not support in current clock source
-
enumerator kStatus_SPI_Timeout
SPI timeout polling status flags.
-
enumerator kStatus_SPI_Busy
-
enum _spi_interrupt_enable
SPI interrupt sources.
Values:
-
enumerator kSPI_RxLvlIrq
Rx level interrupt
-
enumerator kSPI_TxLvlIrq
Tx level interrupt
-
enumerator kSPI_RxLvlIrq
-
enum _spi_statusflags
SPI status flags.
Values:
-
enumerator kSPI_TxEmptyFlag
txFifo is empty
-
enumerator kSPI_TxNotFullFlag
txFifo is not full
-
enumerator kSPI_RxNotEmptyFlag
rxFIFO is not empty
-
enumerator kSPI_RxFullFlag
rxFIFO is full
-
enumerator kSPI_TxEmptyFlag
-
typedef enum _spi_xfer_option spi_xfer_option_t
SPI transfer option.
-
typedef enum _spi_shift_direction spi_shift_direction_t
SPI data shifter direction options.
-
typedef enum _spi_clock_polarity spi_clock_polarity_t
SPI clock polarity configuration.
-
typedef enum _spi_clock_phase spi_clock_phase_t
SPI clock phase configuration.
-
typedef enum _spi_txfifo_watermark spi_txfifo_watermark_t
txFIFO watermark values
-
typedef enum _spi_rxfifo_watermark spi_rxfifo_watermark_t
rxFIFO watermark values
-
typedef enum _spi_data_width spi_data_width_t
Transfer data width.
-
typedef enum _spi_ssel spi_ssel_t
Slave select.
-
typedef enum _spi_spol spi_spol_t
ssel polarity
-
typedef struct _spi_delay_config spi_delay_config_t
SPI delay time configure structure. Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.
-
typedef struct _spi_master_config spi_master_config_t
SPI master user configure structure.
-
typedef struct _spi_slave_config spi_slave_config_t
SPI slave user configure structure.
-
typedef struct _spi_transfer spi_transfer_t
SPI transfer structure.
-
typedef struct _spi_half_duplex_transfer spi_half_duplex_transfer_t
SPI half-duplex(master only) transfer structure.
-
typedef struct _spi_config spi_config_t
Internal configuration structure used in ‘spi’ and ‘spi_dma’ driver.
-
typedef struct _spi_master_handle spi_master_handle_t
Master handle type.
-
typedef spi_master_handle_t spi_slave_handle_t
Slave handle type.
-
typedef void (*spi_master_callback_t)(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData)
SPI master callback for finished transmit.
-
typedef void (*spi_slave_callback_t)(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData)
SPI slave callback for finished transmit.
-
typedef void (*flexcomm_spi_master_irq_handler_t)(SPI_Type *base, spi_master_handle_t *handle)
Typedef for master interrupt handler.
-
typedef void (*flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, spi_slave_handle_t *handle)
Typedef for slave interrupt handler.
-
volatile uint8_t s_dummyData[]
SPI default SSEL COUNT.
Global variable for dummy data value setting.
-
SPI_DUMMYDATA
SPI dummy transfer data, the data is sent while txBuff is NULL.
-
SPI_RETRY_TIMES
Retry times for waiting flag.
-
SPI_DATA(n)
-
SPI_CTRLMASK
-
SPI_ASSERTNUM_SSEL(n)
-
SPI_DEASSERTNUM_SSEL(n)
-
SPI_DEASSERT_ALL
-
SPI_FIFOWR_FLAGS_MASK
-
SPI_FIFOTRIG_TXLVL_GET(base)
-
SPI_FIFOTRIG_RXLVL_GET(base)
-
struct _spi_delay_config
- #include <fsl_spi.h>
SPI delay time configure structure. Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.
Public Members
-
uint8_t preDelay
Delay between SSEL assertion and the beginning of transfer.
-
uint8_t postDelay
Delay between the end of transfer and SSEL deassertion.
-
uint8_t frameDelay
Delay between frame to frame.
-
uint8_t transferDelay
Delay between transfer to transfer.
-
uint8_t preDelay
-
struct _spi_master_config
- #include <fsl_spi.h>
SPI master user configure structure.
Public Members
-
bool enableLoopback
Enable loopback for test purpose
-
bool enableMaster
Enable SPI at initialization time
-
spi_clock_polarity_t polarity
Clock polarity
-
spi_clock_phase_t phase
Clock phase
-
spi_shift_direction_t direction
MSB or LSB
-
uint32_t baudRate_Bps
Baud Rate for SPI in Hz
-
spi_data_width_t dataWidth
Width of the data
-
spi_ssel_t sselNum
Slave select number
-
spi_spol_t sselPol
Configure active CS polarity
-
uint8_t txWatermark
txFIFO watermark
-
uint8_t rxWatermark
rxFIFO watermark
-
spi_delay_config_t delayConfig
Delay configuration.
-
bool enableLoopback
-
struct _spi_slave_config
- #include <fsl_spi.h>
SPI slave user configure structure.
Public Members
-
bool enableSlave
Enable SPI at initialization time
-
spi_clock_polarity_t polarity
Clock polarity
-
spi_clock_phase_t phase
Clock phase
-
spi_shift_direction_t direction
MSB or LSB
-
spi_data_width_t dataWidth
Width of the data
-
spi_spol_t sselPol
Configure active CS polarity
-
uint8_t txWatermark
txFIFO watermark
-
uint8_t rxWatermark
rxFIFO watermark
-
bool enableSlave
-
struct _spi_transfer
- #include <fsl_spi.h>
SPI transfer structure.
Public Members
-
const uint8_t *txData
Send buffer
-
uint8_t *rxData
Receive buffer
-
uint32_t configFlags
Additional option to control transfer, spi_xfer_option_t.
-
size_t dataSize
Transfer bytes
-
const uint8_t *txData
-
struct _spi_half_duplex_transfer
- #include <fsl_spi.h>
SPI half-duplex(master only) transfer structure.
Public Members
-
const uint8_t *txData
Send buffer
-
uint8_t *rxData
Receive buffer
-
size_t txDataSize
Transfer bytes for transmit
-
size_t rxDataSize
Transfer bytes
-
uint32_t configFlags
Transfer configuration flags, spi_xfer_option_t.
-
bool isPcsAssertInTransfer
If PCS pin keep assert between transmit and receive. true for assert and false for deassert.
-
bool isTransmitFirst
True for transmit first and false for receive first.
-
const uint8_t *txData
-
struct _spi_config
- #include <fsl_spi.h>
Internal configuration structure used in ‘spi’ and ‘spi_dma’ driver.
-
struct _spi_master_handle
- #include <fsl_spi.h>
SPI transfer handle structure.
Public Members
-
const uint8_t *volatile txData
Transfer buffer
-
uint8_t *volatile rxData
Receive buffer
-
volatile size_t txRemainingBytes
Number of data to be transmitted [in bytes]
-
volatile size_t rxRemainingBytes
Number of data to be received [in bytes]
-
volatile int8_t toReceiveCount
The number of data expected to receive in data width. Since the received count and sent count should be the same to complete the transfer, if the sent count is x and the received count is y, toReceiveCount is x-y.
-
size_t totalByteCount
A number of transfer bytes
-
volatile uint32_t state
SPI internal state
-
spi_master_callback_t callback
SPI callback
-
void *userData
Callback parameter
-
uint8_t dataWidth
Width of the data [Valid values: 1 to 16]
-
uint8_t sselNum
Slave select number to be asserted when transferring data [Valid values: 0 to 3]
-
uint32_t configFlags
Additional option to control transfer
-
uint8_t txWatermark
txFIFO watermark
-
uint8_t rxWatermark
rxFIFO watermark
-
const uint8_t *volatile txData
SPIFI: SPIFI flash interface driver
-
void SPIFI_TransferTxCreateHandleDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, spifi_dma_callback_t callback, void *userData, dma_handle_t *dmaHandle)
Initializes the SPIFI handle for send which is used in transactional functions and set the callback.
- Parameters:
base – SPIFI peripheral base address
handle – Pointer to spifi_dma_handle_t structure
callback – SPIFI callback, NULL means no callback.
userData – User callback function data.
dmaHandle – User requested DMA handle for DMA transfer
-
void SPIFI_TransferRxCreateHandleDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, spifi_dma_callback_t callback, void *userData, dma_handle_t *dmaHandle)
Initializes the SPIFI handle for receive which is used in transactional functions and set the callback.
- Parameters:
base – SPIFI peripheral base address
handle – Pointer to spifi_dma_handle_t structure
callback – SPIFI callback, NULL means no callback.
userData – User callback function data.
dmaHandle – User requested DMA handle for DMA transfer
-
status_t SPIFI_TransferSendDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, spifi_transfer_t *xfer)
Transfers SPIFI data using an DMA non-blocking method.
This function writes data to the SPIFI transmit FIFO. This function is non-blocking.
- Parameters:
base – Pointer to QuadSPI Type.
handle – Pointer to spifi_dma_handle_t structure
xfer – SPIFI transfer structure.
-
status_t SPIFI_TransferReceiveDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, spifi_transfer_t *xfer)
Receives data using an DMA non-blocking method.
This function receive data from the SPIFI receive buffer/FIFO. This function is non-blocking.
- Parameters:
base – Pointer to QuadSPI Type.
handle – Pointer to spifi_dma_handle_t structure
xfer – SPIFI transfer structure.
-
void SPIFI_TransferAbortSendDMA(SPIFI_Type *base, spifi_dma_handle_t *handle)
Aborts the sent data using DMA.
This function aborts the sent data using DMA.
- Parameters:
base – SPIFI peripheral base address.
handle – Pointer to spifi_dma_handle_t structure
-
void SPIFI_TransferAbortReceiveDMA(SPIFI_Type *base, spifi_dma_handle_t *handle)
Aborts the receive data using DMA.
This function abort receive data which using DMA.
- Parameters:
base – SPIFI peripheral base address.
handle – Pointer to spifi_dma_handle_t structure
-
status_t SPIFI_TransferGetSendCountDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, size_t *count)
Gets the transferred counts of send.
- Parameters:
base – Pointer to QuadSPI Type.
handle – Pointer to spifi_dma_handle_t structure.
count – Bytes sent.
- Return values:
kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.
-
status_t SPIFI_TransferGetReceiveCountDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, size_t *count)
Gets the status of the receive transfer.
- Parameters:
base – Pointer to QuadSPI Type.
handle – Pointer to spifi_dma_handle_t structure
count – Bytes received.
- Return values:
kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.
-
uint32_t SPIFI_GetInstance(SPIFI_Type *base)
Get the SPIFI instance from peripheral base address.
- Parameters:
base – SPIFI peripheral base address.
- Returns:
SPIFI instance.
-
void SPIFI_Init(SPIFI_Type *base, const spifi_config_t *config)
Initializes the SPIFI with the user configuration structure.
This function configures the SPIFI module with the user-defined configuration.
- Parameters:
base – SPIFI peripheral base address.
config – The pointer to the configuration structure.
-
void SPIFI_GetDefaultConfig(spifi_config_t *config)
Get SPIFI default configure settings.
- Parameters:
config – SPIFI config structure pointer.
-
void SPIFI_Deinit(SPIFI_Type *base)
Deinitializes the SPIFI regions.
- Parameters:
base – SPIFI peripheral base address.
-
void SPIFI_SetCommand(SPIFI_Type *base, spifi_command_t *cmd)
Set SPIFI flash command.
- Parameters:
base – SPIFI peripheral base address.
cmd – SPIFI command structure pointer.
-
static inline void SPIFI_SetCommandAddress(SPIFI_Type *base, uint32_t addr)
Set SPIFI command address.
- Parameters:
base – SPIFI peripheral base address.
addr – Address value for the command.
-
static inline void SPIFI_SetIntermediateData(SPIFI_Type *base, uint32_t val)
Set SPIFI intermediate data.
Before writing a command wihch needs specific intermediate value, users shall call this function to write it. The main use of this function for current serial flash is to select no-opcode mode and cancelling this mode. As dummy cycle do not care about the value, no need to call this function.
- Parameters:
base – SPIFI peripheral base address.
val – Intermediate data.
-
static inline void SPIFI_SetCacheLimit(SPIFI_Type *base, uint32_t val)
Set SPIFI Cache limit value.
SPIFI includes caching of prevously-accessed data to improve performance. Software can write an address to this function, to prevent such caching at and above the address.
- Parameters:
base – SPIFI peripheral base address.
val – Zero-based upper limit of cacheable memory.
-
static inline void SPIFI_ResetCommand(SPIFI_Type *base)
Reset the command field of SPIFI.
This function is used to abort the current command or memory mode.
- Parameters:
base – SPIFI peripheral base address.
-
void SPIFI_SetMemoryCommand(SPIFI_Type *base, spifi_command_t *cmd)
Set SPIFI flash AHB read command.
Call this function means SPIFI enters to memory mode, while users need to use command, a SPIFI_ResetCommand shall be called.
- Parameters:
base – SPIFI peripheral base address.
cmd – SPIFI command structure pointer.
-
static inline void SPIFI_EnableInterrupt(SPIFI_Type *base, uint32_t mask)
Enable SPIFI interrupt.
The interrupt is triggered only in command mode, and it means the command now is finished.
- Parameters:
base – SPIFI peripheral base address.
mask – SPIFI interrupt enable mask. It is a logic OR of members the enumeration :: spifi_interrupt_enable_t
-
static inline void SPIFI_DisableInterrupt(SPIFI_Type *base, uint32_t mask)
Disable SPIFI interrupt.
The interrupt is triggered only in command mode, and it means the command now is finished.
- Parameters:
base – SPIFI peripheral base address.
mask – SPIFI interrupt enable mask. It is a logic OR of members the enumeration :: spifi_interrupt_enable_t
-
static inline uint32_t SPIFI_GetStatusFlag(SPIFI_Type *base)
Get the status of all interrupt flags for SPIFI.
- Parameters:
base – SPIFI peripheral base address.
- Returns:
SPIFI flag status
-
FSL_SPIFI_DMA_DRIVER_VERSION
SPIFI DMA driver version 2.0.3.
-
FSL_SPIFI_DRIVER_VERSION
SPIFI driver version 2.0.3.
Status structure of SPIFI.
Values:
-
enumerator kStatus_SPIFI_Idle
SPIFI is in idle state
-
enumerator kStatus_SPIFI_Busy
SPIFI is busy
-
enumerator kStatus_SPIFI_Error
Error occurred during SPIFI transfer
-
enumerator kStatus_SPIFI_Idle
-
enum _spifi_interrupt_enable
SPIFI interrupt source.
Values:
-
enumerator kSPIFI_CommandFinishInterruptEnable
Interrupt while command finished
-
enumerator kSPIFI_CommandFinishInterruptEnable
-
enum _spifi_spi_mode
SPIFI SPI mode select.
Values:
-
enumerator kSPIFI_SPISckLow
SCK low after last bit of command, keeps low while CS high
-
enumerator kSPIFI_SPISckHigh
SCK high after last bit of command and while CS high
-
enumerator kSPIFI_SPISckLow
-
enum _spifi_dual_mode
SPIFI dual mode select.
Values:
-
enumerator kSPIFI_QuadMode
SPIFI uses IO3:0
-
enumerator kSPIFI_DualMode
SPIFI uses IO1:0
-
enumerator kSPIFI_QuadMode
-
enum _spifi_data_direction
SPIFI data direction.
Values:
-
enumerator kSPIFI_DataInput
Data input from serial flash.
-
enumerator kSPIFI_DataOutput
Data output to serial flash.
-
enumerator kSPIFI_DataInput
-
enum _spifi_command_format
SPIFI command opcode format.
Values:
-
enumerator kSPIFI_CommandAllSerial
All fields of command are serial.
-
enumerator kSPIFI_CommandDataQuad
Only data field is dual/quad, others are serial.
-
enumerator kSPIFI_CommandOpcodeSerial
Only opcode field is serial, others are quad/dual.
-
enumerator kSPIFI_CommandAllQuad
All fields of command are dual/quad mode.
-
enumerator kSPIFI_CommandAllSerial
-
enum _spifi_command_type
SPIFI command type.
Values:
-
enumerator kSPIFI_CommandOpcodeOnly
Command only have opcode, no address field
-
enumerator kSPIFI_CommandOpcodeAddrOneByte
Command have opcode and also one byte address field
-
enumerator kSPIFI_CommandOpcodeAddrTwoBytes
Command have opcode and also two bytes address field
-
enumerator kSPIFI_CommandOpcodeAddrThreeBytes
Command have opcode and also three bytes address field.
-
enumerator kSPIFI_CommandOpcodeAddrFourBytes
Command have opcode and also four bytes address field
-
enumerator kSPIFI_CommandNoOpcodeAddrThreeBytes
Command have no opcode and three bytes address field
-
enumerator kSPIFI_CommandNoOpcodeAddrFourBytes
Command have no opcode and four bytes address field
-
enumerator kSPIFI_CommandOpcodeOnly
SPIFI status flags.
Values:
-
enumerator kSPIFI_MemoryCommandWriteFinished
Memory command write finished
-
enumerator kSPIFI_CommandWriteFinished
Command write finished
-
enumerator kSPIFI_InterruptRequest
CMD flag from 1 to 0, means command execute finished
-
enumerator kSPIFI_MemoryCommandWriteFinished
-
typedef struct _spifi_dma_handle spifi_dma_handle_t
-
typedef void (*spifi_dma_callback_t)(SPIFI_Type *base, spifi_dma_handle_t *handle, status_t status, void *userData)
SPIFI DMA transfer callback function for finish and error.
-
typedef enum _spifi_interrupt_enable spifi_interrupt_enable_t
SPIFI interrupt source.
-
typedef enum _spifi_spi_mode spifi_spi_mode_t
SPIFI SPI mode select.
-
typedef enum _spifi_dual_mode spifi_dual_mode_t
SPIFI dual mode select.
-
typedef enum _spifi_data_direction spifi_data_direction_t
SPIFI data direction.
-
typedef enum _spifi_command_format spifi_command_format_t
SPIFI command opcode format.
-
typedef enum _spifi_command_type spifi_command_type_t
SPIFI command type.
-
typedef struct _spifi_command spifi_command_t
SPIFI command structure.
-
typedef struct _spifi_config spifi_config_t
SPIFI region configuration structure.
-
typedef struct _spifi_transfer spifi_transfer_t
Transfer structure for SPIFI.
-
static inline void SPIFI_EnableDMA(SPIFI_Type *base, bool enable)
Enable or disable DMA request for SPIFI.
- Parameters:
base – SPIFI peripheral base address.
enable – True means enable DMA and false means disable DMA.
-
static inline uint32_t SPIFI_GetDataRegisterAddress(SPIFI_Type *base)
Gets the SPIFI data register address.
This API is used to provide a transfer address for the SPIFI DMA transfer configuration.
- Parameters:
base – SPIFI base pointer
- Returns:
data register address
-
static inline void SPIFI_WriteData(SPIFI_Type *base, uint32_t data)
Write a word data in address of SPIFI.
Users can write a page or at least a word data into SPIFI address.
- Parameters:
base – SPIFI peripheral base address.
data – Data need be write.
-
static inline void SPIFI_WriteDataByte(SPIFI_Type *base, uint8_t data)
Write a byte data in address of SPIFI.
Users can write a byte data into SPIFI address.
- Parameters:
base – SPIFI peripheral base address.
data – Data need be write.
-
void SPIFI_WriteDataHalfword(SPIFI_Type *base, uint16_t data)
Write a halfword data in address of SPIFI.
Users can write a halfword data into SPIFI address.
- Parameters:
base – SPIFI peripheral base address.
data – Data need be write.
-
static inline uint32_t SPIFI_ReadData(SPIFI_Type *base)
Read data from serial flash.
Users should notice before call this function, the data length field in command register shall larger than 4, otherwise a hardfault will happen.
- Parameters:
base – SPIFI peripheral base address.
- Returns:
Data input from flash.
-
static inline uint8_t SPIFI_ReadDataByte(SPIFI_Type *base)
Read a byte data from serial flash.
- Parameters:
base – SPIFI peripheral base address.
- Returns:
Data input from flash.
-
uint16_t SPIFI_ReadDataHalfword(SPIFI_Type *base)
Read a halfword data from serial flash.
- Parameters:
base – SPIFI peripheral base address.
- Returns:
Data input from flash.
-
struct _spifi_dma_handle
- #include <fsl_spifi_dma.h>
SPIFI DMA transfer handle, users should not touch the content of the handle.
Public Members
-
dma_handle_t *dmaHandle
DMA handler for SPIFI send
-
size_t transferSize
Bytes need to transfer.
-
uint32_t state
Internal state for SPIFI DMA transfer
-
spifi_dma_callback_t callback
Callback for users while transfer finish or error occurred
-
void *userData
User callback parameter
-
dma_handle_t *dmaHandle
-
struct _spifi_command
- #include <fsl_spifi.h>
SPIFI command structure.
Public Members
-
uint16_t dataLen
How many data bytes are needed in this command.
-
bool isPollMode
For command need to read data from serial flash
-
spifi_data_direction_t direction
Data direction of this command.
-
uint8_t intermediateBytes
How many intermediate bytes needed
-
spifi_command_format_t format
Command format
-
spifi_command_type_t type
Command type
-
uint8_t opcode
Command opcode value
-
uint16_t dataLen
-
struct _spifi_config
- #include <fsl_spifi.h>
SPIFI region configuration structure.
Public Members
-
uint16_t timeout
SPI transfer timeout, the unit is SCK cycles
-
uint8_t csHighTime
CS high time cycles
-
bool disablePrefetch
True means SPIFI will not attempt a speculative prefetch.
-
bool disableCachePrefech
Disable prefetch of cache line
-
bool isFeedbackClock
Is data sample uses feedback clock.
-
spifi_spi_mode_t spiMode
SPIFI spi mode select
-
bool isReadFullClockCycle
If enable read full clock cycle.
-
spifi_dual_mode_t dualMode
SPIFI dual mode, dual or quad.
-
uint16_t timeout
-
struct _spifi_transfer
- #include <fsl_spifi.h>
Transfer structure for SPIFI.
Public Members
-
uint8_t *data
Pointer to data to transmit
-
size_t dataSize
Bytes to be transmit
-
uint8_t *data
SPIFI DMA Driver
SPIFI Driver
USART: Universal Synchronous/Asynchronous Receiver/Transmitter Driver
USART DMA Driver
-
status_t USART_TransferCreateHandleDMA(USART_Type *base, usart_dma_handle_t *handle, usart_dma_transfer_callback_t callback, void *userData, dma_handle_t *txDmaHandle, dma_handle_t *rxDmaHandle)
Initializes the USART handle which is used in transactional functions.
- Parameters:
base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
callback – Callback function.
userData – User data.
txDmaHandle – User-requested DMA handle for TX DMA transfer.
rxDmaHandle – User-requested DMA handle for RX DMA transfer.
-
status_t USART_TransferSendDMA(USART_Type *base, usart_dma_handle_t *handle, usart_transfer_t *xfer)
Sends data using DMA.
This function sends data using DMA. This is a non-blocking function, which returns right away. When all data is sent, the send callback function is called.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART DMA transfer structure. See usart_transfer_t.
- Return values:
kStatus_Success – if succeed, others failed.
kStatus_USART_TxBusy – Previous transfer on going.
kStatus_InvalidArgument – Invalid argument.
-
status_t USART_TransferReceiveDMA(USART_Type *base, usart_dma_handle_t *handle, usart_transfer_t *xfer)
Receives data using DMA.
This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.
- Parameters:
base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – USART DMA transfer structure. See usart_transfer_t.
- Return values:
kStatus_Success – if succeed, others failed.
kStatus_USART_RxBusy – Previous transfer on going.
kStatus_InvalidArgument – Invalid argument.
-
void USART_TransferAbortSendDMA(USART_Type *base, usart_dma_handle_t *handle)
Aborts the sent data using DMA.
This function aborts send data using DMA.
- Parameters:
base – USART peripheral base address
handle – Pointer to usart_dma_handle_t structure
-
void USART_TransferAbortReceiveDMA(USART_Type *base, usart_dma_handle_t *handle)
Aborts the received data using DMA.
This function aborts the received data using DMA.
- Parameters:
base – USART peripheral base address
handle – Pointer to usart_dma_handle_t structure
-
status_t USART_TransferGetReceiveCountDMA(USART_Type *base, usart_dma_handle_t *handle, uint32_t *count)
Get the number of bytes that have been received.
This function gets the number of bytes that have been received.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
count – Receive bytes count.
- Return values:
kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter
count
;
-
status_t USART_TransferGetSendCountDMA(USART_Type *base, usart_dma_handle_t *handle, uint32_t *count)
Get the number of bytes that have been sent.
This function gets the number of bytes that have been sent.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
count – Sent bytes count.
- Return values:
kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter
count
;
-
FSL_USART_DMA_DRIVER_VERSION
USART dma driver version.
-
typedef struct _usart_dma_handle usart_dma_handle_t
-
typedef void (*usart_dma_transfer_callback_t)(USART_Type *base, usart_dma_handle_t *handle, status_t status, void *userData)
UART transfer callback function.
-
struct _usart_dma_handle
- #include <fsl_usart_dma.h>
UART DMA handle.
Public Members
-
USART_Type *base
UART peripheral base address.
-
usart_dma_transfer_callback_t callback
Callback function.
-
void *userData
UART callback function parameter.
-
size_t rxDataSizeAll
Size of the data to receive.
-
size_t txDataSizeAll
Size of the data to send out.
-
dma_handle_t *txDmaHandle
The DMA TX channel used.
-
dma_handle_t *rxDmaHandle
The DMA RX channel used.
-
volatile uint8_t txState
TX transfer state.
-
volatile uint8_t rxState
RX transfer state
-
USART_Type *base
USART Driver
-
status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)
Initializes a USART instance with user configuration structure and peripheral clock.
This function configures the USART module with the user-defined settings. The user can configure the configuration structure and also get the default configuration by using the USART_GetDefaultConfig() function. Example below shows how to use this API to configure USART.
usart_config_t usartConfig; usartConfig.baudRate_Bps = 115200U; usartConfig.parityMode = kUSART_ParityDisabled; usartConfig.stopBitCount = kUSART_OneStopBit; USART_Init(USART1, &usartConfig, 20000000U);
- Parameters:
base – USART peripheral base address.
config – Pointer to user-defined configuration structure.
srcClock_Hz – USART clock source frequency in HZ.
- Return values:
kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_InvalidArgument – USART base address is not valid
kStatus_Success – Status USART initialize succeed
-
void USART_Deinit(USART_Type *base)
Deinitializes a USART instance.
This function waits for TX complete, disables TX and RX, and disables the USART clock.
- Parameters:
base – USART peripheral base address.
-
void USART_GetDefaultConfig(usart_config_t *config)
Gets the default configuration structure.
This function initializes the USART configuration structure to a default value. The default values are: usartConfig->baudRate_Bps = 115200U; usartConfig->parityMode = kUSART_ParityDisabled; usartConfig->stopBitCount = kUSART_OneStopBit; usartConfig->bitCountPerChar = kUSART_8BitsPerChar; usartConfig->loopback = false; usartConfig->enableTx = false; usartConfig->enableRx = false;
- Parameters:
config – Pointer to configuration structure.
-
status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz)
Sets the USART instance baud rate.
This function configures the USART module baud rate. This function is used to update the USART module baud rate after the USART module is initialized by the USART_Init.
USART_SetBaudRate(USART1, 115200U, 20000000U);
- Parameters:
base – USART peripheral base address.
baudrate_Bps – USART baudrate to be set.
srcClock_Hz – USART clock source frequency in HZ.
- Return values:
kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_Success – Set baudrate succeed.
kStatus_InvalidArgument – One or more arguments are invalid.
-
status_t USART_Enable32kMode(USART_Type *base, uint32_t baudRate_Bps, bool enableMode32k, uint32_t srcClock_Hz)
Enable 32 kHz mode which USART uses clock from the RTC oscillator as the clock source.
Please note that in order to use a 32 kHz clock to operate USART properly, the RTC oscillator and its 32 kHz output must be manully enabled by user, by calling RTC_Init and setting SYSCON_RTCOSCCTRL_EN bit to 1. And in 32kHz clocking mode the USART can only work at 9600 baudrate or at the baudrate that 9600 can evenly divide, eg: 4800, 3200.
- Parameters:
base – USART peripheral base address.
baudRate_Bps – USART baudrate to be set..
enableMode32k – true is 32k mode, false is normal mode.
srcClock_Hz – USART clock source frequency in HZ.
- Return values:
kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_Success – Set baudrate succeed.
kStatus_InvalidArgument – One or more arguments are invalid.
-
void USART_Enable9bitMode(USART_Type *base, bool enable)
Enable 9-bit data mode for USART.
This function set the 9-bit mode for USART module. The 9th bit is not used for parity thus can be modified by user.
- Parameters:
base – USART peripheral base address.
enable – true to enable, false to disable.
-
static inline void USART_SetMatchAddress(USART_Type *base, uint8_t address)
Set the USART slave address.
This function configures the address for USART module that works as slave in 9-bit data mode. When the address detection is enabled, the frame it receices with MSB being 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches slave’s own addresses, this slave is addressed. This address frame and its following data frames are stored in the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with unmatched address.
Note
Any USART instance joined in the multi-slave system can work as slave. The position of the address mark is the same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.
- Parameters:
base – USART peripheral base address.
address – USART slave address.
-
static inline void USART_EnableMatchAddress(USART_Type *base, bool match)
Enable the USART match address feature.
- Parameters:
base – USART peripheral base address.
match – true to enable match address, false to disable.
-
static inline uint32_t USART_GetStatusFlags(USART_Type *base)
Get USART status flags.
This function get all USART status flags, the flags are returned as the logical OR value of the enumerators _usart_flags. To check a specific status, compare the return value with enumerators in _usart_flags. For example, to check whether the TX is empty:
if (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(USART1)) { ... }
- Parameters:
base – USART peripheral base address.
- Returns:
USART status flags which are ORed by the enumerators in the _usart_flags.
-
static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)
Clear USART status flags.
This function clear supported USART status flags. The mask is a logical OR of enumeration members. See kUSART_AllClearFlags. For example:
USART_ClearStatusFlags(USART1, kUSART_TxError | kUSART_RxError)
- Parameters:
base – USART peripheral base address.
mask – status flags to be cleared.
-
static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)
Enables USART interrupts according to the provided mask.
This function enables the USART interrupts according to the provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. For example, to enable TX empty interrupt and RX full interrupt:
USART_EnableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);
- Parameters:
base – USART peripheral base address.
mask – The interrupts to enable. Logical OR of _usart_interrupt_enable.
-
static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)
Disables USART interrupts according to a provided mask.
This function disables the USART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. This example shows how to disable the TX empty interrupt and RX full interrupt:
USART_DisableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);
- Parameters:
base – USART peripheral base address.
mask – The interrupts to disable. Logical OR of _usart_interrupt_enable.
-
static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base)
Returns enabled USART interrupts.
This function returns the enabled USART interrupts.
- Parameters:
base – USART peripheral base address.
-
static inline void USART_EnableTxDMA(USART_Type *base, bool enable)
Enable DMA for Tx.
-
static inline void USART_EnableRxDMA(USART_Type *base, bool enable)
Enable DMA for Rx.
-
static inline void USART_EnableCTS(USART_Type *base, bool enable)
Enable CTS. This function will determine whether CTS is used for flow control.
- Parameters:
base – USART peripheral base address.
enable – Enable CTS or not, true for enable and false for disable.
-
static inline void USART_EnableContinuousSCLK(USART_Type *base, bool enable)
Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode. Enable this funciton, SCLK will run continuously in synchronous mode, allowing characters to be received on Un_RxD independently from transmission on Un_TXD).
- Parameters:
base – USART peripheral base address.
enable – Enable Continuous Clock generation mode or not, true for enable and false for disable.
-
static inline void USART_EnableAutoClearSCLK(USART_Type *base, bool enable)
Enable Continuous Clock generation bit auto clear. While enable this cuntion, the Continuous Clock bit is automatically cleared when a complete character has been received. This bit is cleared at the same time.
- Parameters:
base – USART peripheral base address.
enable – Enable auto clear or not, true for enable and false for disable.
-
static inline void USART_SetRxFifoWatermark(USART_Type *base, uint8_t water)
Sets the rx FIFO watermark.
- Parameters:
base – USART peripheral base address.
water – Rx FIFO watermark.
-
static inline void USART_SetTxFifoWatermark(USART_Type *base, uint8_t water)
Sets the tx FIFO watermark.
- Parameters:
base – USART peripheral base address.
water – Tx FIFO watermark.
-
static inline void USART_WriteByte(USART_Type *base, uint8_t data)
Writes to the FIFOWR register.
This function writes data to the txFIFO directly. The upper layer must ensure that txFIFO has space for data to write before calling this function.
- Parameters:
base – USART peripheral base address.
data – The byte to write.
-
static inline uint8_t USART_ReadByte(USART_Type *base)
Reads the FIFORD register directly.
This function reads data from the rxFIFO directly. The upper layer must ensure that the rxFIFO is not empty before calling this function.
- Parameters:
base – USART peripheral base address.
- Returns:
The byte read from USART data register.
-
static inline uint8_t USART_GetRxFifoCount(USART_Type *base)
Gets the rx FIFO data count.
- Parameters:
base – USART peripheral base address.
- Returns:
rx FIFO data count.
-
static inline uint8_t USART_GetTxFifoCount(USART_Type *base)
Gets the tx FIFO data count.
- Parameters:
base – USART peripheral base address.
- Returns:
tx FIFO data count.
-
void USART_SendAddress(USART_Type *base, uint8_t address)
Transmit an address frame in 9-bit data mode.
- Parameters:
base – USART peripheral base address.
address – USART slave address.
-
status_t USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length)
Writes to the TX register using a blocking method.
This function polls the TX register, waits for the TX register to be empty or for the TX FIFO to have room and writes data to the TX buffer.
- Parameters:
base – USART peripheral base address.
data – Start address of the data to write.
length – Size of the data to write.
- Return values:
kStatus_USART_Timeout – Transmission timed out and was aborted.
kStatus_InvalidArgument – Invalid argument.
kStatus_Success – Successfully wrote all data.
-
status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length)
Read RX data register using a blocking method.
This function polls the RX register, waits for the RX register to be full or for RX FIFO to have data and read data from the TX register.
- Parameters:
base – USART peripheral base address.
data – Start address of the buffer to store the received data.
length – Size of the buffer.
- Return values:
kStatus_USART_FramingError – Receiver overrun happened while receiving data.
kStatus_USART_ParityError – Noise error happened while receiving data.
kStatus_USART_NoiseError – Framing error happened while receiving data.
kStatus_USART_RxError – Overflow or underflow rxFIFO happened.
kStatus_USART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.
-
status_t USART_TransferCreateHandle(USART_Type *base, usart_handle_t *handle, usart_transfer_callback_t callback, void *userData)
Initializes the USART handle.
This function initializes the USART handle which can be used for other USART transactional APIs. Usually, for a specified USART instance, call this API once to get the initialized handle.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
callback – The callback function.
userData – The parameter of the callback function.
-
status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer)
Transmits a buffer of data using the interrupt method.
This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in the IRQ handler, the USART driver calls the callback function and passes the kStatus_USART_TxIdle as status parameter.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART transfer structure. See usart_transfer_t.
- Return values:
kStatus_Success – Successfully start the data transmission.
kStatus_USART_TxBusy – Previous transmission still not finished, data not all written to TX register yet.
kStatus_InvalidArgument – Invalid argument.
-
void USART_TransferStartRingBuffer(USART_Type *base, usart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)
Sets up the RX ring buffer.
This function sets up the RX ring buffer to a specific USART handle.
When the RX ring buffer is used, data received are stored into the ring buffer even when the user doesn’t call the USART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly.
Note
When using the RX ring buffer, one byte is reserved for internal use. In other words, if
ringBufferSize
is 32, then only 31 bytes are used for saving data.- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
ringBuffer – Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – size of the ring buffer.
-
void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle)
Aborts the background transfer and uninstalls the ring buffer.
This function aborts the background transfer and uninstalls the ring buffer.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
-
size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle)
Get the length of received data in RX ring buffer.
- Parameters:
handle – USART handle pointer.
- Returns:
Length of received data in RX ring buffer.
-
void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle)
Aborts the interrupt-driven data transmit.
This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out how many bytes are still not sent out.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
-
status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)
Get the number of bytes that have been sent out to bus.
This function gets the number of bytes that have been sent out to bus by interrupt method.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
count – Send bytes count.
- Return values:
kStatus_NoTransferInProgress – No send in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter
count
;
-
status_t USART_TransferReceiveNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer, size_t *receivedBytes)
Receives a buffer of data using an interrupt method.
This function receives data using an interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in the ring buffer is copied and the parameter
receivedBytes
shows how many bytes are copied from the ring buffer. After copying, if the data in the ring buffer is not enough to read, the receive request is saved by the USART driver. When the new data arrives, the receive request is serviced first. When all data is received, the USART driver notifies the upper layer through a callback function and passes the status parameter kStatus_USART_RxIdle. For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer. The 5 bytes are copied to the xfer->data and this function returns with the parameterreceivedBytes
set to 5. For the left 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to the xfer->data. When all data is received, the upper layer is notified.- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART transfer structure, see usart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.
- Return values:
kStatus_Success – Successfully queue the transfer into transmit queue.
kStatus_USART_RxBusy – Previous receive request is not finished.
kStatus_InvalidArgument – Invalid argument.
-
void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle)
Aborts the interrupt-driven data receiving.
This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out how many bytes not received yet.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
-
status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)
Get the number of bytes that have been received.
This function gets the number of bytes that have been received.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
count – Receive bytes count.
- Return values:
kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter
count
;
-
void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)
USART IRQ handle function.
This function handles the USART transmit and receive IRQ request.
- Parameters:
base – USART peripheral base address.
handle – USART handle pointer.
-
FSL_USART_DRIVER_VERSION
USART driver version.
Error codes for the USART driver.
Values:
-
enumerator kStatus_USART_TxBusy
Transmitter is busy.
-
enumerator kStatus_USART_RxBusy
Receiver is busy.
-
enumerator kStatus_USART_TxIdle
USART transmitter is idle.
-
enumerator kStatus_USART_RxIdle
USART receiver is idle.
-
enumerator kStatus_USART_TxError
Error happens on txFIFO.
-
enumerator kStatus_USART_RxError
Error happens on rxFIFO.
-
enumerator kStatus_USART_RxRingBufferOverrun
Error happens on rx ring buffer
-
enumerator kStatus_USART_NoiseError
USART noise error.
-
enumerator kStatus_USART_FramingError
USART framing error.
-
enumerator kStatus_USART_ParityError
USART parity error.
-
enumerator kStatus_USART_BaudrateNotSupport
Baudrate is not support in current clock source
-
enumerator kStatus_USART_TxBusy
-
enum _usart_sync_mode
USART synchronous mode.
Values:
-
enumerator kUSART_SyncModeDisabled
Asynchronous mode.
-
enumerator kUSART_SyncModeSlave
Synchronous slave mode.
-
enumerator kUSART_SyncModeMaster
Synchronous master mode.
-
enumerator kUSART_SyncModeDisabled
-
enum _usart_parity_mode
USART parity mode.
Values:
-
enumerator kUSART_ParityDisabled
Parity disabled
-
enumerator kUSART_ParityEven
Parity enabled, type even, bit setting: PE|PT = 10
-
enumerator kUSART_ParityOdd
Parity enabled, type odd, bit setting: PE|PT = 11
-
enumerator kUSART_ParityDisabled
-
enum _usart_stop_bit_count
USART stop bit count.
Values:
-
enumerator kUSART_OneStopBit
One stop bit
-
enumerator kUSART_TwoStopBit
Two stop bits
-
enumerator kUSART_OneStopBit
-
enum _usart_data_len
USART data size.
Values:
-
enumerator kUSART_7BitsPerChar
Seven bit mode
-
enumerator kUSART_8BitsPerChar
Eight bit mode
-
enumerator kUSART_7BitsPerChar
-
enum _usart_clock_polarity
USART clock polarity configuration, used in sync mode.
Values:
-
enumerator kUSART_RxSampleOnFallingEdge
Un_RXD is sampled on the falling edge of SCLK.
-
enumerator kUSART_RxSampleOnRisingEdge
Un_RXD is sampled on the rising edge of SCLK.
-
enumerator kUSART_RxSampleOnFallingEdge
-
enum _usart_txfifo_watermark
txFIFO watermark values
Values:
-
enumerator kUSART_TxFifo0
USART tx watermark is empty
-
enumerator kUSART_TxFifo1
USART tx watermark at 1 item
-
enumerator kUSART_TxFifo2
USART tx watermark at 2 items
-
enumerator kUSART_TxFifo3
USART tx watermark at 3 items
-
enumerator kUSART_TxFifo4
USART tx watermark at 4 items
-
enumerator kUSART_TxFifo5
USART tx watermark at 5 items
-
enumerator kUSART_TxFifo6
USART tx watermark at 6 items
-
enumerator kUSART_TxFifo7
USART tx watermark at 7 items
-
enumerator kUSART_TxFifo0
-
enum _usart_rxfifo_watermark
rxFIFO watermark values
Values:
-
enumerator kUSART_RxFifo1
USART rx watermark at 1 item
-
enumerator kUSART_RxFifo2
USART rx watermark at 2 items
-
enumerator kUSART_RxFifo3
USART rx watermark at 3 items
-
enumerator kUSART_RxFifo4
USART rx watermark at 4 items
-
enumerator kUSART_RxFifo5
USART rx watermark at 5 items
-
enumerator kUSART_RxFifo6
USART rx watermark at 6 items
-
enumerator kUSART_RxFifo7
USART rx watermark at 7 items
-
enumerator kUSART_RxFifo8
USART rx watermark at 8 items
-
enumerator kUSART_RxFifo1
-
enum _usart_interrupt_enable
USART interrupt configuration structure, default settings all disabled.
Values:
-
enumerator kUSART_TxErrorInterruptEnable
-
enumerator kUSART_RxErrorInterruptEnable
-
enumerator kUSART_TxLevelInterruptEnable
-
enumerator kUSART_RxLevelInterruptEnable
-
enumerator kUSART_TxIdleInterruptEnable
Transmitter idle.
-
enumerator kUSART_CtsChangeInterruptEnable
Change in the state of the CTS input.
-
enumerator kUSART_RxBreakChangeInterruptEnable
Break condition asserted or deasserted.
-
enumerator kUSART_RxStartInterruptEnable
Rx start bit detected.
-
enumerator kUSART_FramingErrorInterruptEnable
Framing error detected.
-
enumerator kUSART_ParityErrorInterruptEnable
Parity error detected.
-
enumerator kUSART_NoiseErrorInterruptEnable
Noise error detected.
-
enumerator kUSART_AutoBaudErrorInterruptEnable
Auto baudrate error detected.
-
enumerator kUSART_AllInterruptEnables
-
enumerator kUSART_TxErrorInterruptEnable
-
enum _usart_flags
USART status flags.
This provides constants for the USART status flags for use in the USART functions.
Values:
-
enumerator kUSART_TxError
TXERR bit, sets if TX buffer is error
-
enumerator kUSART_RxError
RXERR bit, sets if RX buffer is error
-
enumerator kUSART_TxFifoEmptyFlag
TXEMPTY bit, sets if TX buffer is empty
-
enumerator kUSART_TxFifoNotFullFlag
TXNOTFULL bit, sets if TX buffer is not full
-
enumerator kUSART_RxFifoNotEmptyFlag
RXNOEMPTY bit, sets if RX buffer is not empty
-
enumerator kUSART_RxFifoFullFlag
RXFULL bit, sets if RX buffer is full
-
enumerator kUSART_RxIdleFlag
Receiver idle.
-
enumerator kUSART_TxIdleFlag
Transmitter idle.
-
enumerator kUSART_CtsAssertFlag
CTS signal high.
-
enumerator kUSART_CtsChangeFlag
CTS signal changed interrupt status.
-
enumerator kUSART_BreakDetectFlag
Break detected. Self cleared when rx pin goes high again.
-
enumerator kUSART_BreakDetectChangeFlag
Break detect change interrupt flag. A change in the state of receiver break detection.
-
enumerator kUSART_RxStartFlag
Rx start bit detected interrupt flag.
-
enumerator kUSART_FramingErrorFlag
Framing error interrupt flag.
-
enumerator kUSART_ParityErrorFlag
parity error interrupt flag.
-
enumerator kUSART_NoiseErrorFlag
Noise error interrupt flag.
-
enumerator kUSART_AutobaudErrorFlag
Auto baudrate error interrupt flag, caused by the baudrate counter timeout before the end of start bit.
-
enumerator kUSART_AllClearFlags
-
enumerator kUSART_TxError
-
typedef enum _usart_sync_mode usart_sync_mode_t
USART synchronous mode.
-
typedef enum _usart_parity_mode usart_parity_mode_t
USART parity mode.
-
typedef enum _usart_stop_bit_count usart_stop_bit_count_t
USART stop bit count.
-
typedef enum _usart_data_len usart_data_len_t
USART data size.
-
typedef enum _usart_clock_polarity usart_clock_polarity_t
USART clock polarity configuration, used in sync mode.
-
typedef enum _usart_txfifo_watermark usart_txfifo_watermark_t
txFIFO watermark values
-
typedef enum _usart_rxfifo_watermark usart_rxfifo_watermark_t
rxFIFO watermark values
-
typedef struct _usart_config usart_config_t
USART configuration structure.
-
typedef struct _usart_transfer usart_transfer_t
USART transfer structure.
-
typedef struct _usart_handle usart_handle_t
-
typedef void (*usart_transfer_callback_t)(USART_Type *base, usart_handle_t *handle, status_t status, void *userData)
USART transfer callback function.
-
typedef void (*flexcomm_usart_irq_handler_t)(USART_Type *base, usart_handle_t *handle)
Typedef for usart interrupt handler.
-
uint32_t USART_GetInstance(USART_Type *base)
Returns instance number for USART peripheral base address.
-
USART_FIFOTRIG_TXLVL_GET(base)
-
USART_FIFOTRIG_RXLVL_GET(base)
-
UART_RETRY_TIMES
Retry times for waiting flag.
Defining to zero means to keep waiting for the flag until it is assert/deassert in blocking transfer, otherwise the program will wait until the UART_RETRY_TIMES counts down to 0, if the flag still remains unchanged then program will return kStatus_USART_Timeout. It is not advised to use this macro in formal application to prevent any hardware error because the actual wait period is affected by the compiler and optimization.
-
struct _usart_config
- #include <fsl_usart.h>
USART configuration structure.
Public Members
-
uint32_t baudRate_Bps
USART baud rate
-
usart_parity_mode_t parityMode
Parity mode, disabled (default), even, odd
-
usart_stop_bit_count_t stopBitCount
Number of stop bits, 1 stop bit (default) or 2 stop bits
-
usart_data_len_t bitCountPerChar
Data length - 7 bit, 8 bit
-
bool loopback
Enable peripheral loopback
-
bool enableRx
Enable RX
-
bool enableTx
Enable TX
-
bool enableContinuousSCLK
USART continuous Clock generation enable in synchronous master mode.
-
bool enableMode32k
USART uses 32 kHz clock from the RTC oscillator as the clock source.
-
bool enableHardwareFlowControl
Enable hardware control RTS/CTS
-
usart_txfifo_watermark_t txWatermark
txFIFO watermark
-
usart_rxfifo_watermark_t rxWatermark
rxFIFO watermark
-
usart_sync_mode_t syncMode
Transfer mode select - asynchronous, synchronous master, synchronous slave.
-
usart_clock_polarity_t clockPolarity
Selects the clock polarity and sampling edge in synchronous mode.
-
uint32_t baudRate_Bps
-
struct _usart_transfer
- #include <fsl_usart.h>
USART transfer structure.
Public Members
-
size_t dataSize
The byte count to be transfer.
-
size_t dataSize
-
struct _usart_handle
- #include <fsl_usart.h>
USART handle structure.
Public Members
-
const uint8_t *volatile txData
Address of remaining data to send.
-
volatile size_t txDataSize
Size of the remaining data to send.
-
size_t txDataSizeAll
Size of the data to send out.
-
uint8_t *volatile rxData
Address of remaining data to receive.
-
volatile size_t rxDataSize
Size of the remaining data to receive.
-
size_t rxDataSizeAll
Size of the data to receive.
-
uint8_t *rxRingBuffer
Start address of the receiver ring buffer.
-
size_t rxRingBufferSize
Size of the ring buffer.
-
volatile uint16_t rxRingBufferHead
Index for the driver to store received data into ring buffer.
-
volatile uint16_t rxRingBufferTail
Index for the user to get data from the ring buffer.
-
usart_transfer_callback_t callback
Callback function.
-
void *userData
USART callback function parameter.
-
volatile uint8_t txState
TX transfer state.
-
volatile uint8_t rxState
RX transfer state
-
uint8_t txWatermark
txFIFO watermark
-
uint8_t rxWatermark
rxFIFO watermark
-
const uint8_t *volatile txData
-
union __unnamed36__
Public Members
-
uint8_t *data
The buffer of data to be transfer.
-
uint8_t *rxData
The buffer to receive data.
-
const uint8_t *txData
The buffer of data to be sent.
-
uint8_t *data
UTICK: MictoTick Timer Driver
-
void UTICK_Init(UTICK_Type *base)
Initializes an UTICK by turning its bus clock on.
-
void UTICK_Deinit(UTICK_Type *base)
Deinitializes a UTICK instance.
This function shuts down Utick bus clock
- Parameters:
base – UTICK peripheral base address.
-
uint32_t UTICK_GetStatusFlags(UTICK_Type *base)
Get Status Flags.
This returns the status flag
- Parameters:
base – UTICK peripheral base address.
- Returns:
status register value
-
void UTICK_ClearStatusFlags(UTICK_Type *base)
Clear Status Interrupt Flags.
This clears intr status flag
- Parameters:
base – UTICK peripheral base address.
- Returns:
none
-
void UTICK_SetTick(UTICK_Type *base, utick_mode_t mode, uint32_t count, utick_callback_t cb)
Starts UTICK.
This function starts a repeat/onetime countdown with an optional callback
- Parameters:
base – UTICK peripheral base address.
mode – UTICK timer mode (ie kUTICK_onetime or kUTICK_repeat)
count – UTICK timer mode (ie kUTICK_onetime or kUTICK_repeat)
cb – UTICK callback (can be left as NULL if none, otherwise should be a void func(void))
- Returns:
none
-
void UTICK_HandleIRQ(UTICK_Type *base, utick_callback_t cb)
UTICK Interrupt Service Handler.
This function handles the interrupt and refers to the callback array in the driver to callback user (as per request in UTICK_SetTick()). if no user callback is scheduled, the interrupt will simply be cleared.
- Parameters:
base – UTICK peripheral base address.
cb – callback scheduled for this instance of UTICK
- Returns:
none
-
FSL_UTICK_DRIVER_VERSION
UTICK driver version 2.0.5.
-
enum _utick_mode
UTICK timer operational mode.
Values:
-
enumerator kUTICK_Onetime
Trigger once
-
enumerator kUTICK_Repeat
Trigger repeatedly
-
enumerator kUTICK_Onetime
-
typedef enum _utick_mode utick_mode_t
UTICK timer operational mode.
-
typedef void (*utick_callback_t)(void)
UTICK callback function.
WWDT: Windowed Watchdog Timer Driver
-
void WWDT_GetDefaultConfig(wwdt_config_t *config)
Initializes WWDT configure structure.
This function initializes the WWDT configure structure to default value. The default value are:
config->enableWwdt = true; config->enableWatchdogReset = false; config->enableWatchdogProtect = false; config->enableLockOscillator = false; config->windowValue = 0xFFFFFFU; config->timeoutValue = 0xFFFFFFU; config->warningValue = 0;
See also
wwdt_config_t
- Parameters:
config – Pointer to WWDT config structure.
-
void WWDT_Init(WWDT_Type *base, const wwdt_config_t *config)
Initializes the WWDT.
This function initializes the WWDT. When called, the WWDT runs according to the configuration.
Example:
wwdt_config_t config; WWDT_GetDefaultConfig(&config); config.timeoutValue = 0x7ffU; WWDT_Init(wwdt_base,&config);
- Parameters:
base – WWDT peripheral base address
config – The configuration of WWDT
-
void WWDT_Deinit(WWDT_Type *base)
Shuts down the WWDT.
This function shuts down the WWDT.
- Parameters:
base – WWDT peripheral base address
-
static inline void WWDT_Enable(WWDT_Type *base)
Enables the WWDT module.
This function write value into WWDT_MOD register to enable the WWDT, it is a write-once bit; once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.
- Parameters:
base – WWDT peripheral base address
-
static inline void WWDT_Disable(WWDT_Type *base)
Disables the WWDT module.
- Deprecated:
Do not use this function. It will be deleted in next release version, for once the bit field of WDEN written with a 1, it can not be re-written with a 0.
This function write value into WWDT_MOD register to disable the WWDT.
- Parameters:
base – WWDT peripheral base address
-
static inline uint32_t WWDT_GetStatusFlags(WWDT_Type *base)
Gets all WWDT status flags.
This function gets all status flags.
Example for getting Timeout Flag:
uint32_t status; status = WWDT_GetStatusFlags(wwdt_base) & kWWDT_TimeoutFlag;
- Parameters:
base – WWDT peripheral base address
- Returns:
The status flags. This is the logical OR of members of the enumeration _wwdt_status_flags_t
-
void WWDT_ClearStatusFlags(WWDT_Type *base, uint32_t mask)
Clear WWDT flag.
This function clears WWDT status flag.
Example for clearing warning flag:
WWDT_ClearStatusFlags(wwdt_base, kWWDT_WarningFlag);
- Parameters:
base – WWDT peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration _wwdt_status_flags_t
-
static inline void WWDT_SetWarningValue(WWDT_Type *base, uint32_t warningValue)
Set the WWDT warning value.
The WDWARNINT register determines the watchdog timer counter value that will generate a watchdog interrupt. When the watchdog timer counter is no longer greater than the value defined by WARNINT, an interrupt will be generated after the subsequent WDCLK.
- Parameters:
base – WWDT peripheral base address
warningValue – WWDT warning value.
-
static inline void WWDT_SetTimeoutValue(WWDT_Type *base, uint32_t timeoutCount)
Set the WWDT timeout value.
This function sets the timeout value. Every time a feed sequence occurs the value in the TC register is loaded into the Watchdog timer. Writing a value below 0xFF will cause 0xFF to be loaded into the TC register. Thus the minimum time-out interval is TWDCLK*256*4. If enableWatchdogProtect flag is true in wwdt_config_t config structure, any attempt to change the timeout value before the watchdog counter is below the warning and window values will cause a watchdog reset and set the WDTOF flag.
- Parameters:
base – WWDT peripheral base address
timeoutCount – WWDT timeout value, count of WWDT clock tick.
-
static inline void WWDT_SetWindowValue(WWDT_Type *base, uint32_t windowValue)
Sets the WWDT window value.
The WINDOW register determines the highest TV value allowed when a watchdog feed is performed. If a feed sequence occurs when timer value is greater than the value in WINDOW, a watchdog event will occur. To disable windowing, set windowValue to 0xFFFFFF (maximum possible timer value) so windowing is not in effect.
- Parameters:
base – WWDT peripheral base address
windowValue – WWDT window value.
-
void WWDT_Refresh(WWDT_Type *base)
Refreshes the WWDT timer.
This function feeds the WWDT. This function should be called before WWDT timer is in timeout. Otherwise, a reset is asserted.
- Parameters:
base – WWDT peripheral base address
-
FSL_WWDT_DRIVER_VERSION
Defines WWDT driver version.
-
WWDT_FIRST_WORD_OF_REFRESH
First word of refresh sequence
-
WWDT_SECOND_WORD_OF_REFRESH
Second word of refresh sequence
-
enum _wwdt_status_flags_t
WWDT status flags.
This structure contains the WWDT status flags for use in the WWDT functions.
Values:
-
enumerator kWWDT_TimeoutFlag
Time-out flag, set when the timer times out
-
enumerator kWWDT_WarningFlag
Warning interrupt flag, set when timer is below the value WDWARNINT
-
enumerator kWWDT_TimeoutFlag
-
typedef struct _wwdt_config wwdt_config_t
Describes WWDT configuration structure.
-
struct _wwdt_config
- #include <fsl_wwdt.h>
Describes WWDT configuration structure.
Public Members
-
bool enableWwdt
Enables or disables WWDT
-
bool enableWatchdogReset
true: Watchdog timeout will cause a chip reset false: Watchdog timeout will not cause a chip reset
-
bool enableWatchdogProtect
true: Enable watchdog protect i.e timeout value can only be changed after counter is below warning & window values false: Disable watchdog protect; timeout value can be changed at any time
-
bool enableLockOscillator
true: Disabling or powering down the watchdog oscillator is prevented Once set, this bit can only be cleared by a reset false: Do not lock oscillator
-
uint32_t windowValue
Window value, set this to 0xFFFFFF if windowing is not in effect
-
uint32_t timeoutValue
Timeout value
-
uint32_t warningValue
Watchdog time counter value that will generate a warning interrupt. Set this to 0 for no warning
-
uint32_t clockFreq_Hz
Watchdog clock source frequency.
-
bool enableWwdt