LPC55S06

ANACTRL: Analog Control Driver

void ANACTRL_Init(ANACTRL_Type *base)

Initializes the ANACTRL mode, the module’s clock will be enabled by invoking this function.

Parameters:
  • base – ANACTRL peripheral base address.

void ANACTRL_Deinit(ANACTRL_Type *base)

De-initializes ANACTRL module, the module’s clock will be disabled by invoking this function.

Parameters:
  • base – ANACTRL peripheral base address.

void ANACTRL_SetFro192M(ANACTRL_Type *base, const anactrl_fro192M_config_t *config)

Configs the on-chip high-speed Free Running Oscillator(FRO192M), such as enabling/disabling 12 MHZ clock output and enable/disable 96MHZ clock output.

Parameters:
  • base – ANACTRL peripheral base address.

  • config – Pointer to FRO192M configuration structure. Refer to anactrl_fro192M_config_t structure.

void ANACTRL_GetDefaultFro192MConfig(anactrl_fro192M_config_t *config)

Gets the default configuration of FRO192M. The default values are:

config->enable12MHzClk = true;
config->enable96MHzClk = false;

Parameters:
  • config – Pointer to FRO192M configuration structure. Refer to anactrl_fro192M_config_t structure.

void ANACTRL_SetXo32M(ANACTRL_Type *base, const anactrl_xo32M_config_t *config)

Configs the 32 MHz Crystal oscillator(High-speed crystal oscillator), such as enable/disable output to CPU system, and so on.

Parameters:
  • base – ANACTRL peripheral base address.

  • config – Pointer to XO32M configuration structure. Refer to anactrl_xo32M_config_t structure.

void ANACTRL_GetDefaultXo32MConfig(anactrl_xo32M_config_t *config)

Gets the default configuration of XO32M. The default values are:

config->enableSysCLkOutput = false;
config->enableACBufferBypass = false;

Parameters:
  • config – Pointer to XO32M configuration structure. Refer to anactrl_xo32M_config_t structure.

uint32_t ANACTRL_MeasureFrequency(ANACTRL_Type *base, uint8_t scale, uint32_t refClkFreq)

Measures the frequency of the target clock source.

This function measures target frequency according to a accurate reference frequency.The formula is: Ftarget = (CAPVAL * Freference) / ((1<<SCALE)-1)

Note

Both tartget and reference clocks are selectable by programming the target clock select FREQMEAS_TARGET register in INPUTMUX and reference clock select FREQMEAS_REF register in INPUTMUX.

Parameters:
  • base – ANACTRL peripheral base address.

  • scale – Define the power of 2 count that ref counter counts to during measurement, ranges from 2 to 31.

  • refClkFreq – frequency of the reference clock.

Returns:

frequency of the target clock.

static inline void ANACTRL_EnableInterrupts(ANACTRL_Type *base, uint32_t mask)

Enables the ANACTRL interrupts.

Parameters:
  • base – ANACTRL peripheral base address.

  • mask – The interrupt mask. Refer to “_anactrl_interrupt” enumeration.

static inline void ANACTRL_DisableInterrupts(ANACTRL_Type *base, uint32_t mask)

Disables the ANACTRL interrupts.

Parameters:
  • base – ANACTRL peripheral base address.

  • mask – The interrupt mask. Refer to “_anactrl_interrupt” enumeration.

static inline void ANACTRL_ClearInterrupts(ANACTRL_Type *base, uint32_t mask)

Clears the ANACTRL interrupts.

Parameters:
  • base – ANACTRL peripheral base address.

  • mask – The interrupt mask. Refer to “_anactrl_interrupt” enumeration.

static inline uint32_t ANACTRL_GetStatusFlags(ANACTRL_Type *base)

Gets ANACTRL status flags.

This function gets Analog control status flags. The flags are returned as the logical OR value of the enumerators _anactrl_flags. To check for a specific status, compare the return value with enumerators in the _anactrl_flags. For example, to check whether the flash is in power down mode:

if (kANACTRL_FlashPowerDownFlag & ANACTRL_ANACTRL_GetStatusFlags(ANACTRL))
{
    ...
}

Parameters:
  • base – ANACTRL peripheral base address.

Returns:

ANACTRL status flags which are given in the enumerators in the _anactrl_flags.

static inline uint32_t ANACTRL_GetOscStatusFlags(ANACTRL_Type *base)

Gets ANACTRL oscillators status flags.

This function gets Anactrl oscillators status flags. The flags are returned as the logical OR value of the enumerators _anactrl_osc_flags. To check for a specific status, compare the return value with enumerators in the _anactrl_osc_flags. For example, to check whether the FRO192M clock output is valid:

if (kANACTRL_OutputClkValidFlag & ANACTRL_ANACTRL_GetOscStatusFlags(ANACTRL))
{
    ...
}

Parameters:
  • base – ANACTRL peripheral base address.

Returns:

ANACTRL oscillators status flags which are given in the enumerators in the _anactrl_osc_flags.

static inline uint32_t ANACTRL_GetInterruptStatusFlags(ANACTRL_Type *base)

Gets ANACTRL interrupt status flags.

This function gets Anactrl interrupt status flags. The flags are returned as the logical OR value of the enumerators _anactrl_interrupt_flags. To check for a specific status, compare the return value with enumerators in the _anactrl_interrupt_flags. For example, to check whether the VBAT voltage level is above the threshold:

if (kANACTRL_BodVbatPowerFlag & ANACTRL_ANACTRL_GetInterruptStatusFlags(ANACTRL))
{
    ...
}

Parameters:
  • base – ANACTRL peripheral base address.

Returns:

ANACTRL oscillators status flags which are given in the enumerators in the _anactrl_osc_flags.

static inline void ANACTRL_EnableVref1V(ANACTRL_Type *base, bool enable)

Aux_Bias Control Interfaces.

Enables/disabless 1V reference voltage buffer.

Parameters:
  • base – ANACTRL peripheral base address.

  • enable – Used to enable or disable 1V reference voltage buffer.

enum _anactrl_interrupt_flags

ANACTRL interrupt flags.

Values:

enumerator kANACTRL_BodVbatFlag

BOD VBAT Interrupt status before Interrupt Enable.

enumerator kANACTRL_BodVbatInterruptFlag

BOD VBAT Interrupt status after Interrupt Enable.

enumerator kANACTRL_BodVbatPowerFlag

Current value of BOD VBAT power status output.

enumerator kANACTRL_BodCoreFlag

BOD CORE Interrupt status before Interrupt Enable.

enumerator kANACTRL_BodCoreInterruptFlag

BOD CORE Interrupt status after Interrupt Enable.

enumerator kANACTRL_BodCorePowerFlag

Current value of BOD CORE power status output.

enumerator kANACTRL_DcdcFlag

DCDC Interrupt status before Interrupt Enable.

enumerator kANACTRL_DcdcInterruptFlag

DCDC Interrupt status after Interrupt Enable.

enumerator kANACTRL_DcdcPowerFlag

Current value of DCDC power status output.

enum _anactrl_interrupt

ANACTRL interrupt control.

Values:

enumerator kANACTRL_BodVbatInterruptEnable

BOD VBAT interrupt control.

enumerator kANACTRL_BodCoreInterruptEnable

BOD CORE interrupt control.

enumerator kANACTRL_DcdcInterruptEnable

DCDC interrupt control.

enum _anactrl_flags

ANACTRL status flags.

Values:

enumerator kANACTRL_FlashPowerDownFlag

Flash power-down status.

enumerator kANACTRL_FlashInitErrorFlag

Flash initialization error status.

enum _anactrl_osc_flags

ANACTRL FRO192M and XO32M status flags.

Values:

enumerator kANACTRL_OutputClkValidFlag

Output clock valid signal.

enumerator kANACTRL_CCOThresholdVoltageFlag

CCO threshold voltage detector output (signal vcco_ok).

enumerator kANACTRL_XO32MOutputReadyFlag

Indicates XO out frequency statibilty.

typedef struct _anactrl_fro192M_config anactrl_fro192M_config_t

Configuration for FRO192M.

This structure holds the configuration settings for the on-chip high-speed Free Running Oscillator. To initialize this structure to reasonable defaults, call the ANACTRL_GetDefaultFro192MConfig() function and pass a pointer to your config structure instance.

typedef struct _anactrl_xo32M_config anactrl_xo32M_config_t

Configuration for XO32M.

This structure holds the configuration settings for the 32 MHz crystal oscillator. To initialize this structure to reasonable defaults, call the ANACTRL_GetDefaultXo32MConfig() function and pass a pointer to your config structure instance.

FSL_ANACTRL_DRIVER_VERSION

ANACTRL driver version.

struct _anactrl_fro192M_config
#include <fsl_anactrl.h>

Configuration for FRO192M.

This structure holds the configuration settings for the on-chip high-speed Free Running Oscillator. To initialize this structure to reasonable defaults, call the ANACTRL_GetDefaultFro192MConfig() function and pass a pointer to your config structure instance.

Public Members

bool enable12MHzClk

Enable 12MHz clock.

bool enable96MHzClk

Enable 96MHz clock.

struct _anactrl_xo32M_config
#include <fsl_anactrl.h>

Configuration for XO32M.

This structure holds the configuration settings for the 32 MHz crystal oscillator. To initialize this structure to reasonable defaults, call the ANACTRL_GetDefaultXo32MConfig() function and pass a pointer to your config structure instance.

Public Members

bool enableACBufferBypass

Enable XO AC buffer bypass in pll and top level.

bool enableSysCLkOutput

Enable XO 32 MHz output to CPU system, SCT, and CLKOUT

bool enableADCOutput

Enable High speed crystal oscillator output to ADC.

CASPER: The Cryptographic Accelerator and Signal Processing Engine with RAM sharing

casper_driver

FSL_CASPER_DRIVER_VERSION

CASPER driver version. Version 2.2.4.

Current version: 2.2.4

Change log:

  • Version 2.0.0

    • Initial version

  • Version 2.0.1

    • Bug fix KPSDK-24531 double_scalar_multiplication() result may be all zeroes for some specific input

  • Version 2.0.2

    • Bug fix KPSDK-25015 CASPER_MEMCPY hard-fault on LPC55xx when both source and destination buffers are outside of CASPER_RAM

  • Version 2.0.3

    • Bug fix KPSDK-28107 RSUB, FILL and ZERO operations not implemented in enum _casper_operation.

  • Version 2.0.4

    • For GCC compiler, enforce O1 optimize level, specifically to remove strict-aliasing option. This driver is very specific and requires -fno-strict-aliasing.

  • Version 2.0.5

    • Fix sign-compare warning.

  • Version 2.0.6

    • Fix IAR Pa082 warning.

  • Version 2.0.7

    • Fix MISRA-C 2012 issue.

  • Version 2.0.8

    • Add feature macro for CASPER_RAM_OFFSET.

  • Version 2.0.9

    • Remove unused function Jac_oncurve().

    • Fix ECC384 build.

  • Version 2.0.10

    • Fix MISRA-C 2012 issue.

  • Version 2.1.0

    • Add ECC NIST P-521 elliptic curve.

  • Version 2.2.0

    • Rework driver to support multiple curves at once.

  • Version 2.2.1

    • Fix MISRA-C 2012 issue.

  • Version 2.2.2

    • Enable hardware interleaving to RAMX0 and RAMX1 for CASPER by feature macro FSL_FEATURE_CASPER_RAM_HW_INTERLEAVE

  • Version 2.2.3

    • Added macro into CASPER_Init and CASPER_Deinit to support devices without clock and reset control.

  • Version 2.2.4

    • Fix MISRA-C 2012 issue.

enum _casper_operation

CASPER operation.

Values:

enumerator kCASPER_OpMul6464NoSum
enumerator kCASPER_OpMul6464Sum

Walking 1 or more of J loop, doing r=a*b using 64x64=128

enumerator kCASPER_OpMul6464FullSum

Walking 1 or more of J loop, doing c,r=r+a*b using 64x64=128, but assume inner j loop

enumerator kCASPER_OpMul6464Reduce

Walking 1 or more of J loop, doing c,r=r+a*b using 64x64=128, but sum all of w.

enumerator kCASPER_OpAdd64

Walking 1 or more of J loop, doing c,r[-1]=r+a*b using 64x64=128, but skip 1st write

enumerator kCASPER_OpSub64

Walking add with off_AB, and in/out off_RES doing c,r=r+a+c using 64+64=65

enumerator kCASPER_OpDouble64

Walking subtract with off_AB, and in/out off_RES doing r=r-a using 64-64=64, with last borrow implicit if any

enumerator kCASPER_OpXor64

Walking add to self with off_RES doing c,r=r+r+c using 64+64=65

enumerator kCASPER_OpRSub64

Walking XOR with off_AB, and in/out off_RES doing r=r^a using 64^64=64

enumerator kCASPER_OpShiftLeft32

Walking subtract with off_AB, and in/out off_RES using r=a-r

enumerator kCASPER_OpShiftRight32

Walking shift left doing r1,r=(b*D)|r1, where D is 2^amt and is loaded by app (off_CD not used)

enumerator kCASPER_OpCopy

Walking shift right doing r,r1=(b*D)|r1, where D is 2^(32-amt) and is loaded by app (off_CD not used) and off_RES starts at MSW

enumerator kCASPER_OpRemask

Copy from ABoff to resoff, 64b at a time

enumerator kCASPER_OpFill

Copy and mask from ABoff to resoff, 64b at a time

enumerator kCASPER_OpZero

Fill RESOFF using 64 bits at a time with value in A and B

enumerator kCASPER_OpCompare

Fill RESOFF using 64 bits at a time of 0s

enumerator kCASPER_OpCompareFast

Compare two arrays, running all the way to the end

enum _casper_algo_t

Algorithm used for CASPER operation.

Values:

enumerator kCASPER_ECC_P256

ECC_P256

enumerator kCASPER_ECC_P384

ECC_P384

enumerator kCASPER_ECC_P521

ECC_P521

Values:

enumerator kCASPER_RamOffset_Result
enumerator kCASPER_RamOffset_Base
enumerator kCASPER_RamOffset_TempBase
enumerator kCASPER_RamOffset_Modulus
enumerator kCASPER_RamOffset_M64
typedef enum _casper_operation casper_operation_t

CASPER operation.

typedef enum _casper_algo_t casper_algo_t

Algorithm used for CASPER operation.

void CASPER_Init(CASPER_Type *base)

Enables clock and disables reset for CASPER peripheral.

Enable clock and disable reset for CASPER.

Parameters:
  • base – CASPER base address

void CASPER_Deinit(CASPER_Type *base)

Disables clock for CASPER peripheral.

Disable clock and enable reset.

Parameters:
  • base – CASPER base address

CASPER_CP
CASPER_CP_CTRL0
CASPER_CP_CTRL1
CASPER_CP_LOADER
CASPER_CP_STATUS
CASPER_CP_INTENSET
CASPER_CP_INTENCLR
CASPER_CP_INTSTAT
CASPER_CP_AREG
CASPER_CP_BREG
CASPER_CP_CREG
CASPER_CP_DREG
CASPER_CP_RES0
CASPER_CP_RES1
CASPER_CP_RES2
CASPER_CP_RES3
CASPER_CP_MASK
CASPER_CP_REMASK
CASPER_CP_LOCK
CASPER_CP_ID
CASPER_Wr32b(value, off)
CASPER_Wr64b(value, off)
CASPER_Rd32b(off)
N_wordlen_max

casper_driver_pkha

void CASPER_ModExp(CASPER_Type *base, const uint8_t *signature, const uint8_t *pubN, size_t wordLen, uint32_t pubE, uint8_t *plaintext)

Performs modular exponentiation - (A^E) mod N.

This function performs modular exponentiation.

Parameters:
  • base – CASPER base address

  • signature – first addend (in little endian format)

  • pubN – modulus (in little endian format)

  • wordLen – Size of pubN in bytes

  • pubE – exponent

  • plaintext[out] Output array to store result of operation (in little endian format)

void CASPER_ecc_init(casper_algo_t curve)

Initialize prime modulus mod in Casper memory .

Set the prime modulus mod in Casper memory and set N_wordlen according to selected algorithm.

Parameters:
  • curve – elliptic curve algoritm

void CASPER_ECC_SECP256R1_Mul(CASPER_Type *base, uint32_t resX[8], uint32_t resY[8], uint32_t X[8], uint32_t Y[8], uint32_t scalar[8])

Performs ECC secp256r1 point single scalar multiplication.

This function performs ECC secp256r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:
  • base – CASPER base address

  • resX[out] Output X affine coordinate in normal form, little endian.

  • resY[out] Output Y affine coordinate in normal form, little endian.

  • X – Input X affine coordinate in normal form, little endian.

  • Y – Input Y affine coordinate in normal form, little endian.

  • scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP256R1_MulAdd(CASPER_Type *base, uint32_t resX[8], uint32_t resY[8], uint32_t X1[8], uint32_t Y1[8], uint32_t scalar1[8], uint32_t X2[8], uint32_t Y2[8], uint32_t scalar2[8])

Performs ECC secp256r1 point double scalar multiplication.

This function performs ECC secp256r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:
  • base – CASPER base address

  • resX[out] Output X affine coordinate.

  • resY[out] Output Y affine coordinate.

  • X1 – Input X1 affine coordinate.

  • Y1 – Input Y1 affine coordinate.

  • scalar1 – Input scalar1 integer.

  • X2 – Input X2 affine coordinate.

  • Y2 – Input Y2 affine coordinate.

  • scalar2 – Input scalar2 integer.

void CASPER_ECC_SECP384R1_Mul(CASPER_Type *base, uint32_t resX[12], uint32_t resY[12], uint32_t X[12], uint32_t Y[12], uint32_t scalar[12])

Performs ECC secp384r1 point single scalar multiplication.

This function performs ECC secp384r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:
  • base – CASPER base address

  • resX[out] Output X affine coordinate in normal form, little endian.

  • resY[out] Output Y affine coordinate in normal form, little endian.

  • X – Input X affine coordinate in normal form, little endian.

  • Y – Input Y affine coordinate in normal form, little endian.

  • scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP384R1_MulAdd(CASPER_Type *base, uint32_t resX[12], uint32_t resY[12], uint32_t X1[12], uint32_t Y1[12], uint32_t scalar1[12], uint32_t X2[12], uint32_t Y2[12], uint32_t scalar2[12])

Performs ECC secp384r1 point double scalar multiplication.

This function performs ECC secp384r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:
  • base – CASPER base address

  • resX[out] Output X affine coordinate.

  • resY[out] Output Y affine coordinate.

  • X1 – Input X1 affine coordinate.

  • Y1 – Input Y1 affine coordinate.

  • scalar1 – Input scalar1 integer.

  • X2 – Input X2 affine coordinate.

  • Y2 – Input Y2 affine coordinate.

  • scalar2 – Input scalar2 integer.

void CASPER_ECC_SECP521R1_Mul(CASPER_Type *base, uint32_t resX[18], uint32_t resY[18], uint32_t X[18], uint32_t Y[18], uint32_t scalar[18])

Performs ECC secp521r1 point single scalar multiplication.

This function performs ECC secp521r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:
  • base – CASPER base address

  • resX[out] Output X affine coordinate in normal form, little endian.

  • resY[out] Output Y affine coordinate in normal form, little endian.

  • X – Input X affine coordinate in normal form, little endian.

  • Y – Input Y affine coordinate in normal form, little endian.

  • scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP521R1_MulAdd(CASPER_Type *base, uint32_t resX[18], uint32_t resY[18], uint32_t X1[18], uint32_t Y1[18], uint32_t scalar1[18], uint32_t X2[18], uint32_t Y2[18], uint32_t scalar2[18])

Performs ECC secp521r1 point double scalar multiplication.

This function performs ECC secp521r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:
  • base – CASPER base address

  • resX[out] Output X affine coordinate.

  • resY[out] Output Y affine coordinate.

  • X1 – Input X1 affine coordinate.

  • Y1 – Input Y1 affine coordinate.

  • scalar1 – Input scalar1 integer.

  • X2 – Input X2 affine coordinate.

  • Y2 – Input Y2 affine coordinate.

  • scalar2 – Input scalar2 integer.

void CASPER_ECC_equal(int *res, uint32_t *op1, uint32_t *op2)
void CASPER_ECC_equal_to_zero(int *res, uint32_t *op1)

CDOG

status_t CDOG_Init(CDOG_Type *base, cdog_config_t *conf)

Initialize CDOG.

This function initializes CDOG block and setting.

Parameters:
  • base – CDOG peripheral base address

  • conf – CDOG configuration structure

Returns:

Status of the init operation

void CDOG_Deinit(CDOG_Type *base)

Deinitialize CDOG.

This function deinitializes CDOG secure counter.

Parameters:
  • base – CDOG peripheral base address

void CDOG_GetDefaultConfig(cdog_config_t *conf)

Sets the default configuration of CDOG.

This function initialize CDOG config structure to default values.

Parameters:
  • conf – CDOG configuration structure

void CDOG_Stop(CDOG_Type *base, uint32_t stop)

Stops secure counter and instruction timer.

This function stops instruction timer and secure counter. This also change state od CDOG to IDLE.

Parameters:
  • base – CDOG peripheral base address

  • stop – expected value which will be compared with value of secure counter

void CDOG_Start(CDOG_Type *base, uint32_t reload, uint32_t start)

Sets secure counter and instruction timer values.

This function sets value in RELOAD and START registers for instruction timer and secure counter

Parameters:
  • base – CDOG peripheral base address

  • reload – reload value

  • start – start value

void CDOG_Check(CDOG_Type *base, uint32_t check)

Checks secure counter.

This function compares stop value in handler with secure counter value by writting to RELOAD refister.

Parameters:
  • base – CDOG peripheral base address

  • check – expected (stop) value

void CDOG_Set(CDOG_Type *base, uint32_t stop, uint32_t reload, uint32_t start)

Sets secure counter and instruction timer values.

This function sets value in STOP, RELOAD and START registers for instruction timer and secure counter.

Parameters:
  • base – CDOG peripheral base address

  • stop – expected value which will be compared with value of secure counter

  • reload – reload value for instruction timer

  • start – start value for secure timer

void CDOG_Add(CDOG_Type *base, uint32_t add)

Add value to secure counter.

This function add specified value to secure counter.

Parameters:
  • base – CDOG peripheral base address.

  • add – Value to be added.

void CDOG_Add1(CDOG_Type *base)

Add 1 to secure counter.

This function add 1 to secure counter.

Parameters:
  • base – CDOG peripheral base address.

void CDOG_Add16(CDOG_Type *base)

Add 16 to secure counter.

This function add 16 to secure counter.

Parameters:
  • base – CDOG peripheral base address.

void CDOG_Add256(CDOG_Type *base)

Add 256 to secure counter.

This function add 256 to secure counter.

Parameters:
  • base – CDOG peripheral base address.

void CDOG_Sub(CDOG_Type *base, uint32_t sub)

brief Substract value to secure counter

This function substract specified value to secure counter.

param base CDOG peripheral base address. param sub Value to be substracted.

void CDOG_Sub1(CDOG_Type *base)

Substract 1 from secure counter.

This function substract specified 1 from secure counter.

Parameters:
  • base – CDOG peripheral base address.

void CDOG_Sub16(CDOG_Type *base)

Substract 16 from secure counter.

This function substract specified 16 from secure counter.

Parameters:
  • base – CDOG peripheral base address.

void CDOG_Sub256(CDOG_Type *base)

Substract 256 from secure counter.

This function substract specified 256 from secure counter.

Parameters:
  • base – CDOG peripheral base address.

void CDOG_WritePersistent(CDOG_Type *base, uint32_t value)

Set the CDOG persistent word.

Parameters:
  • base – CDOG peripheral base address.

  • value – The value to be written.

uint32_t CDOG_ReadPersistent(CDOG_Type *base)

Get the CDOG persistent word.

Parameters:
  • base – CDOG peripheral base address.

Returns:

The persistent word.

FSL_CDOG_DRIVER_VERSION

Defines CDOG driver version 2.1.3.

Change log:

  • Version 2.1.3

    • Re-design multiple instance IRQs and Clocks

    • Add fix for RESTART command errata

  • Version 2.1.2

    • Support multiple IRQs

    • Fix default CONTROL values

  • Version 2.1.1

    • Remove bit CONTROL[CONTROL_CTRL]

  • Version 2.1.0

    • Rename CWT to CDOG

  • Version 2.0.2

    • Fix MISRA-2012 issues

  • Version 2.0.1

    • Fix doxygen issues

  • Version 2.0.0

    • initial version

enum __cdog_debug_Action_ctrl_enum

Values:

enumerator kCDOG_DebugHaltCtrl_Run
enumerator kCDOG_DebugHaltCtrl_Pause
enum __cdog_irq_pause_ctrl_enum

Values:

enumerator kCDOG_IrqPauseCtrl_Run
enumerator kCDOG_IrqPauseCtrl_Pause
enum __cdog_fault_ctrl_enum

Values:

enumerator kCDOG_FaultCtrl_EnableReset
enumerator kCDOG_FaultCtrl_EnableInterrupt
enumerator kCDOG_FaultCtrl_NoAction
enum __code_lock_ctrl_enum

Values:

enumerator kCDOG_LockCtrl_Lock
enumerator kCDOG_LockCtrl_Unlock
typedef uint32_t secure_counter_t
SC_ADD(add)
SC_ADD1
SC_ADD16
SC_ADD256
SC_SUB(sub)
SC_SUB1
SC_SUB16
SC_SUB256
SC_CHECK(val)
struct cdog_config_t
#include <fsl_cdog.h>

Clock Driver

enum _clock_ip_name

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

Values:

enumerator kCLOCK_IpInvalid

Invalid Ip Name.

enumerator kCLOCK_Rom

Clock gate name: Rom.

enumerator kCLOCK_Sram1

Clock gate name: Sram1.

enumerator kCLOCK_Sram2

Clock gate name: Sram2.

enumerator kCLOCK_Flash

Clock gate name: Flash.

enumerator kCLOCK_Fmc

Clock gate name: Fmc.

enumerator kCLOCK_InputMux

Clock gate name: InputMux.

enumerator kCLOCK_Iocon

Clock gate name: Iocon.

enumerator kCLOCK_Gpio0

Clock gate name: Gpio0.

enumerator kCLOCK_Gpio1

Clock gate name: Gpio1.

enumerator kCLOCK_Pint

Clock gate name: Pint.

enumerator kCLOCK_Gint

Clock gate name: Gint.

enumerator kCLOCK_Dma0

Clock gate name: Dma0.

enumerator kCLOCK_Crc

Clock gate name: Crc.

enumerator kCLOCK_Wwdt

Clock gate name: Wwdt.

enumerator kCLOCK_Rtc

Clock gate name: Rtc.

enumerator kCLOCK_Mailbox

Clock gate name: Mailbox.

enumerator kCLOCK_Adc0

Clock gate name: Adc0.

enumerator kCLOCK_Mrt

Clock gate name: Mrt.

enumerator kCLOCK_OsTimer0

Clock gate name: OsTimer0.

enumerator kCLOCK_Sct0

Clock gate name: Sct0.

enumerator kCLOCK_Mcan

Clock gate name: Mcan.

enumerator kCLOCK_Utick0

Clock gate name: Utick0.

enumerator kCLOCK_FlexComm0

Clock gate name: FlexComm0.

enumerator kCLOCK_FlexComm1

Clock gate name: FlexComm1.

enumerator kCLOCK_FlexComm2

Clock gate name: FlexComm2.

enumerator kCLOCK_FlexComm3

Clock gate name: FlexComm3.

enumerator kCLOCK_FlexComm4

Clock gate name: FlexComm4.

enumerator kCLOCK_FlexComm5

Clock gate name: FlexComm5.

enumerator kCLOCK_FlexComm6

Clock gate name: FlexComm6.

enumerator kCLOCK_FlexComm7

Clock gate name: FlexComm7.

enumerator kCLOCK_MinUart0

Clock gate name: MinUart0.

enumerator kCLOCK_MinUart1

Clock gate name: MinUart1.

enumerator kCLOCK_MinUart2

Clock gate name: MinUart2.

enumerator kCLOCK_MinUart3

Clock gate name: MinUart3.

enumerator kCLOCK_MinUart4

Clock gate name: MinUart4.

enumerator kCLOCK_MinUart5

Clock gate name: MinUart5.

enumerator kCLOCK_MinUart6

Clock gate name: MinUart6.

enumerator kCLOCK_MinUart7

Clock gate name: MinUart7.

enumerator kCLOCK_LSpi0

Clock gate name: LSpi0.

enumerator kCLOCK_LSpi1

Clock gate name: LSpi1.

enumerator kCLOCK_LSpi2

Clock gate name: LSpi2.

enumerator kCLOCK_LSpi3

Clock gate name: LSpi3.

enumerator kCLOCK_LSpi4

Clock gate name: LSpi4.

enumerator kCLOCK_LSpi5

Clock gate name: LSpi5.

enumerator kCLOCK_LSpi6

Clock gate name: LSpi6.

enumerator kCLOCK_LSpi7

Clock gate name: LSpi7.

enumerator kCLOCK_BI2c0

Clock gate name: BI2c0.

enumerator kCLOCK_BI2c1

Clock gate name: BI2c1.

enumerator kCLOCK_BI2c2

Clock gate name: BI2c2.

enumerator kCLOCK_BI2c3

Clock gate name: BI2c3.

enumerator kCLOCK_BI2c4

Clock gate name: BI2c4.

enumerator kCLOCK_BI2c5

Clock gate name: BI2c5.

enumerator kCLOCK_BI2c6

Clock gate name: BI2c6.

enumerator kCLOCK_BI2c7

Clock gate name: BI2c7.

enumerator kCLOCK_FlexI2s0

Clock gate name: FlexI2s0.

enumerator kCLOCK_FlexI2s1

Clock gate name: FlexI2s1.

enumerator kCLOCK_FlexI2s2

Clock gate name: FlexI2s2.

enumerator kCLOCK_FlexI2s3

Clock gate name: FlexI2s3.

enumerator kCLOCK_FlexI2s4

Clock gate name: FlexI2s4.

enumerator kCLOCK_FlexI2s5

Clock gate name: FlexI2s5.

enumerator kCLOCK_FlexI2s6

Clock gate name: FlexI2s6.

enumerator kCLOCK_FlexI2s7

Clock gate name: FlexI2s7.

enumerator kCLOCK_Timer2

Clock gate name: Timer2.

enumerator kCLOCK_Timer0

Clock gate name: Timer0.

enumerator kCLOCK_Timer1

Clock gate name: Timer1.

enumerator kCLOCK_Dma1

Clock gate name: Dma1.

enumerator kCLOCK_Comp

Clock gate name: Comp.

enumerator kCLOCK_Sram3

Clock gate name: Sram3.

enumerator kCLOCK_Freqme

Clock gate name: Freqme.

enumerator kCLOCK_Cdog

Clock gate name: Cdog.

enumerator kCLOCK_Rng

Clock gate name: Rng.

enumerator kCLOCK_Sysctl

Clock gate name: Sysctl.

enumerator kCLOCK_HashCrypt

Clock gate name: HashCrypt.

enumerator kCLOCK_PluLut

Clock gate name: PluLut.

enumerator kCLOCK_Timer3

Clock gate name: Timer3.

enumerator kCLOCK_Timer4

Clock gate name: Timer4.

enumerator kCLOCK_Puf

Clock gate name: Puf.

enumerator kCLOCK_Casper

Clock gate name: Casper.

enumerator kCLOCK_AnalogCtrl

Clock gate name: AnalogCtrl.

enumerator kCLOCK_Hs_Lspi

Clock gate name: Lspi.

enumerator kCLOCK_Gpio_Sec

Clock gate name: GPIO Sec.

enumerator kCLOCK_Gpio_Sec_Int

Clock gate name: Gpio Sec Int

enum _clock_name

Clock name used to get clock frequency.

Values:

enumerator kCLOCK_CoreSysClk

Core/system clock (aka MAIN_CLK)

enumerator kCLOCK_BusClk

Bus clock (AHB clock)

enumerator kCLOCK_ClockOut

CLOCKOUT

enumerator kCLOCK_FroHf

FRO48/96

enumerator kCLOCK_Pll1Out

PLL1 Output

enumerator kCLOCK_Mclk

MCLK

enumerator kCLOCK_Fro12M

FRO12M

enumerator kCLOCK_Fro1M

FRO1M

enumerator kCLOCK_ExtClk

External Clock

enumerator kCLOCK_Pll0Out

PLL0 Output

enumerator kCLOCK_FlexI2S

FlexI2S clock

enum _clock_attach_id

The enumerator of clock attach Id.

Values:

enumerator kFRO12M_to_MAIN_CLK

Attach FRO12M to MAIN_CLK.

enumerator kEXT_CLK_to_MAIN_CLK

Attach EXT_CLK to MAIN_CLK.

enumerator kFRO1M_to_MAIN_CLK

Attach FRO1M to MAIN_CLK.

enumerator kFRO_HF_to_MAIN_CLK

Attach FRO_HF to MAIN_CLK.

enumerator kPLL0_to_MAIN_CLK

Attach PLL0 to MAIN_CLK.

enumerator kPLL1_to_MAIN_CLK

Attach PLL1 to MAIN_CLK.

enumerator kOSC32K_to_MAIN_CLK

Attach OSC32K to MAIN_CLK.

enumerator kMAIN_CLK_to_CLKOUT

Attach MAIN_CLK to CLKOUT.

enumerator kPLL0_to_CLKOUT

Attach PLL0 to CLKOUT.

enumerator kEXT_CLK_to_CLKOUT

Attach EXT_CLK to CLKOUT.

enumerator kFRO_HF_to_CLKOUT

Attach FRO_HF to CLKOUT.

enumerator kFRO1M_to_CLKOUT

Attach FRO1M to CLKOUT.

enumerator kPLL1_to_CLKOUT

Attach PLL1 to CLKOUT.

enumerator kOSC32K_to_CLKOUT

Attach OSC32K to CLKOUT.

enumerator kNONE_to_SYS_CLKOUT

Attach NONE to SYS_CLKOUT.

enumerator kFRO12M_to_PLL0

Attach FRO12M to PLL0.

enumerator kEXT_CLK_to_PLL0

Attach EXT_CLK to PLL0.

enumerator kFRO1M_to_PLL0

Attach FRO1M to PLL0.

enumerator kOSC32K_to_PLL0

Attach OSC32K to PLL0.

enumerator kNONE_to_PLL0

Attach NONE to PLL0.

enumerator kMCAN_DIV_to_MCAN

Attach MCAN_DIV to MCAN.

enumerator kFRO1M_to_MCAN

Attach FRO1M to MCAN.

enumerator kOSC32K_to_MCAN

Attach OSC32K to MCAN.

enumerator kNONE_to_MCAN

Attach NONE to MCAN.

enumerator kMAIN_CLK_to_ADC_CLK

Attach MAIN_CLK to ADC_CLK.

enumerator kPLL0_to_ADC_CLK

Attach PLL0 to ADC_CLK.

enumerator kFRO_HF_to_ADC_CLK

Attach FRO_HF to ADC_CLK.

enumerator kEXT_CLK_to_ADC_CLK

Attach EXT_CLK to ADC_CLK.

enumerator kNONE_to_ADC_CLK

Attach NONE to ADC_CLK.

enumerator kOSC32K_to_CLK32K

Attach OSC32K to CLK32K.

enumerator kFRO1MDIV_to_CLK32K

Attach FRO1MDIV to CLK32K.

enumerator kNONE_to_CLK32K

Attach NONE to CLK32K.

enumerator kMAIN_CLK_to_FLEXCOMM0

Attach MAIN_CLK to FLEXCOMM0.

enumerator kPLL0_DIV_to_FLEXCOMM0

Attach PLL0_DIV to FLEXCOMM0.

enumerator kFRO12M_to_FLEXCOMM0

Attach FRO12M to FLEXCOMM0.

enumerator kFRO_HF_DIV_to_FLEXCOMM0

Attach FRO_HF_DIV to FLEXCOMM0.

enumerator kFRO1M_to_FLEXCOMM0

Attach FRO1M to FLEXCOMM0.

enumerator kMCLK_to_FLEXCOMM0

Attach MCLK to FLEXCOMM0.

enumerator kOSC32K_to_FLEXCOMM0

Attach OSC32K to FLEXCOMM0.

enumerator kNONE_to_FLEXCOMM0

Attach NONE to FLEXCOMM0.

enumerator kMAIN_CLK_to_FLEXCOMM1

Attach MAIN_CLK to FLEXCOMM1.

enumerator kPLL0_DIV_to_FLEXCOMM1

Attach PLL0_DIV to FLEXCOMM1.

enumerator kFRO12M_to_FLEXCOMM1

Attach FRO12M to FLEXCOMM1.

enumerator kFRO_HF_DIV_to_FLEXCOMM1

Attach FRO_HF_DIV to FLEXCOMM1.

enumerator kFRO1M_to_FLEXCOMM1

Attach FRO1M to FLEXCOMM1.

enumerator kMCLK_to_FLEXCOMM1

Attach MCLK to FLEXCOMM1.

enumerator kOSC32K_to_FLEXCOMM1

Attach OSC32K to FLEXCOMM1.

enumerator kNONE_to_FLEXCOMM1

Attach NONE to FLEXCOMM1.

enumerator kMAIN_CLK_to_FLEXCOMM2

Attach MAIN_CLK to FLEXCOMM2.

enumerator kPLL0_DIV_to_FLEXCOMM2

Attach PLL0_DIV to FLEXCOMM2.

enumerator kFRO12M_to_FLEXCOMM2

Attach FRO12M to FLEXCOMM2.

enumerator kFRO_HF_DIV_to_FLEXCOMM2

Attach FRO_HF_DIV to FLEXCOMM2.

enumerator kFRO1M_to_FLEXCOMM2

Attach FRO1M to FLEXCOMM2.

enumerator kMCLK_to_FLEXCOMM2

Attach MCLK to FLEXCOMM2.

enumerator kOSC32K_to_FLEXCOMM2

Attach OSC32K to FLEXCOMM2.

enumerator kNONE_to_FLEXCOMM2

Attach NONE to FLEXCOMM2.

enumerator kMAIN_CLK_to_FLEXCOMM3

Attach MAIN_CLK to FLEXCOMM3.

enumerator kPLL0_DIV_to_FLEXCOMM3

Attach PLL0_DIV to FLEXCOMM3.

enumerator kFRO12M_to_FLEXCOMM3

Attach FRO12M to FLEXCOMM3.

enumerator kFRO_HF_DIV_to_FLEXCOMM3

Attach FRO_HF_DIV to FLEXCOMM3.

enumerator kFRO1M_to_FLEXCOMM3

Attach FRO1M to FLEXCOMM3.

enumerator kMCLK_to_FLEXCOMM3

Attach MCLK to FLEXCOMM3.

enumerator kOSC32K_to_FLEXCOMM3

Attach OSC32K to FLEXCOMM3.

enumerator kNONE_to_FLEXCOMM3

Attach NONE to FLEXCOMM3.

enumerator kMAIN_CLK_to_FLEXCOMM4

Attach MAIN_CLK to FLEXCOMM4.

enumerator kPLL0_DIV_to_FLEXCOMM4

Attach PLL0_DIV to FLEXCOMM4.

enumerator kFRO12M_to_FLEXCOMM4

Attach FRO12M to FLEXCOMM4.

enumerator kFRO_HF_DIV_to_FLEXCOMM4

Attach FRO_HF_DIV to FLEXCOMM4.

enumerator kFRO1M_to_FLEXCOMM4

Attach FRO1M to FLEXCOMM4.

enumerator kMCLK_to_FLEXCOMM4

Attach MCLK to FLEXCOMM4.

enumerator kOSC32K_to_FLEXCOMM4

Attach OSC32K to FLEXCOMM4.

enumerator kNONE_to_FLEXCOMM4

Attach NONE to FLEXCOMM4.

enumerator kMAIN_CLK_to_FLEXCOMM5

Attach MAIN_CLK to FLEXCOMM5.

enumerator kPLL0_DIV_to_FLEXCOMM5

Attach PLL0_DIV to FLEXCOMM5.

enumerator kFRO12M_to_FLEXCOMM5

Attach FRO12M to FLEXCOMM5.

enumerator kFRO_HF_DIV_to_FLEXCOMM5

Attach FRO_HF_DIV to FLEXCOMM5.

enumerator kFRO1M_to_FLEXCOMM5

Attach FRO1M to FLEXCOMM5.

enumerator kMCLK_to_FLEXCOMM5

Attach MCLK to FLEXCOMM5.

enumerator kOSC32K_to_FLEXCOMM5

Attach OSC32K to FLEXCOMM5.

enumerator kNONE_to_FLEXCOMM5

Attach NONE to FLEXCOMM5.

enumerator kMAIN_CLK_to_FLEXCOMM6

Attach MAIN_CLK to FLEXCOMM6.

enumerator kPLL0_DIV_to_FLEXCOMM6

Attach PLL0_DIV to FLEXCOMM6.

enumerator kFRO12M_to_FLEXCOMM6

Attach FRO12M to FLEXCOMM6.

enumerator kFRO_HF_DIV_to_FLEXCOMM6

Attach FRO_HF_DIV to FLEXCOMM6.

enumerator kFRO1M_to_FLEXCOMM6

Attach FRO1M to FLEXCOMM6.

enumerator kMCLK_to_FLEXCOMM6

Attach MCLK to FLEXCOMM6.

enumerator kOSC32K_to_FLEXCOMM6

Attach OSC32K to FLEXCOMM6.

enumerator kNONE_to_FLEXCOMM6

Attach NONE to FLEXCOMM6.

enumerator kMAIN_CLK_to_FLEXCOMM7

Attach MAIN_CLK to FLEXCOMM7.

enumerator kPLL0_DIV_to_FLEXCOMM7

Attach PLL0_DIV to FLEXCOMM7.

enumerator kFRO12M_to_FLEXCOMM7

Attach FRO12M to FLEXCOMM7.

enumerator kFRO_HF_DIV_to_FLEXCOMM7

Attach FRO_HF_DIV to FLEXCOMM7.

enumerator kFRO1M_to_FLEXCOMM7

Attach FRO1M to FLEXCOMM7.

enumerator kMCLK_to_FLEXCOMM7

Attach MCLK to FLEXCOMM7.

enumerator kOSC32K_to_FLEXCOMM7

Attach OSC32K to FLEXCOMM7.

enumerator kNONE_to_FLEXCOMM7

Attach NONE to FLEXCOMM7.

enumerator kMAIN_CLK_to_HSLSPI

Attach MAIN_CLK to HSLSPI.

enumerator kPLL0_DIV_to_HSLSPI

Attach PLL0_DIV to HSLSPI.

enumerator kFRO12M_to_HSLSPI

Attach FRO12M to HSLSPI.

enumerator kFRO_HF_DIV_to_HSLSPI

Attach FRO_HF_DIV to HSLSPI.

enumerator kFRO1M_to_HSLSPI

Attach FRO1M to HSLSPI.

enumerator kOSC32K_to_HSLSPI

Attach OSC32K to HSLSPI.

enumerator kNONE_to_HSLSPI

Attach NONE to HSLSPI.

enumerator kFRO_HF_to_MCLK

Attach FRO_HF to MCLK.

enumerator kPLL0_to_MCLK

Attach PLL0 to MCLK.

enumerator kNONE_to_MCLK

Attach NONE to MCLK.

enumerator kMAIN_CLK_to_SCT_CLK

Attach MAIN_CLK to SCT_CLK.

enumerator kPLL0_to_SCT_CLK

Attach PLL0 to SCT_CLK.

enumerator kEXT_CLK_to_SCT_CLK

Attach EXT_CLK to SCT_CLK.

enumerator kFRO_HF_to_SCT_CLK

Attach FRO_HF to SCT_CLK.

enumerator kMCLK_to_SCT_CLK

Attach MCLK to SCT_CLK.

enumerator kNONE_to_SCT_CLK

Attach NONE to SCT_CLK.

enumerator kFRO32K_to_OSC32K

Attach FRO32K to OSC32K.

enumerator kXTAL32K_to_OSC32K

Attach XTAL32K to OSC32K.

enumerator kOSC32K_to_OSTIMER

Attach OSC32K to OSTIMER.

enumerator kFRO1M_to_OSTIMER

Attach FRO1M to OSTIMER.

enumerator kMAIN_CLK_to_OSTIMER

Attach MAIN_CLK to OSTIMER.

enumerator kTRACE_DIV_to_TRACE

Attach TRACE_DIV to TRACE.

enumerator kFRO1M_to_TRACE

Attach FRO1M to TRACE.

enumerator kOSC32K_to_TRACE

Attach OSC32K to TRACE.

enumerator kNONE_to_TRACE

Attach NONE to TRACE.

enumerator kSYSTICK_DIV0_to_SYSTICK0

Attach SYSTICK_DIV0 to SYSTICK0.

enumerator kFRO1M_to_SYSTICK0

Attach FRO1M to SYSTICK0.

enumerator kOSC32K_to_SYSTICK0

Attach OSC32K to SYSTICK0.

enumerator kNONE_to_SYSTICK0

Attach NONE to SYSTICK0.

enumerator kFRO12M_to_PLL1

Attach FRO12M to PLL1.

enumerator kEXT_CLK_to_PLL1

Attach EXT_CLK to PLL1.

enumerator kFRO1M_to_PLL1

Attach FRO1M to PLL1.

enumerator kOSC32K_to_PLL1

Attach OSC32K to PLL1.

enumerator kNONE_to_PLL1

Attach NONE to PLL1.

enumerator kMAIN_CLK_to_CTIMER0

Attach MAIN_CLK to CTIMER0.

enumerator kPLL0_to_CTIMER0

Attach PLL0 to CTIMER0.

enumerator kFRO_HF_to_CTIMER0

Attach FRO_HF to CTIMER0.

enumerator kFRO1M_to_CTIMER0

Attach FRO1M to CTIMER0.

enumerator kMCLK_to_CTIMER0

Attach MCLK to CTIMER0.

enumerator kOSC32K_to_CTIMER0

Attach OSC32K to CTIMER0.

enumerator kNONE_to_CTIMER0

Attach NONE to CTIMER0.

enumerator kMAIN_CLK_to_CTIMER1

Attach MAIN_CLK to CTIMER1.

enumerator kPLL0_to_CTIMER1

Attach PLL0 to CTIMER1.

enumerator kFRO_HF_to_CTIMER1

Attach FRO_HF to CTIMER1.

enumerator kFRO1M_to_CTIMER1

Attach FRO1M to CTIMER1.

enumerator kMCLK_to_CTIMER1

Attach MCLK to CTIMER1.

enumerator kOSC32K_to_CTIMER1

Attach OSC32K to CTIMER1.

enumerator kNONE_to_CTIMER1

Attach NONE to CTIMER1.

enumerator kMAIN_CLK_to_CTIMER2

Attach MAIN_CLK to CTIMER2.

enumerator kPLL0_to_CTIMER2

Attach PLL0 to CTIMER2.

enumerator kFRO_HF_to_CTIMER2

Attach FRO_HF to CTIMER2.

enumerator kFRO1M_to_CTIMER2

Attach FRO1M to CTIMER2.

enumerator kMCLK_to_CTIMER2

Attach MCLK to CTIMER2.

enumerator kOSC32K_to_CTIMER2

Attach OSC32K to CTIMER2.

enumerator kNONE_to_CTIMER2

Attach NONE to CTIMER2.

enumerator kMAIN_CLK_to_CTIMER3

Attach MAIN_CLK to CTIMER3.

enumerator kPLL0_to_CTIMER3

Attach PLL0 to CTIMER3.

enumerator kFRO_HF_to_CTIMER3

Attach FRO_HF to CTIMER3.

enumerator kFRO1M_to_CTIMER3

Attach FRO1M to CTIMER3.

enumerator kMCLK_to_CTIMER3

Attach MCLK to CTIMER3.

enumerator kOSC32K_to_CTIMER3

Attach OSC32K to CTIMER3.

enumerator kNONE_to_CTIMER3

Attach NONE to CTIMER3.

enumerator kMAIN_CLK_to_CTIMER4

Attach MAIN_CLK to CTIMER4.

enumerator kPLL0_to_CTIMER4

Attach PLL0 to CTIMER4.

enumerator kFRO_HF_to_CTIMER4

Attach FRO_HF to CTIMER4.

enumerator kFRO1M_to_CTIMER4

Attach FRO1M to CTIMER4.

enumerator kMCLK_to_CTIMER4

Attach MCLK to CTIMER4.

enumerator kOSC32K_to_CTIMER4

Attach OSC32K to CTIMER4.

enumerator kNONE_to_CTIMER4

Attach NONE to CTIMER4.

enumerator kNONE_to_NONE

Attach NONE to NONE.

enum _clock_div_name

Clock dividers.

Values:

enumerator kCLOCK_DivSystickClk0

Systick Clk0 Divider.

enumerator kCLOCK_DivArmTrClkDiv

Arm Tr Clk Div Divider.

enumerator kCLOCK_DivCanClk

Can Clock Divider.

enumerator kCLOCK_DivFlexFrg0

Flex Frg0 Divider.

enumerator kCLOCK_DivFlexFrg1

Flex Frg1 Divider.

enumerator kCLOCK_DivFlexFrg2

Flex Frg2 Divider.

enumerator kCLOCK_DivFlexFrg3

Flex Frg3 Divider.

enumerator kCLOCK_DivFlexFrg4

Flex Frg4 Divider.

enumerator kCLOCK_DivFlexFrg5

Flex Frg5 Divider.

enumerator kCLOCK_DivFlexFrg6

Flex Frg6 Divider.

enumerator kCLOCK_DivFlexFrg7

Flex Frg7 Divider.

enumerator kCLOCK_DivAhbClk

Ahb Clock Divider.

enumerator kCLOCK_DivClkOut

Clk Out Divider.

enumerator kCLOCK_DivFrohfClk

Frohf Clock Divider.

enumerator kCLOCK_DivWdtClk

Wdt Clock Divider.

enumerator kCLOCK_DivAdcAsyncClk

Adc Async Clock Divider.

enumerator kCLOCK_DivFro1mClk

Fro1m Clock Divider.

enumerator kCLOCK_DivMClk

I2S MCLK Clock Divider.

enumerator kCLOCK_DivSctClk

Sct Clock Divider.

enumerator kCLOCK_DivPll0Clk

PLL0 clock divider.

enum _ss_progmodfm

PLL Spread Spectrum (SS) Programmable modulation frequency See (MF) field in the PLL0SSCG1 register in the UM.

Values:

enumerator kSS_MF_512

Nss = 512 (fm ? 3.9 - 7.8 kHz)

enumerator kSS_MF_384

Nss ?= 384 (fm ? 5.2 - 10.4 kHz)

enumerator kSS_MF_256

Nss = 256 (fm ? 7.8 - 15.6 kHz)

enumerator kSS_MF_128

Nss = 128 (fm ? 15.6 - 31.3 kHz)

enumerator kSS_MF_64

Nss = 64 (fm ? 32.3 - 64.5 kHz)

enumerator kSS_MF_32

Nss = 32 (fm ? 62.5- 125 kHz)

enumerator kSS_MF_24

Nss ?= 24 (fm ? 83.3- 166.6 kHz)

enumerator kSS_MF_16

Nss = 16 (fm ? 125- 250 kHz)

enum _ss_progmoddp

PLL Spread Spectrum (SS) Programmable frequency modulation depth See (MR) field in the PLL0SSCG1 register in the UM.

Values:

enumerator kSS_MR_K0

k = 0 (no spread spectrum)

enumerator kSS_MR_K1

k = 1

enumerator kSS_MR_K1_5

k = 1.5

enumerator kSS_MR_K2

k = 2

enumerator kSS_MR_K3

k = 3

enumerator kSS_MR_K4

k = 4

enumerator kSS_MR_K6

k = 6

enumerator kSS_MR_K8

k = 8

enum _ss_modwvctrl

PLL Spread Spectrum (SS) Modulation waveform control See (MC) field in the PLL0SSCG1 register in the UM.

Compensation for low pass filtering of the PLL to get a triangular modulation at the output of the PLL, giving a flat frequency spectrum.

Values:

enumerator kSS_MC_NOC

no compensation

enumerator kSS_MC_RECC

recommended setting

enumerator kSS_MC_MAXC

max. compensation

enum _pll_error

PLL status definitions.

Values:

enumerator kStatus_PLL_Success

PLL operation was successful

enumerator kStatus_PLL_OutputTooLow

PLL output rate request was too low

enumerator kStatus_PLL_OutputTooHigh

PLL output rate request was too high

enumerator kStatus_PLL_InputTooLow

PLL input rate is too low

enumerator kStatus_PLL_InputTooHigh

PLL input rate is too high

enumerator kStatus_PLL_OutsideIntLimit

Requested output rate isn’t possible

enumerator kStatus_PLL_CCOTooLow

Requested CCO rate isn’t possible

enumerator kStatus_PLL_CCOTooHigh

Requested CCO rate isn’t possible

typedef enum _clock_ip_name clock_ip_name_t

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

typedef enum _clock_name clock_name_t

Clock name used to get clock frequency.

typedef enum _clock_attach_id clock_attach_id_t

The enumerator of clock attach Id.

typedef enum _clock_div_name clock_div_name_t

Clock dividers.

typedef enum _ss_progmodfm ss_progmodfm_t

PLL Spread Spectrum (SS) Programmable modulation frequency See (MF) field in the PLL0SSCG1 register in the UM.

typedef enum _ss_progmoddp ss_progmoddp_t

PLL Spread Spectrum (SS) Programmable frequency modulation depth See (MR) field in the PLL0SSCG1 register in the UM.

typedef enum _ss_modwvctrl ss_modwvctrl_t

PLL Spread Spectrum (SS) Modulation waveform control See (MC) field in the PLL0SSCG1 register in the UM.

Compensation for low pass filtering of the PLL to get a triangular modulation at the output of the PLL, giving a flat frequency spectrum.

typedef struct _pll_config pll_config_t

PLL configuration structure.

This structure can be used to configure the settings for a PLL setup structure. Fill in the desired configuration for the PLL and call the PLL setup function to fill in a PLL setup structure.

typedef struct _pll_setup pll_setup_t

PLL0 setup structure This structure can be used to pre-build a PLL setup configuration at run-time and quickly set the PLL to the configuration. It can be populated with the PLL setup function. If powering up or waiting for PLL lock, the PLL input clock source should be configured prior to PLL setup.

typedef enum _pll_error pll_error_t

PLL status definitions.

static inline void CLOCK_EnableClock(clock_ip_name_t clk)

Enable the clock for specific IP.

Parameters:
  • clk – : Clock to be enabled.

Returns:

Nothing

static inline void CLOCK_DisableClock(clock_ip_name_t clk)

Disable the clock for specific IP.

Parameters:
  • clk – : Clock to be Disabled.

Returns:

Nothing

status_t CLOCK_SetupFROClocking(uint32_t iFreq)

Initialize the Core clock to given frequency (12, 48 or 96 MHz). Turns on FRO and uses default CCO, if freq is 12000000, then high speed output is off, else high speed output is enabled.

Parameters:
  • iFreq – : Desired frequency (must be one of CLK_FRO_12MHZ or CLK_FRO_48MHZ or CLK_FRO_96MHZ)

Returns:

returns success or fail status.

void CLOCK_SetFLASHAccessCyclesForFreq(uint32_t system_freq_hz)

Set the flash wait states for the input freuqency.

Parameters:
  • system_freq_hz – : Input frequency

Returns:

Nothing

status_t CLOCK_SetupExtClocking(uint32_t iFreq)

Initialize the external osc clock to given frequency.

Parameters:
  • iFreq – : Desired frequency (must be equal to exact rate in Hz)

Returns:

returns success or fail status.

status_t CLOCK_SetupI2SMClkClocking(uint32_t iFreq)

Initialize the I2S MCLK clock to given frequency.

Parameters:
  • iFreq – : Desired frequency (must be equal to exact rate in Hz)

Returns:

returns success or fail status.

status_t CLOCK_SetupPLUClkInClocking(uint32_t iFreq)

Initialize the PLU CLKIN clock to given frequency.

Parameters:
  • iFreq – : Desired frequency (must be equal to exact rate in Hz)

Returns:

returns success or fail status.

void CLOCK_AttachClk(clock_attach_id_t connection)

Configure the clock selection muxes.

Parameters:
  • connection – : Clock to be configured.

Returns:

Nothing

clock_attach_id_t CLOCK_GetClockAttachId(clock_attach_id_t attachId)

Get the actual clock attach id. This fuction uses the offset in input attach id, then it reads the actual source value in the register and combine the offset to obtain an actual attach id.

Parameters:
  • attachId – : Clock attach id to get.

Returns:

Clock source value.

void CLOCK_SetClkDiv(clock_div_name_t div_name, uint32_t divided_by_value, bool reset)

Setup peripheral clock dividers.

Parameters:
  • div_name – : Clock divider name

  • divided_by_value – Value to be divided

  • reset – : Whether to reset the divider counter.

Returns:

Nothing

void CLOCK_SetRtc1khzClkDiv(uint32_t divided_by_value)

Setup rtc 1khz clock divider.

Parameters:
  • divided_by_value – Value to be divided

Returns:

Nothing

void CLOCK_SetRtc1hzClkDiv(uint32_t divided_by_value)

Setup rtc 1hz clock divider.

Parameters:
  • divided_by_value – Value to be divided

Returns:

Nothing

uint32_t CLOCK_SetFlexCommClock(uint32_t id, uint32_t freq)

Set the flexcomm output frequency.

Parameters:
  • id – : flexcomm instance id

  • freq – : output frequency

Returns:

0 : the frequency range is out of range. 1 : switch successfully.

uint32_t CLOCK_GetFlexCommInputClock(uint32_t id)

Return Frequency of flexcomm input clock.

Parameters:
  • id – : flexcomm instance id

Returns:

Frequency value

uint32_t CLOCK_GetFreq(clock_name_t clockName)

Return Frequency of selected clock.

Returns:

Frequency of selected clock

uint32_t CLOCK_GetFro12MFreq(void)

Return Frequency of FRO 12MHz.

Returns:

Frequency of FRO 12MHz

uint32_t CLOCK_GetFro1MFreq(void)

Return Frequency of FRO 1MHz.

Returns:

Frequency of FRO 1MHz

uint32_t CLOCK_GetClockOutClkFreq(void)

Return Frequency of ClockOut.

Returns:

Frequency of ClockOut

uint32_t CLOCK_GetMCanClkFreq(void)

Return Frequency of Can Clock.

Returns:

Frequency of Can.

uint32_t CLOCK_GetAdcClkFreq(void)

Return Frequency of Adc Clock.

Returns:

Frequency of Adc.

uint32_t CLOCK_GetMclkClkFreq(void)

Return Frequency of MClk Clock.

Returns:

Frequency of MClk Clock.

uint32_t CLOCK_GetSctClkFreq(void)

Return Frequency of SCTimer Clock.

Returns:

Frequency of SCTimer Clock.

uint32_t CLOCK_GetExtClkFreq(void)

Return Frequency of External Clock.

Returns:

Frequency of External Clock. If no external clock is used returns 0.

uint32_t CLOCK_GetWdtClkFreq(void)

Return Frequency of Watchdog.

Returns:

Frequency of Watchdog

uint32_t CLOCK_GetFroHfFreq(void)

Return Frequency of High-Freq output of FRO.

Returns:

Frequency of High-Freq output of FRO

uint32_t CLOCK_GetPll0OutFreq(void)

Return Frequency of PLL.

Returns:

Frequency of PLL

uint32_t CLOCK_GetPll1OutFreq(void)

Return Frequency of USB PLL.

Returns:

Frequency of PLL

uint32_t CLOCK_GetOsc32KFreq(void)

Return Frequency of 32kHz osc.

Returns:

Frequency of 32kHz osc

uint32_t CLOCK_GetCoreSysClkFreq(void)

Return Frequency of Core System.

Returns:

Frequency of Core System

uint32_t CLOCK_GetI2SMClkFreq(void)

Return Frequency of I2S MCLK Clock.

Returns:

Frequency of I2S MCLK Clock

uint32_t CLOCK_GetPLUClkInFreq(void)

Return Frequency of PLU CLKIN Clock.

Returns:

Frequency of PLU CLKIN Clock

uint32_t CLOCK_GetFlexCommClkFreq(uint32_t id)

Return Frequency of FlexComm Clock.

Returns:

Frequency of FlexComm Clock

uint32_t CLOCK_GetHsLspiClkFreq(void)

Return Frequency of High speed SPI Clock.

Returns:

Frequency of High speed SPI Clock

uint32_t CLOCK_GetCTimerClkFreq(uint32_t id)

Return Frequency of CTimer functional Clock.

Returns:

Frequency of CTimer functional Clock

uint32_t CLOCK_GetSystickClkFreq(uint32_t id)

Return Frequency of SystickClock.

Returns:

Frequency of Systick Clock

uint32_t CLOCK_GetPLL0InClockRate(void)

Return PLL0 input clock rate.

Returns:

PLL0 input clock rate

uint32_t CLOCK_GetPLL1InClockRate(void)

Return PLL1 input clock rate.

Returns:

PLL1 input clock rate

uint32_t CLOCK_GetPLL0OutClockRate(bool recompute)

Return PLL0 output clock rate.

Note

The PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use ‘false’ with the ‘recompute’ parameter.

Parameters:
  • recompute – : Forces a PLL rate recomputation if true

Returns:

PLL0 output clock rate

uint32_t CLOCK_GetPLL1OutClockRate(bool recompute)

Return PLL1 output clock rate.

Note

The PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use ‘false’ with the ‘recompute’ parameter.

Parameters:
  • recompute – : Forces a PLL rate recomputation if true

Returns:

PLL1 output clock rate

__STATIC_INLINE void CLOCK_SetBypassPLL0 (bool bypass)

Enables and disables PLL0 bypass mode.

bypass : true to bypass PLL0 (PLL0 output = PLL0 input, false to disable bypass

Returns:

PLL0 output clock rate

__STATIC_INLINE void CLOCK_SetBypassPLL1 (bool bypass)

Enables and disables PLL1 bypass mode.

bypass : true to bypass PLL1 (PLL1 output = PLL1 input, false to disable bypass

Returns:

PLL1 output clock rate

__STATIC_INLINE bool CLOCK_IsPLL0Locked (void)

Check if PLL is locked or not.

Returns:

true if the PLL is locked, false if not locked

__STATIC_INLINE bool CLOCK_IsPLL1Locked (void)

Check if PLL1 is locked or not.

Returns:

true if the PLL1 is locked, false if not locked

void CLOCK_SetStoredPLL0ClockRate(uint32_t rate)

Store the current PLL0 rate.

Parameters:
  • rate – Current rate of the PLL0

Returns:

Nothing

uint32_t CLOCK_GetPLL0OutFromSetup(pll_setup_t *pSetup)

Return PLL0 output clock rate from setup structure.

Parameters:
  • pSetup – : Pointer to a PLL setup structure

Returns:

System PLL output clock rate the setup structure will generate

uint32_t CLOCK_GetPLL1OutFromSetup(pll_setup_t *pSetup)

Return PLL1 output clock rate from setup structure.

Parameters:
  • pSetup – : Pointer to a PLL setup structure

Returns:

PLL0 output clock rate the setup structure will generate

pll_error_t CLOCK_SetupPLL0Data(pll_config_t *pControl, pll_setup_t *pSetup)

Set PLL0 output based on the passed PLL setup data.

Note

Actual frequency for setup may vary from the desired frequency based on the accuracy of input clocks, rounding, non-fractional PLL mode, etc.

Parameters:
  • pControl – : Pointer to populated PLL control structure to generate setup with

  • pSetup – : Pointer to PLL setup structure to be filled

Returns:

PLL_ERROR_SUCCESS on success, or PLL setup error code

pll_error_t CLOCK_SetupPLL0Prec(pll_setup_t *pSetup, uint32_t flagcfg)

Set PLL output from PLL setup structure (precise frequency)

Note

This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

Parameters:
  • pSetup – : Pointer to populated PLL setup structure

  • flagcfg – : Flag configuration for PLL config structure

Returns:

PLL_ERROR_SUCCESS on success, or PLL setup error code

pll_error_t CLOCK_SetPLL0Freq(const pll_setup_t *pSetup)

Set PLL output from PLL setup structure (precise frequency)

Note

This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

Parameters:
  • pSetup – : Pointer to populated PLL setup structure

Returns:

kStatus_PLL_Success on success, or PLL setup error code

pll_error_t CLOCK_SetPLL1Freq(const pll_setup_t *pSetup)

Set PLL output from PLL setup structure (precise frequency)

Note

This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

Parameters:
  • pSetup – : Pointer to populated PLL setup structure

Returns:

kStatus_PLL_Success on success, or PLL setup error code

void CLOCK_SetupPLL0Mult(uint32_t multiply_by, uint32_t input_freq)

Set PLL0 output based on the multiplier and input frequency.

Note

Unlike the Chip_Clock_SetupSystemPLLPrec() function, this function does not disable or enable PLL power, wait for PLL lock, or adjust system voltages. These must be done in the application. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

Parameters:
  • multiply_by – : multiplier

  • input_freq – : Clock input frequency of the PLL

Returns:

Nothing

void CLOCK_EnableOstimer32kClock(void)

Enable the OSTIMER 32k clock.

Returns:

Nothing

FSL_CLOCK_DRIVER_VERSION

CLOCK driver version 2.3.8.

FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL

Configure whether driver controls clock.

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note

All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

CLOCK_USR_CFG_PLL_CONFIG_CACHE_COUNT

User-defined the size of cache for CLOCK_PllGetConfig() function.

Once define this MACRO to be non-zero value, CLOCK_PllGetConfig() function would cache the recent calulation and accelerate the execution to get the right settings.

SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY
ROM_CLOCKS

Clock ip name array for ROM.

SRAM_CLOCKS

Clock ip name array for SRAM.

FLASH_CLOCKS

Clock ip name array for FLASH.

FMC_CLOCKS

Clock ip name array for FMC.

INPUTMUX_CLOCKS

Clock ip name array for INPUTMUX.

IOCON_CLOCKS

Clock ip name array for IOCON.

GPIO_CLOCKS

Clock ip name array for GPIO.

PINT_CLOCKS

Clock ip name array for PINT.

GINT_CLOCKS

Clock ip name array for GINT.

DMA_CLOCKS

Clock ip name array for DMA.

CRC_CLOCKS

Clock ip name array for CRC.

WWDT_CLOCKS

Clock ip name array for WWDT.

RTC_CLOCKS

Clock ip name array for RTC.

MAILBOX_CLOCKS

Clock ip name array for Mailbox.

LPADC_CLOCKS

Clock ip name array for LPADC.

MRT_CLOCKS

Clock ip name array for MRT.

OSTIMER_CLOCKS

Clock ip name array for OSTIMER.

SCT_CLOCKS

Clock ip name array for SCT0.

MCAN_CLOCKS

Clock ip name array for MCAN.

UTICK_CLOCKS

Clock ip name array for UTICK.

FLEXCOMM_CLOCKS

Clock ip name array for FLEXCOMM.

LPUART_CLOCKS

Clock ip name array for LPUART.

BI2C_CLOCKS

Clock ip name array for BI2C.

LPSPI_CLOCKS

Clock ip name array for LSPI.

FLEXI2S_CLOCKS

Clock ip name array for FLEXI2S.

CTIMER_CLOCKS

Clock ip name array for CTIMER.

COMP_CLOCKS

Clock ip name array for COMP.

FREQME_CLOCKS

Clock ip name array for FREQME.

CDOG_CLOCKS

Clock ip name array for CDOG.

RNG_CLOCKS

Clock ip name array for RNG.

HASHCRYPT_CLOCKS

Clock ip name array for HashCrypt.

PLULUT_CLOCKS

Clock ip name array for PLULUT.

PUF_CLOCKS

Clock ip name array for PUF.

CASPER_CLOCKS

Clock ip name array for CASPER.

ANALOGCTRL_CLOCKS

Clock ip name array for ANALOGCTRL.

HS_LSPI_CLOCKS

Clock ip name array for HS_LSPI.

GPIO_SEC_CLOCKS

Clock ip name array for GPIO_SEC.

GPIO_SEC_INT_CLOCKS

Clock ip name array for GPIO_SEC_INT.

PLU_CLOCKS
SYSCTL_CLOCKS
CLK_GATE_REG_OFFSET_SHIFT

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

CLK_GATE_REG_OFFSET_MASK
CLK_GATE_BIT_SHIFT_SHIFT
CLK_GATE_BIT_SHIFT_MASK
CLK_GATE_DEFINE(reg_offset, bit_shift)
CLK_GATE_ABSTRACT_REG_OFFSET(x)
CLK_GATE_ABSTRACT_BITS_SHIFT(x)
AHB_CLK_CTRL0
AHB_CLK_CTRL1
AHB_CLK_CTRL2
BUS_CLK

Peripherals clock source definition.

I2C0_CLK_SRC
CLK_ATTACH_ID(mux, sel, pos)

Clock Mux Switches The encoding is as follows each connection identified is 32bits wide while 24bits are valuable starting from LSB upwards.

[4 bits for choice, 0 means invalid choice] [8 bits mux ID]*

MUX_A(mux, sel)
MUX_B(mux, sel, selector)
GET_ID_ITEM(connection)
GET_ID_NEXT_ITEM(connection)
GET_ID_ITEM_MUX(connection)
GET_ID_ITEM_SEL(connection)
GET_ID_SELECTOR(connection)
CM_SYSTICKCLKSEL0
CM_TRACECLKSEL
CM_CTIMERCLKSEL0
CM_CTIMERCLKSEL1
CM_CTIMERCLKSEL2
CM_CTIMERCLKSEL3
CM_CTIMERCLKSEL4
CM_MAINCLKSELA
CM_MAINCLKSELB
CM_CLKOUTCLKSEL
CM_PLL0CLKSEL
CM_PLL1CLKSEL
CM_MCANCLKSEL
CM_ADCASYNCCLKSEL
CM_CLK32KCLKSEL
CM_FXCOMCLKSEL0
CM_FXCOMCLKSEL1
CM_FXCOMCLKSEL2
CM_FXCOMCLKSEL3
CM_FXCOMCLKSEL4
CM_FXCOMCLKSEL5
CM_FXCOMCLKSEL6
CM_FXCOMCLKSEL7
CM_HSLSPICLKSEL
CM_MCLKCLKSEL
CM_SCTCLKSEL
CM_OSTIMERCLKSEL
CM_RTCOSC32KCLKSEL
PLL_CONFIGFLAG_USEINRATE

PLL configuration structure flags for ‘flags’ field These flags control how the PLL configuration function sets up the PLL setup structure.

When the PLL_CONFIGFLAG_USEINRATE flag is selected, the ‘InputRate’ field in the configuration structure must be assigned with the expected PLL frequency. If the PLL_CONFIGFLAG_USEINRATE is not used, ‘InputRate’ is ignored in the configuration function and the driver will determine the PLL rate from the currently selected PLL source. This flag might be used to configure the PLL input clock more accurately when using the WDT oscillator or a more dyanmic CLKIN source.

When the PLL_CONFIGFLAG_FORCENOFRACT flag is selected, the PLL hardware for the automatic bandwidth selection, Spread Spectrum (SS) support, and fractional M-divider are not used.

Flag to use InputRate in PLL configuration structure for setup

PLL_CONFIGFLAG_FORCENOFRACT

Force non-fractional output mode, PLL output will not use the fractional, automatic bandwidth, or SS hardware

PLL_SETUPFLAG_POWERUP

PLL setup structure flags for ‘flags’ field These flags control how the PLL setup function sets up the PLL.

Setup will power on the PLL after setup

PLL_SETUPFLAG_WAITLOCK

Setup will wait for PLL lock, implies the PLL will be pwoered on

PLL_SETUPFLAG_ADGVOLT

Optimize system voltage for the new PLL rate

PLL_SETUPFLAG_USEFEEDBACKDIV2

Use feedback divider by 2 in divider path

uint32_t desiredRate

Desired PLL rate in Hz

uint32_t inputRate

PLL input clock in Hz, only used if PLL_CONFIGFLAG_USEINRATE flag is set

uint32_t flags

PLL configuration flags, Or’ed value of PLL_CONFIGFLAG_* definitions

ss_progmodfm_t ss_mf

SS Programmable modulation frequency, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag

ss_progmoddp_t ss_mr

SS Programmable frequency modulation depth, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag

ss_modwvctrl_t ss_mc

SS Modulation waveform control, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag

bool mfDither

false for fixed modulation frequency or true for dithering, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag

uint32_t pllctrl

PLL control register PLL0CTRL

uint32_t pllndec

PLL NDEC register PLL0NDEC

uint32_t pllpdec

PLL PDEC register PLL0PDEC

uint32_t pllmdec

PLL MDEC registers PLL0PDEC

uint32_t pllsscg[2]

PLL SSCTL registers PLL0SSCG

uint32_t pllRate

Acutal PLL rate

uint32_t flags

PLL setup flags, Or’ed value of PLL_SETUPFLAG_* definitions

struct _pll_config
#include <fsl_clock.h>

PLL configuration structure.

This structure can be used to configure the settings for a PLL setup structure. Fill in the desired configuration for the PLL and call the PLL setup function to fill in a PLL setup structure.

struct _pll_setup
#include <fsl_clock.h>

PLL0 setup structure This structure can be used to pre-build a PLL setup configuration at run-time and quickly set the PLL to the configuration. It can be populated with the PLL setup function. If powering up or waiting for PLL lock, the PLL input clock source should be configured prior to PLL setup.

CMP: Analog Comparator Driver

void CMP_Init(const cmp_config_t *config)

CMP initialization.

This function enables the CMP module and do necessary settings.

Parameters:
  • config – Pointer to the configuration structure.

void CMP_Deinit(void)

CMP deinitialization.

This function gates the clock for CMP module.

void CMP_GetDefaultConfig(cmp_config_t *config)

Initializes the CMP user configuration structure.

This function initializes the user configuration structure to these default values.

config->enableHysteresis    = true;
config->enableLowPower      = true;
config->filterClockDivider  = kCMP_FilterClockDivide1;
config->filterSampleMode    = kCMP_FilterSampleMode0;

Parameters:
  • config – Pointer to the configuration structure.

static inline void CMP_SetInputChannels(uint8_t positiveChannel, uint8_t negativeChannel)
void CMP_SetVREF(const cmp_vref_config_t *config)

Configures the VREFINPUT.

Parameters:
  • config – Pointer to the configuration structure.

static inline bool CMP_GetOutput(void)

Get CMP compare output.

Returns:

The output result. true: voltage on positive side is greater than negative side. false: voltage on positive side is lower than negative side.

static inline void CMP_EnableInterrupt(uint32_t type)

CMP enable interrupt.

Parameters:
  • type – CMP interrupt type. See “_cmp_interrupt_type”.

static inline void CMP_DisableInterrupt(void)

CMP disable interrupt.

static inline void CMP_ClearInterrupt(void)

CMP clear interrupt.

static inline void CMP_EnableFilteredInterruptSource(bool enable)

Select which Analog comparator output (filtered or un-filtered) is used for interrupt detection.

Note

: When CMP is configured as the wakeup source in power down mode, this function must use the raw output as the interupt source, that is, call this function and set parameter enable to false.

Parameters:
  • enable – false: Select Analog Comparator raw output (unfiltered) as input for interrupt detection. true: Select Analog Comparator filtered output as input for interrupt detection.

static inline bool CMP_GetPreviousInterruptStatus(void)

Get CMP interrupt status before interupt enable.

Returns:

Interrupt status. true: interrupt pending, false: no interrupt pending.

static inline bool CMP_GetInterruptStatus(void)

Get CMP interrupt status after interupt enable.

Returns:

Interrupt status. true: interrupt pending, false: no interrupt pending.

static inline void CMP_FilterSampleConfig(cmp_filtercgf_samplemode_t filterSampleMode, cmp_filtercgf_clkdiv_t filterClockDivider)

CMP Filter Sample Config.

This function allows the users to configure the sampling mode and clock divider of the CMP Filter.

Parameters:
  • filterSampleMode – CMP Select filter sample mode

  • filterClockDivider – CMP Set fileter clock divider

FSL_CMP_DRIVER_VERSION

Driver version 2.2.1.

enum _cmp_input_mux

CMP input mux for positive and negative sides.

Values:

enumerator kCMP_InputVREF

Cmp input from VREF.

enumerator kCMP_Input1

Cmp input source 1.

enumerator kCMP_Input2

Cmp input source 2.

enumerator kCMP_Input3

Cmp input source 3.

enumerator kCMP_Input4

Cmp input source 4.

enumerator kCMP_Input5

Cmp input source 5.

enum _cmp_interrupt_type

CMP interrupt type.

Values:

enumerator kCMP_EdgeDisable

Disable edge interupt.

enumerator kCMP_EdgeRising

Interrupt on falling edge.

enumerator kCMP_EdgeFalling

Interrupt on rising edge.

enumerator kCMP_EdgeRisingFalling

Interrupt on both rising and falling edges.

enumerator kCMP_LevelDisable

Disable level interupt.

enumerator kCMP_LevelHigh

Interrupt on high level.

enumerator kCMP_LevelLow

Interrupt on low level.

enum _cmp_vref_source

CMP Voltage Reference source.

Values:

enumerator KCMP_VREFSourceVDDA

Select VDDA as VREF.

enumerator KCMP_VREFSourceInternalVREF

Select internal VREF as VREF.

enum _cmp_filtercgf_samplemode

CMP Filter sample mode.

Values:

enumerator kCMP_FilterSampleMode0

Bypass mode. Filtering is disabled.

enumerator kCMP_FilterSampleMode1

Filter 1 clock period.

enumerator kCMP_FilterSampleMode2

Filter 2 clock period.

enumerator kCMP_FilterSampleMode3

Filter 3 clock period.

enum _cmp_filtercgf_clkdiv

CMP Filter clock divider.

Values:

enumerator kCMP_FilterClockDivide1

Filter clock period duration equals 1 analog comparator clock period.

enumerator kCMP_FilterClockDivide2

Filter clock period duration equals 2 analog comparator clock period.

enumerator kCMP_FilterClockDivide4

Filter clock period duration equals 4 analog comparator clock period.

enumerator kCMP_FilterClockDivide8

Filter clock period duration equals 8 analog comparator clock period.

enumerator kCMP_FilterClockDivide16

Filter clock period duration equals 16 analog comparator clock period.

enumerator kCMP_FilterClockDivide32

Filter clock period duration equals 32 analog comparator clock period.

enumerator kCMP_FilterClockDivide64

Filter clock period duration equals 64 analog comparator clock period.

typedef enum _cmp_vref_source cmp_vref_source_t

CMP Voltage Reference source.

typedef struct _cmp_vref_config cmp_vref_config_t
typedef enum _cmp_filtercgf_samplemode cmp_filtercgf_samplemode_t

CMP Filter sample mode.

typedef enum _cmp_filtercgf_clkdiv cmp_filtercgf_clkdiv_t

CMP Filter clock divider.

typedef struct _cmp_config cmp_config_t

CMP configuration structure.

struct _cmp_vref_config
#include <fsl_cmp.h>

Public Members

cmp_vref_source_t vrefSource

Reference voltage source.

uint8_t vrefValue

Reference voltage step. Available range is 0-31. Per step equals to VREFINPUT/31.

struct _cmp_config
#include <fsl_cmp.h>

CMP configuration structure.

Public Members

bool enableHysteresis

Enable hysteresis.

bool enableLowPower

Enable low power mode.

CRC: Cyclic Redundancy Check Driver

FSL_CRC_DRIVER_VERSION

CRC driver version. Version 2.1.1.

Current version: 2.1.1

Change log:

  • Version 2.0.0

    • initial version

  • Version 2.0.1

    • add explicit type cast when writing to WR_DATA

  • Version 2.0.2

    • Fix MISRA issue

  • Version 2.1.0

    • Add CRC_WriteSeed function

  • Version 2.1.1

    • Fix MISRA issue

enum _crc_polynomial

CRC polynomials to use.

Values:

enumerator kCRC_Polynomial_CRC_CCITT

x^16+x^12+x^5+1

enumerator kCRC_Polynomial_CRC_16

x^16+x^15+x^2+1

enumerator kCRC_Polynomial_CRC_32

x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1

typedef enum _crc_polynomial crc_polynomial_t

CRC polynomials to use.

typedef struct _crc_config crc_config_t

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

void CRC_Init(CRC_Type *base, const crc_config_t *config)

Enables and configures the CRC peripheral module.

This functions enables the CRC peripheral clock in the LPC SYSCON block. It also configures the CRC engine and starts checksum computation by writing the seed.

Parameters:
  • base – CRC peripheral address.

  • config – CRC module configuration structure.

static inline void CRC_Deinit(CRC_Type *base)

Disables the CRC peripheral module.

This functions disables the CRC peripheral clock in the LPC SYSCON block.

Parameters:
  • base – CRC peripheral address.

void CRC_Reset(CRC_Type *base)

resets CRC peripheral module.

Parameters:
  • base – CRC peripheral address.

void CRC_WriteSeed(CRC_Type *base, uint32_t seed)

Write seed to CRC peripheral module.

Parameters:
  • base – CRC peripheral address.

  • seed – CRC Seed value.

void CRC_GetDefaultConfig(crc_config_t *config)

Loads default values to CRC protocol configuration structure.

Loads default values to CRC protocol configuration structure. The default values are:

config->polynomial = kCRC_Polynomial_CRC_CCITT;
config->reverseIn = false;
config->complementIn = false;
config->reverseOut = false;
config->complementOut = false;
config->seed = 0xFFFFU;

Parameters:
  • config – CRC protocol configuration structure

void CRC_GetConfig(CRC_Type *base, crc_config_t *config)

Loads actual values configured in CRC peripheral to CRC protocol configuration structure.

The values, including seed, can be used to resume CRC calculation later.

Parameters:
  • base – CRC peripheral address.

  • config – CRC protocol configuration structure

void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)

Writes data to the CRC module.

Writes input data buffer bytes to CRC data register.

Parameters:
  • base – CRC peripheral address.

  • data – Input data stream, MSByte in data[0].

  • dataSize – Size of the input data buffer in bytes.

static inline uint32_t CRC_Get32bitResult(CRC_Type *base)

Reads 32-bit checksum from the CRC module.

Reads CRC data register.

Parameters:
  • base – CRC peripheral address.

Returns:

final 32-bit checksum, after configured bit reverse and complement operations.

static inline uint16_t CRC_Get16bitResult(CRC_Type *base)

Reads 16-bit checksum from the CRC module.

Reads CRC data register.

Parameters:
  • base – CRC peripheral address.

Returns:

final 16-bit checksum, after configured bit reverse and complement operations.

CRC_DRIVER_USE_CRC16_CCITT_FALSE_AS_DEFAULT

Default configuration structure filled by CRC_GetDefaultConfig(). Uses CRC-16/CCITT-FALSE as default.

struct _crc_config
#include <fsl_crc.h>

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

Public Members

crc_polynomial_t polynomial

CRC polynomial.

bool reverseIn

Reverse bits on input.

bool complementIn

Perform 1’s complement on input.

bool reverseOut

Reverse bits on output.

bool complementOut

Perform 1’s complement on output.

uint32_t seed

Starting checksum value.

CTIMER: Standard counter/timers

void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config)

Ungates the clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application before using the driver.

Parameters:
  • base – Ctimer peripheral base address

  • config – Pointer to the user configuration structure.

void CTIMER_Deinit(CTIMER_Type *base)

Gates the timer clock.

Parameters:
  • base – Ctimer peripheral base address

void CTIMER_GetDefaultConfig(ctimer_config_t *config)

Fills in the timers configuration structure with the default settings.

The default values are:

config->mode = kCTIMER_TimerMode;
config->input = kCTIMER_Capture_0;
config->prescale = 0;

Parameters:
  • config – Pointer to the user configuration structure.

status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint32_t pwmPeriod, uint32_t pulsePeriod, bool enableInt)

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM period

Parameters:
  • base – Ctimer peripheral base address

  • pwmPeriodChannel – Specify the channel to control the PWM period

  • matchChannel – Match pin to be used to output the PWM signal

  • pwmPeriod – PWM period match value

  • pulsePeriod – Pulse width match value

  • enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

Returns:

kStatus_Success on success kStatus_Fail If matchChannel is equal to pwmPeriodChannel; this channel is reserved to set the PWM cycle If PWM pulse width register value is larger than 0xFFFFFFFF.

status_t CTIMER_SetupPwm(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, bool enableInt)

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.

Parameters:
  • base – Ctimer peripheral base address

  • pwmPeriodChannel – Specify the channel to control the PWM period

  • matchChannel – Match pin to be used to output the PWM signal

  • dutyCyclePercent – PWM pulse width; the value should be between 0 to 100

  • pwmFreq_Hz – PWM signal frequency in Hz

  • srcClock_Hz – Timer counter clock in Hz

  • enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)

Updates the pulse period of an active PWM signal.

Parameters:
  • base – Ctimer peripheral base address

  • matchChannel – Match pin to be used to output the PWM signal

  • pulsePeriod – New PWM pulse width match value

status_t CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent)

Updates the duty cycle of an active PWM signal.

Note

Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution. This function can manually assign the specified channel to set the PWM cycle.

Parameters:
  • base – Ctimer peripheral base address

  • pwmPeriodChannel – Specify the channel to control the PWM period

  • matchChannel – Match pin to be used to output the PWM signal

  • dutyCyclePercent – New PWM pulse width; the value should be between 0 to 100

Returns:

kStatus_Success on success kStatus_Fail If PWM pulse width register value is larger than 0xFFFFFFFF.

static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)

Enables the selected Timer interrupts.

Parameters:
  • base – Ctimer peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)

Disables the selected Timer interrupts.

Parameters:
  • base – Ctimer peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)

Gets the enabled Timer interrupts.

Parameters:
  • base – Ctimer peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)

Gets the Timer status flags.

Parameters:
  • base – Ctimer peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)

Clears the Timer status flags.

Parameters:
  • base – Ctimer peripheral base address

  • mask – The status flags to clear. This is a logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_StartTimer(CTIMER_Type *base)

Starts the Timer counter.

Parameters:
  • base – Ctimer peripheral base address

static inline void CTIMER_StopTimer(CTIMER_Type *base)

Stops the Timer counter.

Parameters:
  • base – Ctimer peripheral base address

FSL_CTIMER_DRIVER_VERSION

Version 2.3.3

enum _ctimer_capture_channel

List of Timer capture channels.

Values:

enumerator kCTIMER_Capture_0

Timer capture channel 0

enumerator kCTIMER_Capture_1

Timer capture channel 1

enumerator kCTIMER_Capture_3

Timer capture channel 3

enum _ctimer_capture_edge

List of capture edge options.

Values:

enumerator kCTIMER_Capture_RiseEdge

Capture on rising edge

enumerator kCTIMER_Capture_FallEdge

Capture on falling edge

enumerator kCTIMER_Capture_BothEdge

Capture on rising and falling edge

enum _ctimer_match

List of Timer match registers.

Values:

enumerator kCTIMER_Match_0

Timer match register 0

enumerator kCTIMER_Match_1

Timer match register 1

enumerator kCTIMER_Match_2

Timer match register 2

enumerator kCTIMER_Match_3

Timer match register 3

enum _ctimer_external_match

List of external match.

Values:

enumerator kCTIMER_External_Match_0

External match 0

enumerator kCTIMER_External_Match_1

External match 1

enumerator kCTIMER_External_Match_2

External match 2

enumerator kCTIMER_External_Match_3

External match 3

enum _ctimer_match_output_control

List of output control options.

Values:

enumerator kCTIMER_Output_NoAction

No action is taken

enumerator kCTIMER_Output_Clear

Clear the EM bit/output to 0

enumerator kCTIMER_Output_Set

Set the EM bit/output to 1

enumerator kCTIMER_Output_Toggle

Toggle the EM bit/output

enum _ctimer_timer_mode

List of Timer modes.

Values:

enumerator kCTIMER_TimerMode
enumerator kCTIMER_IncreaseOnRiseEdge
enumerator kCTIMER_IncreaseOnFallEdge
enumerator kCTIMER_IncreaseOnBothEdge
enum _ctimer_interrupt_enable

List of Timer interrupts.

Values:

enumerator kCTIMER_Match0InterruptEnable

Match 0 interrupt

enumerator kCTIMER_Match1InterruptEnable

Match 1 interrupt

enumerator kCTIMER_Match2InterruptEnable

Match 2 interrupt

enumerator kCTIMER_Match3InterruptEnable

Match 3 interrupt

enum _ctimer_status_flags

List of Timer flags.

Values:

enumerator kCTIMER_Match0Flag

Match 0 interrupt flag

enumerator kCTIMER_Match1Flag

Match 1 interrupt flag

enumerator kCTIMER_Match2Flag

Match 2 interrupt flag

enumerator kCTIMER_Match3Flag

Match 3 interrupt flag

enum ctimer_callback_type_t

Callback type when registering for a callback. When registering a callback an array of function pointers is passed the size could be 1 or 8, the callback type will tell that.

Values:

enumerator kCTIMER_SingleCallback

Single Callback type where there is only one callback for the timer. based on the status flags different channels needs to be handled differently

enumerator kCTIMER_MultipleCallback

Multiple Callback type where there can be 8 valid callbacks, one per channel. for both match/capture

typedef enum _ctimer_capture_channel ctimer_capture_channel_t

List of Timer capture channels.

typedef enum _ctimer_capture_edge ctimer_capture_edge_t

List of capture edge options.

typedef enum _ctimer_match ctimer_match_t

List of Timer match registers.

typedef enum _ctimer_external_match ctimer_external_match_t

List of external match.

typedef enum _ctimer_match_output_control ctimer_match_output_control_t

List of output control options.

typedef enum _ctimer_timer_mode ctimer_timer_mode_t

List of Timer modes.

typedef enum _ctimer_interrupt_enable ctimer_interrupt_enable_t

List of Timer interrupts.

typedef enum _ctimer_status_flags ctimer_status_flags_t

List of Timer flags.

typedef void (*ctimer_callback_t)(uint32_t flags)
typedef struct _ctimer_match_config ctimer_match_config_t

Match configuration.

This structure holds the configuration settings for each match register.

typedef struct _ctimer_config ctimer_config_t

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config)

Setup the match register.

User configuration is used to setup the match value and action to be taken when a match occurs.

Parameters:
  • base – Ctimer peripheral base address

  • matchChannel – Match register to configure

  • config – Pointer to the match configuration structure

uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel)

Get the status of output match.

This function gets the status of output MAT, whether or not this output is connected to a pin. This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.

Parameters:
  • base – Ctimer peripheral base address

  • matchChannel – External match channel, user can obtain the status of multiple match channels at the same time by using the logic of “|” enumeration ctimer_external_match_t

Returns:

The mask of external match channel status flags. Users need to use the _ctimer_external_match type to decode the return variables.

void CTIMER_SetupCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, ctimer_capture_edge_t edge, bool enableInt)

Setup the capture.

Parameters:
  • base – Ctimer peripheral base address

  • capture – Capture channel to configure

  • edge – Edge on the channel that will trigger a capture

  • enableInt – Flag to enable channel interrupts, if enabled then the registered call back is called upon capture

static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)

Get the timer count value from TC register.

Parameters:
  • base – Ctimer peripheral base address.

Returns:

return the timer count value.

void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type)

Register callback.

Parameters:
  • base – Ctimer peripheral base address

  • cb_func – callback function

  • cb_type – callback function type, singular or multiple

static inline void CTIMER_Reset(CTIMER_Type *base)

Reset the counter.

The timer counter and prescale counter are reset on the next positive edge of the APB clock.

Parameters:
  • base – Ctimer peripheral base address

static inline void CTIMER_SetPrescale(CTIMER_Type *base, uint32_t prescale)

Setup the timer prescale value.

Specifies the maximum value for the Prescale Counter.

Parameters:
  • base – Ctimer peripheral base address

  • prescale – Prescale value

static inline uint32_t CTIMER_GetCaptureValue(CTIMER_Type *base, ctimer_capture_channel_t capture)

Get capture channel value.

Get the counter/timer value on the corresponding capture channel.

Parameters:
  • base – Ctimer peripheral base address

  • capture – Select capture channel

Returns:

The timer count capture value.

static inline void CTIMER_EnableResetMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable reset match channel.

Set the specified match channel reset operation.

Parameters:
  • base – Ctimer peripheral base address

  • match – match channel used

  • enable – Enable match channel reset operation.

static inline void CTIMER_EnableStopMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable stop match channel.

Set the specified match channel stop operation.

Parameters:
  • base – Ctimer peripheral base address.

  • match – match channel used.

  • enable – Enable match channel stop operation.

static inline void CTIMER_EnableMatchChannelReload(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable reload channel falling edge.

Enable the specified match channel reload match shadow value.

Parameters:
  • base – Ctimer peripheral base address.

  • match – match channel used.

  • enable – Enable .

static inline void CTIMER_EnableRisingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)

Enable capture channel rising edge.

Sets the specified capture channel for rising edge capture.

Parameters:
  • base – Ctimer peripheral base address.

  • capture – capture channel used.

  • enable – Enable rising edge capture.

static inline void CTIMER_EnableFallingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)

Enable capture channel falling edge.

Sets the specified capture channel for falling edge capture.

Parameters:
  • base – Ctimer peripheral base address.

  • capture – capture channel used.

  • enable – Enable falling edge capture.

static inline void CTIMER_SetShadowValue(CTIMER_Type *base, ctimer_match_t match, uint32_t matchvalue)

Set the specified match shadow channel.

Parameters:
  • base – Ctimer peripheral base address.

  • match – match channel used.

  • matchvalue – Reload the value of the corresponding match register.

struct _ctimer_match_config
#include <fsl_ctimer.h>

Match configuration.

This structure holds the configuration settings for each match register.

Public Members

uint32_t matchValue

This is stored in the match register

bool enableCounterReset

true: Match will reset the counter false: Match will not reser the counter

bool enableCounterStop

true: Match will stop the counter false: Match will not stop the counter

ctimer_match_output_control_t outControl

Action to be taken on a match on the EM bit/output

bool outPinInitState

Initial value of the EM bit/output

bool enableInterrupt

true: Generate interrupt upon match false: Do not generate interrupt on match

struct _ctimer_config
#include <fsl_ctimer.h>

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Public Members

ctimer_timer_mode_t mode

Timer mode

ctimer_capture_channel_t input

Input channel to increment the timer, used only in timer modes that rely on this input signal to increment TC

uint32_t prescale

Prescale value

DMA: Direct Memory Access Controller Driver

void DMA_Init(DMA_Type *base)

Initializes DMA peripheral.

This function enable the DMA clock, set descriptor table and enable DMA peripheral.

Parameters:
  • base – DMA peripheral base address.

void DMA_Deinit(DMA_Type *base)

Deinitializes DMA peripheral.

This function gates the DMA clock.

Parameters:
  • base – DMA peripheral base address.

void DMA_InstallDescriptorMemory(DMA_Type *base, void *addr)

Install DMA descriptor memory.

This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, althrough current DMA driver has a default DMA descriptor buffer, but it support one DMA descriptor for one channel only.

Parameters:
  • base – DMA base address.

  • addr – DMA descriptor address

static inline bool DMA_ChannelIsActive(DMA_Type *base, uint32_t channel)

Return whether DMA channel is processing transfer.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

Returns:

True for active state, false otherwise.

static inline bool DMA_ChannelIsBusy(DMA_Type *base, uint32_t channel)

Return whether DMA channel is busy.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

Returns:

True for busy state, false otherwise.

static inline void DMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel)

Enables the interrupt source for the DMA transfer.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

static inline void DMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel)

Disables the interrupt source for the DMA transfer.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

static inline void DMA_EnableChannel(DMA_Type *base, uint32_t channel)

Enable DMA channel.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

static inline void DMA_DisableChannel(DMA_Type *base, uint32_t channel)

Disable DMA channel.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

static inline void DMA_EnableChannelPeriphRq(DMA_Type *base, uint32_t channel)

Set PERIPHREQEN of channel configuration register.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

static inline void DMA_DisableChannelPeriphRq(DMA_Type *base, uint32_t channel)

Get PERIPHREQEN value of channel configuration register.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

Returns:

True for enabled PeriphRq, false for disabled.

void DMA_ConfigureChannelTrigger(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger)

Set trigger settings of DMA channel.

Deprecated:

Do not use this function. It has been superceded by DMA_SetChannelConfig.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

  • trigger – trigger configuration.

void DMA_SetChannelConfig(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger, bool isPeriph)

set channel config.

This function provide a interface to configure channel configuration reisters.

Parameters:
  • base – DMA base address.

  • channel – DMA channel number.

  • trigger – channel configurations structure.

  • isPeriph – true is periph request, false is not.

static inline uint32_t DMA_SetChannelXferConfig(bool reload, bool clrTrig, bool intA, bool intB, uint8_t width, uint8_t srcInc, uint8_t dstInc, uint32_t bytes)

DMA channel xfer transfer configurations.

Parameters:
  • reload – true is reload link descriptor after current exhaust, false is not

  • clrTrig – true is clear trigger status, wait software trigger, false is not

  • intA – enable interruptA

  • intB – enable interruptB

  • width – transfer width

  • srcInc – source address interleave size

  • dstInc – destination address interleave size

  • bytes – transfer bytes

Returns:

The vaule of xfer config

uint32_t DMA_GetRemainingBytes(DMA_Type *base, uint32_t channel)

Gets the remaining bytes of the current DMA descriptor transfer.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

Returns:

The number of bytes which have not been transferred yet.

static inline void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority)

Set priority of channel configuration register.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

  • priority – Channel priority value.

static inline dma_priority_t DMA_GetChannelPriority(DMA_Type *base, uint32_t channel)

Get priority of channel configuration register.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

Returns:

Channel priority value.

static inline void DMA_SetChannelConfigValid(DMA_Type *base, uint32_t channel)

Set channel configuration valid.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

static inline void DMA_DoChannelSoftwareTrigger(DMA_Type *base, uint32_t channel)

Do software trigger for the channel.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

static inline void DMA_LoadChannelTransferConfig(DMA_Type *base, uint32_t channel, uint32_t xfer)

Load channel transfer configurations.

Parameters:
  • base – DMA peripheral base address.

  • channel – DMA channel number.

  • xfer – transfer configurations.

void DMA_CreateDescriptor(dma_descriptor_t *desc, dma_xfercfg_t *xfercfg, void *srcAddr, void *dstAddr, void *nextDesc)

Create application specific DMA descriptor to be used in a chain in transfer.

Deprecated:

Do not use this function. It has been superceded by DMA_SetupDescriptor.

Parameters:
  • desc – DMA descriptor address.

  • xfercfg – Transfer configuration for DMA descriptor.

  • srcAddr – Address of last item to transmit

  • dstAddr – Address of last item to receive.

  • nextDesc – Address of next descriptor in chain.

void DMA_SetupDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)

setup dma descriptor

Note: This function do not support configure wrap descriptor.

Parameters:
  • desc – DMA descriptor address.

  • xfercfg – Transfer configuration for DMA descriptor.

  • srcStartAddr – Start address of source address.

  • dstStartAddr – Start address of destination address.

  • nextDesc – Address of next descriptor in chain.

void DMA_SetupChannelDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc, dma_burst_wrap_t wrapType, uint32_t burstSize)

setup dma channel descriptor

Note: This function support configure wrap descriptor.

Parameters:
  • desc – DMA descriptor address.

  • xfercfg – Transfer configuration for DMA descriptor.

  • srcStartAddr – Start address of source address.

  • dstStartAddr – Start address of destination address.

  • nextDesc – Address of next descriptor in chain.

  • wrapType – burst wrap type.

  • burstSize – burst size, reference _dma_burst_size.

void DMA_LoadChannelDescriptor(DMA_Type *base, uint32_t channel, dma_descriptor_t *descriptor)

load channel transfer decriptor.

This function can be used to load desscriptor to driver internal channel descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

  1. for the polling transfer, application can allocate a local descriptor memory table to prepare a descriptor firstly and then call this api to load the configured descriptor to driver descriptor table.

    DMA_Init(DMA0);
    DMA_EnableChannel(DMA0, DEMO_DMA_CHANNEL);
    DMA_SetupDescriptor(desc, xferCfg, s_srcBuffer, &s_destBuffer[0], NULL);
    DMA_LoadChannelDescriptor(DMA0, DEMO_DMA_CHANNEL, (dma_descriptor_t *)desc);
    DMA_DoChannelSoftwareTrigger(DMA0, DEMO_DMA_CHANNEL);
    while(DMA_ChannelIsBusy(DMA0, DEMO_DMA_CHANNEL))
    {}
    

Parameters:
  • base – DMA base address.

  • channel – DMA channel.

  • descriptor – configured DMA descriptor.

void DMA_AbortTransfer(dma_handle_t *handle)

Abort running transfer by handle.

This function aborts DMA transfer specified by handle.

Parameters:
  • handle – DMA handle pointer.

void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel)

Creates the DMA handle.

This function is called if using transaction API for DMA. This function initializes the internal state of DMA handle.

Parameters:
  • handle – DMA handle pointer. The DMA handle stores callback function and parameters.

  • base – DMA peripheral base address.

  • channel – DMA channel number.

void DMA_SetCallback(dma_handle_t *handle, dma_callback callback, void *userData)

Installs a callback function for the DMA transfer.

This callback is called in DMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:
  • handle – DMA handle pointer.

  • callback – DMA callback function pointer.

  • userData – Parameter for callback function.

void DMA_PrepareTransfer(dma_transfer_config_t *config, void *srcAddr, void *dstAddr, uint32_t byteWidth, uint32_t transferBytes, dma_transfer_type_t type, void *nextDesc)

Prepares the DMA transfer structure.

Deprecated:

Do not use this function. It has been superceded by DMA_PrepareChannelTransfer. This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, so the source address must be 4 bytes aligned, or it shall result in source address error(SAE).

Parameters:
  • config – The user configuration structure of type dma_transfer_t.

  • srcAddr – DMA transfer source address.

  • dstAddr – DMA transfer destination address.

  • byteWidth – DMA transfer destination address width(bytes).

  • transferBytes – DMA transfer bytes to be transferred.

  • type – DMA transfer type.

  • nextDesc – Chain custom descriptor to transfer.

void DMA_PrepareChannelTransfer(dma_channel_config_t *config, void *srcStartAddr, void *dstStartAddr, uint32_t xferCfg, dma_transfer_type_t type, dma_channel_trigger_t *trigger, void *nextDesc)

Prepare channel transfer configurations.

This function used to prepare channel transfer configurations.

Parameters:
  • config – Pointer to DMA channel transfer configuration structure.

  • srcStartAddr – source start address.

  • dstStartAddr – destination start address.

  • xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.

  • type – transfer type.

  • trigger – DMA channel trigger configurations.

  • nextDesc – address of next descriptor.

status_t DMA_SubmitTransfer(dma_handle_t *handle, dma_transfer_config_t *config)

Submits the DMA transfer request.

Deprecated:

Do not use this function. It has been superceded by DMA_SubmitChannelTransfer.

This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.

Parameters:
  • handle – DMA handle pointer.

  • config – Pointer to DMA transfer configuration structure.

Return values:
  • kStatus_DMA_Success – It means submit transfer request succeed.

  • kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.

  • kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_SubmitChannelTransferParameter(dma_handle_t *handle, uint32_t xferCfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)

Submit channel transfer paramter directly.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

  1. for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

       DMA_SetChannelConfig(base, channel, trigger, isPeriph);
       DMA_CreateHandle(handle, base, channel)
       DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
    bytes), srcStartAddr, dstStartAddr, NULL);
       DMA_StartTransfer(handle)
    

  2. for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

       define link descriptor table in application with macro
       DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[3]);
    
       DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, nextDesc1);
       DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, nextDesc2);
       DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, NULL);
       DMA_SetChannelConfig(base, channel, trigger, isPeriph);
       DMA_CreateHandle(handle, base, channel)
       DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
    bytes), srcStartAddr, dstStartAddr, nextDesc0);
       DMA_StartTransfer(handle);
    

Parameters:
  • handle – Pointer to DMA handle.

  • xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.

  • srcStartAddr – source start address.

  • dstStartAddr – destination start address.

  • nextDesc – address of next descriptor.

void DMA_SubmitChannelDescriptor(dma_handle_t *handle, dma_descriptor_t *descriptor)

Submit channel descriptor.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, this functiono is typical for the ping pong case:

  1. for the ping pong case, application should responsible for the descriptor, for example, application should prepare two descriptor table with macro.

       define link descriptor table in application with macro
       DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[2]);
    
       DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, nextDesc1);
       DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, nextDesc0);
       DMA_SetChannelConfig(base, channel, trigger, isPeriph);
       DMA_CreateHandle(handle, base, channel)
       DMA_SubmitChannelDescriptor(handle,  nextDesc0);
       DMA_StartTransfer(handle);
    

Parameters:
  • handle – Pointer to DMA handle.

  • descriptor – descriptor to submit.

status_t DMA_SubmitChannelTransfer(dma_handle_t *handle, dma_channel_config_t *config)

Submits the DMA channel transfer request.

This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time. It is used for the case:

  1. for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

    DMA_CreateHandle(handle, base, channel)
    DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,NULL);
    DMA_SubmitChannelTransfer(handle, config)
    DMA_StartTransfer(handle)
    

  2. for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

       define link descriptor table in application with macro
       DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);
       DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, nextDesc1);
       DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, nextDesc2);
       DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, NULL);
       DMA_CreateHandle(handle, base, channel)
       DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
       DMA_SubmitChannelTransfer(handle, config)
       DMA_StartTransfer(handle)
    

  3. for the ping pong case, application should responsible for link descriptor, for example, application should prepare two descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

       define link descriptor table in application with macro
       DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);
    
       DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, nextDesc1);
       DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
    srcStartAddr, dstStartAddr, nextDesc0);
       DMA_CreateHandle(handle, base, channel)
       DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
       DMA_SubmitChannelTransfer(handle, config)
       DMA_StartTransfer(handle)
    

Parameters:
  • handle – DMA handle pointer.

  • config – Pointer to DMA transfer configuration structure.

Return values:
  • kStatus_DMA_Success – It means submit transfer request succeed.

  • kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.

  • kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_StartTransfer(dma_handle_t *handle)

DMA start transfer.

This function enables the channel request. User can call this function after submitting the transfer request It will trigger transfer start with software trigger only when hardware trigger is not used.

Parameters:
  • handle – DMA handle pointer.

void DMA_IRQHandle(DMA_Type *base)

DMA IRQ handler for descriptor transfer complete.

This function clears the channel major interrupt flag and call the callback function if it is not NULL.

Parameters:
  • base – DMA base address.

FSL_DMA_DRIVER_VERSION

DMA driver version.

Version 2.5.3.

_dma_transfer_status DMA transfer status

Values:

enumerator kStatus_DMA_Busy

Channel is busy and can’t handle the transfer request.

_dma_addr_interleave_size dma address interleave size

Values:

enumerator kDMA_AddressInterleave0xWidth

dma source/destination address no interleave

enumerator kDMA_AddressInterleave1xWidth

dma source/destination address interleave 1xwidth

enumerator kDMA_AddressInterleave2xWidth

dma source/destination address interleave 2xwidth

enumerator kDMA_AddressInterleave4xWidth

dma source/destination address interleave 3xwidth

_dma_transfer_width dma transfer width

Values:

enumerator kDMA_Transfer8BitWidth

dma channel transfer bit width is 8 bit

enumerator kDMA_Transfer16BitWidth

dma channel transfer bit width is 16 bit

enumerator kDMA_Transfer32BitWidth

dma channel transfer bit width is 32 bit

enum _dma_priority

DMA channel priority.

Values:

enumerator kDMA_ChannelPriority0

Highest channel priority - priority 0

enumerator kDMA_ChannelPriority1

Channel priority 1

enumerator kDMA_ChannelPriority2

Channel priority 2

enumerator kDMA_ChannelPriority3

Channel priority 3

enumerator kDMA_ChannelPriority4

Channel priority 4

enumerator kDMA_ChannelPriority5

Channel priority 5

enumerator kDMA_ChannelPriority6

Channel priority 6

enumerator kDMA_ChannelPriority7

Lowest channel priority - priority 7

enum _dma_int

DMA interrupt flags.

Values:

enumerator kDMA_IntA

DMA interrupt flag A

enumerator kDMA_IntB

DMA interrupt flag B

enumerator kDMA_IntError

DMA interrupt flag error

enum _dma_trigger_type

DMA trigger type.

Values:

enumerator kDMA_NoTrigger

Trigger is disabled

enumerator kDMA_LowLevelTrigger

Low level active trigger

enumerator kDMA_HighLevelTrigger

High level active trigger

enumerator kDMA_FallingEdgeTrigger

Falling edge active trigger

enumerator kDMA_RisingEdgeTrigger

Rising edge active trigger

_dma_burst_size DMA burst size

Values:

enumerator kDMA_BurstSize1

burst size 1 transfer

enumerator kDMA_BurstSize2

burst size 2 transfer

enumerator kDMA_BurstSize4

burst size 4 transfer

enumerator kDMA_BurstSize8

burst size 8 transfer

enumerator kDMA_BurstSize16

burst size 16 transfer

enumerator kDMA_BurstSize32

burst size 32 transfer

enumerator kDMA_BurstSize64

burst size 64 transfer

enumerator kDMA_BurstSize128

burst size 128 transfer

enumerator kDMA_BurstSize256

burst size 256 transfer

enumerator kDMA_BurstSize512

burst size 512 transfer

enumerator kDMA_BurstSize1024

burst size 1024 transfer

enum _dma_trigger_burst

DMA trigger burst.

Values:

enumerator kDMA_SingleTransfer

Single transfer

enumerator kDMA_LevelBurstTransfer

Burst transfer driven by level trigger

enumerator kDMA_EdgeBurstTransfer1

Perform 1 transfer by edge trigger

enumerator kDMA_EdgeBurstTransfer2

Perform 2 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer4

Perform 4 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer8

Perform 8 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer16

Perform 16 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer32

Perform 32 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer64

Perform 64 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer128

Perform 128 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer256

Perform 256 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer512

Perform 512 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer1024

Perform 1024 transfers by edge trigger

enum _dma_burst_wrap

DMA burst wrapping.

Values:

enumerator kDMA_NoWrap

Wrapping is disabled

enumerator kDMA_SrcWrap

Wrapping is enabled for source

enumerator kDMA_DstWrap

Wrapping is enabled for destination

enumerator kDMA_SrcAndDstWrap

Wrapping is enabled for source and destination

enum _dma_transfer_type

DMA transfer type.

Values:

enumerator kDMA_MemoryToMemory

Transfer from memory to memory (increment source and destination)

enumerator kDMA_PeripheralToMemory

Transfer from peripheral to memory (increment only destination)

enumerator kDMA_MemoryToPeripheral

Transfer from memory to peripheral (increment only source)

enumerator kDMA_StaticToStatic

Peripheral to static memory (do not increment source or destination)

typedef struct _dma_descriptor dma_descriptor_t

DMA descriptor structure.

typedef struct _dma_xfercfg dma_xfercfg_t

DMA transfer configuration.

typedef enum _dma_priority dma_priority_t

DMA channel priority.

typedef enum _dma_int dma_irq_t

DMA interrupt flags.

typedef enum _dma_trigger_type dma_trigger_type_t

DMA trigger type.

typedef enum _dma_trigger_burst dma_trigger_burst_t

DMA trigger burst.

typedef enum _dma_burst_wrap dma_burst_wrap_t

DMA burst wrapping.

typedef enum _dma_transfer_type dma_transfer_type_t

DMA transfer type.

typedef struct _dma_channel_trigger dma_channel_trigger_t

DMA channel trigger.

typedef struct _dma_channel_config dma_channel_config_t

DMA channel trigger.

typedef struct _dma_transfer_config dma_transfer_config_t

DMA transfer configuration.

typedef void (*dma_callback)(struct _dma_handle *handle, void *userData, bool transferDone, uint32_t intmode)

Define Callback function for DMA.

typedef struct _dma_handle dma_handle_t

DMA transfer handle structure.

DMA_MAX_TRANSFER_COUNT

DMA max transfer size.

FSL_FEATURE_DMA_NUMBER_OF_CHANNELSn(x)

DMA channel numbers.

FSL_FEATURE_DMA_MAX_CHANNELS
FSL_FEATURE_DMA_ALL_CHANNELS
FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE

DMA head link descriptor table align size.

DMA_ALLOCATE_HEAD_DESCRIPTORS(name, number)

DMA head descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:
  • name – Allocate decriptor name.

  • number – Number of descriptor to be allocated.

DMA_ALLOCATE_HEAD_DESCRIPTORS_AT_NONCACHEABLE(name, number)

DMA head descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:
  • name – Allocate decriptor name.

  • number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS(name, number)

DMA link descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:
  • name – Allocate decriptor name.

  • number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS_AT_NONCACHEABLE(name, number)

DMA link descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:
  • name – Allocate decriptor name.

  • number – Number of descriptor to be allocated.

DMA_ALLOCATE_DATA_TRANSFER_BUFFER(name, width)

DMA transfer buffer address need to align with the transfer width.

DMA_CHANNEL_GROUP(channel)
DMA_CHANNEL_INDEX(base, channel)
DMA_COMMON_REG_GET(base, channel, reg)

DMA linked descriptor address algin size.

DMA_COMMON_CONST_REG_GET(base, channel, reg)
DMA_COMMON_REG_SET(base, channel, reg, value)
DMA_DESCRIPTOR_END_ADDRESS(start, inc, bytes, width)

DMA descriptor end address calculate.

Parameters:
  • start – start address

  • inc – address interleave size

  • bytes – transfer bytes

  • width – transfer width

DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes)
struct _dma_descriptor
#include <fsl_dma.h>

DMA descriptor structure.

Public Members

volatile uint32_t xfercfg

Transfer configuration

void *srcEndAddr

Last source address of DMA transfer

void *dstEndAddr

Last destination address of DMA transfer

void *linkToNextDesc

Address of next DMA descriptor in chain

struct _dma_xfercfg
#include <fsl_dma.h>

DMA transfer configuration.

Public Members

bool valid

Descriptor is ready to transfer

bool reload

Reload channel configuration register after current descriptor is exhausted

bool swtrig

Perform software trigger. Transfer if fired when ‘valid’ is set

bool clrtrig

Clear trigger

bool intA

Raises IRQ when transfer is done and set IRQA status register flag

bool intB

Raises IRQ when transfer is done and set IRQB status register flag

uint8_t byteWidth

Byte width of data to transfer

uint8_t srcInc

Increment source address by ‘srcInc’ x ‘byteWidth’

uint8_t dstInc

Increment destination address by ‘dstInc’ x ‘byteWidth’

uint16_t transferCount

Number of transfers

struct _dma_channel_trigger
#include <fsl_dma.h>

DMA channel trigger.

Public Members

dma_trigger_type_t type

Select hardware trigger as edge triggered or level triggered.

dma_trigger_burst_t burst

Select whether hardware triggers cause a single or burst transfer.

dma_burst_wrap_t wrap

Select wrap type, source wrap or dest wrap, or both.

struct _dma_channel_config
#include <fsl_dma.h>

DMA channel trigger.

Public Members

void *srcStartAddr

Source data address

void *dstStartAddr

Destination data address

void *nextDesc

Chain custom descriptor

uint32_t xferCfg

channel transfer configurations

dma_channel_trigger_t *trigger

DMA trigger type

bool isPeriph

select the request type

struct _dma_transfer_config
#include <fsl_dma.h>

DMA transfer configuration.

Public Members

uint8_t *srcAddr

Source data address

uint8_t *dstAddr

Destination data address

uint8_t *nextDesc

Chain custom descriptor

dma_xfercfg_t xfercfg

Transfer options

bool isPeriph

DMA transfer is driven by peripheral

struct _dma_handle
#include <fsl_dma.h>

DMA transfer handle structure.

Public Members

dma_callback callback

Callback function. Invoked when transfer of descriptor with interrupt flag finishes

void *userData

Callback function parameter

DMA_Type *base

DMA peripheral base address

uint8_t channel

DMA channel number

IAP: In Application Programming Driver

enum _flash_driver_version_constants

Flash driver version for ROM.

Values:

enumerator kFLASH_DriverVersionName

Flash driver version name.

enumerator kFLASH_DriverVersionMajor

Major flash driver version.

enumerator kFLASH_DriverVersionMinor

Minor flash driver version.

enumerator kFLASH_DriverVersionBugfix

Bugfix for flash driver version.

MAKE_VERSION(major, minor, bugfix)

Constructs the version number for drivers.

FSL_FLASH_DRIVER_VERSION

Flash driver version for SDK.

Version 2.1.5.

enum _flash_status

Flash driver status codes.

Values:

enumerator kStatus_FLASH_Success

API is executed successfully

enumerator kStatus_FLASH_InvalidArgument

Invalid argument

enumerator kStatus_FLASH_SizeError

Error size

enumerator kStatus_FLASH_AlignmentError

Parameter is not aligned with the specified baseline

enumerator kStatus_FLASH_AddressError

Address is out of range

enumerator kStatus_FLASH_AccessError

Invalid instruction codes and out-of bound addresses

enumerator kStatus_FLASH_ProtectionViolation

The program/erase operation is requested to execute on protected areas

enumerator kStatus_FLASH_CommandFailure

Run-time error during command execution.

enumerator kStatus_FLASH_UnknownProperty

Unknown property.

enumerator kStatus_FLASH_EraseKeyError

API erase key is invalid.

enumerator kStatus_FLASH_RegionExecuteOnly

The current region is execute-only.

enumerator kStatus_FLASH_ExecuteInRamFunctionNotReady

Execute-in-RAM function is not available.

enumerator kStatus_FLASH_CommandNotSupported

Flash API is not supported.

enumerator kStatus_FLASH_ReadOnlyProperty

The flash property is read-only.

enumerator kStatus_FLASH_InvalidPropertyValue

The flash property value is out of range.

enumerator kStatus_FLASH_InvalidSpeculationOption

The option of flash prefetch speculation is invalid.

enumerator kStatus_FLASH_EccError

A correctable or uncorrectable error during command execution.

enumerator kStatus_FLASH_CompareError

Destination and source memory contents do not match.

enumerator kStatus_FLASH_RegulationLoss

A loss of regulation during read.

enumerator kStatus_FLASH_InvalidWaitStateCycles

The wait state cycle set to r/w mode is invalid.

enumerator kStatus_FLASH_OutOfDateCfpaPage

CFPA page version is out of date.

enumerator kStatus_FLASH_BlankIfrPageData

Blank page cannnot be read.

enumerator kStatus_FLASH_EncryptedRegionsEraseNotDoneAtOnce

Encrypted flash subregions are not erased at once.

enumerator kStatus_FLASH_ProgramVerificationNotAllowed

Program verification is not allowed when the encryption is enabled.

enumerator kStatus_FLASH_HashCheckError

Hash check of page data is failed.

enumerator kStatus_FLASH_SealedFfrRegion

The FFR region is sealed.

enumerator kStatus_FLASH_FfrRegionWriteBroken

The FFR Spec region is not allowed to be written discontinuously.

enumerator kStatus_FLASH_NmpaAccessNotAllowed

The NMPA region is not allowed to be read/written/erased.

enumerator kStatus_FLASH_CmpaCfgDirectEraseNotAllowed

The CMPA Cfg region is not allowed to be erased directly.

enumerator kStatus_FLASH_FfrBankIsLocked

The FFR bank region is locked.

enumerator kStatus_FLASH_EraseFrequencyError

Core frequency is over 100MHZ.

enumerator kStatus_FLASH_ProgramFrequencyError

Core frequency is over 100MHZ.

kStatusGroupGeneric

Flash driver status group.

kStatusGroupFlashDriver
MAKE_STATUS(group, code)

Constructs a status code value from a group and a code number.

enum _flash_driver_api_keys

Enumeration for Flash driver API keys.

Note

The resulting value is built with a byte order such that the string being readable in expected order when viewed in a hex editor, if the value is treated as a 32-bit little endian value.

Values:

enumerator kFLASH_ApiEraseKey

Key value used to validate all flash erase APIs.

FOUR_CHAR_CODE(a, b, c, d)

Constructs the four character code for the Flash driver API key.

status_t FLASH_Init(flash_config_t *config)

Initializes the global flash properties structure members.

This function checks and initializes the Flash module for the other Flash APIs.

Parameters:
  • config – Pointer to the storage for the driver runtime state.

Return values:
  • kStatus_FLASH_Success – API was executed successfully.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandNotSupported – Flash API is not supported.

  • kStatus_FLASH_EccError – A correctable or uncorrectable error during command execution.

status_t FLASH_Erase(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, uint32_t key)

Erases the flash sectors encompassed by parameters passed into function.

This function erases the appropriate number of flash sectors based on the desired start address and length.

Parameters:
  • config – The pointer to the storage for the driver runtime state.

  • start – The start address of the desired flash memory to be erased. The start address need to be 512bytes-aligned.

  • lengthInBytes – The length, given in bytes (not words or long-words) to be erased. Must be 512bytes-aligned.

  • key – The value used to validate all flash erase APIs.

Return values:
  • kStatus_FLASH_Success – API was executed successfully; the appropriate number of flash sectors based on the desired start address and length were erased successfully.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FLASH_AlignmentError – The parameter is not aligned with the specified baseline.

  • kStatus_FLASH_AddressError – The address is out of range.

  • kStatus_FLASH_EraseKeyError – The API erase key is invalid.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandNotSupported – Flash API is not supported.

  • kStatus_FLASH_EccError – A correctable or uncorrectable error during command execution.

status_t FLASH_Program(flash_config_t *config, uint32_t start, const uint8_t *src, uint32_t lengthInBytes)

Programs flash with data at locations passed in through parameters.

This function programs the flash memory with the desired data for a given flash area as determined by the start address and the length.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • start – The start address of the desired flash memory to be programmed. Must be 512bytes-aligned.

  • src – A pointer to the source buffer of data that is to be programmed into the flash.

  • lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be 512bytes-aligned.

Return values:
  • kStatus_FLASH_Success – API was executed successfully; the desired data were programed successfully into flash based on desired start address and length.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FLASH_AlignmentError – Parameter is not aligned with the specified baseline.

  • kStatus_FLASH_AddressError – Address is out of range.

  • kStatus_FLASH_AccessError – Invalid instruction codes and out-of bounds addresses.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandNotSupported – Flash API is not supported.

  • kStatus_FLASH_EccError – A correctable or uncorrectable error during command execution.

status_t FLASH_VerifyErase(flash_config_t *config, uint32_t start, uint32_t lengthInBytes)

Verifies an erasure of the desired flash area at a specified margin level.

This function checks the appropriate number of flash sectors based on the desired start address and length to check whether the flash is erased to the specified read margin level.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • start – The start address of the desired flash memory to be verified. The start address need to be 512bytes-aligned.

  • lengthInBytes – The length, given in bytes (not words or long-words), to be verified. Must be 512bytes-aligned.

Return values:
  • kStatus_FLASH_Success – API was executed successfully; the specified FLASH region has been erased.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FLASH_AlignmentError – Parameter is not aligned with specified baseline.

  • kStatus_FLASH_AddressError – Address is out of range.

  • kStatus_FLASH_AccessError – Invalid instruction codes and out-of bounds addresses.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandNotSupported – Flash API is not supported.

  • kStatus_FLASH_EccError – A correctable or uncorrectable error during command execution.

status_t FLASH_VerifyProgram(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, const uint8_t *expectedData, uint32_t *failedAddress, uint32_t *failedData)

Verifies programming of the desired flash area at a specified margin level.

This function verifies the data programed in the flash memory using the Flash Program Check Command and compares it to the expected data for a given flash area as determined by the start address and length.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • start – The start address of the desired flash memory to be verified. need be 512bytes-aligned.

  • lengthInBytes – The length, given in bytes (not words or long-words), to be verified. need be 512bytes-aligned.

  • expectedData – A pointer to the expected data that is to be verified against.

  • failedAddress – A pointer to the returned failing address.

  • failedData – A pointer to the returned failing data. Some derivatives do not include failed data as part of the FCCOBx registers. In this case, zeros are returned upon failure.

Return values:
  • kStatus_FLASH_Success – API was executed successfully; the desired data have been successfully programed into specified FLASH region.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FLASH_AlignmentError – Parameter is not aligned with specified baseline.

  • kStatus_FLASH_AddressError – Address is out of range.

  • kStatus_FLASH_AccessError – Invalid instruction codes and out-of bounds addresses.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandNotSupported – Flash API is not supported.

  • kStatus_FLASH_EccError – A correctable or uncorrectable error during command execution.

status_t FLASH_GetProperty(flash_config_t *config, flash_property_tag_t whichProperty, uint32_t *value)

Returns the desired flash property.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • whichProperty – The desired property from the list of properties in enum flash_property_tag_t

  • value – A pointer to the value returned for the desired flash property.

Return values:
  • kStatus_FLASH_Success – API was executed successfully; the flash property was stored to value.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FLASH_UnknownProperty – An unknown property tag.

void BOOTLOADER_UserEntry(void *arg)

Run the Bootloader API to force into the ISP mode base on the user arg.

Parameters:
  • arg – Indicates API prototype fields definition. Refer to the above user_app_boot_invoke_option_t structure

FSL_FEATURE_FLASH_IP_IS_C040HD_ATFC

Flash IP Type.

FSL_FEATURE_FLASH_IP_IS_C040HD_FC
enum _flash_property_tag

Enumeration for various flash properties.

Values:

enumerator kFLASH_PropertyPflashSectorSize

Pflash sector size property.

enumerator kFLASH_PropertyPflashTotalSize

Pflash total size property.

enumerator kFLASH_PropertyPflashBlockSize

Pflash block size property.

enumerator kFLASH_PropertyPflashBlockCount

Pflash block count property.

enumerator kFLASH_PropertyPflashBlockBaseAddr

Pflash block base address property.

enumerator kFLASH_PropertyPflashPageSize

Pflash page size property.

enumerator kFLASH_PropertyPflashSystemFreq

System Frequency System Frequency.

enumerator kFLASH_PropertyFfrSectorSize

FFR sector size property.

enumerator kFLASH_PropertyFfrTotalSize

FFR total size property.

enumerator kFLASH_PropertyFfrBlockBaseAddr

FFR block base address property.

enumerator kFLASH_PropertyFfrPageSize

FFR page size property.

enum _flash_max_erase_page_value

Enumeration for flash max pages to erase.

Values:

enumerator kFLASH_MaxPagesToErase

The max value in pages to erase.

enum _flash_alignment_property

Enumeration for flash alignment property.

Values:

enumerator kFLASH_AlignementUnitVerifyErase

The alignment unit in bytes used for verify erase operation.

enumerator kFLASH_AlignementUnitProgram

The alignment unit in bytes used for program operation.

enumerator kFLASH_AlignementUnitSingleWordRead

The alignment unit in bytes used for verify program operation. The alignment unit in bytes used for SingleWordRead command.

enum _flash_read_ecc_option

Enumeration for flash read ecc option.

Values:

enumerator kFLASH_ReadWithEccOn
enumerator kFLASH_ReadWithEccOff

ECC is on

enum _flash_freq_tag

Values:

enumerator kSysToFlashFreq_lowInMHz
enumerator kSysToFlashFreq_defaultInMHz
enum _flash_read_margin_option

Enumeration for flash read margin option.

Values:

enumerator kFLASH_ReadMarginNormal

Normal read

enumerator kFLASH_ReadMarginVsProgram

Margin vs. program

enumerator kFLASH_ReadMarginVsErase

Margin vs. erase

enumerator kFLASH_ReadMarginIllegalBitCombination

Illegal bit combination

enum _flash_read_dmacc_option

Enumeration for flash read dmacc option.

Values:

enumerator kFLASH_ReadDmaccDisabled

Memory word

enumerator kFLASH_ReadDmaccEnabled

DMACC word

enum _flash_ramp_control_option

Enumeration for flash ramp control option.

Values:

enumerator kFLASH_RampControlDivisionFactorReserved

Reserved

enumerator kFLASH_RampControlDivisionFactor256

clk48mhz / 256 = 187.5KHz

enumerator kFLASH_RampControlDivisionFactor128

clk48mhz / 128 = 375KHz

enumerator kFLASH_RampControlDivisionFactor64

clk48mhz / 64 = 750KHz

typedef enum _flash_property_tag flash_property_tag_t

Enumeration for various flash properties.

typedef struct _flash_ecc_log flash_ecc_log_t

Flash ECC log info.

typedef struct _flash_mode_config flash_mode_config_t

Flash controller paramter config.

typedef struct _flash_ffr_config flash_ffr_config_t

Flash controller paramter config.

typedef struct _flash_config flash_config_t

Flash driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

status_t FLASH_Read(flash_config_t *config, uint32_t start, uint8_t *dest, uint32_t lengthInBytes)

Reads flash at locations passed in through parameters.

This function read the flash memory from a given flash area as determined by the start address and the length.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • start – The start address of the desired flash memory to be read.

  • dest – A pointer to the dest buffer of data that is to be read from the flash.

  • lengthInBytes – The length, given in bytes (not words or long-words), to be read.

Return values:
  • kStatus_FLASH_Success – API was executed successfully.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FLASH_AlignmentError – Parameter is not aligned with the specified baseline.

  • kStatus_FLASH_AddressError – Address is out of range.

  • kStatus_FLASH_AccessError – Invalid instruction codes and out-of bounds addresses.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandFailure – Run-time error during the command execution.

  • kStatus_FLASH_CommandNotSupported – Flash API is not supported.

  • kStatus_FLASH_EccError – A correctable or uncorrectable error during command execution.

struct _flash_ecc_log
#include <fsl_iap.h>

Flash ECC log info.

struct _flash_mode_config
#include <fsl_iap.h>

Flash controller paramter config.

struct _flash_ffr_config
#include <fsl_iap.h>

Flash controller paramter config.

struct _flash_config
#include <fsl_iap.h>

Flash driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

Public Members

uint32_t PFlashBlockBase

A base address of the first PFlash block

uint32_t PFlashTotalSize

The size of the combined PFlash block.

uint32_t PFlashBlockCount

A number of PFlash blocks.

uint32_t PFlashPageSize

The size in bytes of a page of PFlash.

uint32_t PFlashSectorSize

The size in bytes of a sector of PFlash.

struct user_app_boot_invoke_option_t
#include <fsl_iap.h>
struct readSingleWord
struct setWriteMode
struct setReadMode
union option

Public Members

struct user_app_boot_invoke_option_t B
uint32_t U
struct B

IAP_FFR Driver

status_t FFR_Init(flash_config_t *config)

Initializes the global FFR properties structure members.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

Return values:
  • kStatus_FLASH_Success – API was executed successfully.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

status_t FFR_Lock_All(flash_config_t *config)

Enable firewall for all flash banks.

CFPA, CMPA, and NMPA flash areas region will be locked, After this function executed; Unless the board is reset again.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

Return values:
  • kStatus_FLASH_Success – An invalid argument is provided.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

status_t FFR_InfieldPageWrite(flash_config_t *config, uint8_t *page_data, uint32_t valid_len)

APIs to access CFPA pages.

This routine will erase CFPA and program the CFPA page with passed data.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • page_data – A pointer to the source buffer of data that is to be programmed into the CFPA.

  • valid_len – The length, given in bytes, to be programmed.

Return values:
  • kStatus_FLASH_Success – The desire page-data were programed successfully into CFPA.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FTFx_AddressError – Address is out of range.

  • kStatus_FLASH_FfrBankIsLocked – The CFPA was locked.

  • kStatus_FLASH_OutOfDateCfpaPage – It is not newest CFPA page.

status_t FFR_GetCustomerInfieldData(flash_config_t *config, uint8_t *pData, uint32_t offset, uint32_t len)

APIs to access CFPA pages.

Generic read function, used by customer to read data stored in ‘Customer In-field Page’.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • pData – A pointer to the dest buffer of data that is to be read from ‘Customer In-field Page’.

  • offset – An offset from the ‘Customer In-field Page’ start address.

  • len – The length, given in bytes, to be read.

Return values:
  • kStatus_FLASH_Success – Get data from ‘Customer In-field Page’.

  • kStatus_FLASH_InvalidArgument – An invalid argument is provided.

  • kStatus_FTFx_AddressError – Address is out of range.

  • kStatus_FLASH_CommandFailure – access error.

status_t FFR_CustFactoryPageWrite(flash_config_t *config, uint8_t *page_data, bool seal_part)

APIs to access CMPA pages.

This routine will erase “customer factory page” and program the page with passed data. If ‘seal_part’ parameter is TRUE then the routine will compute SHA256 hash of the page contents and then programs the pages. 1.During development customer code uses this API with ‘seal_part’ set to FALSE. 2.During manufacturing this parameter should be set to TRUE to seal the part from further modifications 3.This routine checks if the page is sealed or not. A page is said to be sealed if the SHA256 value in the page has non-zero value. On boot ROM locks the firewall for the region if hash is programmed anyways. So, write/erase commands will fail eventually.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • page_data – A pointer to the source buffer of data that is to be programmed into the “customer factory page”.

  • seal_part – Set fasle for During development customer code.

Return values:
  • kStatus_FLASH_Success – The desire page-data were programed successfully into CMPA.

  • kStatus_FLASH_InvalidArgument – Parameter is not aligned with the specified baseline.

  • kStatus_FTFx_AddressError – Address is out of range.

  • kStatus_FLASH_CommandFailure – access error.

status_t FFR_GetCustomerData(flash_config_t *config, uint8_t *pData, uint32_t offset, uint32_t len)

APIs to access CMPA page.

Read data stored in ‘Customer Factory CFG Page’.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • pData – A pointer to the dest buffer of data that is to be read from the Customer Factory CFG Page.

  • offset – Address offset relative to the CMPA area.

  • len – The length, given in bytes to be read.

Return values:
  • kStatus_FLASH_Success – Get data from ‘Customer Factory CFG Page’.

  • kStatus_FLASH_InvalidArgument – Parameter is not aligned with the specified baseline.

  • kStatus_FTFx_AddressError – Address is out of range.

  • kStatus_FLASH_CommandFailure – access error.

status_t FFR_GetUUID(flash_config_t *config, uint8_t *uuid)

APIs to access CMPA page.

1.SW should use this API routine to get the UUID of the chip. 2.Calling routine should pass a pointer to buffer which can hold 128-bit value.

status_t FFR_KeystoreWrite(flash_config_t *config, ffr_key_store_t *pKeyStore)

This routine writes the 3 pages allocated for Key store data,.

1.Used during manufacturing. Should write pages when ‘customer factory page’ is not in sealed state. 2.Optional routines to set individual data members (activation code, key codes etc) to construct the key store structure in RAM before committing it to IFR/FFR.

Parameters:
  • config – A pointer to the storage for the driver runtime state.

  • pKeyStore – A Pointer to the 3 pages allocated for Key store data. that will be written to ‘customer factory page’.

Return values:
  • kStatus_FLASH_Success – The key were programed successfully into FFR.

  • kStatus_FLASH_InvalidArgument – Parameter is not aligned with the specified baseline.

  • kStatus_FTFx_AddressError – Address is out of range.

  • kStatus_FLASH_CommandFailure – access error.

status_t FFR_KeystoreGetAC(flash_config_t *config, uint8_t *pActivationCode)

Get/Read Key store code routines.

  1. Calling code should pass buffer pointer which can hold activation code 1192 bytes.

  2. Check if flash aperture is small or regular and read the data appropriately.

status_t FFR_KeystoreGetKC(flash_config_t *config, uint8_t *pKeyCode, ffr_key_type_t keyIndex)

Get/Read Key store code routines.

  1. Calling code should pass buffer pointer which can hold key code 52 bytes.

  2. Check if flash aperture is small or regular and read the data appropriately.

  3. keyIndex specifies which key code is read.

FSL_FLASH_IFR_DRIVER_VERSION

Flash IFR driver version for SDK.

Version 2.1.0.

enum _flash_ffr_page_offset

flash ffr page offset.

Values:

enumerator kFfrPageOffset_CFPA

Customer In-Field programmed area

enumerator kFfrPageOffset_CFPA_Scratch

CFPA Scratch page

enumerator kFfrPageOffset_CFPA_Cfg

CFPA Configuration area (Ping page)

enumerator kFfrPageOffset_CFPA_CfgPong

Same as CFPA page (Pong page)

enumerator kFfrPageOffset_CMPA

Customer Manufacturing programmed area

enumerator kFfrPageOffset_CMPA_Cfg

CMPA Configuration area (Part of CMPA)

enumerator kFfrPageOffset_CMPA_Key

Key Store area (Part of CMPA)

enumerator kFfrPageOffset_NMPA

NXP Manufacturing programmed area

enumerator kFfrPageOffset_NMPA_Romcp

ROM patch area (Part of NMPA)

enumerator kFfrPageOffset_NMPA_Repair

Repair area (Part of NMPA)

enumerator kFfrPageOffset_NMPA_Cfg

NMPA configuration area (Part of NMPA)

enumerator kFfrPageOffset_NMPA_End

Reserved (Part of NMPA)

enum _flash_ffr_page_num

flash ffr page number.

Values:

enumerator kFfrPageNum_CFPA

Customer In-Field programmed area

enumerator kFfrPageNum_CMPA

Customer Manufacturing programmed area

enumerator kFfrPageNum_NMPA

NXP Manufacturing programmed area

enumerator kFfrPageNum_CMPA_Cfg
enumerator kFfrPageNum_CMPA_Key
enumerator kFfrPageNum_NMPA_Romcp
enumerator kFfrPageNum_SpecArea
enumerator kFfrPageNum_Total
enum _flash_ffr_block_size

Values:

enumerator kFfrBlockSize_Key
enumerator kFfrBlockSize_ActivationCode
enum _cfpa_cfg_cmpa_prog_process

Values:

enumerator kFfrCmpaProgProcess_Pre
enumerator kFfrCmpaProgProcess_Post
enum _ffr_key_type

Values:

enumerator kFFR_KeyTypeSbkek
enumerator kFFR_KeyTypeUser
enumerator kFFR_KeyTypeUds
enumerator kFFR_KeyTypePrinceRegion0
enumerator kFFR_KeyTypePrinceRegion1
enumerator kFFR_KeyTypePrinceRegion2
enum _ffr_bank_type

Values:

enumerator kFFR_BankTypeBank0_NMPA
enumerator kFFR_BankTypeBank1_CMPA
enumerator kFFR_BankTypeBank2_CFPA
typedef enum _cfpa_cfg_cmpa_prog_process cmpa_prog_process_t
typedef struct _cfpa_cfg_iv_code cfpa_cfg_iv_code_t
typedef struct _cfpa_cfg_info cfpa_cfg_info_t
typedef struct _cmpa_cfg_info cmpa_cfg_info_t
typedef struct _cmpa_key_store_header cmpa_key_store_header_t
typedef struct _nmpa_cfg_info nmpa_cfg_info_t
typedef struct _ffr_key_store ffr_key_store_t
typedef enum _ffr_key_type ffr_key_type_t
typedef enum _ffr_bank_type ffr_bank_type_t
ALIGN_DOWN(x, a)

Alignment(down) utility.

ALIGN_UP(x, a)

Alignment(up) utility.

FLASH_FFR_MAX_PAGE_SIZE
FLASH_FFR_HASH_DIGEST_SIZE
FLASH_FFR_IV_CODE_SIZE
FFR_BOOTCFG_BOOTSPEED_MASK
FFR_BOOTCFG_BOOTSPEED_SHIFT
FFR_BOOTCFG_BOOTSPEED_48MHZ
FFR_BOOTCFG_BOOTSPEED_96MHZ
FFR_USBID_VENDORID_MASK
FFR_USBID_VENDORID_SHIFT
FFR_USBID_PRODUCTID_MASK
FFR_USBID_PRODUCTID_SHIFT
FFR_SYSTEM_SPEED_CODE_MASK
FFR_SYSTEM_SPEED_CODE_SHIFT
FFR_SYSTEM_SPEED_CODE_FRO12MHZ_12MHZ
FFR_SYSTEM_SPEED_CODE_FROHF96MHZ_24MHZ
FFR_SYSTEM_SPEED_CODE_FROHF96MHZ_48MHZ
FFR_SYSTEM_SPEED_CODE_FROHF96MHZ_96MHZ
FFR_PERIPHERALCFG_PERI_MASK
FFR_PERIPHERALCFG_PERI_SHIFT
FFR_PERIPHERALCFG_COREEN_MASK
FFR_PERIPHERALCFG_COREEN_SHIFT
struct _cfpa_cfg_iv_code
#include <fsl_iap_ffr.h>
struct _cfpa_cfg_info
#include <fsl_iap_ffr.h>

Public Members

uint32_t header

[0x000-0x003]

uint32_t version

[0x004-0x007

uint32_t secureFwVersion

[0x008-0x00b

uint32_t nsFwVersion

[0x00c-0x00f]

uint32_t imageKeyRevoke

[0x010-0x013]

uint8_t reserved0[4]

[0x014-0x017]

uint32_t rotkhRevoke

[0x018-0x01b]

uint32_t vendorUsage

[0x01c-0x01f]

uint32_t dcfgNsPin

[0x020-0x013]

uint32_t dcfgNsDflt

[0x024-0x017]

uint32_t enableFaMode

[0x028-0x02b]

uint8_t reserved1[4]

[0x02c-0x02f]

cfpa_cfg_iv_code_t ivCodePrinceRegion[3]

[0x030-0x0d7]

uint8_t reserved2[264]

[0x0d8-0x1df]

uint8_t sha256[32]

[0x1e0-0x1ff]

struct _cmpa_cfg_info
#include <fsl_iap_ffr.h>

Public Members

uint32_t bootCfg

[0x000-0x003]

uint32_t spiFlashCfg

[0x004-0x007]

struct _cmpa_cfg_info usbId

[0x008-0x00b]

uint32_t sdioCfg

[0x00c-0x00f]

uint32_t dcfgPin

[0x010-0x013]

uint32_t dcfgDflt

[0x014-0x017]

uint32_t dapVendorUsage

[0x018-0x01b]

uint32_t secureBootCfg

[0x01c-0x01f]

uint32_t princeBaseAddr

[0x020-0x023]

uint32_t princeSr[3]

[0x024-0x02f]

uint8_t reserved0[32]

[0x030-0x04f]

uint32_t rotkh[8]

[0x050-0x06f]

uint8_t reserved1[368]

[0x070-0x1df]

uint8_t sha256[32]

[0x1e0-0x1ff]

struct _cmpa_key_store_header
#include <fsl_iap_ffr.h>
struct _nmpa_cfg_info
#include <fsl_iap_ffr.h>

Public Members

uint16_t fro32kCfg

[0x000-0x001]

uint8_t reserved0[6]

[0x002-0x007]

uint8_t sysCfg

[0x008-0x008]

uint8_t reserved1[7]

[0x009-0x00f]

struct _nmpa_cfg_info GpoInitData[3]

[0x010-0x03f]

uint32_t GpoDataChecksum[4]

[0x040-0x04f]

uint32_t finalTestBatchId[4]

[0x050-0x05f]

uint32_t deviceType

[0x060-0x063]

uint32_t finalTestProgVersion

[0x064-0x067]

uint32_t finalTestDate

[0x068-0x06b]

uint32_t finalTestTime

[0x06c-0x06f]

uint32_t uuid[4]

[0x070-0x07f]

uint8_t reserved2[32]

[0x080-0x09f]

uint32_t peripheralCfg

[0x0a0-0x0a3]

uint32_t ramSizeCfg

[0x0a4-0x0a7]

uint32_t flashSizeCfg

[0x0a8-0x0ab]

uint8_t reserved3[36]

[0x0ac-0x0cf]

uint8_t fro1mCfg

[0x0d0-0x0d0]

uint8_t reserved4[15]

[0x0d1-0x0df]

uint32_t dcdc[4]

[0x0e0-0x0ef]

uint32_t bod

[0x0f0-0x0f3]

uint8_t reserved5[12]

[0x0f4-0x0ff]

uint8_t calcHashReserved[192]

[0x100-0x1bf]

uint8_t sha256[32]

[0x1c0-0x1df]

uint32_t ecidBackup[4]

[0x1e0-0x1ef]

uint32_t pageChecksum[4]

[0x1f0-0x1ff]

struct _ffr_key_store
#include <fsl_iap_ffr.h>
struct usbId
struct GpoInitData

FLEXCOMM: FLEXCOMM Driver

FLEXCOMM Driver

FSL_FLEXCOMM_DRIVER_VERSION

FlexCOMM driver version 2.0.2.

enum FLEXCOMM_PERIPH_T

FLEXCOMM peripheral modes.

Values:

enumerator FLEXCOMM_PERIPH_NONE

No peripheral

enumerator FLEXCOMM_PERIPH_USART

USART peripheral

enumerator FLEXCOMM_PERIPH_SPI

SPI Peripheral

enumerator FLEXCOMM_PERIPH_I2C

I2C Peripheral

enumerator FLEXCOMM_PERIPH_I2S_TX

I2S TX Peripheral

enumerator FLEXCOMM_PERIPH_I2S_RX

I2S RX Peripheral

typedef void (*flexcomm_irq_handler_t)(void *base, void *handle)

Typedef for interrupt handler.

IRQn_Type const kFlexcommIrqs[]

Array with IRQ number for each FLEXCOMM module.

uint32_t FLEXCOMM_GetInstance(void *base)

Returns instance number for FLEXCOMM module with given base address.

status_t FLEXCOMM_Init(void *base, FLEXCOMM_PERIPH_T periph)

Initializes FLEXCOMM and selects peripheral mode according to the second parameter.

void FLEXCOMM_SetIRQHandler(void *base, flexcomm_irq_handler_t handler, void *flexcommHandle)

Sets IRQ handler for given FLEXCOMM module. It is used by drivers register IRQ handler according to FLEXCOMM mode.

GINT: Group GPIO Input Interrupt Driver

FSL_GINT_DRIVER_VERSION

Driver version.

enum _gint_comb

GINT combine inputs type.

Values:

enumerator kGINT_CombineOr

A grouped interrupt is generated when any one of the enabled inputs is active

enumerator kGINT_CombineAnd

A grouped interrupt is generated when all enabled inputs are active

enum _gint_trig

GINT trigger type.

Values:

enumerator kGINT_TrigEdge

Edge triggered based on polarity

enumerator kGINT_TrigLevel

Level triggered based on polarity

enum _gint_port

Values:

enumerator kGINT_Port0
typedef enum _gint_comb gint_comb_t

GINT combine inputs type.

typedef enum _gint_trig gint_trig_t

GINT trigger type.

typedef enum _gint_port gint_port_t
typedef void (*gint_cb_t)(void)

GINT Callback function.

void GINT_Init(GINT_Type *base)

Initialize GINT peripheral.

This function initializes the GINT peripheral and enables the clock.

Parameters:
  • base – Base address of the GINT peripheral.

Return values:

None.

void GINT_SetCtrl(GINT_Type *base, gint_comb_t comb, gint_trig_t trig, gint_cb_t callback)

Setup GINT peripheral control parameters.

This function sets the control parameters of GINT peripheral.

Parameters:
  • base – Base address of the GINT peripheral.

  • comb – Controls if the enabled inputs are logically ORed or ANDed for interrupt generation.

  • trig – Controls if the enabled inputs are level or edge sensitive based on polarity.

  • callback – This function is called when configured group interrupt is generated.

Return values:

None.

void GINT_GetCtrl(GINT_Type *base, gint_comb_t *comb, gint_trig_t *trig, gint_cb_t *callback)

Get GINT peripheral control parameters.

This function returns the control parameters of GINT peripheral.

Parameters:
  • base – Base address of the GINT peripheral.

  • comb – Pointer to store combine input value.

  • trig – Pointer to store trigger value.

  • callback – Pointer to store callback function.

Return values:

None.

void GINT_ConfigPins(GINT_Type *base, gint_port_t port, uint32_t polarityMask, uint32_t enableMask)

Configure GINT peripheral pins.

This function enables and controls the polarity of enabled pin(s) of a given port.

Parameters:
  • base – Base address of the GINT peripheral.

  • port – Port number.

  • polarityMask – Each bit position selects the polarity of the corresponding enabled pin. 0 = The pin is active LOW. 1 = The pin is active HIGH.

  • enableMask – Each bit position selects if the corresponding pin is enabled or not. 0 = The pin is disabled. 1 = The pin is enabled.

Return values:

None.

void GINT_GetConfigPins(GINT_Type *base, gint_port_t port, uint32_t *polarityMask, uint32_t *enableMask)

Get GINT peripheral pin configuration.

This function returns the pin configuration of a given port.

Parameters:
  • base – Base address of the GINT peripheral.

  • port – Port number.

  • polarityMask – Pointer to store the polarity mask Each bit position indicates the polarity of the corresponding enabled pin. 0 = The pin is active LOW. 1 = The pin is active HIGH.

  • enableMask – Pointer to store the enable mask. Each bit position indicates if the corresponding pin is enabled or not. 0 = The pin is disabled. 1 = The pin is enabled.

Return values:

None.

void GINT_EnableCallback(GINT_Type *base)

Enable callback.

This function enables the interrupt for the selected GINT peripheral. Although the pin(s) are monitored as soon as they are enabled, the callback function is not enabled until this function is called.

Parameters:
  • base – Base address of the GINT peripheral.

Return values:

None.

void GINT_DisableCallback(GINT_Type *base)

Disable callback.

This function disables the interrupt for the selected GINT peripheral. Although the pins are still being monitored but the callback function is not called.

Parameters:
  • base – Base address of the peripheral.

Return values:

None.

static inline void GINT_ClrStatus(GINT_Type *base)

Clear GINT status.

This function clears the GINT status bit.

Parameters:
  • base – Base address of the GINT peripheral.

Return values:

None.

static inline uint32_t GINT_GetStatus(GINT_Type *base)

Get GINT status.

This function returns the GINT status.

Parameters:
  • base – Base address of the GINT peripheral.

Return values:

status – = 0 No group interrupt request. = 1 Group interrupt request active.

void GINT_Deinit(GINT_Type *base)

Deinitialize GINT peripheral.

This function disables the GINT clock.

Parameters:
  • base – Base address of the GINT peripheral.

Return values:

None.

Hashcrypt: The Cryptographic Accelerator

Hashcrypt Background HASH

void HASHCRYPT_SHA_SetCallback(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, hashcrypt_callback_t callback, void *userData)

Initializes the HASHCRYPT handle for background hashing.

This function initializes the hash context for background hashing (Non-blocking) APIs. This is less typical interface to hash function, but can be used for parallel processing, when main CPU has something else to do. Example is digital signature RSASSA-PKCS1-V1_5-VERIFY((n,e),M,S) algorithm, where background hashing of M can be started, then CPU can compute S^e mod n (in parallel with background hashing) and once the digest becomes available, CPU can proceed to comparison of EM with EM’.

Parameters:
  • base – HASHCRYPT peripheral base address.

  • ctx[out] Hash context.

  • callback – Callback function.

  • userData – User data (to be passed as an argument to callback function, once callback is invoked from isr).

status_t HASHCRYPT_SHA_UpdateNonBlocking(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, const uint8_t *input, size_t inputSize)

Create running hash on given data.

Configures the HASHCRYPT to compute new running hash as AHB master and returns immediately. HASHCRYPT AHB Master mode supports only aligned input address and can be called only once per continuous block of data. Every call to this function must be preceded with HASHCRYPT_SHA_Init() and finished with HASHCRYPT_SHA_Finish(). Once callback function is invoked by HASHCRYPT isr, it should set a flag for the main application to finalize the hashing (padding) and to read out the final digest by calling HASHCRYPT_SHA_Finish().

Parameters:
  • base – HASHCRYPT peripheral base address

  • ctx – Specifies callback. Last incomplete 512-bit block of the input is copied into clear buffer for padding.

  • input – 32-bit word aligned pointer to Input data.

  • inputSize – Size of input data in bytes (must be word aligned)

Returns:

Status of the hash update operation.

Hashcrypt common functions

FSL_HASHCRYPT_DRIVER_VERSION

HASHCRYPT driver version. Version 2.2.16.

Current version: 2.2.16

Change log:

  • Version 2.0.0

    • Initial version

  • Version 2.0.1

    • Support loading AES key from unaligned address

  • Version 2.0.2

    • Support loading AES key from unaligned address for different compiler and core variants

  • Version 2.0.3

    • Remove SHA512 and AES ICB algorithm definitions

  • Version 2.0.4

    • Add SHA context switch support

  • Version 2.1.0

    • Update the register name and macro to align with new header.

  • Version 2.1.1

    • Fix MISRA C-2012.

  • Version 2.1.2

    • Support loading AES input data from unaligned address.

  • Version 2.1.3

    • Fix MISRA C-2012.

  • Version 2.1.4

    • Fix context switch cannot work when switching from AES.

  • Version 2.1.5

    • Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() to prevent possible optimization issue.

  • Version 2.2.0

    • Add AES-OFB and AES-CFB mixed IP/SW modes.

  • Version 2.2.1

    • Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() prevent compiler from reordering memory write when -O2 or higher is used.

  • Version 2.2.2

    • Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() to fix optimization issue

  • Version 2.2.3

    • Added check for size in hashcrypt_aes_one_block to prevent overflowing COUNT field in MEMCTRL register, if its bigger than COUNT field do a multiple runs.

  • Version 2.2.4

    • In all HASHCRYPT_AES_xx functions have been added setting CTRL_MODE bitfield to 0 after processing data, which decreases power consumption.

  • Version 2.2.5

    • Add data synchronization barrier and instruction synchronization barrier inside hashcrypt_sha_process_message_data() to fix optimization issue

  • Version 2.2.6

    • Add data synchronization barrier inside HASHCRYPT_SHA_Update() and hashcrypt_get_data() function to fix optimization issue on MDK and ARMGCC release targets

  • Version 2.2.7

    • Add data synchronization barrier inside HASHCRYPT_SHA_Update() to fix optimization issue on MCUX IDE release target

  • Version 2.2.8

    • Unify hashcrypt hashing behavior between aligned and unaligned input data

  • Version 2.2.9

    • Add handling of set ERROR bit in the STATUS register

  • Version 2.2.10

    • Fix missing error statement in hashcrypt_save_running_hash()

  • Version 2.2.11

    • Fix incorrect SHA-256 calculation for long messages with reload

  • Version 2.2.12

    • Fix hardfault issue on the Keil compiler due to unaligned memcpy() input on some optimization levels

  • Version 2.2.13

    • Added function hashcrypt_seed_prng() which loading random number into PRNG_SEED register before AES operation for SCA protection

  • Version 2.2.14

    • Modify function hashcrypt_get_data() to prevent issue with unaligned access

  • Version 2.2.15

    • Add wait on DIGEST BIT inside hashcrypt_sha_one_block() to fix issues with some optimization flags

  • Version 2.2.16

    • Add DSB instruction inside hashcrypt_sha_ldm_stm_16_words() to fix issues with some optimization flags

enum _hashcrypt_algo_t

Algorithm used for Hashcrypt operation.

Values:

enumerator kHASHCRYPT_Sha1

SHA_1

enumerator kHASHCRYPT_Sha256

SHA_256

enumerator kHASHCRYPT_Aes

AES

typedef enum _hashcrypt_algo_t hashcrypt_algo_t

Algorithm used for Hashcrypt operation.

void HASHCRYPT_Init(HASHCRYPT_Type *base)

Enables clock and disables reset for HASHCRYPT peripheral.

Enable clock and disable reset for HASHCRYPT.

Parameters:
  • base – HASHCRYPT base address

void HASHCRYPT_Deinit(HASHCRYPT_Type *base)

Disables clock for HASHCRYPT peripheral.

Disable clock and enable reset.

Parameters:
  • base – HASHCRYPT base address

HASHCRYPT_MODE_SHA1

Algorithm definitions correspond with the values for Mode field in Control register !

HASHCRYPT_MODE_SHA256
HASHCRYPT_MODE_AES

Hashcrypt AES

enum _hashcrypt_aes_mode_t

AES mode.

Values:

enumerator kHASHCRYPT_AesEcb

AES ECB mode

enumerator kHASHCRYPT_AesCbc

AES CBC mode

enumerator kHASHCRYPT_AesCtr

AES CTR mode

enum _hashcrypt_aes_keysize_t

Size of AES key.

Values:

enumerator kHASHCRYPT_Aes128

AES 128 bit key

enumerator kHASHCRYPT_Aes192

AES 192 bit key

enumerator kHASHCRYPT_Aes256

AES 256 bit key

enumerator kHASHCRYPT_InvalidKey

AES invalid key

enum _hashcrypt_key

HASHCRYPT key source selection.

Values:

enumerator kHASHCRYPT_UserKey

HASHCRYPT user key

enumerator kHASHCRYPT_SecretKey

HASHCRYPT secret key (dedicated hw bus from PUF)

typedef enum _hashcrypt_aes_mode_t hashcrypt_aes_mode_t

AES mode.

typedef enum _hashcrypt_aes_keysize_t hashcrypt_aes_keysize_t

Size of AES key.

typedef enum _hashcrypt_key hashcrypt_key_t

HASHCRYPT key source selection.

typedef struct _hashcrypt_handle hashcrypt_handle_t
struct _hashcrypt_handle __attribute__ ((aligned))
status_t HASHCRYPT_AES_SetKey(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *key, size_t keySize)

Set AES key to hashcrypt_handle_t struct and optionally to HASHCRYPT.

Sets the AES key for encryption/decryption with the hashcrypt_handle_t structure. The hashcrypt_handle_t input argument specifies key source.

Parameters:
  • base – HASHCRYPT peripheral base address.

  • handle – Handle used for the request.

  • key – 0-mod-4 aligned pointer to AES key.

  • keySize – AES key size in bytes. Shall equal 16, 24 or 32.

Returns:

status from set key operation

status_t HASHCRYPT_AES_EncryptEcb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size)

Encrypts AES on one or multiple 128-bit block(s).

Encrypts AES. The source plaintext and destination ciphertext can overlap in system memory.

Parameters:
  • base – HASHCRYPT peripheral base address

  • handle – Handle used for this request.

  • plaintext – Input plain text to encrypt

  • ciphertext[out] Output cipher text

  • size – Size of input and output data in bytes. Must be multiple of 16 bytes.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptEcb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size)

Decrypts AES on one or multiple 128-bit block(s).

Decrypts AES. The source ciphertext and destination plaintext can overlap in system memory.

Parameters:
  • base – HASHCRYPT peripheral base address

  • handle – Handle used for this request.

  • ciphertext – Input plain text to encrypt

  • plaintext[out] Output cipher text

  • size – Size of input and output data in bytes. Must be multiple of 16 bytes.

Returns:

Status from decrypt operation

status_t HASHCRYPT_AES_EncryptCbc(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])

Encrypts AES using CBC block mode.

Parameters:
  • base – HASHCRYPT peripheral base address

  • handle – Handle used for this request.

  • plaintext – Input plain text to encrypt

  • ciphertext[out] Output cipher text

  • size – Size of input and output data in bytes. Must be multiple of 16 bytes.

  • iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptCbc(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])

Decrypts AES using CBC block mode.

Parameters:
  • base – HASHCRYPT peripheral base address

  • handle – Handle used for this request.

  • ciphertext – Input cipher text to decrypt

  • plaintext[out] Output plain text

  • size – Size of input and output data in bytes. Must be multiple of 16 bytes.

  • iv – Input initial vector to combine with the first input block.

Returns:

Status from decrypt operation

status_t HASHCRYPT_AES_CryptCtr(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *input, uint8_t *output, size_t size, uint8_t counter[16U], uint8_t counterlast[16U], size_t *szLeft)

Encrypts or decrypts AES using CTR block mode.

Encrypts or decrypts AES using CTR block mode. AES CTR mode uses only forward AES cipher and same algorithm for encryption and decryption. The only difference between encryption and decryption is that, for encryption, the input argument is plain text and the output argument is cipher text. For decryption, the input argument is cipher text and the output argument is plain text.

Parameters:
  • base – HASHCRYPT peripheral base address

  • handle – Handle used for this request.

  • input – Input data for CTR block mode

  • output[out] Output data for CTR block mode

  • size – Size of input and output data in bytes

  • counter[inout] Input counter (updates on return)

  • counterlast[out] Output cipher of last counter, for chained CTR calls (statefull encryption). NULL can be passed if chained calls are not used.

  • szLeft[out] Output number of bytes in left unused in counterlast block. NULL can be passed if chained calls are not used.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_CryptOfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *input, uint8_t *output, size_t size, const uint8_t iv[16U])

Encrypts or decrypts AES using OFB block mode.

Encrypts or decrypts AES using OFB block mode. AES OFB mode uses only forward AES cipher and same algorithm for encryption and decryption. The only difference between encryption and decryption is that, for encryption, the input argument is plain text and the output argument is cipher text. For decryption, the input argument is cipher text and the output argument is plain text.

Parameters:
  • base – HASHCRYPT peripheral base address

  • handle – Handle used for this request.

  • input – Input data for OFB block mode

  • output[out] Output data for OFB block mode

  • size – Size of input and output data in bytes

  • iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_EncryptCfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])

Encrypts AES using CFB block mode.

Parameters:
  • base – HASHCRYPT peripheral base address

  • handle – Handle used for this request.

  • plaintext – Input plain text to encrypt

  • ciphertext[out] Output cipher text

  • size – Size of input and output data in bytes. Must be multiple of 16 bytes.

  • iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptCfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])

Decrypts AES using CFB block mode.

Parameters:
  • base – HASHCRYPT peripheral base address

  • handle – Handle used for this request.

  • ciphertext – Input cipher text to decrypt

  • plaintext[out] Output plaintext text

  • size – Size of input and output data in bytes. Must be multiple of 16 bytes.

  • iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

HASHCRYPT_AES_BLOCK_SIZE

AES block size in bytes

AES_ENCRYPT
AES_DECRYPT
struct _hashcrypt_handle
#include <fsl_hashcrypt.h>

Specify HASHCRYPT’s key resource.

Public Members

uint32_t keyWord[8]

Copy of user key (set by HASHCRYPT_AES_SetKey().

hashcrypt_key_t keyType

For operations with key (such as AES encryption/decryption), specify key type.

Hashcrypt HASH

typedef struct _hashcrypt_hash_ctx_t hashcrypt_hash_ctx_t

Storage type used to save hash context.

typedef void (*hashcrypt_callback_t)(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, status_t status, void *userData)

HASHCRYPT background hash callback function.

status_t HASHCRYPT_SHA(HASHCRYPT_Type *base, hashcrypt_algo_t algo, const uint8_t *input, size_t inputSize, uint8_t *output, size_t *outputSize)

Create HASH on given data.

Perform the full SHA in one function call. The function is blocking.

Parameters:
  • base – HASHCRYPT peripheral base address

  • algo – Underlaying algorithm to use for hash computation.

  • input – Input data

  • inputSize – Size of input data in bytes

  • output[out] Output hash data

  • outputSize[out] Output parameter storing the size of the output hash in bytes

Returns:

Status of the one call hash operation.

status_t HASHCRYPT_SHA_Init(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, hashcrypt_algo_t algo)

Initialize HASH context.

This function initializes the HASH.

Parameters:
  • base – HASHCRYPT peripheral base address

  • ctx[out] Output hash context

  • algo – Underlaying algorithm to use for hash computation.

Returns:

Status of initialization

status_t HASHCRYPT_SHA_Update(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, const uint8_t *input, size_t inputSize)

Add data to current HASH.

Add data to current HASH. This can be called repeatedly with an arbitrary amount of data to be hashed. The functions blocks. If it returns kStatus_Success, the running hash has been updated (HASHCRYPT has processed the input data), so the memory at input pointer can be released back to system. The HASHCRYPT context buffer is updated with the running hash and with all necessary information to support possible context switch.

Parameters:
  • base – HASHCRYPT peripheral base address

  • ctx[inout] HASH context

  • input – Input data

  • inputSize – Size of input data in bytes

Returns:

Status of the hash update operation

status_t HASHCRYPT_SHA_Finish(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, uint8_t *output, size_t *outputSize)

Finalize hashing.

Outputs the final hash (computed by HASHCRYPT_HASH_Update()) and erases the context.

Parameters:
  • base – HASHCRYPT peripheral base address

  • ctx[inout] Input hash context

  • output[out] Output hash data

  • outputSize[inout] Optional parameter (can be passed as NULL). On function entry, it specifies the size of output[] buffer. On function return, it stores the number of updated output bytes.

Returns:

Status of the hash finish operation

HASHCRYPT_HASH_CTX_SIZE

HASHCRYPT HASH Context size.

struct _hashcrypt_hash_ctx_t
#include <fsl_hashcrypt.h>

Storage type used to save hash context.

Public Members

uint32_t x[30]

storage

I2C: Inter-Integrated Circuit Driver

I2C DMA Driver

void I2C_MasterTransferCreateHandleDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_dma_transfer_callback_t callback, void *userData, dma_handle_t *dmaHandle)

Init the I2C handle which is used in transactional functions.

Parameters:
  • base – I2C peripheral base address

  • handle – pointer to i2c_master_dma_handle_t structure

  • callback – pointer to user callback function

  • userData – user param passed to the callback function

  • dmaHandle – DMA handle pointer

status_t I2C_MasterTransferDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_transfer_t *xfer)

Performs a master dma non-blocking transfer on the I2C bus.

Parameters:
  • base – I2C peripheral base address

  • handle – pointer to i2c_master_dma_handle_t structure

  • xfer – pointer to transfer structure of i2c_master_transfer_t

Return values:
  • kStatus_Success – Sucessully complete the data transmission.

  • kStatus_I2C_Busy – Previous transmission still not finished.

  • kStatus_I2C_Timeout – Transfer error, wait signal timeout.

  • kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.

  • kStataus_I2C_Nak – Transfer error, receive Nak during transfer.

status_t I2C_MasterTransferGetCountDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, size_t *count)

Get master transfer status during a dma non-blocking transfer.

Parameters:
  • base – I2C peripheral base address

  • handle – pointer to i2c_master_dma_handle_t structure

  • count – Number of bytes transferred so far by the non-blocking transaction.

void I2C_MasterTransferAbortDMA(I2C_Type *base, i2c_master_dma_handle_t *handle)

Abort a master dma non-blocking transfer in a early time.

Parameters:
  • base – I2C peripheral base address

  • handle – pointer to i2c_master_dma_handle_t structure

FSL_I2C_DMA_DRIVER_VERSION

I2C DMA driver version.

typedef struct _i2c_master_dma_handle i2c_master_dma_handle_t

I2C master dma handle typedef.

typedef void (*i2c_master_dma_transfer_callback_t)(I2C_Type *base, i2c_master_dma_handle_t *handle, status_t status, void *userData)

I2C master dma transfer callback typedef.

typedef void (*flexcomm_i2c_dma_master_irq_handler_t)(I2C_Type *base, i2c_master_dma_handle_t *handle)

Typedef for master dma handler.

I2C_MAX_DMA_TRANSFER_COUNT

Maximum lenght of single DMA transfer (determined by capability of the DMA engine)

struct _i2c_master_dma_handle
#include <fsl_i2c_dma.h>

I2C master dma transfer structure.

Public Members

uint8_t state

Transfer state machine current state.

uint32_t transferCount

Indicates progress of the transfer

uint32_t remainingBytesDMA

Remaining byte count to be transferred using DMA.

uint8_t *buf

Buffer pointer for current state.

bool checkAddrNack

Whether to check the nack signal is detected during addressing.

dma_handle_t *dmaHandle

The DMA handler used.

i2c_master_transfer_t transfer

Copy of the current transfer info.

i2c_master_dma_transfer_callback_t completionCallback

Callback function called after dma transfer finished.

void *userData

Callback parameter passed to callback function.

I2C Driver

FSL_I2C_DRIVER_VERSION

I2C driver version.

I2C status return codes.

Values:

enumerator kStatus_I2C_Busy

The master is already performing a transfer.

enumerator kStatus_I2C_Idle

The slave driver is idle.

enumerator kStatus_I2C_Nak

The slave device sent a NAK in response to a byte.

enumerator kStatus_I2C_InvalidParameter

Unable to proceed due to invalid parameter.

enumerator kStatus_I2C_BitError

Transferred bit was not seen on the bus.

enumerator kStatus_I2C_ArbitrationLost

Arbitration lost error.

enumerator kStatus_I2C_NoTransferInProgress

Attempt to abort a transfer when one is not in progress.

enumerator kStatus_I2C_DmaRequestFail

DMA request failed.

enumerator kStatus_I2C_StartStopError

Start and stop error.

enumerator kStatus_I2C_UnexpectedState

Unexpected state.

enumerator kStatus_I2C_Timeout

Timeout when waiting for I2C master/slave pending status to set to continue transfer.

enumerator kStatus_I2C_Addr_Nak

NAK received for Address

enumerator kStatus_I2C_EventTimeout

Timeout waiting for bus event.

enumerator kStatus_I2C_SclLowTimeout

Timeout SCL signal remains low.

enum _i2c_status_flags

I2C status flags.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_MasterPendingFlag

The I2C module is waiting for software interaction. bit 0

enumerator kI2C_MasterArbitrationLostFlag

The arbitration of the bus was lost. There was collision on the bus. bit 4

enumerator kI2C_MasterStartStopErrorFlag

There was an error during start or stop phase of the transaction. bit 6

enumerator kI2C_MasterIdleFlag

The I2C master idle status. bit 5

enumerator kI2C_MasterRxReadyFlag

The I2C master rx ready status. bit 1

enumerator kI2C_MasterTxReadyFlag

The I2C master tx ready status. bit 2

enumerator kI2C_MasterAddrNackFlag

The I2C master address nack status. bit 7

enumerator kI2C_MasterDataNackFlag

The I2C master data nack status. bit 3

enumerator kI2C_SlavePendingFlag

The I2C module is waiting for software interaction. bit 8

enumerator kI2C_SlaveNotStretching

Indicates whether the slave is currently stretching clock (0 = yes, 1 = no). bit 11

enumerator kI2C_SlaveSelected

Indicates whether the slave is selected by an address match. bit 14

enumerator kI2C_SaveDeselected

Indicates that slave was previously deselected (deselect event took place, w1c). bit 15

enumerator kI2C_SlaveAddressedFlag

One of the I2C slave’s 4 addresses is matched. bit 22

enumerator kI2C_SlaveReceiveFlag

Slave receive data available. bit 9

enumerator kI2C_SlaveTransmitFlag

Slave data can be transmitted. bit 10

enumerator kI2C_SlaveAddress0MatchFlag

Slave address0 match. bit 20

enumerator kI2C_SlaveAddress1MatchFlag

Slave address1 match. bit 12

enumerator kI2C_SlaveAddress2MatchFlag

Slave address2 match. bit 13

enumerator kI2C_SlaveAddress3MatchFlag

Slave address3 match. bit 21

enumerator kI2C_MonitorReadyFlag

The I2C monitor ready interrupt. bit 16

enumerator kI2C_MonitorOverflowFlag

The monitor data overrun interrupt. bit 17

enumerator kI2C_MonitorActiveFlag

The monitor is active. bit 18

enumerator kI2C_MonitorIdleFlag

The monitor idle interrupt. bit 19

enumerator kI2C_EventTimeoutFlag

The bus event timeout interrupt. bit 24

enumerator kI2C_SclTimeoutFlag

The SCL timeout interrupt. bit 25

enumerator kI2C_MasterAllClearFlags
enumerator kI2C_SlaveAllClearFlags
enumerator kI2C_CommonAllClearFlags
enum _i2c_interrupt_enable

I2C interrupt enable.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_MasterPendingInterruptEnable

The I2C master communication pending interrupt.

enumerator kI2C_MasterArbitrationLostInterruptEnable

The I2C master arbitration lost interrupt.

enumerator kI2C_MasterStartStopErrorInterruptEnable

The I2C master start/stop timing error interrupt.

enumerator kI2C_SlavePendingInterruptEnable

The I2C slave communication pending interrupt.

enumerator kI2C_SlaveNotStretchingInterruptEnable

The I2C slave not streching interrupt, deep-sleep mode can be entered only when this interrupt occurs.

enumerator kI2C_SlaveDeselectedInterruptEnable

The I2C slave deselection interrupt.

enumerator kI2C_MonitorReadyInterruptEnable

The I2C monitor ready interrupt.

enumerator kI2C_MonitorOverflowInterruptEnable

The monitor data overrun interrupt.

enumerator kI2C_MonitorIdleInterruptEnable

The monitor idle interrupt.

enumerator kI2C_EventTimeoutInterruptEnable

The bus event timeout interrupt.

enumerator kI2C_SclTimeoutInterruptEnable

The SCL timeout interrupt.

enumerator kI2C_MasterAllInterruptEnable
enumerator kI2C_SlaveAllInterruptEnable
enumerator kI2C_CommonAllInterruptEnable
I2C_RETRY_TIMES

Retry times for waiting flag.

I2C_MASTER_TRANSMIT_IGNORE_LAST_NACK

Whether to ignore the nack signal of the last byte during master transmit.

I2C_STAT_MSTCODE_IDLE

Master Idle State Code

I2C_STAT_MSTCODE_RXREADY

Master Receive Ready State Code

I2C_STAT_MSTCODE_TXREADY

Master Transmit Ready State Code

I2C_STAT_MSTCODE_NACKADR

Master NACK by slave on address State Code

I2C_STAT_MSTCODE_NACKDAT

Master NACK by slave on data State Code

I2C_STAT_SLVST_ADDR
I2C_STAT_SLVST_RX
I2C_STAT_SLVST_TX

I2C Master Driver

void I2C_MasterGetDefaultConfig(i2c_master_config_t *masterConfig)

Provides a default configuration for the I2C master peripheral.

This function provides the following default configuration for the I2C master peripheral:

masterConfig->enableMaster            = true;
masterConfig->baudRate_Bps            = 100000U;
masterConfig->enableTimeout           = false;

After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with I2C_MasterInit().

Parameters:
  • masterConfig[out] User provided configuration structure for default values. Refer to i2c_master_config_t.

void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)

Initializes the I2C master peripheral.

This function enables the peripheral clock and initializes the I2C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters:
  • base – The I2C peripheral base address.

  • masterConfig – User provided peripheral configuration. Use I2C_MasterGetDefaultConfig() to get a set of defaults that you can override.

  • srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.

void I2C_MasterDeinit(I2C_Type *base)

Deinitializes the I2C master peripheral.

This function disables the I2C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:
  • base – The I2C peripheral base address.

uint32_t I2C_GetInstance(I2C_Type *base)

Returns an instance number given a base address.

If an invalid base address is passed, debug builds will assert. Release builds will just return instance number 0.

Parameters:
  • base – The I2C peripheral base address.

Returns:

I2C instance number starting from 0.

static inline void I2C_MasterReset(I2C_Type *base)

Performs a software reset.

Restores the I2C master peripheral to reset conditions.

Parameters:
  • base – The I2C peripheral base address.

static inline void I2C_MasterEnable(I2C_Type *base, bool enable)

Enables or disables the I2C module as master.

Parameters:
  • base – The I2C peripheral base address.

  • enable – Pass true to enable or false to disable the specified I2C as master.

uint32_t I2C_GetStatusFlags(I2C_Type *base)

Gets the I2C status flags.

A bit mask with the state of all I2C status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also

_i2c_status_flags.

Parameters:
  • base – The I2C peripheral base address.

Returns:

State of the status flags:

  • 1: related status flag is set.

  • 0: related status flag is not set.

static inline void I2C_ClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C status flag state.

Refer to kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags to see the clearable flags. Attempts to clear other flags has no effect.

See also

_i2c_status_flags, _i2c_master_status_flags and _i2c_slave_status_flags.

Parameters:
  • base – The I2C peripheral base address.

  • statusMask – A bitmask of status flags that are to be cleared. The mask is composed of the members in kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags. You may pass the result of a previous call to I2C_GetStatusFlags().

static inline void I2C_MasterClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C master status flag state.

Deprecated:

Do not use this function. It has been superceded by I2C_ClearStatusFlags The following status register flags can be cleared:

  • kI2C_MasterArbitrationLostFlag

  • kI2C_MasterStartStopErrorFlag

Attempts to clear other flags has no effect.

See also

_i2c_status_flags.

Parameters:
  • base – The I2C peripheral base address.

  • statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_status_flags enumerators OR’d together. You may pass the result of a previous call to I2C_GetStatusFlags().

static inline void I2C_EnableInterrupts(I2C_Type *base, uint32_t interruptMask)

Enables the I2C interrupt requests.

Parameters:
  • base – The I2C peripheral base address.

  • interruptMask – Bit mask of interrupts to enable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.

static inline void I2C_DisableInterrupts(I2C_Type *base, uint32_t interruptMask)

Disables the I2C interrupt requests.

Parameters:
  • base – The I2C peripheral base address.

  • interruptMask – Bit mask of interrupts to disable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t I2C_GetEnabledInterrupts(I2C_Type *base)

Returns the set of currently enabled I2C interrupt requests.

Parameters:
  • base – The I2C peripheral base address.

Returns:

A bitmask composed of _i2c_interrupt_enable enumerators OR’d together to indicate the set of enabled interrupts.

void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the I2C bus frequency for master transactions.

The I2C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.

Parameters:
  • base – The I2C peripheral base address.

  • srcClock_Hz – I2C functional clock frequency in Hertz.

  • baudRate_Bps – Requested bus frequency in bits per second.

void I2C_MasterSetTimeoutValue(I2C_Type *base, uint8_t timeout_Ms, uint32_t srcClock_Hz)

Sets the I2C bus timeout value.

If the SCL signal remains low or bus does not have event longer than the timeout value, kI2C_SclTimeoutFlag or kI2C_EventTimeoutFlag is set. This can indicete the bus is held by slave or any fault occurs to the I2C module.

Parameters:
  • base – The I2C peripheral base address.

  • timeout_Ms – Timeout value in millisecond.

  • srcClock_Hz – I2C functional clock frequency in Hertz.

static inline bool I2C_MasterGetBusIdleState(I2C_Type *base)

Returns whether the bus is idle.

Requires the master mode to be enabled.

Parameters:
  • base – The I2C peripheral base address.

Return values:
  • true – Bus is busy.

  • false – Bus is idle.

status_t I2C_MasterStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)

Sends a START on the I2C bus.

This function is used to initiate a new master mode transfer by sending the START signal. The slave address is sent following the I2C START signal.

Parameters:
  • base – I2C peripheral base pointer

  • address – 7-bit slave device address.

  • direction – Master transfer directions(transmit/receive).

Return values:
  • kStatus_Success – Successfully send the start signal.

  • kStatus_I2C_Busy – Current bus is busy.

status_t I2C_MasterStop(I2C_Type *base)

Sends a STOP signal on the I2C bus.

Return values:
  • kStatus_Success – Successfully send the stop signal.

  • kStatus_I2C_Timeout – Send stop signal failed, timeout.

static inline status_t I2C_MasterRepeatedStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)

Sends a REPEATED START on the I2C bus.

Parameters:
  • base – I2C peripheral base pointer

  • address – 7-bit slave device address.

  • direction – Master transfer directions(transmit/receive).

Return values:
  • kStatus_Success – Successfully send the start signal.

  • kStatus_I2C_Busy – Current bus is busy but not occupied by current I2C master.

status_t I2C_MasterWriteBlocking(I2C_Type *base, const void *txBuff, size_t txSize, uint32_t flags)

Performs a polling send transfer on the I2C bus.

Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_I2C_Nak.

Parameters:
  • base – The I2C peripheral base address.

  • txBuff – The pointer to the data to be transferred.

  • txSize – The length in bytes of the data to be transferred.

  • flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag

Return values:
  • kStatus_Success – Data was sent successfully.

  • kStatus_I2C_Busy – Another master is currently utilizing the bus.

  • kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.

  • kStatus_I2C_ArbitrationLost – Arbitration lost error.

status_t I2C_MasterReadBlocking(I2C_Type *base, void *rxBuff, size_t rxSize, uint32_t flags)

Performs a polling receive transfer on the I2C bus.

Parameters:
  • base – The I2C peripheral base address.

  • rxBuff – The pointer to the data to be transferred.

  • rxSize – The length in bytes of the data to be transferred.

  • flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag

Return values:
  • kStatus_Success – Data was received successfully.

  • kStatus_I2C_Busy – Another master is currently utilizing the bus.

  • kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.

  • kStatus_I2C_ArbitrationLost – Arbitration lost error.

status_t I2C_MasterTransferBlocking(I2C_Type *base, i2c_master_transfer_t *xfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to arbitration lost or receiving a NAK.

Parameters:
  • base – I2C peripheral base address.

  • xfer – Pointer to the transfer structure.

Return values:
  • kStatus_Success – Successfully complete the data transmission.

  • kStatus_I2C_Busy – Previous transmission still not finished.

  • kStatus_I2C_Timeout – Transfer error, wait signal timeout.

  • kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.

  • kStataus_I2C_Nak – Transfer error, receive NAK during transfer.

  • kStataus_I2C_Addr_Nak – Transfer error, receive NAK during addressing.

void I2C_MasterTransferCreateHandle(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_callback_t callback, void *userData)

Creates a new handle for the I2C master non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_MasterTransferAbort() API shall be called.

Parameters:
  • base – The I2C peripheral base address.

  • handle[out] Pointer to the I2C master driver handle.

  • callback – User provided pointer to the asynchronous callback function.

  • userData – User provided pointer to the application callback data.

status_t I2C_MasterTransferNonBlocking(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_t *xfer)

Performs a non-blocking transaction on the I2C bus.

Parameters:
  • base – The I2C peripheral base address.

  • handle – Pointer to the I2C master driver handle.

  • xfer – The pointer to the transfer descriptor.

Return values:
  • kStatus_Success – The transaction was started successfully.

  • kStatus_I2C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.

status_t I2C_MasterTransferGetCount(I2C_Type *base, i2c_master_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:
  • base – The I2C peripheral base address.

  • handle – Pointer to the I2C master driver handle.

  • count[out] Number of bytes transferred so far by the non-blocking transaction.

Return values:
  • kStatus_Success

  • kStatus_I2C_Busy

status_t I2C_MasterTransferAbort(I2C_Type *base, i2c_master_handle_t *handle)

Terminates a non-blocking I2C master transmission early.

Note

It is not safe to call this function from an IRQ handler that has a higher priority than the I2C peripheral’s IRQ priority.

Parameters:
  • base – The I2C peripheral base address.

  • handle – Pointer to the I2C master driver handle.

Return values:
  • kStatus_Success – A transaction was successfully aborted.

  • kStatus_I2C_Timeout – Timeout during polling for flags.

void I2C_MasterTransferHandleIRQ(I2C_Type *base, i2c_master_handle_t *handle)

Reusable routine to handle master interrupts.

Note

This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality.

Parameters:
  • base – The I2C peripheral base address.

  • handle – Pointer to the I2C master driver handle.

enum _i2c_direction

Direction of master and slave transfers.

Values:

enumerator kI2C_Write

Master transmit.

enumerator kI2C_Read

Master receive.

enum _i2c_master_transfer_flags

Transfer option flags.

Note

These enumerations are intended to be OR’d together to form a bit mask of options for the _i2c_master_transfer::flags field.

Values:

enumerator kI2C_TransferDefaultFlag

Transfer starts with a start signal, stops with a stop signal.

enumerator kI2C_TransferNoStartFlag

Don’t send a start condition, address, and sub address

enumerator kI2C_TransferRepeatedStartFlag

Send a repeated start condition

enumerator kI2C_TransferNoStopFlag

Don’t send a stop condition.

enum _i2c_transfer_states

States for the state machine used by transactional APIs.

Values:

enumerator kIdleState
enumerator kTransmitSubaddrState
enumerator kTransmitDataState
enumerator kReceiveDataBeginState
enumerator kReceiveDataState
enumerator kReceiveLastDataState
enumerator kStartState
enumerator kStopState
enumerator kWaitForCompletionState
typedef enum _i2c_direction i2c_direction_t

Direction of master and slave transfers.

typedef struct _i2c_master_config i2c_master_config_t

Structure with settings to initialize the I2C master module.

This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef struct _i2c_master_transfer i2c_master_transfer_t

I2C master transfer typedef.

typedef struct _i2c_master_handle i2c_master_handle_t

I2C master handle typedef.

typedef void (*i2c_master_transfer_callback_t)(I2C_Type *base, i2c_master_handle_t *handle, status_t completionStatus, void *userData)

Master completion callback function pointer type.

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to I2C_MasterTransferCreateHandle().

Param base:

The I2C peripheral base address.

Param completionStatus:

Either kStatus_Success or an error code describing how the transfer completed.

Param userData:

Arbitrary pointer-sized value passed from the application.

struct _i2c_master_config
#include <fsl_i2c.h>

Structure with settings to initialize the I2C master module.

This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Public Members

bool enableMaster

Whether to enable master mode.

uint32_t baudRate_Bps

Desired baud rate in bits per second.

bool enableTimeout

Enable internal timeout function.

uint8_t timeout_Ms

Event timeout and SCL low timeout value.

struct _i2c_master_transfer
#include <fsl_i2c.h>

Non-blocking transfer descriptor structure.

This structure is used to pass transaction parameters to the I2C_MasterTransferNonBlocking() API.

Public Members

uint32_t flags

Bit mask of options for the transfer. See enumeration _i2c_master_transfer_flags for available options. Set to 0 or kI2C_TransferDefaultFlag for normal transfers.

uint8_t slaveAddress

The 7-bit slave address.

i2c_direction_t direction

Either kI2C_Read or kI2C_Write.

uint32_t subaddress

Sub address. Transferred MSB first.

size_t subaddressSize

Length of sub address to send in bytes. Maximum size is 4 bytes.

void *data

Pointer to data to transfer.

size_t dataSize

Number of bytes to transfer.

struct _i2c_master_handle
#include <fsl_i2c.h>

Driver handle for master non-blocking APIs.

Note

The contents of this structure are private and subject to change.

Public Members

uint8_t state

Transfer state machine current state.

uint32_t transferCount

Indicates progress of the transfer

uint32_t remainingBytes

Remaining byte count in current state.

uint8_t *buf

Buffer pointer for current state.

bool checkAddrNack

Whether to check the nack signal is detected during addressing.

i2c_master_transfer_t transfer

Copy of the current transfer info.

i2c_master_transfer_callback_t completionCallback

Callback function pointer.

void *userData

Application data passed to callback.

I2C Slave Driver

void I2C_SlaveGetDefaultConfig(i2c_slave_config_t *slaveConfig)

Provides a default configuration for the I2C slave peripheral.

This function provides the following default configuration for the I2C slave peripheral:

slaveConfig->enableSlave = true;
slaveConfig->address0.disable = false;
slaveConfig->address0.address = 0u;
slaveConfig->address1.disable = true;
slaveConfig->address2.disable = true;
slaveConfig->address3.disable = true;
slaveConfig->busSpeed = kI2C_SlaveStandardMode;

After calling this function, override any settings to customize the configuration, prior to initializing the master driver with I2C_SlaveInit(). Be sure to override at least the address0.address member of the configuration structure with the desired slave address.

Parameters:
  • slaveConfig[out] User provided configuration structure that is set to default values. Refer to i2c_slave_config_t.

status_t I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig, uint32_t srcClock_Hz)

Initializes the I2C slave peripheral.

This function enables the peripheral clock and initializes the I2C slave peripheral as described by the user provided configuration.

Parameters:
  • base – The I2C peripheral base address.

  • slaveConfig – User provided peripheral configuration. Use I2C_SlaveGetDefaultConfig() to get a set of defaults that you can override.

  • srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate CLKDIV value to provide enough data setup time for master when slave stretches the clock.

void I2C_SlaveSetAddress(I2C_Type *base, i2c_slave_address_register_t addressRegister, uint8_t address, bool addressDisable)

Configures Slave Address n register.

This function writes new value to Slave Address register.

Parameters:
  • base – The I2C peripheral base address.

  • addressRegister – The module supports multiple address registers. The parameter determines which one shall be changed.

  • address – The slave address to be stored to the address register for matching.

  • addressDisable – Disable matching of the specified address register.

void I2C_SlaveDeinit(I2C_Type *base)

Deinitializes the I2C slave peripheral.

This function disables the I2C slave peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:
  • base – The I2C peripheral base address.

static inline void I2C_SlaveEnable(I2C_Type *base, bool enable)

Enables or disables the I2C module as slave.

Parameters:
  • base – The I2C peripheral base address.

  • enable – True to enable or flase to disable.

static inline void I2C_SlaveClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C status flag state.

The following status register flags can be cleared:

  • slave deselected flag

Attempts to clear other flags has no effect.

See also

_i2c_slave_flags.

Parameters:
  • base – The I2C peripheral base address.

  • statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_slave_flags enumerators OR’d together. You may pass the result of a previous call to I2C_SlaveGetStatusFlags().

status_t I2C_SlaveWriteBlocking(I2C_Type *base, const uint8_t *txBuff, size_t txSize)

Performs a polling send transfer on the I2C bus.

The function executes blocking address phase and blocking data phase.

Parameters:
  • base – The I2C peripheral base address.

  • txBuff – The pointer to the data to be transferred.

  • txSize – The length in bytes of the data to be transferred.

Returns:

kStatus_Success Data has been sent.

Returns:

kStatus_Fail Unexpected slave state (master data write while master read from slave is expected).

status_t I2C_SlaveReadBlocking(I2C_Type *base, uint8_t *rxBuff, size_t rxSize)

Performs a polling receive transfer on the I2C bus.

The function executes blocking address phase and blocking data phase.

Parameters:
  • base – The I2C peripheral base address.

  • rxBuff – The pointer to the data to be transferred.

  • rxSize – The length in bytes of the data to be transferred.

Returns:

kStatus_Success Data has been received.

Returns:

kStatus_Fail Unexpected slave state (master data read while master write to slave is expected).

void I2C_SlaveTransferCreateHandle(I2C_Type *base, i2c_slave_handle_t *handle, i2c_slave_transfer_callback_t callback, void *userData)

Creates a new handle for the I2C slave non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_SlaveTransferAbort() API shall be called.

Parameters:
  • base – The I2C peripheral base address.

  • handle[out] Pointer to the I2C slave driver handle.

  • callback – User provided pointer to the asynchronous callback function.

  • userData – User provided pointer to the application callback data.

status_t I2C_SlaveTransferNonBlocking(I2C_Type *base, i2c_slave_handle_t *handle, uint32_t eventMask)

Starts accepting slave transfers.

Call this API after calling I2C_SlaveInit() and I2C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that was passed into the call to I2C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.

If no slave Tx transfer is busy, a master read from slave request invokes kI2C_SlaveTransmitEvent callback. If no slave Rx transfer is busy, a master write to slave request invokes kI2C_SlaveReceiveEvent callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:
  • base – The I2C peripheral base address.

  • handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

  • eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:
  • kStatus_Success – Slave transfers were successfully started.

  • kStatus_I2C_Busy – Slave transfers have already been started on this handle.

status_t I2C_SlaveSetSendBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, const void *txData, size_t txSize, uint32_t eventMask)

Starts accepting master read from slave requests.

The function can be called in response to kI2C_SlaveTransmitEvent callback to start a new slave Tx transfer from within the transfer callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:
  • base – The I2C peripheral base address.

  • transfer – Pointer to i2c_slave_transfer_t structure.

  • txData – Pointer to data to send to master.

  • txSize – Size of txData in bytes.

  • eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:
  • kStatus_Success – Slave transfers were successfully started.

  • kStatus_I2C_Busy – Slave transfers have already been started on this handle.

status_t I2C_SlaveSetReceiveBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *rxData, size_t rxSize, uint32_t eventMask)

Starts accepting master write to slave requests.

The function can be called in response to kI2C_SlaveReceiveEvent callback to start a new slave Rx transfer from within the transfer callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:
  • base – The I2C peripheral base address.

  • transfer – Pointer to i2c_slave_transfer_t structure.

  • rxData – Pointer to data to store data from master.

  • rxSize – Size of rxData in bytes.

  • eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:
  • kStatus_Success – Slave transfers were successfully started.

  • kStatus_I2C_Busy – Slave transfers have already been started on this handle.

static inline uint32_t I2C_SlaveGetReceivedAddress(I2C_Type *base, volatile i2c_slave_transfer_t *transfer)

Returns the slave address sent by the I2C master.

This function should only be called from the address match event callback kI2C_SlaveAddressMatchEvent.

Parameters:
  • base – The I2C peripheral base address.

  • transfer – The I2C slave transfer.

Returns:

The 8-bit address matched by the I2C slave. Bit 0 contains the R/w direction bit, and the 7-bit slave address is in the upper 7 bits.

void I2C_SlaveTransferAbort(I2C_Type *base, i2c_slave_handle_t *handle)

Aborts the slave non-blocking transfers.

Note

This API could be called at any time to stop slave for handling the bus events.

Parameters:
  • base – The I2C peripheral base address.

  • handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

Return values:
  • kStatus_Success

  • kStatus_I2C_Idle

status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count)

Gets the slave transfer remaining bytes during a interrupt non-blocking transfer.

Parameters:
  • base – I2C base pointer.

  • handle – pointer to i2c_slave_handle_t structure.

  • count – Number of bytes transferred so far by the non-blocking transaction.

Return values:
  • kStatus_InvalidArgument – count is Invalid.

  • kStatus_Success – Successfully return the count.

void I2C_SlaveTransferHandleIRQ(I2C_Type *base, i2c_slave_handle_t *handle)

Reusable routine to handle slave interrupts.

Note

This function does not need to be called unless you are reimplementing the non blocking API’s interrupt handler routines to add special functionality.

Parameters:
  • base – The I2C peripheral base address.

  • handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

enum _i2c_slave_address_register

I2C slave address register.

Values:

enumerator kI2C_SlaveAddressRegister0

Slave Address 0 register.

enumerator kI2C_SlaveAddressRegister1

Slave Address 1 register.

enumerator kI2C_SlaveAddressRegister2

Slave Address 2 register.

enumerator kI2C_SlaveAddressRegister3

Slave Address 3 register.

enum _i2c_slave_address_qual_mode

I2C slave address match options.

Values:

enumerator kI2C_QualModeMask

The SLVQUAL0 field (qualAddress) is used as a logical mask for matching address0.

enumerator kI2C_QualModeExtend

The SLVQUAL0 (qualAddress) field is used to extend address 0 matching in a range of addresses.

enum _i2c_slave_bus_speed

I2C slave bus speed options.

Values:

enumerator kI2C_SlaveStandardMode
enumerator kI2C_SlaveFastMode
enumerator kI2C_SlaveFastModePlus
enumerator kI2C_SlaveHsMode
enum _i2c_slave_transfer_event

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

Values:

enumerator kI2C_SlaveAddressMatchEvent

Received the slave address after a start or repeated start.

enumerator kI2C_SlaveTransmitEvent

Callback is requested to provide data to transmit (slave-transmitter role).

enumerator kI2C_SlaveReceiveEvent

Callback is requested to provide a buffer in which to place received data (slave-receiver role).

enumerator kI2C_SlaveCompletionEvent

All data in the active transfer have been consumed.

enumerator kI2C_SlaveDeselectedEvent

The slave function has become deselected (SLVSEL flag changing from 1 to 0.

enumerator kI2C_SlaveAllEvents

Bit mask of all available events.

enum _i2c_slave_fsm

I2C slave software finite state machine states.

Values:

enumerator kI2C_SlaveFsmAddressMatch
enumerator kI2C_SlaveFsmReceive
enumerator kI2C_SlaveFsmTransmit
typedef enum _i2c_slave_address_register i2c_slave_address_register_t

I2C slave address register.

typedef struct _i2c_slave_address i2c_slave_address_t

Data structure with 7-bit Slave address and Slave address disable.

typedef enum _i2c_slave_address_qual_mode i2c_slave_address_qual_mode_t

I2C slave address match options.

typedef enum _i2c_slave_bus_speed i2c_slave_bus_speed_t

I2C slave bus speed options.

typedef struct _i2c_slave_config i2c_slave_config_t

Structure with settings to initialize the I2C slave module.

This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef enum _i2c_slave_transfer_event i2c_slave_transfer_event_t

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

typedef struct _i2c_slave_handle i2c_slave_handle_t

I2C slave handle typedef.

typedef struct _i2c_slave_transfer i2c_slave_transfer_t

I2C slave transfer structure.

typedef void (*i2c_slave_transfer_callback_t)(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *userData)

Slave event callback function pointer type.

This callback is used only for the slave non-blocking transfer API. To install a callback, use the I2C_SlaveSetCallback() function after you have created a handle.

Param base:

Base address for the I2C instance on which the event occurred.

Param transfer:

Pointer to transfer descriptor containing values passed to and/or from the callback.

Param userData:

Arbitrary pointer-sized value passed from the application.

typedef enum _i2c_slave_fsm i2c_slave_fsm_t

I2C slave software finite state machine states.

typedef void (*flexcomm_i2c_master_irq_handler_t)(I2C_Type *base, i2c_master_handle_t *handle)

Typedef for master interrupt handler.

typedef void (*flexcomm_i2c_slave_irq_handler_t)(I2C_Type *base, i2c_slave_handle_t *handle)

Typedef for slave interrupt handler.

struct _i2c_slave_address
#include <fsl_i2c.h>

Data structure with 7-bit Slave address and Slave address disable.

Public Members

uint8_t address

7-bit Slave address SLVADR.

bool addressDisable

Slave address disable SADISABLE.

struct _i2c_slave_config
#include <fsl_i2c.h>

Structure with settings to initialize the I2C slave module.

This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Public Members

i2c_slave_address_t address0

Slave’s 7-bit address and disable.

i2c_slave_address_t address1

Alternate slave 7-bit address and disable.

i2c_slave_address_t address2

Alternate slave 7-bit address and disable.

i2c_slave_address_t address3

Alternate slave 7-bit address and disable.

i2c_slave_address_qual_mode_t qualMode

Qualify mode for slave address 0.

uint8_t qualAddress

Slave address qualifier for address 0.

i2c_slave_bus_speed_t busSpeed

Slave bus speed mode. If the slave function stretches SCL to allow for software response, it must provide sufficient data setup time to the master before releasing the stretched clock. This is accomplished by inserting one clock time of CLKDIV at that point. The busSpeed value is used to configure CLKDIV such that one clock time is greater than the tSU;DAT value noted in the I2C bus specification for the I2C mode that is being used. If the busSpeed mode is unknown at compile time, use the longest data setup time kI2C_SlaveStandardMode (250 ns)

bool enableSlave

Enable slave mode.

struct _i2c_slave_transfer
#include <fsl_i2c.h>

I2C slave transfer structure.

Public Members

i2c_slave_handle_t *handle

Pointer to handle that contains this transfer.

i2c_slave_transfer_event_t event

Reason the callback is being invoked.

uint8_t receivedAddress

Matching address send by master. 7-bits plus R/nW bit0

uint32_t eventMask

Mask of enabled events.

uint8_t *rxData

Transfer buffer for receive data

const uint8_t *txData

Transfer buffer for transmit data

size_t txSize

Transfer size

size_t rxSize

Transfer size

size_t transferredCount

Number of bytes transferred during this transfer.

status_t completionStatus

Success or error code describing how the transfer completed. Only applies for kI2C_SlaveCompletionEvent.

struct _i2c_slave_handle
#include <fsl_i2c.h>

I2C slave handle structure.

Note

The contents of this structure are private and subject to change.

Public Members

volatile i2c_slave_transfer_t transfer

I2C slave transfer.

volatile bool isBusy

Whether transfer is busy.

volatile i2c_slave_fsm_t slaveFsm

slave transfer state machine.

i2c_slave_transfer_callback_t callback

Callback function called at transfer event.

void *userData

Callback parameter passed to callback.

I2S: I2S Driver

I2S DMA Driver

void I2S_TxTransferCreateHandleDMA(I2S_Type *base, i2s_dma_handle_t *handle, dma_handle_t *dmaHandle, i2s_dma_transfer_callback_t callback, void *userData)

Initializes handle for transfer of audio data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • dmaHandle – pointer to dma handle structure.

  • callback – function to be called back when transfer is done or fails.

  • userData – pointer to data passed to callback.

status_t I2S_TxTransferSendDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t transfer)

Begins or queue sending of the given data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • transfer – data buffer.

Return values:
  • kStatus_Success

  • kStatus_I2S_Busy – if all queue slots are occupied with unsent buffers.

void I2S_TransferAbortDMA(I2S_Type *base, i2s_dma_handle_t *handle)

Aborts transfer of data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

void I2S_RxTransferCreateHandleDMA(I2S_Type *base, i2s_dma_handle_t *handle, dma_handle_t *dmaHandle, i2s_dma_transfer_callback_t callback, void *userData)

Initializes handle for reception of audio data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • dmaHandle – pointer to dma handle structure.

  • callback – function to be called back when transfer is done or fails.

  • userData – pointer to data passed to callback.

status_t I2S_RxTransferReceiveDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t transfer)

Begins or queue reception of data into given buffer.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • transfer – data buffer.

Return values:
  • kStatus_Success

  • kStatus_I2S_Busy – if all queue slots are occupied with buffers which are not full.

void I2S_DMACallback(dma_handle_t *handle, void *userData, bool transferDone, uint32_t tcds)

Invoked from DMA interrupt handler.

Parameters:
  • handle – pointer to DMA handle structure.

  • userData – argument for user callback.

  • transferDone – if transfer was done.

  • tcds

void I2S_TransferInstallLoopDMADescriptorMemory(i2s_dma_handle_t *handle, void *dmaDescriptorAddr, size_t dmaDescriptorNum)

Install DMA descriptor memory for loop transfer only.

This function used to register DMA descriptor memory for the i2s loop dma transfer.

It must be callbed before I2S_TransferSendLoopDMA/I2S_TransferReceiveLoopDMA and after I2S_RxTransferCreateHandleDMA/I2S_TxTransferCreateHandleDMA.

User should be take care about the address of DMA descriptor pool which required align with 16BYTE at least.

Parameters:
  • handle – Pointer to i2s DMA transfer handle.

  • dmaDescriptorAddr – DMA descriptor start address.

  • dmaDescriptorNum – DMA descriptor number.

status_t I2S_TransferSendLoopDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t *xfer, uint32_t loopTransferCount)

Send link transfer data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

This function support loop transfer, such as A->B->…->A, the loop transfer chain will be converted into a chain of descriptor and submit to dma. Application must be aware of that the more counts of the loop transfer, then more DMA descriptor memory required, user can use function I2S_InstallDMADescriptorMemory to register the dma descriptor memory.

As the DMA support maximum 1024 transfer count, so application must be aware of that this transfer function support maximum 1024 samples in each transfer, otherwise assert error or error status will be returned. Once the loop transfer start, application can use function I2S_TransferAbortDMA to stop the loop transfer.

Parameters:
  • base – I2S peripheral base address.

  • handle – Pointer to usart_dma_handle_t structure.

  • xfer – I2S DMA transfer structure. See i2s_transfer_t.

  • loopTransferCount – loop count

Return values:

kStatus_Success

status_t I2S_TransferReceiveLoopDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t *xfer, uint32_t loopTransferCount)

Receive link transfer data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

This function support loop transfer, such as A->B->…->A, the loop transfer chain will be converted into a chain of descriptor and submit to dma. Application must be aware of that the more counts of the loop transfer, then more DMA descriptor memory required, user can use function I2S_InstallDMADescriptorMemory to register the dma descriptor memory.

As the DMA support maximum 1024 transfer count, so application must be aware of that this transfer function support maximum 1024 samples in each transfer, otherwise assert error or error status will be returned. Once the loop transfer start, application can use function I2S_TransferAbortDMA to stop the loop transfer.

Parameters:
  • base – I2S peripheral base address.

  • handle – Pointer to usart_dma_handle_t structure.

  • xfer – I2S DMA transfer structure. See i2s_transfer_t.

  • loopTransferCount – loop count

Return values:

kStatus_Success

FSL_I2S_DMA_DRIVER_VERSION

I2S DMA driver version 2.3.3.

typedef struct _i2s_dma_handle i2s_dma_handle_t

Members not to be accessed / modified outside of the driver.

typedef void (*i2s_dma_transfer_callback_t)(I2S_Type *base, i2s_dma_handle_t *handle, status_t completionStatus, void *userData)

Callback function invoked from DMA API on completion.

Param base:

I2S base pointer.

Param handle:

pointer to I2S transaction.

Param completionStatus:

status of the transaction.

Param userData:

optional pointer to user arguments data.

struct _i2s_dma_handle
#include <fsl_i2s_dma.h>

i2s dma handle

Public Members

uint32_t state

Internal state of I2S DMA transfer

uint8_t bytesPerFrame

bytes per frame

i2s_dma_transfer_callback_t completionCallback

Callback function pointer

void *userData

Application data passed to callback

dma_handle_t *dmaHandle

DMA handle

volatile i2s_transfer_t i2sQueue[(4U)]

Transfer queue storing transfer buffers

volatile uint8_t queueUser

Queue index where user’s next transfer will be stored

volatile uint8_t queueDriver

Queue index of buffer actually used by the driver

dma_descriptor_t *i2sLoopDMADescriptor

descriptor pool pointer

size_t i2sLoopDMADescriptorNum

number of descriptor in descriptors pool

I2S Driver

void I2S_TxInit(I2S_Type *base, const i2s_config_t *config)

Initializes the FLEXCOMM peripheral for I2S transmit functionality.

Ungates the FLEXCOMM clock and configures the module for I2S transmission using a configuration structure. The configuration structure can be custom filled or set with default values by I2S_TxGetDefaultConfig().

Note

This API should be called at the beginning of the application to use the I2S driver.

Parameters:
  • base – I2S base pointer.

  • config – pointer to I2S configuration structure.

void I2S_RxInit(I2S_Type *base, const i2s_config_t *config)

Initializes the FLEXCOMM peripheral for I2S receive functionality.

Ungates the FLEXCOMM clock and configures the module for I2S receive using a configuration structure. The configuration structure can be custom filled or set with default values by I2S_RxGetDefaultConfig().

Note

This API should be called at the beginning of the application to use the I2S driver.

Parameters:
  • base – I2S base pointer.

  • config – pointer to I2S configuration structure.

void I2S_TxGetDefaultConfig(i2s_config_t *config)

Sets the I2S Tx configuration structure to default values.

This API initializes the configuration structure for use in I2S_TxInit(). The initialized structure can remain unchanged in I2S_TxInit(), or it can be modified before calling I2S_TxInit(). Example:

i2s_config_t config;
I2S_TxGetDefaultConfig(&config);

Default values:

config->masterSlave = kI2S_MasterSlaveNormalMaster;
config->mode = kI2S_ModeI2sClassic;
config->rightLow = false;
config->leftJust = false;
config->pdmData = false;
config->sckPol = false;
config->wsPol = false;
config->divider = 1;
config->oneChannel = false;
config->dataLength = 16;
config->frameLength = 32;
config->position = 0;
config->watermark = 4;
config->txEmptyZero = true;
config->pack48 = false;

Parameters:
  • config – pointer to I2S configuration structure.

void I2S_RxGetDefaultConfig(i2s_config_t *config)

Sets the I2S Rx configuration structure to default values.

This API initializes the configuration structure for use in I2S_RxInit(). The initialized structure can remain unchanged in I2S_RxInit(), or it can be modified before calling I2S_RxInit(). Example:

i2s_config_t config;
I2S_RxGetDefaultConfig(&config);

Default values:

config->masterSlave = kI2S_MasterSlaveNormalSlave;
config->mode = kI2S_ModeI2sClassic;
config->rightLow = false;
config->leftJust = false;
config->pdmData = false;
config->sckPol = false;
config->wsPol = false;
config->divider = 1;
config->oneChannel = false;
config->dataLength = 16;
config->frameLength = 32;
config->position = 0;
config->watermark = 4;
config->txEmptyZero = false;
config->pack48 = false;

Parameters:
  • config – pointer to I2S configuration structure.

void I2S_Deinit(I2S_Type *base)

De-initializes the I2S peripheral.

This API gates the FLEXCOMM clock. The I2S module can’t operate unless I2S_TxInit or I2S_RxInit is called to enable the clock.

Parameters:
  • base – I2S base pointer.

void I2S_SetBitClockRate(I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers)

Transmitter/Receiver bit clock rate configurations.

Parameters:
  • base – SAI base pointer.

  • sourceClockHz – bit clock source frequency.

  • sampleRate – audio data sample rate.

  • bitWidth – audio data bitWidth.

  • channelNumbers – audio channel numbers.

void I2S_TxTransferCreateHandle(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_callback_t callback, void *userData)

Initializes handle for transfer of audio data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • callback – function to be called back when transfer is done or fails.

  • userData – pointer to data passed to callback.

status_t I2S_TxTransferNonBlocking(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_t transfer)

Begins or queue sending of the given data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • transfer – data buffer.

Return values:
  • kStatus_Success

  • kStatus_I2S_Busy – if all queue slots are occupied with unsent buffers.

void I2S_TxTransferAbort(I2S_Type *base, i2s_handle_t *handle)

Aborts sending of data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

void I2S_RxTransferCreateHandle(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_callback_t callback, void *userData)

Initializes handle for reception of audio data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • callback – function to be called back when transfer is done or fails.

  • userData – pointer to data passed to callback.

status_t I2S_RxTransferNonBlocking(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_t transfer)

Begins or queue reception of data into given buffer.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • transfer – data buffer.

Return values:
  • kStatus_Success

  • kStatus_I2S_Busy – if all queue slots are occupied with buffers which are not full.

void I2S_RxTransferAbort(I2S_Type *base, i2s_handle_t *handle)

Aborts receiving of data.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

status_t I2S_TransferGetCount(I2S_Type *base, i2s_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • count[out] number of bytes transferred so far by the non-blocking transaction.

Return values:
  • kStatus_Success

  • kStatus_NoTransferInProgress – there is no non-blocking transaction currently in progress.

status_t I2S_TransferGetErrorCount(I2S_Type *base, i2s_handle_t *handle, size_t *count)

Returns number of buffer underruns or overruns.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

  • count[out] number of transmit errors encountered so far by the non-blocking transaction.

Return values:
  • kStatus_Success

  • kStatus_NoTransferInProgress – there is no non-blocking transaction currently in progress.

static inline void I2S_Enable(I2S_Type *base)

Enables I2S operation.

Parameters:
  • base – I2S base pointer.

void I2S_EnableSecondaryChannel(I2S_Type *base, uint32_t channel, bool oneChannel, uint32_t position)

Enables I2S secondary channel.

Parameters:
  • base – I2S base pointer.

  • channel – seondary channel channel number, reference _i2s_secondary_channel.

  • oneChannel – true is treated as single channel, functionality left channel for this pair.

  • position – define the location within the frame of the data, should not bigger than 0x1FFU.

static inline void I2S_DisableSecondaryChannel(I2S_Type *base, uint32_t channel)

Disables I2S secondary channel.

Parameters:
  • base – I2S base pointer.

  • channel – seondary channel channel number, reference _i2s_secondary_channel.

static inline void I2S_Disable(I2S_Type *base)

Disables I2S operation.

Parameters:
  • base – I2S base pointer.

static inline void I2S_EnableInterrupts(I2S_Type *base, uint32_t interruptMask)

Enables I2S FIFO interrupts.

Parameters:
  • base – I2S base pointer.

  • interruptMask – bit mask of interrupts to enable. See i2s_flags_t for the set of constants that should be OR’d together to form the bit mask.

static inline void I2S_DisableInterrupts(I2S_Type *base, uint32_t interruptMask)

Disables I2S FIFO interrupts.

Parameters:
  • base – I2S base pointer.

  • interruptMask – bit mask of interrupts to enable. See i2s_flags_t for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t I2S_GetEnabledInterrupts(I2S_Type *base)

Returns the set of currently enabled I2S FIFO interrupts.

Parameters:
  • base – I2S base pointer.

Returns:

A bitmask composed of i2s_flags_t enumerators OR’d together to indicate the set of enabled interrupts.

status_t I2S_EmptyTxFifo(I2S_Type *base)

Flush the valid data in TX fifo.

Parameters:
  • base – I2S base pointer.

Returns:

kStatus_Fail empty TX fifo failed, kStatus_Success empty tx fifo success.

void I2S_TxHandleIRQ(I2S_Type *base, i2s_handle_t *handle)

Invoked from interrupt handler when transmit FIFO level decreases.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

void I2S_RxHandleIRQ(I2S_Type *base, i2s_handle_t *handle)

Invoked from interrupt handler when receive FIFO level decreases.

Parameters:
  • base – I2S base pointer.

  • handle – pointer to handle structure.

FSL_I2S_DRIVER_VERSION

I2S driver version 2.3.2.

_i2s_status I2S status codes.

Values:

enumerator kStatus_I2S_BufferComplete

Transfer from/into a single buffer has completed

enumerator kStatus_I2S_Done

All buffers transfers have completed

enumerator kStatus_I2S_Busy

Already performing a transfer and cannot queue another buffer

enum _i2s_flags

I2S flags.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2S_TxErrorFlag

TX error interrupt

enumerator kI2S_TxLevelFlag

TX level interrupt

enumerator kI2S_RxErrorFlag

RX error interrupt

enumerator kI2S_RxLevelFlag

RX level interrupt

enum _i2s_master_slave

Master / slave mode.

Values:

enumerator kI2S_MasterSlaveNormalSlave

Normal slave

enumerator kI2S_MasterSlaveWsSyncMaster

WS synchronized master

enumerator kI2S_MasterSlaveExtSckMaster

Master using existing SCK

enumerator kI2S_MasterSlaveNormalMaster

Normal master

enum _i2s_mode

I2S mode.

Values:

enumerator kI2S_ModeI2sClassic

I2S classic mode

enumerator kI2S_ModeDspWs50

DSP mode, WS having 50% duty cycle

enumerator kI2S_ModeDspWsShort

DSP mode, WS having one clock long pulse

enumerator kI2S_ModeDspWsLong

DSP mode, WS having one data slot long pulse

_i2s_secondary_channel I2S secondary channel.

Values:

enumerator kI2S_SecondaryChannel1

secondary channel 1

enumerator kI2S_SecondaryChannel2

secondary channel 2

enumerator kI2S_SecondaryChannel3

secondary channel 3

typedef enum _i2s_flags i2s_flags_t

I2S flags.

Note

These enums are meant to be OR’d together to form a bit mask.

typedef enum _i2s_master_slave i2s_master_slave_t

Master / slave mode.

typedef enum _i2s_mode i2s_mode_t

I2S mode.

typedef struct _i2s_config i2s_config_t

I2S configuration structure.

typedef struct _i2s_transfer i2s_transfer_t

Buffer to transfer from or receive audio data into.

typedef struct _i2s_handle i2s_handle_t

Transactional state of the intialized transfer or receive I2S operation.

typedef void (*i2s_transfer_callback_t)(I2S_Type *base, i2s_handle_t *handle, status_t completionStatus, void *userData)

Callback function invoked from transactional API on completion of a single buffer transfer.

Param base:

I2S base pointer.

Param handle:

pointer to I2S transaction.

Param completionStatus:

status of the transaction.

Param userData:

optional pointer to user arguments data.

I2S_NUM_BUFFERS

Number of buffers .

struct _i2s_config
#include <fsl_i2s.h>

I2S configuration structure.

Public Members

i2s_master_slave_t masterSlave

Master / slave configuration

i2s_mode_t mode

I2S mode

bool rightLow

Right channel data in low portion of FIFO

bool leftJust

Left justify data in FIFO

bool pdmData

Data source is the D-Mic subsystem

bool sckPol

SCK polarity

bool wsPol

WS polarity

uint16_t divider

Flexcomm function clock divider (1 - 4096)

bool oneChannel

true mono, false stereo

uint8_t dataLength

Data length (4 - 32)

uint16_t frameLength

Frame width (4 - 512)

uint16_t position

Data position in the frame

uint8_t watermark

FIFO trigger level

bool txEmptyZero

Transmit zero when buffer becomes empty or last item

bool pack48

Packing format for 48-bit data (false - 24 bit values, true - alternating 32-bit and 16-bit values)

struct _i2s_transfer
#include <fsl_i2s.h>

Buffer to transfer from or receive audio data into.

Public Members

uint8_t *data

Pointer to data buffer.

size_t dataSize

Buffer size in bytes.

struct _i2s_handle
#include <fsl_i2s.h>

Members not to be accessed / modified outside of the driver.

Public Members

volatile uint32_t state

State of transfer

i2s_transfer_callback_t completionCallback

Callback function pointer

void *userData

Application data passed to callback

bool oneChannel

true mono, false stereo

uint8_t dataLength

Data length (4 - 32)

bool pack48

Packing format for 48-bit data (false - 24 bit values, true - alternating 32-bit and 16-bit values)

uint8_t watermark

FIFO trigger level

bool useFifo48H

When dataLength 17-24: true use FIFOWR48H, false use FIFOWR

volatile i2s_transfer_t i2sQueue[(4U)]

Transfer queue storing transfer buffers

volatile uint8_t queueUser

Queue index where user’s next transfer will be stored

volatile uint8_t queueDriver

Queue index of buffer actually used by the driver

volatile uint32_t errorCount

Number of buffer underruns/overruns

volatile uint32_t transferCount

Number of bytes transferred

INPUTMUX: Input Multiplexing Driver

enum _inputmux_connection_t

INPUTMUX connections type.

Values:

enumerator kINPUTMUX_SctGpi0ToSct0

SCT0 INMUX.

enumerator kINPUTMUX_SctGpi1ToSct0
enumerator kINPUTMUX_SctGpi2ToSct0
enumerator kINPUTMUX_SctGpi3ToSct0
enumerator kINPUTMUX_SctGpi4ToSct0
enumerator kINPUTMUX_SctGpi5ToSct0
enumerator kINPUTMUX_SctGpi6ToSct0
enumerator kINPUTMUX_SctGpi7ToSct0
enumerator kINPUTMUX_Ctimer0M0ToSct0
enumerator kINPUTMUX_Ctimer1M0ToSct0
enumerator kINPUTMUX_Ctimer2M0ToSct0
enumerator kINPUTMUX_Ctimer3M0ToSct0
enumerator kINPUTMUX_Ctimer4M0ToSct0
enumerator kINPUTMUX_AdcIrqToSct0
enumerator kINPUTMUX_GpiointBmatchToSct0
enumerator kINPUTMUX_CompOutToSct0
enumerator kINPUTMUX_I2sSharedSck0ToSct0
enumerator kINPUTMUX_I2sSharedSck1ToSct0
enumerator kINPUTMUX_I2sSharedWs0ToSct0
enumerator kINPUTMUX_I2sSharedWs1ToSct0
enumerator kINPUTMUX_ArmTxevToSct0
enumerator kINPUTMUX_DebugHaltedToSct0

TIMER0 CAPTSEL.

enumerator kINPUTMUX_CtimerInp0ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp1ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp2ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp3ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp4ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp5ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp6ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp7ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp8ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp9ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp10ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp11ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp12ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp13ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp14ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp15ToTimer0Captsel
enumerator kINPUTMUX_CtimerInp16ToTimer0Captsel
enumerator kINPUTMUX_CompOutToTimer0Captsel
enumerator kINPUTMUX_I2sSharedWs0ToTimer0Captsel
enumerator kINPUTMUX_I2sSharedWs1ToTimer0Captsel

TIMER1 CAPTSEL.

enumerator kINPUTMUX_CtimerInp0ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp1ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp2ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp3ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp4ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp5ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp6ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp7ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp8ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp9ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp10ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp11ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp12ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp13ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp14ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp15ToTimer1Captsel
enumerator kINPUTMUX_CtimerInp16ToTimer1Captsel
enumerator kINPUTMUX_CompOutToTimer1Captsel
enumerator kINPUTMUX_I2sSharedWs0ToTimer1Captsel
enumerator kINPUTMUX_I2sSharedWs1ToTimer1Captsel

TIMER2 CAPTSEL.

enumerator kINPUTMUX_CtimerInp0ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp1ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp2ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp3ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp4ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp5ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp6ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp7ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp8ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp9ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp10ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp11ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp12ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp13ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp14ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp15ToTimer2Captsel
enumerator kINPUTMUX_CtimerInp16ToTimer2Captsel
enumerator kINPUTMUX_CompOutToTimer2Captsel
enumerator kINPUTMUX_I2sSharedWs0ToTimer2Captsel
enumerator kINPUTMUX_I2sSharedWs1ToTimer2Captsel

Pin interrupt select.

enumerator kINPUTMUX_GpioPort0Pin0ToPintsel
enumerator kINPUTMUX_GpioPort0Pin1ToPintsel
enumerator kINPUTMUX_GpioPort0Pin2ToPintsel
enumerator kINPUTMUX_GpioPort0Pin3ToPintsel
enumerator kINPUTMUX_GpioPort0Pin4ToPintsel
enumerator kINPUTMUX_GpioPort0Pin5ToPintsel
enumerator kINPUTMUX_GpioPort0Pin6ToPintsel
enumerator kINPUTMUX_GpioPort0Pin7ToPintsel
enumerator kINPUTMUX_GpioPort0Pin8ToPintsel
enumerator kINPUTMUX_GpioPort0Pin9ToPintsel
enumerator kINPUTMUX_GpioPort0Pin10ToPintsel
enumerator kINPUTMUX_GpioPort0Pin11ToPintsel
enumerator kINPUTMUX_GpioPort0Pin12ToPintsel
enumerator kINPUTMUX_GpioPort0Pin13ToPintsel
enumerator kINPUTMUX_GpioPort0Pin14ToPintsel
enumerator kINPUTMUX_GpioPort0Pin15ToPintsel
enumerator kINPUTMUX_GpioPort0Pin16ToPintsel
enumerator kINPUTMUX_GpioPort0Pin17ToPintsel
enumerator kINPUTMUX_GpioPort0Pin18ToPintsel
enumerator kINPUTMUX_GpioPort0Pin19ToPintsel
enumerator kINPUTMUX_GpioPort0Pin20ToPintsel
enumerator kINPUTMUX_GpioPort0Pin21ToPintsel
enumerator kINPUTMUX_GpioPort0Pin22ToPintsel
enumerator kINPUTMUX_GpioPort0Pin23ToPintsel
enumerator kINPUTMUX_GpioPort0Pin24ToPintsel
enumerator kINPUTMUX_GpioPort0Pin25ToPintsel
enumerator kINPUTMUX_GpioPort0Pin26ToPintsel
enumerator kINPUTMUX_GpioPort0Pin27ToPintsel
enumerator kINPUTMUX_GpioPort0Pin28ToPintsel
enumerator kINPUTMUX_GpioPort0Pin29ToPintsel
enumerator kINPUTMUX_GpioPort0Pin30ToPintsel
enumerator kINPUTMUX_GpioPort0Pin31ToPintsel
enumerator kINPUTMUX_GpioPort1Pin0ToPintsel
enumerator kINPUTMUX_GpioPort1Pin1ToPintsel
enumerator kINPUTMUX_GpioPort1Pin2ToPintsel
enumerator kINPUTMUX_GpioPort1Pin3ToPintsel
enumerator kINPUTMUX_GpioPort1Pin4ToPintsel
enumerator kINPUTMUX_GpioPort1Pin5ToPintsel
enumerator kINPUTMUX_GpioPort1Pin6ToPintsel
enumerator kINPUTMUX_GpioPort1Pin7ToPintsel
enumerator kINPUTMUX_GpioPort1Pin8ToPintsel
enumerator kINPUTMUX_GpioPort1Pin9ToPintsel
enumerator kINPUTMUX_GpioPort1Pin10ToPintsel
enumerator kINPUTMUX_GpioPort1Pin11ToPintsel
enumerator kINPUTMUX_GpioPort1Pin12ToPintsel
enumerator kINPUTMUX_GpioPort1Pin13ToPintsel
enumerator kINPUTMUX_GpioPort1Pin14ToPintsel
enumerator kINPUTMUX_GpioPort1Pin15ToPintsel
enumerator kINPUTMUX_GpioPort1Pin16ToPintsel
enumerator kINPUTMUX_GpioPort1Pin17ToPintsel
enumerator kINPUTMUX_GpioPort1Pin18ToPintsel
enumerator kINPUTMUX_GpioPort1Pin19ToPintsel
enumerator kINPUTMUX_GpioPort1Pin20ToPintsel
enumerator kINPUTMUX_GpioPort1Pin21ToPintsel
enumerator kINPUTMUX_GpioPort1Pin22ToPintsel
enumerator kINPUTMUX_GpioPort1Pin23ToPintsel
enumerator kINPUTMUX_GpioPort1Pin24ToPintsel
enumerator kINPUTMUX_GpioPort1Pin25ToPintsel
enumerator kINPUTMUX_GpioPort1Pin26ToPintsel
enumerator kINPUTMUX_GpioPort1Pin27ToPintsel
enumerator kINPUTMUX_GpioPort1Pin28ToPintsel
enumerator kINPUTMUX_GpioPort1Pin29ToPintsel
enumerator kINPUTMUX_GpioPort1Pin30ToPintsel
enumerator kINPUTMUX_GpioPort1Pin31ToPintsel

DMA0 Input trigger.

enumerator kINPUTMUX_PinInt0ToDma0
enumerator kINPUTMUX_PinInt1ToDma0
enumerator kINPUTMUX_PinInt2ToDma0
enumerator kINPUTMUX_PinInt3ToDma0
enumerator kINPUTMUX_Ctimer0M0ToDma0
enumerator kINPUTMUX_Ctimer0M1ToDma0
enumerator kINPUTMUX_Ctimer1M0ToDma0
enumerator kINPUTMUX_Ctimer1M1ToDma0
enumerator kINPUTMUX_Ctimer2M0ToDma0
enumerator kINPUTMUX_Ctimer2M1ToDma0
enumerator kINPUTMUX_Ctimer3M0ToDma0
enumerator kINPUTMUX_Ctimer3M1ToDma0
enumerator kINPUTMUX_Ctimer4M0ToDma0
enumerator kINPUTMUX_Ctimer4M1ToDma0
enumerator kINPUTMUX_CompOutToDma0
enumerator kINPUTMUX_Otrig0ToDma0
enumerator kINPUTMUX_Otrig1ToDma0
enumerator kINPUTMUX_Otrig2ToDma0
enumerator kINPUTMUX_Otrig3ToDma0
enumerator kINPUTMUX_Sct0DmaReq0ToDma0
enumerator kINPUTMUX_Sct0DmaReq1ToDma0
enumerator kINPUTMUX_HashDmaRxToDma0

DMA0 output trigger.

enumerator kINPUTMUX_Dma0Hash0TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0HsLspiRxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0HsLspiTxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm0RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm0TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm1RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm1TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm3RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm3TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm2RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm2TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm4RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm4TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm5RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm5TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm6RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm6TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm7RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Flexcomm7TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Adc0Ch0TrigoutToTriginChannels
enumerator kINPUTMUX_Dma0Adc0Ch1TrigoutToTriginChannels

Selection for frequency measurement reference clock.

enumerator kINPUTMUX_ExternOscToFreqmeasRef
enumerator kINPUTMUX_Fro12MhzToFreqmeasRef
enumerator kINPUTMUX_Fro96MhzToFreqmeasRef
enumerator kINPUTMUX_WdtOscToFreqmeasRef
enumerator kINPUTMUX_32KhzOscToFreqmeasRef
enumerator kINPUTMUX_MainClkToFreqmeasRef
enumerator kINPUTMUX_FreqmeGpioClk_aRef
enumerator kINPUTMUX_FreqmeGpioClk_bRef

Selection for frequency measurement target clock.

enumerator kINPUTMUX_ExternOscToFreqmeasTarget
enumerator kINPUTMUX_Fro12MhzToFreqmeasTarget
enumerator kINPUTMUX_Fro96MhzToFreqmeasTarget
enumerator kINPUTMUX_WdtOscToFreqmeasTarget
enumerator kINPUTMUX_32KhzOscToFreqmeasTarget
enumerator kINPUTMUX_MainClkToFreqmeasTarget
enumerator kINPUTMUX_FreqmeGpioClk_aTarget
enumerator kINPUTMUX_FreqmeGpioClk_bTarget

TIMER3 CAPTSEL.

enumerator kINPUTMUX_CtimerInp0ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp1ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp2ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp3ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp4ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp5ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp6ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp7ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp8ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp9ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp10ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp11ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp12ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp13ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp14ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp15ToTimer3Captsel
enumerator kINPUTMUX_CtimerInp16ToTimer3Captsel
enumerator kINPUTMUX_CompOutToTimer3Captsel
enumerator kINPUTMUX_I2sSharedWs0ToTimer3Captsel
enumerator kINPUTMUX_I2sSharedWs1ToTimer3Captsel

Timer4 CAPTSEL.

enumerator kINPUTMUX_CtimerInp0ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp1ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp2ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp3ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp4ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp5ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp6ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp7ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp8ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp9ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp10ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp11ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp12ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp13ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp14ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp15ToTimer4Captsel
enumerator kINPUTMUX_CtimerInp16ToTimer4Captsel
enumerator kINPUTMUX_CompOutToTimer4Captsel
enumerator kINPUTMUX_I2sSharedWs0ToTimer4Captsel
enumerator kINPUTMUX_I2sSharedWs1ToTimer4Captsel
enumerator kINPUTMUX_GpioPort0Pin0ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin1ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin2ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin3ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin4ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin5ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin6ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin7ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin8ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin9ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin10ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin11ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin12ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin13ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin14ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin15ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin16ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin17ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin18ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin19ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin20ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin21ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin22ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin23ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin24ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin25ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin26ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin27ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin28ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin29ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin30ToPintSecsel
enumerator kINPUTMUX_GpioPort0Pin31ToPintSecsel

DMA1 Input trigger.

enumerator kINPUTMUX_PinInt0ToDma1
enumerator kINPUTMUX_PinInt1ToDma1
enumerator kINPUTMUX_PinInt2ToDma1
enumerator kINPUTMUX_PinInt3ToDma1
enumerator kINPUTMUX_Ctimer0M0ToDma1
enumerator kINPUTMUX_Ctimer0M1ToDma1
enumerator kINPUTMUX_Ctimer2M0ToDma1
enumerator kINPUTMUX_Ctimer4M0ToDma1
enumerator kINPUTMUX_Otrig0ToDma1
enumerator kINPUTMUX_Otrig1ToDma1
enumerator kINPUTMUX_Otrig2ToDma1
enumerator kINPUTMUX_Otrig3ToDma1
enumerator kINPUTMUX_Sct0DmaReq0ToDma1
enumerator kINPUTMUX_Sct0DmaReq1ToDma1
enumerator kINPUTMUX_HashDmaRxToDma1

DMA1 output trigger.

enumerator kINPUTMUX_Dma1Hash0TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma1HsLspiRxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma1HsLspiTxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma1Flexcomm0RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma1Flexcomm0TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma1Flexcomm1RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma1Flexcomm1TxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma1Flexcomm3RxTrigoutToTriginChannels
enumerator kINPUTMUX_Dma1Flexcomm3TxTrigoutToTriginChannels
enum _inputmux_signal_t

INPUTMUX signal enable/disable type.

Values:

enumerator kINPUTMUX_HashCryptToDmac0Ch0RequestEna

DMA0 REQ signal.

enumerator kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna
enumerator kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna
enumerator kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna
enumerator kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna
enumerator kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna
enumerator kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna
enumerator kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna
enumerator kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna
enumerator kINPUTMUX_Flexcomm2RxToDmac0Ch10RequestEna
enumerator kINPUTMUX_Flexcomm2TxToDmac0Ch11RequestEna
enumerator kINPUTMUX_Flexcomm4RxToDmac0Ch12RequestEna
enumerator kINPUTMUX_Flexcomm4TxToDmac0Ch13RequestEna
enumerator kINPUTMUX_Flexcomm5RxToDmac0Ch14RequestEna
enumerator kINPUTMUX_Flexcomm5TxToDmac0Ch15RequestEna
enumerator kINPUTMUX_Flexcomm6RxToDmac0Ch16RequestEna
enumerator kINPUTMUX_Flexcomm6TxToDmac0Ch17RequestEna
enumerator kINPUTMUX_Flexcomm7RxToDmac0Ch18RequestEna
enumerator kINPUTMUX_Flexcomm7TxToDmac0Ch19RequestEna
enumerator kINPUTMUX_Adc0FIFO0ToDmac0Ch21RequestEna
enumerator kINPUTMUX_Adc0FIFO1ToDmac0Ch22RequestEna

DMA1 REQ signal.

enumerator kINPUTMUX_HashCryptToDmac1Ch0RequestEna
enumerator kINPUTMUX_Flexcomm8RxToDmac1Ch2RequestEna
enumerator kINPUTMUX_Flexcomm8TxToDmac1Ch3RequestEna
enumerator kINPUTMUX_Flexcomm0RxToDmac1Ch4RequestEna
enumerator kINPUTMUX_Flexcomm0TxToDmac1Ch5RequestEna
enumerator kINPUTMUX_Flexcomm1RxToDmac1Ch6RequestEna
enumerator kINPUTMUX_Flexcomm1TxToDmac1Ch7RequestEna
enumerator kINPUTMUX_Flexcomm3RxToDmac1Ch8RequestEna
enumerator kINPUTMUX_Flexcomm3TxToDmac1Ch9RequestEna

DMA0 input trigger source enable.

enumerator kINPUTMUX_Dmac0InputTriggerPint0Ena
enumerator kINPUTMUX_Dmac0InputTriggerPint1Ena
enumerator kINPUTMUX_Dmac0InputTriggerPint2Ena
enumerator kINPUTMUX_Dmac0InputTriggerPint3Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer0M0Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer0M1Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer1M0Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer1M1Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer2M0Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer2M1Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer3M0Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer3M1Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer4M0Ena
enumerator kINPUTMUX_Dmac0InputTriggerCtimer4M1Ena
enumerator kINPUTMUX_Dmac0InputTriggerCompOutEna
enumerator kINPUTMUX_Dmac0InputTriggerDma0Out0Ena
enumerator kINPUTMUX_Dmac0InputTriggerDma0Out1Ena
enumerator kINPUTMUX_Dmac0InputTriggerDma0Out2Ena
enumerator kINPUTMUX_Dmac0InputTriggerDma0Out3Ena
enumerator kINPUTMUX_Dmac0InputTriggerSctDmac0Ena
enumerator kINPUTMUX_Dmac0InputTriggerSctDmac1Ena
enumerator kINPUTMUX_Dmac0InputTriggerHashOutEna

DMA1 input trigger source enable.

enumerator kINPUTMUX_Dmac1InputTriggerPint0Ena
enumerator kINPUTMUX_Dmac1InputTriggerPint1Ena
enumerator kINPUTMUX_Dmac1InputTriggerPint2Ena
enumerator kINPUTMUX_Dmac1InputTriggerPint3Ena
enumerator kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena
enumerator kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena
enumerator kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena
enumerator kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena
enumerator kINPUTMUX_Dmac1InputTriggerDma1Out0Ena
enumerator kINPUTMUX_Dmac1InputTriggerDma1Out1Ena
enumerator kINPUTMUX_Dmac1InputTriggerDma1Out2Ena
enumerator kINPUTMUX_Dmac1InputTriggerDma1Out3Ena
enumerator kINPUTMUX_Dmac1InputTriggerSctDmac0Ena
enumerator kINPUTMUX_Dmac1InputTriggerSctDmac1Ena
enumerator kINPUTMUX_Dmac1InputTriggerHashOutEna
typedef enum _inputmux_connection_t inputmux_connection_t

INPUTMUX connections type.

typedef enum _inputmux_signal_t inputmux_signal_t

INPUTMUX signal enable/disable type.

SCT0_INMUX0

Periphinmux IDs.

TIMER0CAPTSEL0
TIMER1CAPTSEL0
TIMER2CAPTSEL0
PINTSEL_PMUX_ID
PINTSEL0
DMA0_ITRIG_INMUX0
DMA0_OTRIG_INMUX0
FREQMEAS_REF_REG
FREQMEAS_TARGET_REG
TIMER3CAPTSEL0
TIMER4CAPTSEL0
PINTSECSEL0
DMA1_ITRIG_INMUX0
DMA1_OTRIG_INMUX0
DMA0_REQ_ENA_ID
DMA1_REQ_ENA_ID
DMA0_ITRIG_ENA_ID
DMA1_ITRIG_ENA_ID
ENA_SHIFT
PMUX_SHIFT
FSL_INPUTMUX_DRIVER_VERSION

Group interrupt driver version for SDK.

void INPUTMUX_Init(INPUTMUX_Type *base)

Initialize INPUTMUX peripheral.

This function enables the INPUTMUX clock.

Parameters:
  • base – Base address of the INPUTMUX peripheral.

Return values:

None.

void INPUTMUX_AttachSignal(INPUTMUX_Type *base, uint16_t index, inputmux_connection_t connection)

Attaches a signal.

This function attaches multiplexed signals from INPUTMUX to target signals. For example, to attach GPIO PORT0 Pin 5 to PINT peripheral, do the following:

INPUTMUX_AttachSignal(INPUTMUX, 2, kINPUTMUX_GpioPort0Pin5ToPintsel);
In this example, INTMUX has 8 registers for PINT, PINT_SEL0~PINT_SEL7. With parameter index specified as 2, this function configures register PINT_SEL2.

Parameters:
  • base – Base address of the INPUTMUX peripheral.

  • index – The serial number of destination register in the group of INPUTMUX registers with same name.

  • connection – Applies signal from source signals collection to target signal.

Return values:

None.

void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable)

Enable/disable a signal.

This function gates the INPUTPMUX clock.

Parameters:
  • base – Base address of the INPUTMUX peripheral.

  • signal – Enable signal register id and bit offset.

  • enable – Selects enable or disable.

Return values:

None.

void INPUTMUX_Deinit(INPUTMUX_Type *base)

Deinitialize INPUTMUX peripheral.

This function disables the INPUTMUX clock.

Parameters:
  • base – Base address of the INPUTMUX peripheral.

Return values:

None.

IAP_KBP Driver

ROM API status codes.

Values:

enumerator kStatus_RomApiExecuteCompleted

ROM successfully process the whole sb file/boot image.

enumerator kStatus_RomApiNeedMoreData

ROM needs more data to continue processing the boot image.

enumerator kStatus_RomApiBufferSizeNotEnough

The user buffer is not enough for use by Kboot during execution of the operation.

enumerator kStatus_RomApiInvalidBuffer

The user buffer is not ok for sbloader or authentication.

enum _kb_operation

Details of the operation to be performed by the ROM.

The kRomAuthenticateImage operation requires the entire signed image to be available to the application.

Values:

enumerator kRomAuthenticateImage

Authenticate a signed image.

enumerator kRomLoadImage

Load SB file.

enumerator kRomOperationCount
enum _kb_security_profile

Security constraint flags, Security profile flags.

Values:

enumerator kKbootMinRSA4096
typedef enum _kb_operation kb_operation_t

Details of the operation to be performed by the ROM.

The kRomAuthenticateImage operation requires the entire signed image to be available to the application.

typedef struct _kb_region kb_region_t

Memory region definition.

typedef struct _kb_load_sb kb_load_sb_t

User-provided options passed into kb_init().

The buffer field is a pointer to memory provided by the caller for use by Kboot during execution of the operation. Minimum size is the size of each certificate in the chain plus 432 bytes additional per certificate.

The profile field is a mask that specifies which features are required in the SB file or image being processed. This includes the minimum AES and RSA key sizes. See the _kb_security_profile enum for profile mask constants. The image being loaded or authenticated must match the profile or an error will be returned.

minBuildNumber is an optional field that can be used to prevent version rollback. The API will check the build number of the image, and if it is less than minBuildNumber will fail with an error.

maxImageLength is used to verify the offsetToCertificateBlockHeaderInBytes value at the beginning of a signed image. It should be set to the length of the SB file. If verifying an image in flash, it can be set to the internal flash size or a large number like 0x10000000.

userRHK can optionally be used by the user to override the RHK in IFR. If userRHK is not NULL, it points to a 32-byte array containing the SHA-256 of the root certificate’s RSA public key.

The regions field points to an array of memory regions that the SB file being loaded is allowed to access. If regions is NULL, then all memory is accessible by the SB file. This feature is required to prevent a malicious image from erasing good code or RAM contents while it is being loaded, only for us to find that the image is inauthentic when we hit the end of the section.

overrideSBBootSectionID lets the caller override the default section of the SB file that is processed during a kKbootLoadSB operation. By default, the section specified in the firstBootableSectionID field of the SB header is loaded. If overrideSBBootSectionID is non-zero, then the section with the given ID will be loaded instead.

The userSBKEK field lets a user provide their own AES-256 key for unwrapping keys in an SB file during the kKbootLoadSB operation. userSBKEK should point to a 32-byte AES-256 key. If userSBKEK is NULL then the IFR SBKEK will be used. After kb_init() returns, the caller should zero out the data pointed to by userSBKEK, as the API will have installed the key in the CAU3.

typedef struct _kb_authenticate kb_authenticate_t
typedef struct _kb_options kb_options_t
typedef struct _memory_region_interface memory_region_interface_t

Interface to memory operations for one region of memory.

typedef struct _memory_map_entry memory_map_entry_t

Structure of a memory map entry.

typedef struct _kb_opaque_session_ref kb_session_ref_t
status_t kb_init(kb_session_ref_t **session, const kb_options_t *options)

Initialize ROM API for a given operation.

Inits the ROM API based on the options provided by the application in the second argument. Every call to rom_init() should be paired with a call to rom_deinit().

Return values:
  • kStatus_Success – API was executed successfully.

  • kStatus_InvalidArgument – An invalid argument is provided.

  • kStatus_RomApiBufferSizeNotEnough – The user buffer is not enough for use by Kboot during execution of the operation.

  • kStatus_RomApiInvalidBuffer – The user buffer is not ok for sbloader or authentication.

  • kStatus_SKBOOT_Fail – Return the failed status of secure boot.

  • kStatus_SKBOOT_KeyStoreMarkerInvalid – The key code for the particular PRINCE region is not present in the keystore

  • kStatus_SKBOOT_Success – Return the successful status of secure boot.

status_t kb_deinit(kb_session_ref_t *session)

Cleans up the ROM API context.

After this call, the context parameter can be reused for another operation by calling rom_init() again.

Return values:

kStatus_Success – API was executed successfully

status_t kb_execute(kb_session_ref_t *session, const uint8_t *data, uint32_t dataLength)

Perform the operation configured during init.

This application must call this API repeatedly, passing in sequential chunks of data from the boot image (SB file) that is to be processed. The ROM will perform the selected operation on this data and return. The application may call this function with as much or as little data as it wishes, which can be used to select the granularity of time given to the application in between executing the operation.

Parameters:
  • session – Current ROM context pointer.

  • data – Buffer of boot image data provided to the ROM by the application.

  • dataLength – Length in bytes of the data in the buffer provided to the ROM.

Return values:
  • kStatus_Success – ROM successfully process the part of sb file/boot image.

  • kStatus_RomApiExecuteCompleted – ROM successfully process the whole sb file/boot image.

  • kStatus_Fail – An error occurred while executing the operation.

  • kStatus_RomApiNeedMoreData – No error occurred, but the ROM needs more data to continue processing the boot image.

  • kStatus_RomApiBufferSizeNotEnough – user buffer is not enough for use by Kboot during execution of the operation.

kStatusGroup_RomApi

ROM API status group number.

struct _kb_region
#include <fsl_iap_kbp.h>

Memory region definition.

struct _kb_load_sb
#include <fsl_iap_kbp.h>

User-provided options passed into kb_init().

The buffer field is a pointer to memory provided by the caller for use by Kboot during execution of the operation. Minimum size is the size of each certificate in the chain plus 432 bytes additional per certificate.

The profile field is a mask that specifies which features are required in the SB file or image being processed. This includes the minimum AES and RSA key sizes. See the _kb_security_profile enum for profile mask constants. The image being loaded or authenticated must match the profile or an error will be returned.

minBuildNumber is an optional field that can be used to prevent version rollback. The API will check the build number of the image, and if it is less than minBuildNumber will fail with an error.

maxImageLength is used to verify the offsetToCertificateBlockHeaderInBytes value at the beginning of a signed image. It should be set to the length of the SB file. If verifying an image in flash, it can be set to the internal flash size or a large number like 0x10000000.

userRHK can optionally be used by the user to override the RHK in IFR. If userRHK is not NULL, it points to a 32-byte array containing the SHA-256 of the root certificate’s RSA public key.

The regions field points to an array of memory regions that the SB file being loaded is allowed to access. If regions is NULL, then all memory is accessible by the SB file. This feature is required to prevent a malicious image from erasing good code or RAM contents while it is being loaded, only for us to find that the image is inauthentic when we hit the end of the section.

overrideSBBootSectionID lets the caller override the default section of the SB file that is processed during a kKbootLoadSB operation. By default, the section specified in the firstBootableSectionID field of the SB header is loaded. If overrideSBBootSectionID is non-zero, then the section with the given ID will be loaded instead.

The userSBKEK field lets a user provide their own AES-256 key for unwrapping keys in an SB file during the kKbootLoadSB operation. userSBKEK should point to a 32-byte AES-256 key. If userSBKEK is NULL then the IFR SBKEK will be used. After kb_init() returns, the caller should zero out the data pointed to by userSBKEK, as the API will have installed the key in the CAU3.

struct _kb_authenticate
#include <fsl_iap_kbp.h>
struct _kb_options
#include <fsl_iap_kbp.h>

Public Members

uint32_t version

Should be set to kKbootApiVersion.

uint8_t *buffer

Caller-provided buffer used by Kboot.

struct _memory_region_interface
#include <fsl_iap_kbp.h>

Interface to memory operations for one region of memory.

struct _memory_map_entry
#include <fsl_iap_kbp.h>

Structure of a memory map entry.

struct _kb_opaque_session_ref
#include <fsl_iap_kbp.h>
union __unnamed11__

Public Members

kb_authenticate_t authenticate
kb_load_sb_t loadSB

Settings for kKbootAuthenticate operation.

Common Driver

FSL_COMMON_DRIVER_VERSION

common driver version.

DEBUG_CONSOLE_DEVICE_TYPE_NONE

No debug console.

DEBUG_CONSOLE_DEVICE_TYPE_UART

Debug console based on UART.

DEBUG_CONSOLE_DEVICE_TYPE_LPUART

Debug console based on LPUART.

DEBUG_CONSOLE_DEVICE_TYPE_LPSCI

Debug console based on LPSCI.

DEBUG_CONSOLE_DEVICE_TYPE_USBCDC

Debug console based on USBCDC.

DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM

Debug console based on FLEXCOMM.

DEBUG_CONSOLE_DEVICE_TYPE_IUART

Debug console based on i.MX UART.

DEBUG_CONSOLE_DEVICE_TYPE_VUSART

Debug console based on LPC_VUSART.

DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART

Debug console based on LPC_USART.

DEBUG_CONSOLE_DEVICE_TYPE_SWO

Debug console based on SWO.

DEBUG_CONSOLE_DEVICE_TYPE_QSCI

Debug console based on QSCI.

MIN(a, b)

Computes the minimum of a and b.

MAX(a, b)

Computes the maximum of a and b.

UINT16_MAX

Max value of uint16_t type.

UINT32_MAX

Max value of uint32_t type.

SDK_ATOMIC_LOCAL_ADD(addr, val)

Add value val from the variable at address address.

SDK_ATOMIC_LOCAL_SUB(addr, val)

Subtract value val to the variable at address address.

SDK_ATOMIC_LOCAL_SET(addr, bits)

Set the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR(addr, bits)

Clear the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_TOGGLE(addr, bits)

Toggle the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits)

For the variable at address address, clear the bits specifiled by clearBits and set the bits specifiled by setBits.

SDK_ATOMIC_LOCAL_COMPARE_AND_SET(addr, expected, newValue)

For the variable at address address, check whether the value equal to expected. If value same as expected then update newValue to address and return true , else return false .

SDK_ATOMIC_LOCAL_TEST_AND_SET(addr, newValue)

For the variable at address address, set as newValue value and return old value.

USEC_TO_COUNT(us, clockFreqInHz)

Macro to convert a microsecond period to raw count value

COUNT_TO_USEC(count, clockFreqInHz)

Macro to convert a raw count value to microsecond

MSEC_TO_COUNT(ms, clockFreqInHz)

Macro to convert a millisecond period to raw count value

COUNT_TO_MSEC(count, clockFreqInHz)

Macro to convert a raw count value to millisecond

SDK_ISR_EXIT_BARRIER
SDK_SIZEALIGN(var, alignbytes)

Macro to define a variable with L1 d-cache line size alignment

Macro to define a variable with L2 cache line size alignment

Macro to change a value to a given size aligned value

AT_NONCACHEABLE_SECTION(var)

Define a variable var, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes)

Define a variable var, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

AT_NONCACHEABLE_SECTION_INIT(var)

Define a variable var with initial value, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes)

Define a variable var with initial value, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

enum _status_groups

Status group numbers.

Values:

enumerator kStatusGroup_Generic

Group number for generic status codes.

enumerator kStatusGroup_FLASH

Group number for FLASH status codes.

enumerator kStatusGroup_LPSPI

Group number for LPSPI status codes.

enumerator kStatusGroup_FLEXIO_SPI

Group number for FLEXIO SPI status codes.

enumerator kStatusGroup_DSPI

Group number for DSPI status codes.

enumerator kStatusGroup_FLEXIO_UART

Group number for FLEXIO UART status codes.

enumerator kStatusGroup_FLEXIO_I2C

Group number for FLEXIO I2C status codes.

enumerator kStatusGroup_LPI2C

Group number for LPI2C status codes.

enumerator kStatusGroup_UART

Group number for UART status codes.

enumerator kStatusGroup_I2C

Group number for UART status codes.

enumerator kStatusGroup_LPSCI

Group number for LPSCI status codes.

enumerator kStatusGroup_LPUART

Group number for LPUART status codes.

enumerator kStatusGroup_SPI

Group number for SPI status code.

enumerator kStatusGroup_XRDC

Group number for XRDC status code.

enumerator kStatusGroup_SEMA42

Group number for SEMA42 status code.

enumerator kStatusGroup_SDHC

Group number for SDHC status code

enumerator kStatusGroup_SDMMC

Group number for SDMMC status code

enumerator kStatusGroup_SAI

Group number for SAI status code

enumerator kStatusGroup_MCG

Group number for MCG status codes.

enumerator kStatusGroup_SCG

Group number for SCG status codes.

enumerator kStatusGroup_SDSPI

Group number for SDSPI status codes.

enumerator kStatusGroup_FLEXIO_I2S

Group number for FLEXIO I2S status codes

enumerator kStatusGroup_FLEXIO_MCULCD

Group number for FLEXIO LCD status codes

enumerator kStatusGroup_FLASHIAP

Group number for FLASHIAP status codes

enumerator kStatusGroup_FLEXCOMM_I2C

Group number for FLEXCOMM I2C status codes

enumerator kStatusGroup_I2S

Group number for I2S status codes

enumerator kStatusGroup_IUART

Group number for IUART status codes

enumerator kStatusGroup_CSI

Group number for CSI status codes

enumerator kStatusGroup_MIPI_DSI

Group number for MIPI DSI status codes

enumerator kStatusGroup_SDRAMC

Group number for SDRAMC status codes.

enumerator kStatusGroup_POWER

Group number for POWER status codes.

enumerator kStatusGroup_ENET

Group number for ENET status codes.

enumerator kStatusGroup_PHY

Group number for PHY status codes.

enumerator kStatusGroup_TRGMUX

Group number for TRGMUX status codes.

enumerator kStatusGroup_SMARTCARD

Group number for SMARTCARD status codes.

enumerator kStatusGroup_LMEM

Group number for LMEM status codes.

enumerator kStatusGroup_QSPI

Group number for QSPI status codes.

enumerator kStatusGroup_DMA

Group number for DMA status codes.

enumerator kStatusGroup_EDMA

Group number for EDMA status codes.

enumerator kStatusGroup_DMAMGR

Group number for DMAMGR status codes.

enumerator kStatusGroup_FLEXCAN

Group number for FlexCAN status codes.

enumerator kStatusGroup_LTC

Group number for LTC status codes.

enumerator kStatusGroup_FLEXIO_CAMERA

Group number for FLEXIO CAMERA status codes.

enumerator kStatusGroup_LPC_SPI

Group number for LPC_SPI status codes.

enumerator kStatusGroup_LPC_USART

Group number for LPC_USART status codes.

enumerator kStatusGroup_DMIC

Group number for DMIC status codes.

enumerator kStatusGroup_SDIF

Group number for SDIF status codes.

enumerator kStatusGroup_SPIFI

Group number for SPIFI status codes.

enumerator kStatusGroup_OTP

Group number for OTP status codes.

enumerator kStatusGroup_MCAN

Group number for MCAN status codes.

enumerator kStatusGroup_CAAM

Group number for CAAM status codes.

enumerator kStatusGroup_ECSPI

Group number for ECSPI status codes.

enumerator kStatusGroup_USDHC

Group number for USDHC status codes.

enumerator kStatusGroup_LPC_I2C

Group number for LPC_I2C status codes.

enumerator kStatusGroup_DCP

Group number for DCP status codes.

enumerator kStatusGroup_MSCAN

Group number for MSCAN status codes.

enumerator kStatusGroup_ESAI

Group number for ESAI status codes.

enumerator kStatusGroup_FLEXSPI

Group number for FLEXSPI status codes.

enumerator kStatusGroup_MMDC

Group number for MMDC status codes.

enumerator kStatusGroup_PDM

Group number for MIC status codes.

enumerator kStatusGroup_SDMA

Group number for SDMA status codes.

enumerator kStatusGroup_ICS

Group number for ICS status codes.

enumerator kStatusGroup_SPDIF

Group number for SPDIF status codes.

enumerator kStatusGroup_LPC_MINISPI

Group number for LPC_MINISPI status codes.

enumerator kStatusGroup_HASHCRYPT

Group number for Hashcrypt status codes

enumerator kStatusGroup_LPC_SPI_SSP

Group number for LPC_SPI_SSP status codes.

enumerator kStatusGroup_I3C

Group number for I3C status codes

enumerator kStatusGroup_LPC_I2C_1

Group number for LPC_I2C_1 status codes.

enumerator kStatusGroup_NOTIFIER

Group number for NOTIFIER status codes.

enumerator kStatusGroup_DebugConsole

Group number for debug console status codes.

enumerator kStatusGroup_SEMC

Group number for SEMC status codes.

enumerator kStatusGroup_ApplicationRangeStart

Starting number for application groups.

enumerator kStatusGroup_IAP

Group number for IAP status codes

enumerator kStatusGroup_SFA

Group number for SFA status codes

enumerator kStatusGroup_SPC

Group number for SPC status codes.

enumerator kStatusGroup_PUF

Group number for PUF status codes.

enumerator kStatusGroup_TOUCH_PANEL

Group number for touch panel status codes

enumerator kStatusGroup_VBAT

Group number for VBAT status codes

enumerator kStatusGroup_XSPI

Group number for XSPI status codes

enumerator kStatusGroup_PNGDEC

Group number for PNGDEC status codes

enumerator kStatusGroup_JPEGDEC

Group number for JPEGDEC status codes

enumerator kStatusGroup_HAL_GPIO

Group number for HAL GPIO status codes.

enumerator kStatusGroup_HAL_UART

Group number for HAL UART status codes.

enumerator kStatusGroup_HAL_TIMER

Group number for HAL TIMER status codes.

enumerator kStatusGroup_HAL_SPI

Group number for HAL SPI status codes.

enumerator kStatusGroup_HAL_I2C

Group number for HAL I2C status codes.

enumerator kStatusGroup_HAL_FLASH

Group number for HAL FLASH status codes.

enumerator kStatusGroup_HAL_PWM

Group number for HAL PWM status codes.

enumerator kStatusGroup_HAL_RNG

Group number for HAL RNG status codes.

enumerator kStatusGroup_HAL_I2S

Group number for HAL I2S status codes.

enumerator kStatusGroup_HAL_ADC_SENSOR

Group number for HAL ADC SENSOR status codes.

enumerator kStatusGroup_TIMERMANAGER

Group number for TiMER MANAGER status codes.

enumerator kStatusGroup_SERIALMANAGER

Group number for SERIAL MANAGER status codes.

enumerator kStatusGroup_LED

Group number for LED status codes.

enumerator kStatusGroup_BUTTON

Group number for BUTTON status codes.

enumerator kStatusGroup_EXTERN_EEPROM

Group number for EXTERN EEPROM status codes.

enumerator kStatusGroup_SHELL

Group number for SHELL status codes.

enumerator kStatusGroup_MEM_MANAGER

Group number for MEM MANAGER status codes.

enumerator kStatusGroup_LIST

Group number for List status codes.

enumerator kStatusGroup_OSA

Group number for OSA status codes.

enumerator kStatusGroup_COMMON_TASK

Group number for Common task status codes.

enumerator kStatusGroup_MSG

Group number for messaging status codes.

enumerator kStatusGroup_SDK_OCOTP

Group number for OCOTP status codes.

enumerator kStatusGroup_SDK_FLEXSPINOR

Group number for FLEXSPINOR status codes.

enumerator kStatusGroup_CODEC

Group number for codec status codes.

enumerator kStatusGroup_ASRC

Group number for codec status ASRC.

enumerator kStatusGroup_OTFAD

Group number for codec status codes.

enumerator kStatusGroup_SDIOSLV

Group number for SDIOSLV status codes.

enumerator kStatusGroup_MECC

Group number for MECC status codes.

enumerator kStatusGroup_ENET_QOS

Group number for ENET_QOS status codes.

enumerator kStatusGroup_LOG

Group number for LOG status codes.

enumerator kStatusGroup_I3CBUS

Group number for I3CBUS status codes.

enumerator kStatusGroup_QSCI

Group number for QSCI status codes.

enumerator kStatusGroup_ELEMU

Group number for ELEMU status codes.

enumerator kStatusGroup_QUEUEDSPI

Group number for QSPI status codes.

enumerator kStatusGroup_POWER_MANAGER

Group number for POWER_MANAGER status codes.

enumerator kStatusGroup_IPED

Group number for IPED status codes.

enumerator kStatusGroup_ELS_PKC

Group number for ELS PKC status codes.

enumerator kStatusGroup_CSS_PKC

Group number for CSS PKC status codes.

enumerator kStatusGroup_HOSTIF

Group number for HOSTIF status codes.

enumerator kStatusGroup_CLIF

Group number for CLIF status codes.

enumerator kStatusGroup_BMA

Group number for BMA status codes.

enumerator kStatusGroup_NETC

Group number for NETC status codes.

enumerator kStatusGroup_ELE

Group number for ELE status codes.

enumerator kStatusGroup_GLIKEY

Group number for GLIKEY status codes.

enumerator kStatusGroup_AON_POWER

Group number for AON_POWER status codes.

enumerator kStatusGroup_AON_COMMON

Group number for AON_COMMON status codes.

enumerator kStatusGroup_ENDAT3

Group number for ENDAT3 status codes.

enumerator kStatusGroup_HIPERFACE

Group number for HIPERFACE status codes.

Generic status return codes.

Values:

enumerator kStatus_Success

Generic status for Success.

enumerator kStatus_Fail

Generic status for Fail.

enumerator kStatus_ReadOnly

Generic status for read only failure.

enumerator kStatus_OutOfRange

Generic status for out of range access.

enumerator kStatus_InvalidArgument

Generic status for invalid argument check.

enumerator kStatus_Timeout

Generic status for timeout.

enumerator kStatus_NoTransferInProgress

Generic status for no transfer in progress.

enumerator kStatus_Busy

Generic status for module is busy.

enumerator kStatus_NoData

Generic status for no data is found for the operation.

typedef int32_t status_t

Type used for all status and error return values.

void *SDK_Malloc(size_t size, size_t alignbytes)

Allocate memory with given alignment and aligned size.

This is provided to support the dynamically allocated memory used in cache-able region.

Parameters:
  • size – The length required to malloc.

  • alignbytes – The alignment size.

Return values:

The – allocated memory.

void SDK_Free(void *ptr)

Free memory.

Parameters:
  • ptr – The memory to be release.

void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)

Delay at least for some time. Please note that, this API uses while loop for delay, different run-time environments make the time not precise, if precise delay count was needed, please implement a new delay function with hardware timer.

Parameters:
  • delayTime_us – Delay time in unit of microsecond.

  • coreClock_Hz – Core clock frequency with Hz.

static inline status_t EnableIRQ(IRQn_Type interrupt)

Enable specific interrupt.

Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The IRQ number.

Return values:
  • kStatus_Success – Interrupt enabled successfully

  • kStatus_Fail – Failed to enable the interrupt

static inline status_t DisableIRQ(IRQn_Type interrupt)

Disable specific interrupt.

Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The IRQ number.

Return values:
  • kStatus_Success – Interrupt disabled successfully

  • kStatus_Fail – Failed to disable the interrupt

static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)

Enable the IRQ, and also set the interrupt priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The IRQ to Enable.

  • priNum – Priority number set to interrupt controller register.

Return values:
  • kStatus_Success – Interrupt priority set successfully

  • kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)

Set the IRQ priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The IRQ to set.

  • priNum – Priority number set to interrupt controller register.

Return values:
  • kStatus_Success – Interrupt priority set successfully

  • kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)

Clear the pending IRQ flag.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The flag which IRQ to clear.

Return values:
  • kStatus_Success – Interrupt priority set successfully

  • kStatus_Fail – Failed to set the interrupt priority.

static inline uint32_t DisableGlobalIRQ(void)

Disable the global IRQ.

Disable the global interrupt and return the current primask register. User is required to provided the primask register for the EnableGlobalIRQ().

Returns:

Current primask value.

static inline void EnableGlobalIRQ(uint32_t primask)

Enable the global IRQ.

Set the primask register with the provided primask value but not just enable the primask. The idea is for the convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.

Parameters:
  • primask – value of primask register to be restored. The primask value is supposed to be provided by the DisableGlobalIRQ().

static inline bool _SDK_AtomicLocalCompareAndSet(uint32_t *addr, uint32_t expected, uint32_t newValue)
static inline uint32_t _SDK_AtomicTestAndSet(uint32_t *addr, uint32_t newValue)
FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ

Macro to use the default weak IRQ handler in drivers.

MAKE_STATUS(group, code)

Construct a status code value from a group and code number.

MAKE_VERSION(major, minor, bugfix)

Construct the version number for drivers.

The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M) and 16-bit platforms(such as DSC).

| Unused    || Major Version || Minor Version ||  Bug Fix    |
31        25  24           17  16            9  8            0
ARRAY_SIZE(x)

Computes the number of elements in an array.

UINT64_H(X)

Macro to get upper 32 bits of a 64-bit value

UINT64_L(X)

Macro to get lower 32 bits of a 64-bit value

SUPPRESS_FALL_THROUGH_WARNING()

For switch case code block, if case section ends without “break;” statement, there wil be fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc. To suppress this warning, “SUPPRESS_FALL_THROUGH_WARNING();” need to be added at the end of each case section which misses “break;”statement.

MSDK_REG_SECURE_ADDR(x)

Convert the register address to the one used in secure mode.

MSDK_REG_NONSECURE_ADDR(x)

Convert the register address to the one used in non-secure mode.

LPADC: 12-bit SAR Analog-to-Digital Converter Driver

void LPADC_Init(ADC_Type *base, const lpadc_config_t *config)

Initializes the LPADC module.

Parameters:
  • base – LPADC peripheral base address.

  • config – Pointer to configuration structure. See “lpadc_config_t”.

void LPADC_GetDefaultConfig(lpadc_config_t *config)

Gets an available pre-defined settings for initial configuration.

This function initializes the converter configuration structure with an available settings. The default values are:

config->enableInDozeMode        = true;
config->enableAnalogPreliminary = false;
config->powerUpDelay            = 0x80;
config->referenceVoltageSource  = kLPADC_ReferenceVoltageAlt1;
config->powerLevelMode          = kLPADC_PowerLevelAlt1;
config->triggerPriorityPolicy   = kLPADC_TriggerPriorityPreemptImmediately;
config->enableConvPause         = false;
config->convPauseDelay          = 0U;
config->FIFOWatermark           = 0U;

Parameters:
  • config – Pointer to configuration structure.

void LPADC_Deinit(ADC_Type *base)

De-initializes the LPADC module.

Parameters:
  • base – LPADC peripheral base address.

static inline void LPADC_Enable(ADC_Type *base, bool enable)

Switch on/off the LPADC module.

Parameters:
  • base – LPADC peripheral base address.

  • enable – switcher to the module.

static inline void LPADC_DoResetFIFO(ADC_Type *base)

Do reset the conversion FIFO.

Parameters:
  • base – LPADC peripheral base address.

static inline void LPADC_DoResetConfig(ADC_Type *base)

Do reset the module’s configuration.

Reset all ADC internal logic and registers, except the Control Register (ADCx_CTRL).

Parameters:
  • base – LPADC peripheral base address.

static inline uint32_t LPADC_GetStatusFlags(ADC_Type *base)

Get status flags.

Parameters:
  • base – LPADC peripheral base address.

Returns:

status flags’ mask. See to _lpadc_status_flags.

static inline void LPADC_ClearStatusFlags(ADC_Type *base, uint32_t mask)

Clear status flags.

Only the flags can be cleared by writing ADCx_STATUS register would be cleared by this API.

Parameters:
  • base – LPADC peripheral base address.

  • mask – Mask value for flags to be cleared. See to _lpadc_status_flags.

static inline uint32_t LPADC_GetTriggerStatusFlags(ADC_Type *base)

Get trigger status flags to indicate which trigger sequences have been completed or interrupted by a high priority trigger exception.

Parameters:
  • base – LPADC peripheral base address.

Returns:

The OR’ed value of _lpadc_trigger_status_flags.

static inline void LPADC_ClearTriggerStatusFlags(ADC_Type *base, uint32_t mask)

Clear trigger status flags.

Parameters:
  • base – LPADC peripheral base address.

  • mask – The mask of trigger status flags to be cleared, should be the OR’ed value of _lpadc_trigger_status_flags.

static inline void LPADC_EnableInterrupts(ADC_Type *base, uint32_t mask)

Enable interrupts.

Parameters:
  • base – LPADC peripheral base address.

  • mask – Mask value for interrupt events. See to _lpadc_interrupt_enable.

static inline void LPADC_DisableInterrupts(ADC_Type *base, uint32_t mask)

Disable interrupts.

Parameters:
  • base – LPADC peripheral base address.

  • mask – Mask value for interrupt events. See to _lpadc_interrupt_enable.

static inline void LPADC_EnableFIFOWatermarkDMA(ADC_Type *base, bool enable)

Switch on/off the DMA trigger for FIFO watermark event.

Parameters:
  • base – LPADC peripheral base address.

  • enable – Switcher to the event.

static inline uint32_t LPADC_GetConvResultCount(ADC_Type *base)

Get the count of result kept in conversion FIFO.

Parameters:
  • base – LPADC peripheral base address.

Returns:

The count of result kept in conversion FIFO.

bool LPADC_GetConvResult(ADC_Type *base, lpadc_conv_result_t *result)

Get the result in conversion FIFO.

Parameters:
  • base – LPADC peripheral base address.

  • result – Pointer to structure variable that keeps the conversion result in conversion FIFO.

Returns:

Status whether FIFO entry is valid.

void LPADC_GetConvResultBlocking(ADC_Type *base, lpadc_conv_result_t *result)

Get the result in conversion FIFO using blocking method.

Parameters:
  • base – LPADC peripheral base address.

  • result – Pointer to structure variable that keeps the conversion result in conversion FIFO.

void LPADC_SetConvTriggerConfig(ADC_Type *base, uint32_t triggerId, const lpadc_conv_trigger_config_t *config)

Configure the conversion trigger source.

Each programmable trigger can launch the conversion command in command buffer.

Parameters:
  • base – LPADC peripheral base address.

  • triggerId – ID for each trigger. Typically, the available value range is from 0.

  • config – Pointer to configuration structure. See to lpadc_conv_trigger_config_t.

void LPADC_GetDefaultConvTriggerConfig(lpadc_conv_trigger_config_t *config)

Gets an available pre-defined settings for trigger’s configuration.

This function initializes the trigger’s configuration structure with an available settings. The default values are:

config->targetCommandId        = 0U;
config->delayPower             = 0U;
config->priority               = 0U;
config->channelAFIFOSelect     = 0U;
config->channelBFIFOSelect     = 0U;
config->enableHardwareTrigger  = false;

Parameters:
  • config – Pointer to configuration structure.

static inline void LPADC_DoSoftwareTrigger(ADC_Type *base, uint32_t triggerIdMask)

Do software trigger to conversion command.

Parameters:
  • base – LPADC peripheral base address.

  • triggerIdMask – Mask value for software trigger indexes, which count from zero.

void LPADC_SetConvCommandConfig(ADC_Type *base, uint32_t commandId, const lpadc_conv_command_config_t *config)

Configure conversion command.

Note

The number of compare value register on different chips is different, that is mean in some chips, some command buffers do not have the compare functionality.

Parameters:
  • base – LPADC peripheral base address.

  • commandId – ID for command in command buffer. Typically, the available value range is 1 - 15.

  • config – Pointer to configuration structure. See to lpadc_conv_command_config_t.

void LPADC_GetDefaultConvCommandConfig(lpadc_conv_command_config_t *config)

Gets an available pre-defined settings for conversion command’s configuration.

This function initializes the conversion command’s configuration structure with an available settings. The default values are:

config->sampleScaleMode            = kLPADC_SampleFullScale;
config->channelBScaleMode          = kLPADC_SampleFullScale;
config->sampleChannelMode          = kLPADC_SampleChannelSingleEndSideA;
config->channelNumber              = 0U;
config->channelBNumber             = 0U;
config->chainedNextCommandNumber   = 0U;
config->enableAutoChannelIncrement = false;
config->loopCount                  = 0U;
config->hardwareAverageMode        = kLPADC_HardwareAverageCount1;
config->sampleTimeMode             = kLPADC_SampleTimeADCK3;
config->hardwareCompareMode        = kLPADC_HardwareCompareDisabled;
config->hardwareCompareValueHigh   = 0U;
config->hardwareCompareValueLow    = 0U;
config->conversionResolutionMode   = kLPADC_ConversionResolutionStandard;
config->enableWaitTrigger          = false;
config->enableChannelB             = false;

Parameters:
  • config – Pointer to configuration structure.

void LPADC_EnableCalibration(ADC_Type *base, bool enable)

Enable the calibration function.

When CALOFS is set, the ADC is configured to perform a calibration function anytime the ADC executes a conversion. Any channel selected is ignored and the value returned in the RESFIFO is a signed value between -31 and 31. -32 is not a valid and is never a returned value. Software should copy the lower 6- bits of the conversion result stored in the RESFIFO after a completed calibration conversion to the OFSTRIM field. The OFSTRIM field is used in normal operation for offset correction.

Parameters:
  • base – LPADC peripheral base address.

  • enable – switcher to the calibration function.

static inline void LPADC_SetOffsetValue(ADC_Type *base, uint32_t value)

Set proper offset value to trim ADC.

To minimize the offset during normal operation, software should read the conversion result from the RESFIFO calibration operation and write the lower 6 bits to the OFSTRIM register.

Parameters:
  • base – LPADC peripheral base address.

  • value – Setting offset value.

void LPADC_DoAutoCalibration(ADC_Type *base)

Do auto calibration.

Calibration function should be executed before using converter in application. It used the software trigger and a dummy conversion, get the offset and write them into the OFSTRIM register. It called some of functional API including: -LPADC_EnableCalibration(…) -LPADC_LPADC_SetOffsetValue(…) -LPADC_SetConvCommandConfig(…) -LPADC_SetConvTriggerConfig(…)

Parameters:
  • base – LPADC peripheral base address.

  • base – LPADC peripheral base address.

static inline void LPADC_SetOffsetValue(ADC_Type *base, int16_t value)

Set trim value for offset.

Note

For 16-bit conversions, each increment is 1/2 LSB resulting in a programmable offset range of -256 LSB to 255.5 LSB; For 12-bit conversions, each increment is 1/32 LSB resulting in a programmable offset range of -16 LSB to 15.96875 LSB.

Parameters:
  • base – LPADC peripheral base address.

  • value – Offset trim value, is a 10-bit signed value between -512 and 511.

static inline void LPADC_GetOffsetValue(ADC_Type *base, int16_t *pValue)

Get trim value of offset.

Parameters:
  • base – LPADC peripheral base address.

  • pValue – Pointer to the variable in type of int16_t to store offset value.

static inline void LPADC_EnableOffsetCalibration(ADC_Type *base, bool enable)

Enable the offset calibration function.

Parameters:
  • base – LPADC peripheral base address.

  • enable – switcher to the calibration function.

static inline void LPADC_SetOffsetCalibrationMode(ADC_Type *base, lpadc_offset_calibration_mode_t mode)

Set offset calibration mode.

Parameters:
  • base – LPADC peripheral base address.

  • mode – set offset calibration mode.see to lpadc_offset_calibration_mode_t .

void LPADC_DoOffsetCalibration(ADC_Type *base)

Do offset calibration.

Parameters:
  • base – LPADC peripheral base address.

void LPADC_PrepareAutoCalibration(ADC_Type *base)

Prepare auto calibration, LPADC_FinishAutoCalibration has to be called before using the LPADC. LPADC_DoAutoCalibration has been split in two API to avoid to be stuck too long in the function.

Parameters:
  • base – LPADC peripheral base address.

void LPADC_FinishAutoCalibration(ADC_Type *base)

Finish auto calibration start with LPADC_PrepareAutoCalibration.

Note

This feature is used for LPADC with CTRL[CALOFSMODE].

Parameters:
  • base – LPADC peripheral base address.

void LPADC_GetCalibrationValue(ADC_Type *base, lpadc_calibration_value_t *ptrCalibrationValue)

Get calibration value into the memory which is defined by invoker.

Note

Please note the ADC will be disabled temporary.

Note

This function should be used after finish calibration.

Parameters:
  • base – LPADC peripheral base address.

  • ptrCalibrationValue – Pointer to lpadc_calibration_value_t structure, this memory block should be always powered on even in low power modes.

void LPADC_SetCalibrationValue(ADC_Type *base, const lpadc_calibration_value_t *ptrCalibrationValue)

Set calibration value into ADC calibration registers.

Note

Please note the ADC will be disabled temporary.

Parameters:
  • base – LPADC peripheral base address.

  • ptrCalibrationValue – Pointer to lpadc_calibration_value_t structure which contains ADC’s calibration value.

FSL_LPADC_DRIVER_VERSION

LPADC driver version 2.9.1.

enum _lpadc_status_flags

Define hardware flags of the module.

Values:

enumerator kLPADC_ResultFIFO0OverflowFlag

Indicates that more data has been written to the Result FIFO 0 than it can hold.

enumerator kLPADC_ResultFIFO0ReadyFlag

Indicates when the number of valid datawords in the result FIFO 0 is greater than the setting watermark level.

enumerator kLPADC_TriggerExceptionFlag

Indicates that a trigger exception event has occurred.

enumerator kLPADC_TriggerCompletionFlag

Indicates that a trigger completion event has occurred.

enumerator kLPADC_CalibrationReadyFlag

Indicates that the calibration process is done.

enumerator kLPADC_ActiveFlag

Indicates that the ADC is in active state.

enumerator kLPADC_ResultFIFOOverflowFlag

To compilitable with old version, do not recommend using this, please use kLPADC_ResultFIFO0OverflowFlag as instead.

enumerator kLPADC_ResultFIFOReadyFlag

To compilitable with old version, do not recommend using this, please use kLPADC_ResultFIFO0ReadyFlag as instead.

enum _lpadc_interrupt_enable

Define interrupt switchers of the module.

Note: LPADC of different chips supports different number of trigger sources, please check the Reference Manual for details.

Values:

enumerator kLPADC_ResultFIFO0OverflowInterruptEnable

Configures ADC to generate overflow interrupt requests when FOF0 flag is asserted.

enumerator kLPADC_FIFO0WatermarkInterruptEnable

Configures ADC to generate watermark interrupt requests when RDY0 flag is asserted.

enumerator kLPADC_ResultFIFOOverflowInterruptEnable

To compilitable with old version, do not recommend using this, please use kLPADC_ResultFIFO0OverflowInterruptEnable as instead.

enumerator kLPADC_FIFOWatermarkInterruptEnable

To compilitable with old version, do not recommend using this, please use kLPADC_FIFO0WatermarkInterruptEnable as instead.

enumerator kLPADC_TriggerExceptionInterruptEnable

Configures ADC to generate trigger exception interrupt.

enumerator kLPADC_Trigger0CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 0 completion.

enumerator kLPADC_Trigger1CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 1 completion.

enumerator kLPADC_Trigger2CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 2 completion.

enumerator kLPADC_Trigger3CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 3 completion.

enumerator kLPADC_Trigger4CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 4 completion.

enumerator kLPADC_Trigger5CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 5 completion.

enumerator kLPADC_Trigger6CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 6 completion.

enumerator kLPADC_Trigger7CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 7 completion.

enumerator kLPADC_Trigger8CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 8 completion.

enumerator kLPADC_Trigger9CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 9 completion.

enumerator kLPADC_Trigger10CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 10 completion.

enumerator kLPADC_Trigger11CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 11 completion.

enumerator kLPADC_Trigger12CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 12 completion.

enumerator kLPADC_Trigger13CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 13 completion.

enumerator kLPADC_Trigger14CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 14 completion.

enumerator kLPADC_Trigger15CompletionInterruptEnable

Configures ADC to generate interrupt when trigger 15 completion.

enum _lpadc_trigger_status_flags

The enumerator of lpadc trigger status flags, including interrupted flags and completed flags.

Note: LPADC of different chips supports different number of trigger sources, please check the Reference Manual for details.

Values:

enumerator kLPADC_Trigger0InterruptedFlag

Trigger 0 is interrupted by a high priority exception.

enumerator kLPADC_Trigger1InterruptedFlag

Trigger 1 is interrupted by a high priority exception.

enumerator kLPADC_Trigger2InterruptedFlag

Trigger 2 is interrupted by a high priority exception.

enumerator kLPADC_Trigger3InterruptedFlag

Trigger 3 is interrupted by a high priority exception.

enumerator kLPADC_Trigger4InterruptedFlag

Trigger 4 is interrupted by a high priority exception.

enumerator kLPADC_Trigger5InterruptedFlag

Trigger 5 is interrupted by a high priority exception.

enumerator kLPADC_Trigger6InterruptedFlag

Trigger 6 is interrupted by a high priority exception.

enumerator kLPADC_Trigger7InterruptedFlag

Trigger 7 is interrupted by a high priority exception.

enumerator kLPADC_Trigger8InterruptedFlag

Trigger 8 is interrupted by a high priority exception.

enumerator kLPADC_Trigger9InterruptedFlag

Trigger 9 is interrupted by a high priority exception.

enumerator kLPADC_Trigger10InterruptedFlag

Trigger 10 is interrupted by a high priority exception.

enumerator kLPADC_Trigger11InterruptedFlag

Trigger 11 is interrupted by a high priority exception.

enumerator kLPADC_Trigger12InterruptedFlag

Trigger 12 is interrupted by a high priority exception.

enumerator kLPADC_Trigger13InterruptedFlag

Trigger 13 is interrupted by a high priority exception.

enumerator kLPADC_Trigger14InterruptedFlag

Trigger 14 is interrupted by a high priority exception.

enumerator kLPADC_Trigger15InterruptedFlag

Trigger 15 is interrupted by a high priority exception.

enumerator kLPADC_Trigger0CompletedFlag

Trigger 0 is completed and trigger 0 has enabled completion interrupts.

enumerator kLPADC_Trigger1CompletedFlag

Trigger 1 is completed and trigger 1 has enabled completion interrupts.

enumerator kLPADC_Trigger2CompletedFlag

Trigger 2 is completed and trigger 2 has enabled completion interrupts.

enumerator kLPADC_Trigger3CompletedFlag

Trigger 3 is completed and trigger 3 has enabled completion interrupts.

enumerator kLPADC_Trigger4CompletedFlag

Trigger 4 is completed and trigger 4 has enabled completion interrupts.

enumerator kLPADC_Trigger5CompletedFlag

Trigger 5 is completed and trigger 5 has enabled completion interrupts.

enumerator kLPADC_Trigger6CompletedFlag

Trigger 6 is completed and trigger 6 has enabled completion interrupts.

enumerator kLPADC_Trigger7CompletedFlag

Trigger 7 is completed and trigger 7 has enabled completion interrupts.

enumerator kLPADC_Trigger8CompletedFlag

Trigger 8 is completed and trigger 8 has enabled completion interrupts.

enumerator kLPADC_Trigger9CompletedFlag

Trigger 9 is completed and trigger 9 has enabled completion interrupts.

enumerator kLPADC_Trigger10CompletedFlag

Trigger 10 is completed and trigger 10 has enabled completion interrupts.

enumerator kLPADC_Trigger11CompletedFlag

Trigger 11 is completed and trigger 11 has enabled completion interrupts.

enumerator kLPADC_Trigger12CompletedFlag

Trigger 12 is completed and trigger 12 has enabled completion interrupts.

enumerator kLPADC_Trigger13CompletedFlag

Trigger 13 is completed and trigger 13 has enabled completion interrupts.

enumerator kLPADC_Trigger14CompletedFlag

Trigger 14 is completed and trigger 14 has enabled completion interrupts.

enumerator kLPADC_Trigger15CompletedFlag

Trigger 15 is completed and trigger 15 has enabled completion interrupts.

enum _lpadc_sample_scale_mode

Define enumeration of sample scale mode.

The sample scale mode is used to reduce the selected ADC analog channel input voltage level by a factor. The maximum possible voltage on the ADC channel input should be considered when selecting a scale mode to ensure that the reducing factor always results voltage level at or below the VREFH reference. This reducing capability allows conversion of analog inputs higher than VREFH. A-side and B-side channel inputs are both scaled using the scale mode.

Values:

enumerator kLPADC_SamplePartScale

Use divided input voltage signal. (For scale select,please refer to the reference manual).

enumerator kLPADC_SampleFullScale

Full scale (Factor of 1).

enum _lpadc_sample_channel_mode

Define enumeration of channel sample mode.

The channel sample mode configures the channel with single-end/differential/dual-single-end, side A/B.

Values:

enumerator kLPADC_SampleChannelSingleEndSideA

Single-end mode, only A-side channel is converted.

enumerator kLPADC_SampleChannelSingleEndSideB

Single-end mode, only B-side channel is converted.

enumerator kLPADC_SampleChannelDiffBothSideAB

Differential mode, the ADC result is (CHnA-CHnB).

enumerator kLPADC_SampleChannelDiffBothSideBA

Differential mode, the ADC result is (CHnB-CHnA).

enumerator kLPADC_SampleChannelDiffBothSide

Differential mode, the ADC result is (CHnA-CHnB).

enumerator kLPADC_SampleChannelDualSingleEndBothSide

Dual-Single-Ended Mode. Both A side and B side channels are converted independently.

enum _lpadc_hardware_average_mode

Define enumeration of hardware average selection.

It Selects how many ADC conversions are averaged to create the ADC result. An internal storage buffer is used to capture temporary results while the averaging iterations are executed.

Note

Some enumerator values are not available on some devices, mainly depends on the size of AVGS field in CMDH register.

Values:

enumerator kLPADC_HardwareAverageCount1

Single conversion.

enumerator kLPADC_HardwareAverageCount2

2 conversions averaged.

enumerator kLPADC_HardwareAverageCount4

4 conversions averaged.

enumerator kLPADC_HardwareAverageCount8

8 conversions averaged.

enumerator kLPADC_HardwareAverageCount16

16 conversions averaged.

enumerator kLPADC_HardwareAverageCount32

32 conversions averaged.

enumerator kLPADC_HardwareAverageCount64

64 conversions averaged.

enumerator kLPADC_HardwareAverageCount128

128 conversions averaged.

enum _lpadc_sample_time_mode

Define enumeration of sample time selection.

The shortest sample time maximizes conversion speed for lower impedance inputs. Extending sample time allows higher impedance inputs to be accurately sampled. Longer sample times can also be used to lower overall power consumption when command looping and sequencing is configured and high conversion rates are not required.

Values:

enumerator kLPADC_SampleTimeADCK3

3 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK5

5 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK7

7 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK11

11 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK19

19 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK35

35 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK67

69 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK131

131 ADCK cycles total sample time.

enum _lpadc_hardware_compare_mode

Define enumeration of hardware compare mode.

After an ADC channel input is sampled and converted and any averaging iterations are performed, this mode setting guides operation of the automatic compare function to optionally only store when the compare operation is true. When compare is enabled, the conversion result is compared to the compare values.

Values:

enumerator kLPADC_HardwareCompareDisabled

Compare disabled.

enumerator kLPADC_HardwareCompareStoreOnTrue

Compare enabled. Store on true.

enumerator kLPADC_HardwareCompareRepeatUntilTrue

Compare enabled. Repeat channel acquisition until true.

enum _lpadc_conversion_resolution_mode

Define enumeration of conversion resolution mode.

Configure the resolution bit in specific conversion type. For detailed resolution accuracy, see to lpadc_sample_channel_mode_t

Values:

enumerator kLPADC_ConversionResolutionStandard

Standard resolution. Single-ended 12-bit conversion, Differential 13-bit conversion with 2’s complement output.

enumerator kLPADC_ConversionResolutionHigh

High resolution. Single-ended 16-bit conversion; Differential 16-bit conversion with 2’s complement output.

enum _lpadc_conversion_average_mode

Define enumeration of conversion averages mode.

Configure the converion average number for auto-calibration.

Note

Some enumerator values are not available on some devices, mainly depends on the size of CAL_AVGS field in CTRL register.

Values:

enumerator kLPADC_ConversionAverage1

Single conversion.

enumerator kLPADC_ConversionAverage2

2 conversions averaged.

enumerator kLPADC_ConversionAverage4

4 conversions averaged.

enumerator kLPADC_ConversionAverage8

8 conversions averaged.

enumerator kLPADC_ConversionAverage16

16 conversions averaged.

enumerator kLPADC_ConversionAverage32

32 conversions averaged.

enumerator kLPADC_ConversionAverage64

64 conversions averaged.

enumerator kLPADC_ConversionAverage128

128 conversions averaged.

enum _lpadc_reference_voltage_mode

Define enumeration of reference voltage source.

For detail information, need to check the SoC’s specification.

Values:

enumerator kLPADC_ReferenceVoltageAlt1

Option 1 setting.

enumerator kLPADC_ReferenceVoltageAlt2

Option 2 setting.

enumerator kLPADC_ReferenceVoltageAlt3

Option 3 setting.

enum _lpadc_power_level_mode

Define enumeration of power configuration.

Configures the ADC for power and performance. In the highest power setting the highest conversion rates will be possible. Refer to the device data sheet for power and performance capabilities for each setting.

Values:

enumerator kLPADC_PowerLevelAlt1

Lowest power setting.

enumerator kLPADC_PowerLevelAlt2

Next lowest power setting.

enumerator kLPADC_PowerLevelAlt3

enumerator kLPADC_PowerLevelAlt4

Highest power setting.

enum _lpadc_offset_calibration_mode

Define enumeration of offset calibration mode.

Values:

enumerator kLPADC_OffsetCalibration12bitMode

12 bit offset calibration mode.

enumerator kLPADC_OffsetCalibration16bitMode

16 bit offset calibration mode.

enum _lpadc_trigger_priority_policy

Define enumeration of trigger priority policy.

This selection controls how higher priority triggers are handled.

Note

kLPADC_TriggerPriorityPreemptSubsequently is not available on some devices, mainly depends on the size of TPRICTRL field in CFG register.

Values:

enumerator kLPADC_ConvPreemptImmediatelyNotAutoResumed

If a higher priority trigger is detected during command processing, the current conversion is aborted and the new command specified by the trigger is started, when higher priority conversion finishes, the preempted conversion is not automatically resumed or restarted.

enumerator kLPADC_ConvPreemptSoftlyNotAutoResumed

If a higher priority trigger is received during command processing, the current conversion is completed (including averaging iterations and compare function if enabled) and stored to the result FIFO before the higher priority trigger/command is initiated, when higher priority conversion finishes, the preempted conversion is not resumed or restarted.

enumerator kLPADC_ConvPreemptImmediatelyAutoRestarted

If a higher priority trigger is detected during command processing, the current conversion is aborted and the new command specified by the trigger is started, when higher priority conversion finishes, the preempted conversion will automatically be restarted.

enumerator kLPADC_ConvPreemptSoftlyAutoRestarted

If a higher priority trigger is received during command processing, the current conversion is completed (including averaging iterations and compare function if enabled) and stored to the result FIFO before the higher priority trigger/command is initiated, when higher priority conversion finishes, the preempted conversion will automatically be restarted.

enumerator kLPADC_ConvPreemptImmediatelyAutoResumed

If a higher priority trigger is detected during command processing, the current conversion is aborted and the new command specified by the trigger is started, when higher priority conversion finishes, the preempted conversion will automatically be resumed.

enumerator kLPADC_ConvPreemptSoftlyAutoResumed

If a higher priority trigger is received during command processing, the current conversion is completed (including averaging iterations and compare function if enabled) and stored to the result FIFO before the higher priority trigger/command is initiated, when higher priority conversion finishes, the preempted conversion will be automatically be resumed.

enumerator kLPADC_TriggerPriorityPreemptImmediately

Legacy support is not recommended as it only ensures compatibility with older versions.

enumerator kLPADC_TriggerPriorityPreemptSoftly

Legacy support is not recommended as it only ensures compatibility with older versions.

enumerator kLPADC_TriggerPriorityExceptionDisabled

High priority trigger exception disabled.

typedef enum _lpadc_sample_scale_mode lpadc_sample_scale_mode_t

Define enumeration of sample scale mode.

The sample scale mode is used to reduce the selected ADC analog channel input voltage level by a factor. The maximum possible voltage on the ADC channel input should be considered when selecting a scale mode to ensure that the reducing factor always results voltage level at or below the VREFH reference. This reducing capability allows conversion of analog inputs higher than VREFH. A-side and B-side channel inputs are both scaled using the scale mode.

typedef enum _lpadc_sample_channel_mode lpadc_sample_channel_mode_t

Define enumeration of channel sample mode.

The channel sample mode configures the channel with single-end/differential/dual-single-end, side A/B.

typedef enum _lpadc_hardware_average_mode lpadc_hardware_average_mode_t

Define enumeration of hardware average selection.

It Selects how many ADC conversions are averaged to create the ADC result. An internal storage buffer is used to capture temporary results while the averaging iterations are executed.

Note

Some enumerator values are not available on some devices, mainly depends on the size of AVGS field in CMDH register.

typedef enum _lpadc_sample_time_mode lpadc_sample_time_mode_t

Define enumeration of sample time selection.

The shortest sample time maximizes conversion speed for lower impedance inputs. Extending sample time allows higher impedance inputs to be accurately sampled. Longer sample times can also be used to lower overall power consumption when command looping and sequencing is configured and high conversion rates are not required.

typedef enum _lpadc_hardware_compare_mode lpadc_hardware_compare_mode_t

Define enumeration of hardware compare mode.

After an ADC channel input is sampled and converted and any averaging iterations are performed, this mode setting guides operation of the automatic compare function to optionally only store when the compare operation is true. When compare is enabled, the conversion result is compared to the compare values.

typedef enum _lpadc_conversion_resolution_mode lpadc_conversion_resolution_mode_t

Define enumeration of conversion resolution mode.

Configure the resolution bit in specific conversion type. For detailed resolution accuracy, see to lpadc_sample_channel_mode_t

typedef enum _lpadc_conversion_average_mode lpadc_conversion_average_mode_t

Define enumeration of conversion averages mode.

Configure the converion average number for auto-calibration.

Note

Some enumerator values are not available on some devices, mainly depends on the size of CAL_AVGS field in CTRL register.

typedef enum _lpadc_reference_voltage_mode lpadc_reference_voltage_source_t

Define enumeration of reference voltage source.

For detail information, need to check the SoC’s specification.

typedef enum _lpadc_power_level_mode lpadc_power_level_mode_t

Define enumeration of power configuration.

Configures the ADC for power and performance. In the highest power setting the highest conversion rates will be possible. Refer to the device data sheet for power and performance capabilities for each setting.

typedef enum _lpadc_offset_calibration_mode lpadc_offset_calibration_mode_t

Define enumeration of offset calibration mode.

typedef enum _lpadc_trigger_priority_policy lpadc_trigger_priority_policy_t

Define enumeration of trigger priority policy.

This selection controls how higher priority triggers are handled.

Note

kLPADC_TriggerPriorityPreemptSubsequently is not available on some devices, mainly depends on the size of TPRICTRL field in CFG register.

typedef struct _lpadc_calibration_value lpadc_calibration_value_t

A structure of calibration value.

ADC_OFSTRIM_OFSTRIM_MAX
ADC_OFSTRIM_OFSTRIM_SIGN
LPADC_GET_ACTIVE_COMMAND_STATUS(statusVal)

Define the MACRO function to get command status from status value.

The statusVal is the return value from LPADC_GetStatusFlags().

LPADC_GET_ACTIVE_TRIGGER_STATUE(statusVal)

Define the MACRO function to get trigger status from status value.

The statusVal is the return value from LPADC_GetStatusFlags().

struct lpadc_config_t
#include <fsl_lpadc.h>

LPADC global configuration.

This structure would used to keep the settings for initialization.

Public Members

bool enableInternalClock

Enables the internally generated clock source. The clock source is used in clock selection logic at the chip level and is optionally used for the ADC clock source.

bool enableVref1LowVoltage

If voltage reference option1 input is below 1.8V, it should be “true”. If voltage reference option1 input is above 1.8V, it should be “false”.

bool enableInDozeMode

Control system transition to Stop and Wait power modes while ADC is converting. When enabled in Doze mode, immediate entries to Wait or Stop are allowed. When disabled, the ADC will wait for the current averaging iteration/FIFO storage to complete before acknowledging stop or wait mode entry.

lpadc_conversion_average_mode_t conversionAverageMode

Auto-Calibration Averages.

bool enableAnalogPreliminary

ADC analog circuits are pre-enabled and ready to execute conversions without startup delays(at the cost of higher DC current consumption).

uint32_t powerUpDelay

When the analog circuits are not pre-enabled, the ADC analog circuits are only powered while the ADC is active and there is a counted delay defined by this field after an initial trigger transitions the ADC from its Idle state to allow time for the analog circuits to stabilize. The startup delay count of (powerUpDelay * 4) ADCK cycles must result in a longer delay than the analog startup time.

lpadc_reference_voltage_source_t referenceVoltageSource

Selects the voltage reference high used for conversions.

lpadc_power_level_mode_t powerLevelMode

Power Configuration Selection.

lpadc_trigger_priority_policy_t triggerPriorityPolicy

Control how higher priority triggers are handled, see to lpadc_trigger_priority_policy_t.

bool enableConvPause

Enables the ADC pausing function. When enabled, a programmable delay is inserted during command execution sequencing between LOOP iterations, between commands in a sequence, and between conversions when command is executing in “Compare Until True” configuration.

uint32_t convPauseDelay

Controls the duration of pausing during command execution sequencing. The pause delay is a count of (convPauseDelay*4) ADCK cycles. Only available when ADC pausing function is enabled. The available value range is in 9-bit.

uint32_t FIFOWatermark

FIFOWatermark is a programmable threshold setting. When the number of datawords stored in the ADC Result FIFO is greater than the value in this field, the ready flag would be asserted to indicate stored data has reached the programmable threshold.

struct lpadc_conv_command_config_t
#include <fsl_lpadc.h>

Define structure to keep the configuration for conversion command.

Public Members

lpadc_sample_scale_mode_t sampleScaleMode

Sample scale mode.

lpadc_sample_scale_mode_t channelBScaleMode

Alternate channe B Scale mode.

lpadc_sample_channel_mode_t sampleChannelMode

Channel sample mode.

uint32_t channelNumber

Channel number, select the channel or channel pair.

uint32_t channelBNumber

Alternate Channel B number, select the channel.

uint32_t chainedNextCommandNumber

Selects the next command to be executed after this command completes. 1-15 is available, 0 is to terminate the chain after this command.

bool enableAutoChannelIncrement

Loop with increment: when disabled, the “loopCount” field selects the number of times the selected channel is converted consecutively; when enabled, the “loopCount” field defines how many consecutive channels are converted as part of the command execution.

uint32_t loopCount

Selects how many times this command executes before finish and transition to the next command or Idle state. Command executes LOOP+1 times. 0-15 is available.

lpadc_hardware_average_mode_t hardwareAverageMode

Hardware average selection.

lpadc_sample_time_mode_t sampleTimeMode

Sample time selection.

lpadc_hardware_compare_mode_t hardwareCompareMode

Hardware compare selection.

uint32_t hardwareCompareValueHigh

Compare Value High. The available value range is in 16-bit.

uint32_t hardwareCompareValueLow

Compare Value Low. The available value range is in 16-bit.

lpadc_conversion_resolution_mode_t conversionResolutionMode

Conversion resolution mode.

bool enableWaitTrigger

Wait for trigger assertion before execution: when disabled, this command will be automatically executed; when enabled, the active trigger must be asserted again before executing this command.

struct lpadc_conv_trigger_config_t
#include <fsl_lpadc.h>

Define structure to keep the configuration for conversion trigger.

Public Members

uint32_t targetCommandId

Select the command from command buffer to execute upon detect of the associated trigger event.

uint32_t delayPower

Select the trigger delay duration to wait at the start of servicing a trigger event. When this field is clear, then no delay is incurred. When this field is set to a non-zero value, the duration for the delay is 2^delayPower ADCK cycles. The available value range is 4-bit.

uint32_t priority

Sets the priority of the associated trigger source. If two or more triggers have the same priority level setting, the lower order trigger event has the higher priority. The lower value for this field is for the higher priority, the available value range is 1-bit.

bool enableHardwareTrigger

Enable hardware trigger source to initiate conversion on the rising edge of the input trigger source or not. THe software trigger is always available.

struct lpadc_conv_result_t
#include <fsl_lpadc.h>

Define the structure to keep the conversion result.

Public Members

uint32_t commandIdSource

Indicate the command buffer being executed that generated this result.

uint32_t loopCountIndex

Indicate the loop count value during command execution that generated this result.

uint32_t triggerIdSource

Indicate the trigger source that initiated a conversion and generated this result.

uint16_t convValue

Data result.

struct _lpadc_calibration_value
#include <fsl_lpadc.h>

A structure of calibration value.

GPIO: General Purpose I/O

void GPIO_PortInit(GPIO_Type *base, uint32_t port)

Initializes the GPIO peripheral.

This function ungates the GPIO clock.

Parameters:
  • base – GPIO peripheral base pointer.

  • port – GPIO port number.

void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config)

Initializes a GPIO pin used by the board.

To initialize the GPIO, define a pin configuration, either input or output, in the user file. Then, call the GPIO_PinInit() function.

This is an example to define an input pin or output pin configuration:

Define a digital input pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalInput,
  0,
}
Define a digital output pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalOutput,
  0,
}

Parameters:
  • base – GPIO peripheral base pointer(Typically GPIO)

  • port – GPIO port number

  • pin – GPIO pin number

  • config – GPIO pin configuration pointer

static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)

Sets the output level of the one GPIO pin to the logic 1 or 0.

Parameters:
  • base – GPIO peripheral base pointer(Typically GPIO)

  • port – GPIO port number

  • pin – GPIO pin number

  • output – GPIO pin output logic level.

    • 0: corresponding pin output low-logic level.

    • 1: corresponding pin output high-logic level.

static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)

Reads the current input value of the GPIO PIN.

Parameters:
  • base – GPIO peripheral base pointer(Typically GPIO)

  • port – GPIO port number

  • pin – GPIO pin number

Return values:

GPIO – port input value

  • 0: corresponding pin input low-logic level.

  • 1: corresponding pin input high-logic level.

FSL_GPIO_DRIVER_VERSION

LPC GPIO driver version.

enum _gpio_pin_direction

LPC GPIO direction definition.

Values:

enumerator kGPIO_DigitalInput

Set current pin as digital input

enumerator kGPIO_DigitalOutput

Set current pin as digital output

typedef enum _gpio_pin_direction gpio_pin_direction_t

LPC GPIO direction definition.

typedef struct _gpio_pin_config gpio_pin_config_t

The GPIO pin configuration structure.

Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused.

static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 1.

Parameters:
  • base – GPIO peripheral base pointer(Typically GPIO)

  • port – GPIO port number

  • mask – GPIO pin number macro

static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 0.

Parameters:
  • base – GPIO peripheral base pointer(Typically GPIO)

  • port – GPIO port number

  • mask – GPIO pin number macro

static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)

Reverses current output logic of the multiple GPIO pins.

Parameters:
  • base – GPIO peripheral base pointer(Typically GPIO)

  • port – GPIO port number

  • mask – GPIO pin number macro

struct _gpio_pin_config
#include <fsl_gpio.h>

The GPIO pin configuration structure.

Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused.

Public Members

gpio_pin_direction_t pinDirection

GPIO direction, input or output

uint8_t outputLogic

Set default output logic, no use in input

IOCON: I/O pin configuration

FSL_IOCON_DRIVER_VERSION

IOCON driver version.

typedef struct _iocon_group iocon_group_t

Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format.

__STATIC_INLINE void IOCON_PinMuxSet (IOCON_Type *base, uint8_t port, uint8_t pin, uint32_t modefunc)

Sets I/O Control pin mux.

Parameters:
  • base – : The base of IOCON peripheral on the chip

  • port – : GPIO port to mux

  • pin – : GPIO pin to mux

  • modefunc – : OR’ed values of type IOCON_*

Returns:

Nothing

__STATIC_INLINE void IOCON_SetPinMuxing (IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)

Set all I/O Control pin muxing.

Parameters:
  • base – : The base of IOCON peripheral on the chip

  • pinArray – : Pointer to array of pin mux selections

  • arrayLength – : Number of entries in pinArray

Returns:

Nothing

FSL_COMPONENT_ID
IOCON_FUNC0

IOCON function and mode selection definitions.

Note

See the User Manual for specific modes and functions supported by the various pins. Selects pin function 0

IOCON_FUNC1

Selects pin function 1

IOCON_FUNC2

Selects pin function 2

IOCON_FUNC3

Selects pin function 3

IOCON_FUNC4

Selects pin function 4

IOCON_FUNC5

Selects pin function 5

IOCON_FUNC6

Selects pin function 6

IOCON_FUNC7

Selects pin function 7

struct _iocon_group
#include <fsl_iocon.h>

Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format.

MCAN: Controller Area Network Driver

void MCAN_Init(CAN_Type *base, const mcan_config_t *config, uint32_t sourceClock_Hz)

Initializes an MCAN instance.

This function initializes the MCAN module with user-defined settings. This example shows how to set up the mcan_config_t parameters and how to call the MCAN_Init function by passing in these parameters.

mcan_config_t config;
config->baudRateA = 500000U;
config->baudRateD = 1000000U;
config->enableCanfdNormal = false;
config->enableCanfdSwitch = false;
config->enableLoopBackInt = false;
config->enableLoopBackExt = false;
config->enableBusMon = false;
MCAN_Init(CANFD0, &config, 8000000UL);

Parameters:
  • base – MCAN peripheral base address.

  • config – Pointer to the user-defined configuration structure.

  • sourceClock_Hz – MCAN Protocol Engine clock source frequency in Hz.

void MCAN_Deinit(CAN_Type *base)

Deinitializes an MCAN instance.

This function deinitializes the MCAN module.

Parameters:
  • base – MCAN peripheral base address.

void MCAN_GetDefaultConfig(mcan_config_t *config)

Gets the default configuration structure.

This function initializes the MCAN configuration structure to default values. The default values are as follows. config->baudRateA = 500000U; config->baudRateD = 1000000U; config->enableCanfdNormal = false; config->enableCanfdSwitch = false; config->enableLoopBackInt = false; config->enableLoopBackExt = false; config->enableBusMon = false;

Parameters:
  • config – Pointer to the MCAN configuration structure.

static inline void MCAN_EnterInitialMode(CAN_Type *base)

MCAN enters initialization mode.

After enter initialization mode, users can write access to the protected configuration registers.

Parameters:
  • base – MCAN peripheral base address.

static inline void MCAN_EnterNormalMode(CAN_Type *base)

MCAN enters normal mode.

After initialization, INIT bit in CCCR register must be cleared to enter normal mode thus synchronizes to the CAN bus and ready for communication.

Parameters:
  • base – MCAN peripheral base address.

static inline void MCAN_SetMsgRAMBase(CAN_Type *base, uint32_t value)

Sets the MCAN Message RAM base address.

This function sets the Message RAM base address.

Parameters:
  • base – MCAN peripheral base address.

  • value – Desired Message RAM base.

static inline uint32_t MCAN_GetMsgRAMBase(CAN_Type *base)

Gets the MCAN Message RAM base address.

This function gets the Message RAM base address.

Parameters:
  • base – MCAN peripheral base address.

Returns:

Message RAM base address.

bool MCAN_CalculateImprovedTimingValues(uint32_t baudRate, uint32_t sourceClock_Hz, mcan_timing_config_t *pconfig)

Calculates the improved timing values by specific baudrates for classical CAN.

Parameters:
  • baudRate – The classical CAN speed in bps defined by user

  • sourceClock_Hz – The Source clock data speed in bps. Zero to disable baudrate switching

  • pconfig – Pointer to the MCAN timing configuration structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration

bool MCAN_CalculateSpecifiedTimingValues(uint32_t sourceClock_Hz, mcan_timing_config_t *pconfig, const mcan_timing_param_t *pParamConfig)

Calculates the specified timing values for classical CAN with user-defined settings.

User can specify baudrates, sample point position, bus length, and transceiver propagation delay. This example shows how to set up the mcan_timing_param_t parameters and how to call the this function by passing in these parameters.

mcan_timing_config_t timing_config;
mcan_timing_param_t timing_param;
timing_param.busLength = 1U;
timing_param.propTxRx = 230U;
timing_param.nominalbaudRate = 500000U;
timing_param.nominalSP = 800U;
MCAN_CalculateSpecifiedTimingValues(MCAN_CLK_FREQ, &timing_config, &timing_param);

Note that due to integer division will sacrifice the precision, actual sample point may not equal to expected. If actual sample point is not in allowed 2% range, this function will return false. So it is better to select higher source clock when baudrate is relatively high. This will ensure more time quanta and higher precision of sample point. Parameter busLength and propTxRx are optional and intended to verify whether propagation delay is too long to corrupt sample point. User can set these parameter zero if you do not want to consider this factor.

Parameters:
  • sourceClock_Hz – The Source clock data speed in bps.

  • pconfig – Pointer to the MCAN timing configuration structure.

  • config – Pointer to the MCAN timing parameters structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration

void MCAN_SetArbitrationTimingConfig(CAN_Type *base, const mcan_timing_config_t *config)

Sets the MCAN protocol arbitration phase timing characteristic.

This function gives user settings to CAN bus timing characteristic. The function is for an experienced user. For less experienced users, call the MCAN_Init() and fill the baud rate field with a desired value. This provides the default arbitration phase timing characteristics.

Note that calling MCAN_SetArbitrationTimingConfig() overrides the baud rate set in MCAN_Init().

Parameters:
  • base – MCAN peripheral base address.

  • config – Pointer to the timing configuration structure.

status_t MCAN_SetBaudRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Bps)

Set Baud Rate of MCAN classic mode.

This function set the baud rate of MCAN base on MCAN_CalculateImprovedTimingValues() API calculated timing values.

Parameters:
  • base – MCAN peripheral base address.

  • sourceClock_Hz – Source Clock in Hz.

  • baudRate_Bps – Baud Rate in Bps.

Returns:

kStatus_Success - Set CAN baud rate (only has Nominal phase) successfully.

bool MCAN_FDCalculateImprovedTimingValues(uint32_t baudRate, uint32_t baudRateFD, uint32_t sourceClock_Hz, mcan_timing_config_t *pconfig)

Calculates the improved timing values by specific baudrates for CANFD.

Parameters:
  • baudRate – The CANFD bus control speed in bps defined by user

  • baudRateFD – The CANFD bus data speed in bps defined by user

  • sourceClock_Hz – The Source clock data speed in bps.

  • pconfig – Pointer to the MCAN timing configuration structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration

bool MCAN_FDCalculateSpecifiedTimingValues(uint32_t sourceClock_Hz, mcan_timing_config_t *pconfig, const mcan_timing_param_t *pParamConfig)

Calculates the specified timing values for CANFD with user-defined settings.

User can specify baudrates, sample point position, bus length, and transceiver propagation delay. This example shows how to set up the mcan_timing_param_t parameters and how to call the this function by passing in these parameters.

mcan_timing_config_t timing_config;
mcan_timing_param_t timing_param;
timing_param.busLength = 1U;
timing_param.propTxRx = 230U;
timing_param.nominalbaudRate = 500000U;
timing_param.nominalSP = 800U;
timing_param.databaudRate = 4000000U;
timing_param.dataSP = 700U;
MCAN_FDCalculateSpecifiedTimingValues(MCAN_CLK_FREQ, &timing_config, &timing_param);

Note that due to integer division will sacrifice the precision, actual sample point may not equal to expected. So it is better to select higher source clock when baudrate is relatively high. Select higher nominal baudrate when source clock is relatively high because large clock predivider will lead to less time quanta in data phase. This function will set predivider in arbitration phase equal to data phase. These methods will ensure more time quanta and higher precision of sample point. Parameter busLength and propTxRx are optional and intended to verify whether propagation delay is too long to corrupt sample point. User can set these parameter zero if you do not want to consider this factor.

Parameters:
  • sourceClock_Hz – The Source clock data speed in bps.

  • pconfig – Pointer to the MCAN timing configuration structure.

  • config – Pointer to the MCAN timing parameters structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration

status_t MCAN_SetBaudRateFD(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t baudRateN_Bps, uint32_t baudRateD_Bps)

Set Baud Rate of MCAN FD mode.

This function set the baud rate of MCAN FD base on MCAN_FDCalculateImprovedTimingValues API calculated timing values.

Parameters:
  • base – MCAN peripheral base address.

  • sourceClock_Hz – Source Clock in Hz.

  • baudRateN_Bps – Nominal Baud Rate in Bps.

  • baudRateD_Bps – Data Baud Rate in Bps.

Returns:

kStatus_Success - Set CAN FD baud rate (include Nominal and Data phase) successfully.

void MCAN_SetDataTimingConfig(CAN_Type *base, const mcan_timing_config_t *config)

Sets the MCAN protocol data phase timing characteristic.

This function gives user settings to CAN bus timing characteristic. The function is for an experienced user. For less experienced users, call the MCAN_Init() and fill the baud rate field with a desired value. This provides the default data phase timing characteristics.

Note that calling MCAN_SetArbitrationTimingConfig() overrides the baud rate set in MCAN_Init().

Parameters:
  • base – MCAN peripheral base address.

  • config – Pointer to the timing configuration structure.

void MCAN_SetRxFifo0Config(CAN_Type *base, const mcan_rx_fifo_config_t *config)

Configures an MCAN receive fifo 0 buffer.

This function sets start address, element size, watermark, operation mode and datafield size of the recieve fifo 0.

Parameters:
  • base – MCAN peripheral base address.

  • config – The receive fifo 0 configuration structure.

void MCAN_SetRxFifo1Config(CAN_Type *base, const mcan_rx_fifo_config_t *config)

Configures an MCAN receive fifo 1 buffer.

This function sets start address, element size, watermark, operation mode and datafield size of the recieve fifo 1.

Parameters:
  • base – MCAN peripheral base address.

  • config – The receive fifo 1 configuration structure.

void MCAN_SetRxBufferConfig(CAN_Type *base, const mcan_rx_buffer_config_t *config)

Configures an MCAN receive buffer.

This function sets start address and datafield size of the recieve buffer.

Parameters:
  • base – MCAN peripheral base address.

  • config – The receive buffer configuration structure.

void MCAN_SetTxEventFifoConfig(CAN_Type *base, const mcan_tx_fifo_config_t *config)

Configures an MCAN transmit event fifo.

This function sets start address, element size, watermark of the transmit event fifo.

Parameters:
  • base – MCAN peripheral base address.

  • config – The transmit event fifo configuration structure.

void MCAN_SetTxBufferConfig(CAN_Type *base, const mcan_tx_buffer_config_t *config)

Configures an MCAN transmit buffer.

This function sets start address, element size, fifo/queue mode and datafield size of the transmit buffer.

Parameters:
  • base – MCAN peripheral base address.

  • config – The transmit buffer configuration structure.

void MCAN_SetFilterConfig(CAN_Type *base, const mcan_frame_filter_config_t *config)

Set filter configuration.

This function sets remote and non masking frames in global filter configuration, also the start address, list size in standard/extended ID filter configuration.

Parameters:
  • base – MCAN peripheral base address.

  • config – The MCAN filter configuration.

status_t MCAN_SetMessageRamConfig(CAN_Type *base, const mcan_memory_config_t *config)

Set Message RAM related configuration.

Note

This function include Standard/extended ID filter, Rx FIFO 0/1, Rx buffer, Tx event FIFO and Tx buffer configurations

Parameters:
  • base – MCAN peripheral base address.

  • config – The MCAN filter configuration.

Return values:
  • kStatus_Success – - Message RAM related configuration Successfully.

  • kStatus_Fail – - Message RAM related configure fail due to wrong address parameter.

void MCAN_SetSTDFilterElement(CAN_Type *base, const mcan_frame_filter_config_t *config, const mcan_std_filter_element_config_t *filter, uint8_t idx)

Set standard message ID filter element configuration.

Parameters:
  • base – MCAN peripheral base address.

  • config – The MCAN filter configuration.

  • filter – The MCAN standard message ID filter element configuration.

  • idx – The standard message ID filter element index.

void MCAN_SetEXTFilterElement(CAN_Type *base, const mcan_frame_filter_config_t *config, const mcan_ext_filter_element_config_t *filter, uint8_t idx)

Set extended message ID filter element configuration.

Parameters:
  • base – MCAN peripheral base address.

  • config – The MCAN filter configuration.

  • filter – The MCAN extended message ID filter element configuration.

  • idx – The extended message ID filter element index.

static inline uint32_t MCAN_GetStatusFlag(CAN_Type *base, uint32_t mask)

Gets the MCAN module interrupt flags.

This function gets all MCAN interrupt status flags.

Parameters:
  • base – MCAN peripheral base address.

  • mask – The ORed MCAN interrupt mask.

Returns:

MCAN status flags which are ORed.

static inline void MCAN_ClearStatusFlag(CAN_Type *base, uint32_t mask)

Clears the MCAN module interrupt flags.

This function clears MCAN interrupt status flags.

Parameters:
  • base – MCAN peripheral base address.

  • mask – The ORed MCAN interrupt mask.

static inline bool MCAN_GetRxBufferStatusFlag(CAN_Type *base, uint8_t idx)

Gets the new data flag of specific Rx Buffer.

This function gets new data flag of specific Rx Buffer.

Parameters:
  • base – MCAN peripheral base address.

  • idx – Rx Buffer index.

Returns:

Rx Buffer new data status flag.

static inline void MCAN_ClearRxBufferStatusFlag(CAN_Type *base, uint8_t idx)

Clears the new data flag of specific Rx Buffer.

This function clears new data flag of specific Rx Buffer.

Parameters:
  • base – MCAN peripheral base address.

  • idx – Rx Buffer index.

static inline void MCAN_EnableInterrupts(CAN_Type *base, uint32_t line, uint32_t mask)

Enables MCAN interrupts according to the provided interrupt line and mask.

This function enables the MCAN interrupts according to the provided interrupt line and mask. The mask is a logical OR of enumeration members.

Parameters:
  • base – MCAN peripheral base address.

  • line – Interrupt line number, 0 or 1.

  • mask – The interrupts to enable.

static inline void MCAN_EnableTransmitBufferInterrupts(CAN_Type *base, uint8_t idx)

Enables MCAN Tx Buffer interrupts according to the provided index.

This function enables the MCAN Tx Buffer interrupts.

Parameters:
  • base – MCAN peripheral base address.

  • idx – Tx Buffer index.

static inline void MCAN_DisableTransmitBufferInterrupts(CAN_Type *base, uint8_t idx)

Disables MCAN Tx Buffer interrupts according to the provided index.

This function disables the MCAN Tx Buffer interrupts.

Parameters:
  • base – MCAN peripheral base address.

  • idx – Tx Buffer index.

static inline void MCAN_DisableInterrupts(CAN_Type *base, uint32_t mask)

Disables MCAN interrupts according to the provided mask.

This function disables the MCAN interrupts according to the provided mask. The mask is a logical OR of enumeration members.

Parameters:
  • base – MCAN peripheral base address.

  • mask – The interrupts to disable.

uint32_t MCAN_IsTransmitRequestPending(CAN_Type *base, uint8_t idx)

Gets the Tx buffer request pending status.

This function returns Tx Message Buffer transmission request pending status.

Parameters:
  • base – MCAN peripheral base address.

  • idx – The MCAN Tx Buffer index.

uint32_t MCAN_IsTransmitOccurred(CAN_Type *base, uint8_t idx)

Gets the Tx buffer transmission occurred status.

This function returns Tx Message Buffer transmission occurred status.

Parameters:
  • base – MCAN peripheral base address.

  • idx – The MCAN Tx Buffer index.

status_t MCAN_WriteTxBuffer(CAN_Type *base, uint8_t idx, const mcan_tx_buffer_frame_t *pTxFrame)

Writes an MCAN Message to the Transmit Buffer.

This function writes a CAN Message to the specified Transmit Message Buffer and changes the Message Buffer state to start CAN Message transmit. After that the function returns immediately.

Parameters:
  • base – MCAN peripheral base address.

  • idx – The MCAN Tx Buffer index.

  • pTxFrame – Pointer to CAN message frame to be sent.

status_t MCAN_ReadRxBuffer(CAN_Type *base, uint8_t idx, mcan_rx_buffer_frame_t *pRxFrame)

Reads an MCAN Message from Rx Buffer.

This function reads a CAN message from the Rx Buffer in the Message RAM.

Parameters:
  • base – MCAN peripheral base address.

  • idx – The MCAN Rx Buffer index.

  • pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx Buffer successfully.

status_t MCAN_ReadRxFifo(CAN_Type *base, uint8_t fifoBlock, mcan_rx_buffer_frame_t *pRxFrame)

Reads an MCAN Message from Rx FIFO.

This function reads a CAN message from the Rx FIFO in the Message RAM.

Parameters:
  • base – MCAN peripheral base address.

  • fifoBlock – Rx FIFO block 0 or 1.

  • pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.

static inline void MCAN_TransmitAddRequest(CAN_Type *base, uint8_t idx)

Tx Buffer add request to send message out.

This function add sending request to corresponding Tx Buffer.

Parameters:
  • base – MCAN peripheral base address.

  • idx – Tx Buffer index.

static inline void MCAN_TransmitCancelRequest(CAN_Type *base, uint8_t idx)

Tx Buffer cancel sending request.

This function clears Tx buffer request pending bit.

Parameters:
  • base – MCAN peripheral base address.

  • idx – Tx Buffer index.

status_t MCAN_TransferSendBlocking(CAN_Type *base, uint8_t idx, mcan_tx_buffer_frame_t *pTxFrame)

Performs a polling send transaction on the CAN bus.

Note that a transfer handle does not need to be created before calling this API.

Parameters:
  • base – MCAN peripheral base pointer.

  • idx – The MCAN buffer index.

  • pTxFrame – Pointer to CAN message frame to be sent.

Return values:
  • kStatus_Success – - Write Tx Message Buffer Successfully.

  • kStatus_Fail – - Tx Message Buffer is currently in use.

status_t MCAN_TransferReceiveBlocking(CAN_Type *base, uint8_t idx, mcan_rx_buffer_frame_t *pRxFrame)

Performs a polling receive transaction on the CAN bus.

Note that a transfer handle does not need to be created before calling this API.

Parameters:
  • base – MCAN peripheral base pointer.

  • idx – The MCAN buffer index.

  • pRxFrame – Pointer to CAN message frame structure for reception.

Return values:
  • kStatus_Success – - Read Rx Message Buffer Successfully.

  • kStatus_Fail – - No new message.

status_t MCAN_TransferReceiveFifoBlocking(CAN_Type *base, uint8_t fifoBlock, mcan_rx_buffer_frame_t *pRxFrame)

Performs a polling receive transaction from Rx FIFO on the CAN bus.

Note that a transfer handle does not need to be created before calling this API.

Parameters:
  • base – MCAN peripheral base pointer.

  • fifoBlock – Rx FIFO block, 0 or 1.

  • pRxFrame – Pointer to CAN message frame structure for reception.

Return values:
  • kStatus_Success – - Read Message from Rx FIFO successfully.

  • kStatus_Fail – - No new message in Rx FIFO.

void MCAN_TransferCreateHandle(CAN_Type *base, mcan_handle_t *handle, mcan_transfer_callback_t callback, void *userData)

Initializes the MCAN handle.

This function initializes the MCAN handle, which can be used for other MCAN transactional APIs. Usually, for a specified MCAN instance, call this API once to get the initialized handle.

Parameters:
  • base – MCAN peripheral base address.

  • handle – MCAN handle pointer.

  • callback – The callback function.

  • userData – The parameter of the callback function.

status_t MCAN_TransferSendNonBlocking(CAN_Type *base, mcan_handle_t *handle, mcan_buffer_transfer_t *xfer)

Sends a message using IRQ.

This function sends a message using IRQ. This is a non-blocking function, which returns right away. When messages have been sent out, the send callback function is called.

Parameters:
  • base – MCAN peripheral base address.

  • handle – MCAN handle pointer.

  • xfer – MCAN Buffer transfer structure. See the mcan_buffer_transfer_t.

Return values:
  • kStatus_Success – Start Tx Buffer sending process successfully.

  • kStatus_Fail – Write Tx Buffer failed.

  • kStatus_MCAN_TxBusy – Tx Buffer is in use.

status_t MCAN_TransferReceiveFifoNonBlocking(CAN_Type *base, uint8_t fifoBlock, mcan_handle_t *handle, mcan_fifo_transfer_t *xfer)

Receives a message from Rx FIFO using IRQ.

This function receives a message using IRQ. This is a non-blocking function, which returns right away. When all messages have been received, the receive callback function is called.

Parameters:
  • base – MCAN peripheral base address.

  • handle – MCAN handle pointer.

  • fifoBlock – Rx FIFO block, 0 or 1.

  • xfer – MCAN Rx FIFO transfer structure. See the mcan_fifo_transfer_t.

Return values:
  • kStatus_Success – - Start Rx FIFO receiving process successfully.

  • kStatus_MCAN_RxFifo0Busy – - Rx FIFO 0 is currently in use.

  • kStatus_MCAN_RxFifo1Busy – - Rx FIFO 1 is currently in use.

void MCAN_TransferAbortSend(CAN_Type *base, mcan_handle_t *handle, uint8_t bufferIdx)

Aborts the interrupt driven message send process.

This function aborts the interrupt driven message send process.

Parameters:
  • base – MCAN peripheral base address.

  • handle – MCAN handle pointer.

  • bufferIdx – The MCAN Buffer index.

void MCAN_TransferAbortReceiveFifo(CAN_Type *base, uint8_t fifoBlock, mcan_handle_t *handle)

Aborts the interrupt driven message receive from Rx FIFO process.

This function aborts the interrupt driven message receive from Rx FIFO process.

Parameters:
  • base – MCAN peripheral base address.

  • fifoBlock – MCAN Fifo block, 0 or 1.

  • handle – MCAN handle pointer.

void MCAN_TransferHandleIRQ(CAN_Type *base, mcan_handle_t *handle)

MCAN IRQ handle function.

This function handles the MCAN Error, the Buffer, and the Rx FIFO IRQ request.

Parameters:
  • base – MCAN peripheral base address.

  • handle – MCAN handle pointer.

FSL_MCAN_DRIVER_VERSION

MCAN driver version.

MCAN transfer status.

Values:

enumerator kStatus_MCAN_TxBusy

Tx Buffer is Busy.

enumerator kStatus_MCAN_TxIdle

Tx Buffer is Idle.

enumerator kStatus_MCAN_RxBusy

Rx Buffer is Busy.

enumerator kStatus_MCAN_RxIdle

Rx Buffer is Idle.

enumerator kStatus_MCAN_RxFifo0New

New message written to Rx FIFO 0.

enumerator kStatus_MCAN_RxFifo0Idle

Rx FIFO 0 is Idle.

enumerator kStatus_MCAN_RxFifo0Watermark

Rx FIFO 0 fill level reached watermark.

enumerator kStatus_MCAN_RxFifo0Full

Rx FIFO 0 full.

enumerator kStatus_MCAN_RxFifo0Lost

Rx FIFO 0 message lost.

enumerator kStatus_MCAN_RxFifo1New

New message written to Rx FIFO 1.

enumerator kStatus_MCAN_RxFifo1Idle

Rx FIFO 1 is Idle.

enumerator kStatus_MCAN_RxFifo1Watermark

Rx FIFO 1 fill level reached watermark.

enumerator kStatus_MCAN_RxFifo1Full

Rx FIFO 1 full.

enumerator kStatus_MCAN_RxFifo1Lost

Rx FIFO 1 message lost.

enumerator kStatus_MCAN_RxFifo0Busy

Rx FIFO 0 is busy.

enumerator kStatus_MCAN_RxFifo1Busy

Rx FIFO 1 is busy.

enumerator kStatus_MCAN_ErrorStatus

MCAN Module Error and Status.

enumerator kStatus_MCAN_UnHandled

UnHadled Interrupt asserted.

enum _mcan_flags

MCAN status flags.

This provides constants for the MCAN status flags for use in the MCAN functions. Note: The CPU read action clears MCAN_ErrorFlag, therefore user need to read MCAN_ErrorFlag and distinguish which error is occur using _mcan_error_flags enumerations.

Values:

enumerator kMCAN_AccesstoRsvdFlag

CAN Synchronization Status.

enumerator kMCAN_ProtocolErrDIntFlag

Tx Warning Interrupt Flag.

enumerator kMCAN_ProtocolErrAIntFlag

Rx Warning Interrupt Flag.

enumerator kMCAN_BusOffIntFlag

Tx Error Warning Status.

enumerator kMCAN_ErrorWarningIntFlag

Rx Error Warning Status.

enumerator kMCAN_ErrorPassiveIntFlag

Rx Error Warning Status.

enum _mcan_rx_fifo_flags

MCAN Rx FIFO status flags.

The MCAN Rx FIFO Status enumerations are used to determine the status of the Rx FIFO.

Values:

enumerator kMCAN_RxFifo0NewFlag

Rx FIFO 0 new message flag.

enumerator kMCAN_RxFifo0WatermarkFlag

Rx FIFO 0 watermark reached flag.

enumerator kMCAN_RxFifo0FullFlag

Rx FIFO 0 full flag.

enumerator kMCAN_RxFifo0LostFlag

Rx FIFO 0 message lost flag.

enumerator kMCAN_RxFifo1NewFlag

Rx FIFO 0 new message flag.

enumerator kMCAN_RxFifo1WatermarkFlag

Rx FIFO 0 watermark reached flag.

enumerator kMCAN_RxFifo1FullFlag

Rx FIFO 0 full flag.

enumerator kMCAN_RxFifo1LostFlag

Rx FIFO 0 message lost flag.

enum _mcan_tx_flags

MCAN Tx status flags.

The MCAN Tx Status enumerations are used to determine the status of the Tx Buffer/Event FIFO.

Values:

enumerator kMCAN_TxTransmitCompleteFlag

Transmission completed flag.

enumerator kMCAN_TxTransmitCancelFinishFlag

Transmission cancellation finished flag.

enumerator kMCAN_TxEventFifoLostFlag

Tx Event FIFO element lost.

enumerator kMCAN_TxEventFifoFullFlag

Tx Event FIFO full.

enumerator kMCAN_TxEventFifoWatermarkFlag

Tx Event FIFO fill level reached watermark.

enumerator kMCAN_TxEventFifoNewFlag

Tx Handler wrote Tx Event FIFO element flag.

enumerator kMCAN_TxEventFifoEmptyFlag

Tx FIFO empty flag.

enum _mcan_interrupt_enable

MCAN interrupt configuration structure, default settings all disabled.

This structure contains the settings for all of the MCAN Module interrupt configurations.

Values:

enumerator kMCAN_BusOffInterruptEnable

Bus Off interrupt.

enumerator kMCAN_ErrorInterruptEnable

Error interrupt.

enumerator kMCAN_WarningInterruptEnable

Rx Warning interrupt.

enum _mcan_frame_idformat

MCAN frame format.

Values:

enumerator kMCAN_FrameIDStandard

Standard frame format attribute.

enumerator kMCAN_FrameIDExtend

Extend frame format attribute.

enum _mcan_frame_type

MCAN frame type.

Values:

enumerator kMCAN_FrameTypeData

Data frame type attribute.

enumerator kMCAN_FrameTypeRemote

Remote frame type attribute.

enum _mcan_bytes_in_datafield

MCAN frame datafield size.

Values:

enumerator kMCAN_8ByteDatafield

8 byte data field.

enumerator kMCAN_12ByteDatafield

12 byte data field.

enumerator kMCAN_16ByteDatafield

16 byte data field.

enumerator kMCAN_20ByteDatafield

20 byte data field.

enumerator kMCAN_24ByteDatafield

24 byte data field.

enumerator kMCAN_32ByteDatafield

32 byte data field.

enumerator kMCAN_48ByteDatafield

48 byte data field.

enumerator kMCAN_64ByteDatafield

64 byte data field.

enum _mcan_fifo_type

MCAN Rx FIFO block number.

Values:

enumerator kMCAN_Fifo0

CAN Rx FIFO 0.

enumerator kMCAN_Fifo1

CAN Rx FIFO 1.

enum _mcan_fifo_opmode_config

MCAN FIFO Operation Mode.

Values:

enumerator kMCAN_FifoBlocking

FIFO blocking mode.

enumerator kMCAN_FifoOverwrite

FIFO overwrite mode.

enum _mcan_txmode_config

MCAN Tx FIFO/Queue Mode.

Values:

enumerator kMCAN_txFifo

Tx FIFO operation.

enumerator kMCAN_txQueue

Tx Queue operation.

enum _mcan_remote_frame_config

MCAN remote frames treatment.

Values:

enumerator kMCAN_filterFrame

Filter remote frames.

enumerator kMCAN_rejectFrame

Reject all remote frames.

enum _mcan_nonmasking_frame_config

MCAN non-masking frames treatment.

Values:

enumerator kMCAN_acceptinFifo0

Accept non-masking frames in Rx FIFO 0.

enumerator kMCAN_acceptinFifo1

Accept non-masking frames in Rx FIFO 1.

enumerator kMCAN_reject0

Reject non-masking frames.

enumerator kMCAN_reject1

Reject non-masking frames.

enum _mcan_fec_config

MCAN Filter Element Configuration.

Values:

enumerator kMCAN_disable

Disable filter element.

enumerator kMCAN_storeinFifo0

Store in Rx FIFO 0 if filter matches.

enumerator kMCAN_storeinFifo1

Store in Rx FIFO 1 if filter matches.

enumerator kMCAN_reject

Reject ID if filter matches.

enumerator kMCAN_setprio

Set priority if filter matches.

enumerator kMCAN_setpriofifo0

Set priority and store in FIFO 0 if filter matches.

enumerator kMCAN_setpriofifo1

Set priority and store in FIFO 1 if filter matches.

enumerator kMCAN_storeinbuffer

Store into Rx Buffer or as debug message.

enum _mcan_std_filter_type

MCAN Filter Type.

Values:

enumerator kMCAN_range

Range filter from SFID1 to SFID2.

enumerator kMCAN_dual

Dual ID filter for SFID1 or SFID2.

enumerator kMCAN_classic

Classic filter: SFID1 = filter, SFID2 = mask.

enumerator kMCAN_disableORrange2

Filter element disabled for standard filter or Range filter, XIDAM mask not applied for extended filter.

typedef enum _mcan_frame_idformat mcan_frame_idformat_t

MCAN frame format.

typedef enum _mcan_frame_type mcan_frame_type_t

MCAN frame type.

typedef enum _mcan_bytes_in_datafield mcan_bytes_in_datafield_t

MCAN frame datafield size.

typedef struct _mcan_tx_buffer_frame mcan_tx_buffer_frame_t

MCAN Tx Buffer structure.

typedef struct _mcan_rx_buffer_frame mcan_rx_buffer_frame_t

MCAN Rx FIFO/Buffer structure.

typedef enum _mcan_fifo_type mcan_fifo_type_t

MCAN Rx FIFO block number.

typedef enum _mcan_fifo_opmode_config mcan_fifo_opmode_config_t

MCAN FIFO Operation Mode.

typedef enum _mcan_txmode_config mcan_txmode_config_t

MCAN Tx FIFO/Queue Mode.

typedef enum _mcan_remote_frame_config mcan_remote_frame_config_t

MCAN remote frames treatment.

typedef enum _mcan_nonmasking_frame_config mcan_nonmasking_frame_config_t

MCAN non-masking frames treatment.

typedef enum _mcan_fec_config mcan_fec_config_t

MCAN Filter Element Configuration.

typedef struct _mcan_rx_fifo_config mcan_rx_fifo_config_t

MCAN Rx FIFO configuration.

typedef struct _mcan_rx_buffer_config mcan_rx_buffer_config_t

MCAN Rx Buffer configuration.

typedef struct _mcan_tx_fifo_config mcan_tx_fifo_config_t

MCAN Tx Event FIFO configuration.

typedef struct _mcan_tx_buffer_config mcan_tx_buffer_config_t

MCAN Tx Buffer configuration.

typedef enum _mcan_std_filter_type mcan_filter_type_t

MCAN Filter Type.

typedef struct _mcan_std_filter_element_config mcan_std_filter_element_config_t

MCAN Standard Message ID Filter Element.

typedef struct _mcan_ext_filter_element_config mcan_ext_filter_element_config_t

MCAN Extended Message ID Filter Element.

typedef struct _mcan_frame_filter_config mcan_frame_filter_config_t

MCAN Rx filter configuration.

typedef struct _mcan_timing_config mcan_timing_config_t

MCAN protocol timing characteristic configuration structure.

typedef struct _mcan_timing_param mcan_timing_param_t

MCAN bit timing parameter configuration structure.

typedef struct _mcan_memory_config mcan_memory_config_t

MCAN Message RAM related configuration structure.

typedef struct _mcan_config mcan_config_t

MCAN module configuration structure.

typedef struct _mcan_buffer_transfer mcan_buffer_transfer_t

MCAN Buffer transfer.

typedef struct _mcan_fifo_transfer mcan_fifo_transfer_t

MCAN Rx FIFO transfer.

typedef struct _mcan_handle mcan_handle_t

MCAN handle structure definition.

typedef void (*mcan_transfer_callback_t)(CAN_Type *base, mcan_handle_t *handle, status_t status, uint32_t result, void *userData)

MCAN transfer callback function.

The MCAN transfer callback returns a value from the underlying layer. If the status equals to kStatus_MCAN_ErrorStatus, the result parameter is the Content of MCAN status register which can be used to get the working status(or error status) of MCAN module. If the status equals to other MCAN Message Buffer transfer status, the result is the index of Message Buffer that generate transfer event. If the status equals to other MCAN Message Buffer transfer status, the result is meaningless and should be Ignored.

MCAN_RETRY_TIMES
struct _mcan_tx_buffer_frame
#include <fsl_mcan.h>

MCAN Tx Buffer structure.

Public Members

uint8_t size

classical CAN is 8(bytes), FD is 12/64 such.

struct _mcan_rx_buffer_frame
#include <fsl_mcan.h>

MCAN Rx FIFO/Buffer structure.

Public Members

uint8_t size

classical CAN is 8(bytes), FD is 12/64 such.

struct _mcan_rx_fifo_config
#include <fsl_mcan.h>

MCAN Rx FIFO configuration.

Public Members

uint32_t address

FIFOn start address.

uint32_t elementSize

FIFOn element number.

uint32_t watermark

FIFOn watermark level.

mcan_fifo_opmode_config_t opmode

FIFOn blocking/overwrite mode.

mcan_bytes_in_datafield_t datafieldSize

Data field size per frame, size>8 is for CANFD.

struct _mcan_rx_buffer_config
#include <fsl_mcan.h>

MCAN Rx Buffer configuration.

Public Members

uint32_t address

Rx Buffer start address.

mcan_bytes_in_datafield_t datafieldSize

Data field size per frame, size>8 is for CANFD.

struct _mcan_tx_fifo_config
#include <fsl_mcan.h>

MCAN Tx Event FIFO configuration.

Public Members

uint32_t address

Event fifo start address.

uint32_t elementSize

FIFOn element number.

uint32_t watermark

FIFOn watermark level.

struct _mcan_tx_buffer_config
#include <fsl_mcan.h>

MCAN Tx Buffer configuration.

Public Members

uint32_t address

Tx Buffers Start Address.

uint32_t dedicatedSize

Number of Dedicated Transmit Buffers.

uint32_t fqSize

Transmit FIFO/Queue Size.

mcan_txmode_config_t mode

Tx FIFO/Queue Mode.

mcan_bytes_in_datafield_t datafieldSize

Data field size per frame, size>8 is for CANFD.

struct _mcan_std_filter_element_config
#include <fsl_mcan.h>

MCAN Standard Message ID Filter Element.

Public Members

uint32_t sfid2

Standard Filter ID 2.

uint32_t __pad0__

Reserved.

uint32_t sfid1

Standard Filter ID 1.

uint32_t sfec

Standard Filter Element Configuration.

uint32_t sft

Standard Filter Type.

struct _mcan_ext_filter_element_config
#include <fsl_mcan.h>

MCAN Extended Message ID Filter Element.

Public Members

uint32_t efid1

Extended Filter ID 1.

uint32_t efec

Extended Filter Element Configuration.

uint32_t efid2

Extended Filter ID 2.

uint32_t __pad0__

Reserved.

uint32_t eft

Extended Filter Type.

struct _mcan_frame_filter_config
#include <fsl_mcan.h>

MCAN Rx filter configuration.

Public Members

uint32_t address

Filter start address.

uint32_t listSize

Filter list size.

mcan_frame_idformat_t idFormat

Frame format.

mcan_remote_frame_config_t remFrame

Remote frame treatment.

mcan_nonmasking_frame_config_t nmFrame

Non-masking frame treatment.

struct _mcan_timing_config
#include <fsl_mcan.h>

MCAN protocol timing characteristic configuration structure.

Public Members

uint16_t preDivider

Nominal Clock Pre-scaler Division Factor.

uint8_t rJumpwidth

Nominal Re-sync Jump Width.

uint8_t seg1

Nominal Time Segment 1.

uint8_t seg2

Nominal Time Segment 2.

uint16_t datapreDivider

Data Clock Pre-scaler Division Factor.

uint8_t datarJumpwidth

Data Re-sync Jump Width.

uint8_t dataseg1

Data Time Segment 1.

uint8_t dataseg2

Data Time Segment 2.

struct _mcan_timing_param
#include <fsl_mcan.h>

MCAN bit timing parameter configuration structure.

Public Members

uint32_t busLength

Maximum Bus length in meter.

uint32_t propTxRx

Transceiver propagation delay in nanosecond.

uint32_t nominalbaudRate

Baud rate of Arbitration phase in bps.

uint32_t nominalSP

Sample point of Arbitration phase, range in 10 ~ 990, 800 means 80%.

uint32_t databaudRate

Baud rate of Data phase in bps.

uint32_t dataSP

Sample point of Data phase, range in 0 ~ 1000, 800 means 80%.

struct _mcan_memory_config
#include <fsl_mcan.h>

MCAN Message RAM related configuration structure.

Public Members

uint32_t baseAddr

Message RAM base address, should be 4k alignment.

struct _mcan_config
#include <fsl_mcan.h>

MCAN module configuration structure.

Public Members

uint32_t baudRateA

Baud rate of Arbitration phase in bps.

uint32_t baudRateD

Baud rate of Data phase in bps.

bool enableCanfdNormal

Enable or Disable CANFD normal.

bool enableCanfdSwitch

Enable or Disable CANFD with baudrate switch.

bool enableLoopBackInt

Enable or Disable Internal Back.

bool enableLoopBackExt

Enable or Disable External Loop Back.

bool enableBusMon

Enable or Disable Bus Monitoring Mode.

mcan_timing_config_t timingConfig

Protocol timing .

struct _mcan_buffer_transfer
#include <fsl_mcan.h>

MCAN Buffer transfer.

Public Members

mcan_tx_buffer_frame_t *frame

The buffer of CAN Message to be transfer.

uint8_t bufferIdx

The index of Message buffer used to transfer Message.

struct _mcan_fifo_transfer
#include <fsl_mcan.h>

MCAN Rx FIFO transfer.

Public Members

mcan_rx_buffer_frame_t *frame

The buffer of CAN Message to be received from Rx FIFO.

struct _mcan_handle
#include <fsl_mcan.h>

MCAN handle structure.

Public Members

mcan_transfer_callback_t callback

Callback function.

void *userData

MCAN callback function parameter.

mcan_tx_buffer_frame_t *volatile bufferFrameBuf[64]

The buffer for received data from Buffers.

mcan_rx_buffer_frame_t *volatile rxFifoFrameBuf

The buffer for received data from Rx FIFO.

volatile uint8_t bufferState[64]

Message Buffer transfer state.

volatile uint8_t rxFifoState

Rx FIFO transfer state.

struct __unnamed18__

Public Members

uint32_t id

CAN Frame Identifier.

uint32_t rtr

CAN Frame Type(DATA or REMOTE).

uint32_t xtd

CAN Frame Type(STD or EXT).

uint32_t esi

CAN Frame Error State Indicator.

struct __unnamed20__

Public Members

uint32_t dlc

Data Length Code 9 10 11 12 13 14 15 Number of data bytes 12 16 20 24 32 48 64

uint32_t brs

Bit Rate Switch.

uint32_t fdf

CAN FD format.

uint32_t __pad1__

Reserved.

uint32_t efc

Event FIFO control.

uint32_t mm

Message Marker.

struct __unnamed22__

Public Members

uint32_t id

CAN Frame Identifier.

uint32_t rtr

CAN Frame Type(DATA or REMOTE).

uint32_t xtd

CAN Frame Type(STD or EXT).

uint32_t esi

CAN Frame Error State Indicator.

struct __unnamed24__

Public Members

uint32_t rxts

Rx Timestamp.

uint32_t dlc

Data Length Code 9 10 11 12 13 14 15 Number of data bytes 12 16 20 24 32 48 64

uint32_t brs

Bit Rate Switch.

uint32_t fdf

CAN FD format.

uint32_t __pad0__

Reserved.

uint32_t fidx

Filter Index.

uint32_t anmf

Accepted Non-matching Frame.

MRT: Multi-Rate Timer

void MRT_Init(MRT_Type *base, const mrt_config_t *config)

Ungates the MRT clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the MRT driver.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • config – Pointer to user’s MRT config structure. If MRT has MULTITASK bit field in MODCFG reigster, param config is useless.

void MRT_Deinit(MRT_Type *base)

Gate the MRT clock.

Parameters:
  • base – Multi-Rate timer peripheral base address

static inline void MRT_GetDefaultConfig(mrt_config_t *config)

Fill in the MRT config struct with the default settings.

The default values are:

config->enableMultiTask = false;

Parameters:
  • config – Pointer to user’s MRT config structure.

static inline void MRT_SetupChannelMode(MRT_Type *base, mrt_chnl_t channel, const mrt_timer_mode_t mode)

Sets up an MRT channel mode.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Channel that is being configured.

  • mode – Timer mode to use for the channel.

static inline void MRT_EnableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)

Enables the MRT interrupt.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t

static inline void MRT_DisableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)

Disables the selected MRT interrupt.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number

  • mask – The interrupts to disable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t

static inline uint32_t MRT_GetEnabledInterrupts(MRT_Type *base, mrt_chnl_t channel)

Gets the enabled MRT interrupts.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration mrt_interrupt_enable_t

static inline uint32_t MRT_GetStatusFlags(MRT_Type *base, mrt_chnl_t channel)

Gets the MRT status flags.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number

Returns:

The status flags. This is the logical OR of members of the enumeration mrt_status_flags_t

static inline void MRT_ClearStatusFlags(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)

Clears the MRT status flags.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number

  • mask – The status flags to clear. This is a logical OR of members of the enumeration mrt_status_flags_t

void MRT_UpdateTimerPeriod(MRT_Type *base, mrt_chnl_t channel, uint32_t count, bool immediateLoad)

Used to update the timer period in units of count.

The new value will be immediately loaded or will be loaded at the end of the current time interval. For one-shot interrupt mode the new value will be immediately loaded.

Note

User can call the utility macros provided in fsl_common.h to convert to ticks

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number

  • count – Timer period in units of ticks

  • immediateLoad – true: Load the new value immediately into the TIMER register; false: Load the new value at the end of current timer interval

static inline uint32_t MRT_GetCurrentTimerCount(MRT_Type *base, mrt_chnl_t channel)

Reads the current timer counting value.

This function returns the real-time timer counting value, in a range from 0 to a timer period.

Note

User can call the utility macros provided in fsl_common.h to convert ticks to usec or msec

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number

Returns:

Current timer counting value in ticks

static inline void MRT_StartTimer(MRT_Type *base, mrt_chnl_t channel, uint32_t count)

Starts the timer counting.

After calling this function, timers load period value, counts down to 0 and depending on the timer mode it will either load the respective start value again or stop.

Note

User can call the utility macros provided in fsl_common.h to convert to ticks

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number.

  • count – Timer period in units of ticks. Count can contain the LOAD bit, which control the force load feature.

static inline void MRT_StopTimer(MRT_Type *base, mrt_chnl_t channel)

Stops the timer counting.

This function stops the timer from counting.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number.

static inline uint32_t MRT_GetIdleChannel(MRT_Type *base)

Find the available channel.

This function returns the lowest available channel number.

Parameters:
  • base – Multi-Rate timer peripheral base address

static inline void MRT_ReleaseChannel(MRT_Type *base, mrt_chnl_t channel)

Release the channel when the timer is using the multi-task mode.

In multi-task mode, the INUSE flags allow more control over when MRT channels are released for further use. The user can hold on to a channel acquired by calling MRT_GetIdleChannel() for as long as it is needed and release it by calling this function. This removes the need to ask for an available channel for every use.

Parameters:
  • base – Multi-Rate timer peripheral base address

  • channel – Timer channel number.

FSL_MRT_DRIVER_VERSION
enum _mrt_chnl

List of MRT channels.

Values:

enumerator kMRT_Channel_0

MRT channel number 0

enumerator kMRT_Channel_1

MRT channel number 1

enumerator kMRT_Channel_2

MRT channel number 2

enumerator kMRT_Channel_3

MRT channel number 3

enum _mrt_timer_mode

List of MRT timer modes.

Values:

enumerator kMRT_RepeatMode

Repeat Interrupt mode

enumerator kMRT_OneShotMode

One-shot Interrupt mode

enumerator kMRT_OneShotStallMode

One-shot stall mode

enum _mrt_interrupt_enable

List of MRT interrupts.

Values:

enumerator kMRT_TimerInterruptEnable

Timer interrupt enable

enum _mrt_status_flags

List of MRT status flags.

Values:

enumerator kMRT_TimerInterruptFlag

Timer interrupt flag

enumerator kMRT_TimerRunFlag

Indicates state of the timer

typedef enum _mrt_chnl mrt_chnl_t

List of MRT channels.

typedef enum _mrt_timer_mode mrt_timer_mode_t

List of MRT timer modes.

typedef enum _mrt_interrupt_enable mrt_interrupt_enable_t

List of MRT interrupts.

typedef enum _mrt_status_flags mrt_status_flags_t

List of MRT status flags.

typedef struct _mrt_config mrt_config_t

MRT configuration structure.

This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

struct _mrt_config
#include <fsl_mrt.h>

MRT configuration structure.

This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

Public Members

bool enableMultiTask

true: Timers run in multi-task mode; false: Timers run in hardware status mode

OSTIMER: OS Event Timer Driver

void OSTIMER_Init(OSTIMER_Type *base)

Initializes an OSTIMER by turning its bus clock on.

void OSTIMER_Deinit(OSTIMER_Type *base)

Deinitializes a OSTIMER instance.

This function shuts down OSTIMER bus clock

Parameters:
  • base – OSTIMER peripheral base address.

uint64_t OSTIMER_GrayToDecimal(uint64_t gray)

Translate the value from gray-code to decimal.

Parameters:
  • gray – The gray value input.

Returns:

The decimal value.

static inline uint64_t OSTIMER_DecimalToGray(uint64_t dec)

Translate the value from decimal to gray-code.

Parameters:
  • dec – The decimal value.

Returns:

The gray code of the input value.

uint32_t OSTIMER_GetStatusFlags(OSTIMER_Type *base)

Get OSTIMER status Flags.

This returns the status flag. Currently, only match interrupt flag can be got.

Parameters:
  • base – OSTIMER peripheral base address.

Returns:

status register value

void OSTIMER_ClearStatusFlags(OSTIMER_Type *base, uint32_t mask)

Clear Status Interrupt Flags.

This clears intrrupt status flag. Currently, only match interrupt flag can be cleared.

Parameters:
  • base – OSTIMER peripheral base address.

  • mask – Clear bit mask.

Returns:

none

status_t OSTIMER_SetMatchRawValue(OSTIMER_Type *base, uint64_t count, ostimer_callback_t cb)

Set the match raw value for OSTIMER.

This function will set a match value for OSTIMER with an optional callback. And this callback will be called while the data in dedicated pair match register is equals to the value of central EVTIMER. Please note that, the data format is gray-code, if decimal data was desired, please using OSTIMER_SetMatchValue().

Parameters:
  • base – OSTIMER peripheral base address.

  • count – OSTIMER timer match value.(Value is gray-code format)

  • cb – OSTIMER callback (can be left as NULL if none, otherwise should be a void func(void)).

Return values:
  • kStatus_Success – - Set match raw value and enable interrupt Successfully.

  • kStatus_Fail – - Set match raw value fail.

status_t OSTIMER_SetMatchValue(OSTIMER_Type *base, uint64_t count, ostimer_callback_t cb)

Set the match value for OSTIMER.

This function will set a match value for OSTIMER with an optional callback. And this callback will be called while the data in dedicated pair match register is equals to the value of central OS TIMER.

Parameters:
  • base – OSTIMER peripheral base address.

  • count – OSTIMER timer match value.(Value is decimal format, and this value will be translate to Gray code internally.)

  • cb – OSTIMER callback (can be left as NULL if none, otherwise should be a void func(void)).

Return values:
  • kStatus_Success – - Set match value and enable interrupt Successfully.

  • kStatus_Fail – - Set match value fail.

static inline void OSTIMER_SetMatchRegister(OSTIMER_Type *base, uint64_t value)

Set value to OSTIMER MATCH register directly.

This function writes the input value to OSTIMER MATCH register directly, it does not touch any other registers. Note that, the data format is gray-code. The function OSTIMER_DecimalToGray could convert decimal value to gray code.

Parameters:
  • base – OSTIMER peripheral base address.

  • value – OSTIMER timer match value (Value is gray-code format).

static inline void OSTIMER_EnableMatchInterrupt(OSTIMER_Type *base)

Enable the OSTIMER counter match interrupt.

Enable the timer counter match interrupt. The interrupt happens when OSTIMER counter matches the value in MATCH registers.

Parameters:
  • base – OSTIMER peripheral base address.

static inline void OSTIMER_DisableMatchInterrupt(OSTIMER_Type *base)

Disable the OSTIMER counter match interrupt.

Disable the timer counter match interrupt. The interrupt happens when OSTIMER counter matches the value in MATCH registers.

Parameters:
  • base – OSTIMER peripheral base address.

static inline uint64_t OSTIMER_GetCurrentTimerRawValue(OSTIMER_Type *base)

Get current timer raw count value from OSTIMER.

This function will get a gray code type timer count value from OS timer register. The raw value of timer count is gray code format.

Parameters:
  • base – OSTIMER peripheral base address.

Returns:

Raw value of OSTIMER, gray code format.

uint64_t OSTIMER_GetCurrentTimerValue(OSTIMER_Type *base)

Get current timer count value from OSTIMER.

This function will get a decimal timer count value. The RAW value of timer count is gray code format, will be translated to decimal data internally.

Parameters:
  • base – OSTIMER peripheral base address.

Returns:

Value of OSTIMER which will be formated to decimal value.

static inline uint64_t OSTIMER_GetCaptureRawValue(OSTIMER_Type *base)

Get the capture value from OSTIMER.

This function will get a captured gray-code value from OSTIMER. The Raw value of timer capture is gray code format.

Parameters:
  • base – OSTIMER peripheral base address.

Returns:

Raw value of capture register, data format is gray code.

uint64_t OSTIMER_GetCaptureValue(OSTIMER_Type *base)

Get the capture value from OSTIMER.

This function will get a capture decimal-value from OSTIMER. The RAW value of timer capture is gray code format, will be translated to decimal data internally.

Parameters:
  • base – OSTIMER peripheral base address.

Returns:

Value of capture register, data format is decimal.

void OSTIMER_HandleIRQ(OSTIMER_Type *base, ostimer_callback_t cb)

OS timer interrupt Service Handler.

This function handles the interrupt and refers to the callback array in the driver to callback user (as per request in OSTIMER_SetMatchValue()). if no user callback is scheduled, the interrupt will simply be cleared.

Parameters:
  • base – OS timer peripheral base address.

  • cb – callback scheduled for this instance of OS timer

Returns:

none

FSL_OSTIMER_DRIVER_VERSION

OSTIMER driver version.

enum _ostimer_flags

OSTIMER status flags.

Values:

enumerator kOSTIMER_MatchInterruptFlag

Match interrupt flag bit, sets if the match value was reached.

typedef void (*ostimer_callback_t)(void)

ostimer callback function.

PINT: Pin Interrupt and Pattern Match Driver

FSL_PINT_DRIVER_VERSION
enum _pint_pin_enable

PINT Pin Interrupt enable type.

Values:

enumerator kPINT_PinIntEnableNone

Do not generate Pin Interrupt

enumerator kPINT_PinIntEnableRiseEdge

Generate Pin Interrupt on rising edge

enumerator kPINT_PinIntEnableFallEdge

Generate Pin Interrupt on falling edge

enumerator kPINT_PinIntEnableBothEdges

Generate Pin Interrupt on both edges

enumerator kPINT_PinIntEnableLowLevel

Generate Pin Interrupt on low level

enumerator kPINT_PinIntEnableHighLevel

Generate Pin Interrupt on high level

enum _pint_int

PINT Pin Interrupt type.

Values:

enumerator kPINT_PinInt0

Pin Interrupt 0

enumerator kPINT_SecPinInt0

Secure Pin Interrupt 0

enum _pint_pmatch_input_src

PINT Pattern Match bit slice input source type.

Values:

enumerator kPINT_PatternMatchInp0Src

Input source 0

enumerator kPINT_PatternMatchInp1Src

Input source 1

enumerator kPINT_PatternMatchInp2Src

Input source 2

enumerator kPINT_PatternMatchInp3Src

Input source 3

enumerator kPINT_PatternMatchInp4Src

Input source 4

enumerator kPINT_PatternMatchInp5Src

Input source 5

enumerator kPINT_PatternMatchInp6Src

Input source 6

enumerator kPINT_PatternMatchInp7Src

Input source 7

enumerator kPINT_SecPatternMatchInp0Src

Input source 0

enumerator kPINT_SecPatternMatchInp1Src

Input source 1

enum _pint_pmatch_bslice

PINT Pattern Match bit slice type.

Values:

enumerator kPINT_PatternMatchBSlice0

Bit slice 0

enumerator kPINT_SecPatternMatchBSlice0

Bit slice 0

enum _pint_pmatch_bslice_cfg

PINT Pattern Match configuration type.

Values:

enumerator kPINT_PatternMatchAlways

Always Contributes to product term match

enumerator kPINT_PatternMatchStickyRise

Sticky Rising edge

enumerator kPINT_PatternMatchStickyFall

Sticky Falling edge

enumerator kPINT_PatternMatchStickyBothEdges

Sticky Rising or Falling edge

enumerator kPINT_PatternMatchHigh

High level

enumerator kPINT_PatternMatchLow

Low level

enumerator kPINT_PatternMatchNever

Never contributes to product term match

enumerator kPINT_PatternMatchBothEdges

Either rising or falling edge

typedef enum _pint_pin_enable pint_pin_enable_t

PINT Pin Interrupt enable type.

typedef enum _pint_int pint_pin_int_t

PINT Pin Interrupt type.

typedef enum _pint_pmatch_input_src pint_pmatch_input_src_t

PINT Pattern Match bit slice input source type.

typedef enum _pint_pmatch_bslice pint_pmatch_bslice_t

PINT Pattern Match bit slice type.

typedef enum _pint_pmatch_bslice_cfg pint_pmatch_bslice_cfg_t

PINT Pattern Match configuration type.

typedef void (*pint_cb_t)(pint_pin_int_t pintr, uint32_t pmatch_status)

PINT Callback function.

typedef struct _pint_pmatch_cfg pint_pmatch_cfg_t
void PINT_Init(PINT_Type *base)

Initialize PINT peripheral.

This function initializes the PINT peripheral and enables the clock.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

void PINT_PinInterruptConfig(PINT_Type *base, pint_pin_int_t intr, pint_pin_enable_t enable, pint_cb_t callback)

Configure PINT peripheral pin interrupt.

This function configures a given pin interrupt.

Parameters:
  • base – Base address of the PINT peripheral.

  • intr – Pin interrupt.

  • enable – Selects detection logic.

  • callback – Callback.

Return values:

None.

void PINT_PinInterruptGetConfig(PINT_Type *base, pint_pin_int_t pintr, pint_pin_enable_t *enable, pint_cb_t *callback)

Get PINT peripheral pin interrupt configuration.

This function returns the configuration of a given pin interrupt.

Parameters:
  • base – Base address of the PINT peripheral.

  • pintr – Pin interrupt.

  • enable – Pointer to store the detection logic.

  • callback – Callback.

Return values:

None.

void PINT_PinInterruptClrStatus(PINT_Type *base, pint_pin_int_t pintr)

Clear Selected pin interrupt status only when the pin was triggered by edge-sensitive.

This function clears the selected pin interrupt status.

Parameters:
  • base – Base address of the PINT peripheral.

  • pintr – Pin interrupt.

Return values:

None.

static inline uint32_t PINT_PinInterruptGetStatus(PINT_Type *base, pint_pin_int_t pintr)

Get Selected pin interrupt status.

This function returns the selected pin interrupt status.

Parameters:
  • base – Base address of the PINT peripheral.

  • pintr – Pin interrupt.

Return values:

status – = 0 No pin interrupt request. = 1 Selected Pin interrupt request active.

void PINT_PinInterruptClrStatusAll(PINT_Type *base)

Clear all pin interrupts status only when pins were triggered by edge-sensitive.

This function clears the status of all pin interrupts.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

static inline uint32_t PINT_PinInterruptGetStatusAll(PINT_Type *base)

Get all pin interrupts status.

This function returns the status of all pin interrupts.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

status – Each bit position indicates the status of corresponding pin interrupt. = 0 No pin interrupt request. = 1 Pin interrupt request active.

static inline void PINT_PinInterruptClrFallFlag(PINT_Type *base, pint_pin_int_t pintr)

Clear Selected pin interrupt fall flag.

This function clears the selected pin interrupt fall flag.

Parameters:
  • base – Base address of the PINT peripheral.

  • pintr – Pin interrupt.

Return values:

None.

static inline uint32_t PINT_PinInterruptGetFallFlag(PINT_Type *base, pint_pin_int_t pintr)

Get selected pin interrupt fall flag.

This function returns the selected pin interrupt fall flag.

Parameters:
  • base – Base address of the PINT peripheral.

  • pintr – Pin interrupt.

Return values:

flag – = 0 Falling edge has not been detected. = 1 Falling edge has been detected.

static inline void PINT_PinInterruptClrFallFlagAll(PINT_Type *base)

Clear all pin interrupt fall flags.

This function clears the fall flag for all pin interrupts.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

static inline uint32_t PINT_PinInterruptGetFallFlagAll(PINT_Type *base)

Get all pin interrupt fall flags.

This function returns the fall flag of all pin interrupts.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

flags – Each bit position indicates the falling edge detection of the corresponding pin interrupt. 0 Falling edge has not been detected. = 1 Falling edge has been detected.

static inline void PINT_PinInterruptClrRiseFlag(PINT_Type *base, pint_pin_int_t pintr)

Clear Selected pin interrupt rise flag.

This function clears the selected pin interrupt rise flag.

Parameters:
  • base – Base address of the PINT peripheral.

  • pintr – Pin interrupt.

Return values:

None.

static inline uint32_t PINT_PinInterruptGetRiseFlag(PINT_Type *base, pint_pin_int_t pintr)

Get selected pin interrupt rise flag.

This function returns the selected pin interrupt rise flag.

Parameters:
  • base – Base address of the PINT peripheral.

  • pintr – Pin interrupt.

Return values:

flag – = 0 Rising edge has not been detected. = 1 Rising edge has been detected.

static inline void PINT_PinInterruptClrRiseFlagAll(PINT_Type *base)

Clear all pin interrupt rise flags.

This function clears the rise flag for all pin interrupts.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

static inline uint32_t PINT_PinInterruptGetRiseFlagAll(PINT_Type *base)

Get all pin interrupt rise flags.

This function returns the rise flag of all pin interrupts.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

flags – Each bit position indicates the rising edge detection of the corresponding pin interrupt. 0 Rising edge has not been detected. = 1 Rising edge has been detected.

void PINT_PatternMatchConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)

Configure PINT pattern match.

This function configures a given pattern match bit slice.

Parameters:
  • base – Base address of the PINT peripheral.

  • bslice – Pattern match bit slice number.

  • cfg – Pointer to bit slice configuration.

Return values:

None.

void PINT_PatternMatchGetConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)

Get PINT pattern match configuration.

This function returns the configuration of a given pattern match bit slice.

Parameters:
  • base – Base address of the PINT peripheral.

  • bslice – Pattern match bit slice number.

  • cfg – Pointer to bit slice configuration.

Return values:

None.

static inline uint32_t PINT_PatternMatchGetStatus(PINT_Type *base, pint_pmatch_bslice_t bslice)

Get pattern match bit slice status.

This function returns the status of selected bit slice.

Parameters:
  • base – Base address of the PINT peripheral.

  • bslice – Pattern match bit slice number.

Return values:

status – = 0 Match has not been detected. = 1 Match has been detected.

static inline uint32_t PINT_PatternMatchGetStatusAll(PINT_Type *base)

Get status of all pattern match bit slices.

This function returns the status of all bit slices.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

status – Each bit position indicates the match status of corresponding bit slice. = 0 Match has not been detected. = 1 Match has been detected.

uint32_t PINT_PatternMatchResetDetectLogic(PINT_Type *base)

Reset pattern match detection logic.

This function resets the pattern match detection logic if any of the product term is matching.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

pmstatus – Each bit position indicates the match status of corresponding bit slice. = 0 Match was detected. = 1 Match was not detected.

static inline void PINT_PatternMatchEnable(PINT_Type *base)

Enable pattern match function.

This function enables the pattern match function.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

static inline void PINT_PatternMatchDisable(PINT_Type *base)

Disable pattern match function.

This function disables the pattern match function.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

static inline void PINT_PatternMatchEnableRXEV(PINT_Type *base)

Enable RXEV output.

This function enables the pattern match RXEV output.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

static inline void PINT_PatternMatchDisableRXEV(PINT_Type *base)

Disable RXEV output.

This function disables the pattern match RXEV output.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

void PINT_EnableCallback(PINT_Type *base)

Enable callback.

This function enables the interrupt for the selected PINT peripheral. Although the pin(s) are monitored as soon as they are enabled, the callback function is not enabled until this function is called.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

void PINT_DisableCallback(PINT_Type *base)

Disable callback.

This function disables the interrupt for the selected PINT peripheral. Although the pins are still being monitored but the callback function is not called.

Parameters:
  • base – Base address of the peripheral.

Return values:

None.

void PINT_Deinit(PINT_Type *base)

Deinitialize PINT peripheral.

This function disables the PINT clock.

Parameters:
  • base – Base address of the PINT peripheral.

Return values:

None.

void PINT_EnableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)

enable callback by pin index.

This function enables callback by pin index instead of enabling all pins.

Parameters:
  • base – Base address of the peripheral.

  • pintIdx – pin index.

Return values:

None.

void PINT_DisableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)

disable callback by pin index.

This function disables callback by pin index instead of disabling all pins.

Parameters:
  • base – Base address of the peripheral.

  • pintIdx – pin index.

Return values:

None.

PININT_BITSLICE_SRC_START
PININT_BITSLICE_SRC_MASK
PININT_BITSLICE_CFG_START
PININT_BITSLICE_CFG_MASK
PININT_BITSLICE_ENDP_MASK
PINT_PIN_INT_LEVEL
PINT_PIN_INT_EDGE
PINT_PIN_INT_FALL_OR_HIGH_LEVEL
PINT_PIN_INT_RISE
PINT_PIN_RISE_EDGE
PINT_PIN_FALL_EDGE
PINT_PIN_BOTH_EDGE
PINT_PIN_LOW_LEVEL
PINT_PIN_HIGH_LEVEL
struct _pint_pmatch_cfg
#include <fsl_pint.h>

PLU: Programmable Logic Unit

void PLU_Init(PLU_Type *base)

Enable the PLU clock and reset the module.

Note

This API should be called at the beginning of the application using the PLU driver.

Parameters:
  • base – PLU peripheral base address

void PLU_Deinit(PLU_Type *base)

Gate the PLU clock.

Parameters:
  • base – PLU peripheral base address

static inline void PLU_SetLutInputSource(PLU_Type *base, plu_lut_index_t lutIndex, plu_lut_in_index_t lutInIndex, plu_lut_input_source_t inputSrc)

Set Input source of LUT.

Note: An external clock must be applied to the PLU_CLKIN input when using FFs. For each LUT, the slot associated with the output from LUTn itself is tied low.

Parameters:
  • base – PLU peripheral base address.

  • lutIndex – LUT index (see plu_lut_index_t typedef enumeration).

  • lutInIndex – LUT input index (see plu_lut_in_index_t typedef enumeration).

  • inputSrc – LUT input source (see plu_lut_input_source_t typedef enumeration).

static inline void PLU_SetOutputSource(PLU_Type *base, plu_output_index_t outputIndex, plu_output_source_t outputSrc)

Set Output source of PLU.

Note: An external clock must be applied to the PLU_CLKIN input when using FFs.

Parameters:
  • base – PLU peripheral base address.

  • outputIndex – PLU output index (see plu_output_index_t typedef enumeration).

  • outputSrc – PLU output source (see plu_output_source_t typedef enumeration).

static inline void PLU_SetLutTruthTable(PLU_Type *base, plu_lut_index_t lutIndex, uint32_t truthTable)

Set Truth Table of LUT.

Parameters:
  • base – PLU peripheral base address.

  • lutIndex – LUT index (see plu_lut_index_t typedef enumeration).

  • truthTable – Truth Table value.

static inline uint32_t PLU_ReadOutputState(PLU_Type *base)

Read the current state of the 8 designated PLU Outputs.

Note: The PLU bus clock must be re-enabled prior to reading the Outpus Register if PLU bus clock is shut-off.

Parameters:
  • base – PLU peripheral base address.

Returns:

Current PLU output state value.

void PLU_GetDefaultWakeIntConfig(plu_wakeint_config_t *config)

Gets an available pre-defined settings for wakeup/interrupt control.

This function initializes the initial configuration structure with an available settings. The default values are:

config->filterMode = kPLU_WAKEINT_FILTER_MODE_BYPASS;
config->clockSource = kPLU_WAKEINT_FILTER_CLK_SRC_1MHZ_LPOSC;

Parameters:
  • config – Pointer to configuration structure.

void PLU_EnableWakeIntRequest(PLU_Type *base, uint32_t interruptMask, const plu_wakeint_config_t *config)

Enable PLU outputs wakeup/interrupt request.

This function enables Any of the eight selected PLU outputs to contribute to an asynchronous wake-up or an interrupt request.

Note: If a PLU_CLKIN is provided, the raw wake-up/interrupt request will be set on the rising-edge of the PLU_CLKIN whenever the raw request signal is high. This registered signal will be glitch-free and just use the default wakeint config by PLU_GetDefaultWakeIntConfig(). If not, have to specify the filter mode and clock source to eliminate the glitches caused by long and widely disparate delays through the network of LUTs making up the PLU. This way may increase power consumption in low-power operating modes and inject delay before the wake-up/interrupt request is generated.

Parameters:
  • base – PLU peripheral base address.

  • interruptMask – PLU interrupt mask (see _plu_interrupt_mask enumeration).

  • config – Pointer to configuration structure (see plu_wakeint_config_t typedef enumeration)

static inline void PLU_LatchInterrupt(PLU_Type *base)

Latch an interrupt.

This function latches the interrupt and then it can be cleared with PLU_ClearLatchedInterrupt().

Note: This mode is not compatible with use of the glitch filter. If this bit is set, the FILTER MODE should be set to kPLU_WAKEINT_FILTER_MODE_BYPASS (Bypass Mode) and PLU_CLKIN should be provided. If this bit is set, the wake-up/interrupt request will be set on the rising-edge of PLU_CLKIN whenever the raw wake-up/interrupt signal is high. The request must be cleared by software.

Parameters:
  • base – PLU peripheral base address.

void PLU_ClearLatchedInterrupt(PLU_Type *base)

Clear the latched interrupt.

This function clears the wake-up/interrupt request flag latched by PLU_LatchInterrupt()

Note: It is not necessary for the PLU bus clock to be enabled in order to write-to or read-back this bit.

Parameters:
  • base – PLU peripheral base address.

FSL_PLU_DRIVER_VERSION

Version 2.2.1

enum _plu_lut_index

Index of LUT.

Values:

enumerator kPLU_LUT_0

5-input Look-up Table 0

enumerator kPLU_LUT_1

5-input Look-up Table 1

enumerator kPLU_LUT_2

5-input Look-up Table 2

enumerator kPLU_LUT_3

5-input Look-up Table 3

enumerator kPLU_LUT_4

5-input Look-up Table 4

enumerator kPLU_LUT_5

5-input Look-up Table 5

enumerator kPLU_LUT_6

5-input Look-up Table 6

enumerator kPLU_LUT_7

5-input Look-up Table 7

enumerator kPLU_LUT_8

5-input Look-up Table 8

enumerator kPLU_LUT_9

5-input Look-up Table 9

enumerator kPLU_LUT_10

5-input Look-up Table 10

enumerator kPLU_LUT_11

5-input Look-up Table 11

enumerator kPLU_LUT_12

5-input Look-up Table 12

enumerator kPLU_LUT_13

5-input Look-up Table 13

enumerator kPLU_LUT_14

5-input Look-up Table 14

enumerator kPLU_LUT_15

5-input Look-up Table 15

enumerator kPLU_LUT_16

5-input Look-up Table 16

enumerator kPLU_LUT_17

5-input Look-up Table 17

enumerator kPLU_LUT_18

5-input Look-up Table 18

enumerator kPLU_LUT_19

5-input Look-up Table 19

enumerator kPLU_LUT_20

5-input Look-up Table 20

enumerator kPLU_LUT_21

5-input Look-up Table 21

enumerator kPLU_LUT_22

5-input Look-up Table 22

enumerator kPLU_LUT_23

5-input Look-up Table 23

enumerator kPLU_LUT_24

5-input Look-up Table 24

enumerator kPLU_LUT_25

5-input Look-up Table 25

enum _plu_lut_in_index

Inputs of LUT. 5 input present for each LUT.

Values:

enumerator kPLU_LUT_IN_0

LUT input 0

enumerator kPLU_LUT_IN_1

LUT input 1

enumerator kPLU_LUT_IN_2

LUT input 2

enumerator kPLU_LUT_IN_3

LUT input 3

enumerator kPLU_LUT_IN_4

LUT input 4

enum _plu_lut_input_source

Available sources of LUT input.

Values:

enumerator kPLU_LUT_IN_SRC_PLU_IN_0

Select PLU input 0 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_1

Select PLU input 1 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_2

Select PLU input 2 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_3

Select PLU input 3 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_4

Select PLU input 4 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_5

Select PLU input 5 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_0

Select LUT output 0 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_1

Select LUT output 1 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_2

Select LUT output 2 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_3

Select LUT output 3 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_4

Select LUT output 4 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_5

Select LUT output 5 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_6

Select LUT output 6 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_7

Select LUT output 7 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_8

Select LUT output 8 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_9

Select LUT output 9 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_10

Select LUT output 10 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_11

Select LUT output 11 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_12

Select LUT output 12 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_13

Select LUT output 13 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_14

Select LUT output 14 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_15

Select LUT output 15 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_16

Select LUT output 16 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_17

Select LUT output 17 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_18

Select LUT output 18 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_19

Select LUT output 19 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_20

Select LUT output 20 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_21

Select LUT output 21 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_22

Select LUT output 22 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_23

Select LUT output 23 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_24

Select LUT output 24 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_25

Select LUT output 25 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_FLIPFLOP_0

Select Flip-Flops state 0 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_FLIPFLOP_1

Select Flip-Flops state 1 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_FLIPFLOP_2

Select Flip-Flops state 2 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_FLIPFLOP_3

Select Flip-Flops state 3 to be connected to LUTn Input x

enum _plu_output_index

PLU output multiplexer registers.

Values:

enumerator kPLU_OUTPUT_0

PLU OUTPUT 0

enumerator kPLU_OUTPUT_1

PLU OUTPUT 1

enumerator kPLU_OUTPUT_2

PLU OUTPUT 2

enumerator kPLU_OUTPUT_3

PLU OUTPUT 3

enumerator kPLU_OUTPUT_4

PLU OUTPUT 4

enumerator kPLU_OUTPUT_5

PLU OUTPUT 5

enumerator kPLU_OUTPUT_6

PLU OUTPUT 6

enumerator kPLU_OUTPUT_7

PLU OUTPUT 7

enum _plu_output_source

Available sources of PLU output.

Values:

enumerator kPLU_OUT_SRC_LUT_0

Select LUT0 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_1

Select LUT1 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_2

Select LUT2 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_3

Select LUT3 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_4

Select LUT4 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_5

Select LUT5 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_6

Select LUT6 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_7

Select LUT7 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_8

Select LUT8 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_9

Select LUT9 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_10

Select LUT10 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_11

Select LUT11 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_12

Select LUT12 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_13

Select LUT13 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_14

Select LUT14 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_15

Select LUT15 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_16

Select LUT16 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_17

Select LUT17 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_18

Select LUT18 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_19

Select LUT19 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_20

Select LUT20 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_21

Select LUT21 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_22

Select LUT22 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_23

Select LUT23 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_24

Select LUT24 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_25

Select LUT25 output to be connected to PLU output

enumerator kPLU_OUT_SRC_FLIPFLOP_0

Select Flip-Flops state(0) to be connected to PLU output

enumerator kPLU_OUT_SRC_FLIPFLOP_1

Select Flip-Flops state(1) to be connected to PLU output

enumerator kPLU_OUT_SRC_FLIPFLOP_2

Select Flip-Flops state(2) to be connected to PLU output

enumerator kPLU_OUT_SRC_FLIPFLOP_3

Select Flip-Flops state(3) to be connected to PLU output

enum _plu_interrupt_mask

The enumerator of PLU Interrupt.

Values:

enumerator kPLU_OUTPUT_0_INTERRUPT_MASK

Select PLU output 0 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_1_INTERRUPT_MASK

Select PLU output 1 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_2_INTERRUPT_MASK

Select PLU output 2 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_3_INTERRUPT_MASK

Select PLU output 3 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_4_INTERRUPT_MASK

Select PLU output 4 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_5_INTERRUPT_MASK

Select PLU output 5 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_6_INTERRUPT_MASK

Select PLU output 6 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_7_INTERRUPT_MASK

Select PLU output 7 contribute to interrupt/wake-up generation

enum _plu_wakeint_filter_mode

Control input of the PLU, add filtering for glitch.

Values:

enumerator kPLU_WAKEINT_FILTER_MODE_BYPASS

Select Bypass mode

enumerator kPLU_WAKEINT_FILTER_MODE_1_CLK_PERIOD

Filter 1 clock period

enumerator kPLU_WAKEINT_FILTER_MODE_2_CLK_PERIOD

Filter 2 clock period

enumerator kPLU_WAKEINT_FILTER_MODE_3_CLK_PERIOD

Filter 3 clock period

enum _plu_wakeint_filter_clock_source

Clock source for filter mode.

Values:

enumerator kPLU_WAKEINT_FILTER_CLK_SRC_1MHZ_LPOSC

Select the 1MHz low-power oscillator as the filter clock

enumerator kPLU_WAKEINT_FILTER_CLK_SRC_12MHZ_FRO

Select the 12MHz FRO as the filer clock

enumerator kPLU_WAKEINT_FILTER_CLK_SRC_ALT

Select a third clock source

typedef enum _plu_lut_index plu_lut_index_t

Index of LUT.

typedef enum _plu_lut_in_index plu_lut_in_index_t

Inputs of LUT. 5 input present for each LUT.

typedef enum _plu_lut_input_source plu_lut_input_source_t

Available sources of LUT input.

typedef enum _plu_output_index plu_output_index_t

PLU output multiplexer registers.

typedef enum _plu_output_source plu_output_source_t

Available sources of PLU output.

typedef enum _plu_wakeint_filter_mode plu_wakeint_filter_mode_t

Control input of the PLU, add filtering for glitch.

typedef enum _plu_wakeint_filter_clock_source plu_wakeint_filter_clock_source_t

Clock source for filter mode.

typedef struct _plu_wakeint_config plu_wakeint_config_t

Wake configuration.

struct _plu_wakeint_config
#include <fsl_plu.h>

Wake configuration.

Public Members

plu_wakeint_filter_mode_t filterMode

Filter Mode.

plu_wakeint_filter_clock_source_t clockSource

The clock source for filter mode.

Power Driver

enum _power_mode_config

Values:

enumerator kPmu_Sleep
enumerator kPmu_Deep_Sleep
enumerator kPmu_PowerDown
enumerator kPmu_Deep_PowerDown
enum pd_bits

Analog components power modes control during low power modes.

Values:

enumerator kPDRUNCFG_PD_DCDC
enumerator kPDRUNCFG_PD_BIAS
enumerator kPDRUNCFG_PD_BODCORE
enumerator kPDRUNCFG_PD_BODVBAT
enumerator kPDRUNCFG_PD_FRO1M
enumerator kPDRUNCFG_PD_FRO192M
enumerator kPDRUNCFG_PD_FRO32K
enumerator kPDRUNCFG_PD_XTAL32K
enumerator kPDRUNCFG_PD_XTAL32M
enumerator kPDRUNCFG_PD_PLL0
enumerator kPDRUNCFG_PD_PLL1
enumerator kPDRUNCFG_PD_COMP
enumerator kPDRUNCFG_PD_TEMPSENS
enumerator kPDRUNCFG_PD_GPADC
enumerator kPDRUNCFG_PD_LDOMEM
enumerator kPDRUNCFG_PD_LDODEEPSLEEP
enumerator kPDRUNCFG_PD_LDOGPADC
enumerator kPDRUNCFG_PD_LDOXO32M
enumerator kPDRUNCFG_PD_LDOFLASHNV
enumerator kPDRUNCFG_PD_RNG
enumerator kPDRUNCFG_PD_PLL0_SSCG
enumerator kPDRUNCFG_PD_ROM
enumerator kPDRUNCFG_ForceUnsigned
enum _power_bod_vbat_level

BOD VBAT level.

Values:

enumerator kPOWER_BodVbatLevel1000mv

Brown out detector VBAT level 1V

enumerator kPOWER_BodVbatLevel1100mv

Brown out detector VBAT level 1.1V

enumerator kPOWER_BodVbatLevel1200mv

Brown out detector VBAT level 1.2V

enumerator kPOWER_BodVbatLevel1300mv

Brown out detector VBAT level 1.3V

enumerator kPOWER_BodVbatLevel1400mv

Brown out detector VBAT level 1.4V

enumerator kPOWER_BodVbatLevel1500mv

Brown out detector VBAT level 1.5V

enumerator kPOWER_BodVbatLevel1600mv

Brown out detector VBAT level 1.6V

enumerator kPOWER_BodVbatLevel1650mv

Brown out detector VBAT level 1.65V

enumerator kPOWER_BodVbatLevel1700mv

Brown out detector VBAT level 1.7V

enumerator kPOWER_BodVbatLevel1750mv

Brown out detector VBAT level 1.75V

enumerator kPOWER_BodVbatLevel1800mv

Brown out detector VBAT level 1.8V

enumerator kPOWER_BodVbatLevel1900mv

Brown out detector VBAT level 1.9V

enumerator kPOWER_BodVbatLevel2000mv

Brown out detector VBAT level 2V

enumerator kPOWER_BodVbatLevel2100mv

Brown out detector VBAT level 2.1V

enumerator kPOWER_BodVbatLevel2200mv

Brown out detector VBAT level 2.2V

enumerator kPOWER_BodVbatLevel2300mv

Brown out detector VBAT level 2.3V

enumerator kPOWER_BodVbatLevel2400mv

Brown out detector VBAT level 2.4V

enumerator kPOWER_BodVbatLevel2500mv

Brown out detector VBAT level 2.5V

enumerator kPOWER_BodVbatLevel2600mv

Brown out detector VBAT level 2.6V

enumerator kPOWER_BodVbatLevel2700mv

Brown out detector VBAT level 2.7V

enumerator kPOWER_BodVbatLevel2806mv

Brown out detector VBAT level 2.806V

enumerator kPOWER_BodVbatLevel2900mv

Brown out detector VBAT level 2.9V

enumerator kPOWER_BodVbatLevel3000mv

Brown out detector VBAT level 3.0V

enumerator kPOWER_BodVbatLevel3100mv

Brown out detector VBAT level 3.1V

enumerator kPOWER_BodVbatLevel3200mv

Brown out detector VBAT level 3.2V

enumerator kPOWER_BodVbatLevel3300mv

Brown out detector VBAT level 3.3V

enum _power_bod_hyst

BOD Hysteresis control.

Values:

enumerator kPOWER_BodHystLevel25mv

BOD Hysteresis control level 25mv

enumerator kPOWER_BodHystLevel50mv

BOD Hysteresis control level 50mv

enumerator kPOWER_BodHystLevel75mv

BOD Hysteresis control level 75mv

enumerator kPOWER_BodHystLevel100mv

BOD Hysteresis control level 100mv

enum _power_bod_core_level

BOD core level.

Values:

enumerator kPOWER_BodCoreLevel600mv

Brown out detector core level 600mV

enumerator kPOWER_BodCoreLevel650mv

Brown out detector core level 650mV

enumerator kPOWER_BodCoreLevel700mv

Brown out detector core level 700mV

enumerator kPOWER_BodCoreLevel750mv

Brown out detector core level 750mV

enumerator kPOWER_BodCoreLevel800mv

Brown out detector core level 800mV

enumerator kPOWER_BodCoreLevel850mv

Brown out detector core level 850mV

enumerator kPOWER_BodCoreLevel900mv

Brown out detector core level 900mV

enumerator kPOWER_BodCoreLevel950mv

Brown out detector core level 950mV

enum _power_device_reset_cause

Device Reset Causes.

Values:

enumerator kRESET_CAUSE_POR

Power On Reset

enumerator kRESET_CAUSE_PADRESET

Hardware Pin Reset

enumerator kRESET_CAUSE_BODRESET

Brown-out Detector reset (either BODVBAT or BODCORE)

enumerator kRESET_CAUSE_ARMSYSTEMRESET

ARM System Reset

enumerator kRESET_CAUSE_WDTRESET

Watchdog Timer Reset

enumerator kRESET_CAUSE_SWRRESET

Software Reset

enumerator kRESET_CAUSE_CDOGRESET

Code Watchdog Reset

enumerator kRESET_CAUSE_DPDRESET_WAKEUPIO

Any of the 4 wake-up pins

enumerator kRESET_CAUSE_DPDRESET_RTC

Real Time Counter (RTC)

enumerator kRESET_CAUSE_DPDRESET_OSTIMER

OS Event Timer (OSTIMER)

enumerator kRESET_CAUSE_DPDRESET_WAKEUPIO_RTC

Any of the 4 wake-up pins and RTC (it is not possible to distinguish which of these 2 events occured first)

enumerator kRESET_CAUSE_DPDRESET_WAKEUPIO_OSTIMER

Any of the 4 wake-up pins and OSTIMER (it is not possible to distinguish which of these 2 events occured first)

enumerator kRESET_CAUSE_DPDRESET_RTC_OSTIMER

Real Time Counter or OS Event Timer (it is not possible to distinguish which of these 2 events occured first)

enumerator kRESET_CAUSE_DPDRESET_WAKEUPIO_RTC_OSTIMER

Any of the 4 wake-up pins (it is not possible to distinguish which of these 3 events occured first)

enumerator kRESET_CAUSE_NOT_RELEVANT

No reset cause (for example, this code is used when waking up from DEEP-SLEEP low power mode)

enumerator kRESET_CAUSE_NOT_DETERMINISTIC

Unknown Reset Cause. Should be treated like “Hardware Pin Reset” from an application point of view.

enum _power_device_boot_mode

Device Boot Modes.

Values:

enumerator kBOOT_MODE_POWER_UP

All non Low Power Mode wake up (Power On Reset, Pin Reset, BoD Reset, ARM System Reset … )

enumerator kBOOT_MODE_LP_DEEP_SLEEP

Wake up from DEEP-SLEEP Low Power mode

enumerator kBOOT_MODE_LP_POWER_DOWN

Wake up from POWER-DOWN Low Power mode

enumerator kBOOT_MODE_LP_DEEP_POWER_DOWN

Wake up from DEEP-POWER-DOWN Low Power mode

typedef enum _power_mode_config power_mode_cfg_t
typedef enum pd_bits pd_bit_t

Analog components power modes control during low power modes.

typedef enum _power_bod_vbat_level power_bod_vbat_level_t

BOD VBAT level.

typedef enum _power_bod_hyst power_bod_hyst_t

BOD Hysteresis control.

typedef enum _power_bod_core_level power_bod_core_level_t

BOD core level.

typedef enum _power_device_reset_cause power_device_reset_cause_t

Device Reset Causes.

typedef enum _power_device_boot_mode power_device_boot_mode_t

Device Boot Modes.

static inline void POWER_EnablePD(pd_bit_t en)

API to enable PDRUNCFG bit in the Syscon. Note that enabling the bit powers down the peripheral.

Parameters:
  • en – peripheral for which to enable the PDRUNCFG bit

Returns:

none

static inline void POWER_DisablePD(pd_bit_t en)

API to disable PDRUNCFG bit in the Syscon. Note that disabling the bit powers up the peripheral.

Parameters:
  • en – peripheral for which to disable the PDRUNCFG bit

Returns:

none

void POWER_SetBodVbatLevel(power_bod_vbat_level_t level, power_bod_hyst_t hyst, bool enBodVbatReset)

set BOD VBAT level.

Parameters:
  • level – BOD detect level

  • hyst – BoD Hysteresis control

  • enBodVbatReset – VBAT brown out detect reset

static inline void POWER_EnableDeepSleep(void)

API to enable deep sleep bit in the ARM Core.

Returns:

none

static inline void POWER_DisableDeepSleep(void)

API to disable deep sleep bit in the ARM Core.

Returns:

none

void POWER_CycleCpuAndFlash(void)

Shut off the Flash and execute the _WFI(), then power up the Flash after wake-up event This MUST BE EXECUTED outside the Flash: either from ROM or from SRAM. The rest could stay in Flash. But, for consistency, it is preferable to have all functions defined in this file implemented in ROM.

Returns:

Nothing

void POWER_EnterDeepSleep(uint32_t exclude_from_pd, uint32_t sram_retention_ctrl, uint64_t wakeup_interrupts, uint32_t hardware_wake_ctrl)

Configures and enters in DEEP-SLEEP low power mode.

Parameters:
  • exclude_from_pd

  • sram_retention_ctrl

  • wakeup_interrupts

  • hardware_wake_ctrl

Returns:

Nothing

     !!! IMPORTANT NOTES :
0 - CPU0 & System CLock frequency is switched to FRO12MHz and is NOT restored back by the API. 1 - CPU0 Interrupt Enable registers (NVIC->ISER) are modified by this function. They are restored back in case of CPU retention or if POWERDOWN is not taken (for instance because an interrupt is pending). 2 - The Non Maskable Interrupt (NMI) is disabled and its configuration before calling this function will be restored back if POWERDOWN is not taken (for instance because an RTC or OSTIMER interrupt is pending). 3 - The HARD FAULT handler should execute from SRAM. (The Hard fault handler should initiate a full chip reset) reset)

void POWER_EnterPowerDown(uint32_t exclude_from_pd, uint32_t sram_retention_ctrl, uint64_t wakeup_interrupts, uint32_t cpu_retention_ctrl)

Configures and enters in POWERDOWN low power mode.

Parameters:
  • exclude_from_pd

  • sram_retention_ctrl

  • wakeup_interrupts

  • cpu_retention_ctrl – 0 = CPU retention is disable / 1 = CPU retention is enabled, all other values are RESERVED.

Returns:

Nothing

     !!! IMPORTANT NOTES :
0 - CPU0 & System CLock frequency is switched to FRO12MHz and is NOT restored back by the API. 1 - CPU0 Interrupt Enable registers (NVIC->ISER) are modified by this function. They are restored back in case of CPU retention or if POWERDOWN is not taken (for instance because an interrupt is pending). 2 - The Non Maskable Interrupt (NMI) is disabled and its configuration before calling this function will be restored back if POWERDOWN is not taken (for instance because an RTC or OSTIMER interrupt is pending). 3 - In case of CPU retention, it is the responsability of the user to make sure that SRAM instance containing the stack used to call this function WILL BE preserved during low power (via parameter “sram_retention_ctrl”) 4 - The HARD FAULT handler should execute from SRAM. (The Hard fault handler should initiate a full chip reset) reset)

void POWER_EnterDeepPowerDown(uint32_t exclude_from_pd, uint32_t sram_retention_ctrl, uint64_t wakeup_interrupts, uint32_t wakeup_io_ctrl)

Configures and enters in DEEPPOWERDOWN low power mode.

Parameters:
  • exclude_from_pd

  • sram_retention_ctrl

  • wakeup_interrupts

  • wakeup_io_ctrl

Returns:

Nothing

     !!! IMPORTANT NOTES :
0 - CPU0 & System CLock frequency is switched to FRO12MHz and is NOT restored back by the API. 1 - CPU0 Interrupt Enable registers (NVIC->ISER) are modified by this function. They are restored back if DEEPPOWERDOWN is not taken (for instance because an RTC or OSTIMER interrupt is pending). 2 - The Non Maskable Interrupt (NMI) is disabled and its configuration before calling this function will be restored back if DEEPPOWERDOWN is not taken (for instance because an RTC or OSTIMER interrupt is pending). 3 - The HARD FAULT handler should execute from SRAM. (The Hard fault handler should initiate a full chip reset)

void POWER_EnterSleep(void)

Configures and enters in SLEEP low power mode.

Returns:

Nothing

void POWER_SetVoltageForFreq(uint32_t system_freq_hz)

Power Library API to choose normal regulation and set the voltage for the desired operating frequency.

Parameters:
  • system_freq_hz – - The desired frequency (in Hertz) at which the part would like to operate, note that the voltage and flash wait states should be set before changing frequency

Returns:

none

void POWER_Xtal16mhzCapabankTrim(int32_t pi32_16MfXtalIecLoadpF_x100, int32_t pi32_16MfXtalPPcbParCappF_x100, int32_t pi32_16MfXtalNPcbParCappF_x100)

Sets board-specific trim values for 16MHz XTAL.

Note

Following default Values can be used: pi32_32MfXtalIecLoadpF_x100 Load capacitance, pF x 100 : 600 pi32_32MfXtalPPcbParCappF_x100 PCB +ve parasitic capacitance, pF x 100 : 20 pi32_32MfXtalNPcbParCappF_x100 PCB -ve parasitic capacitance, pF x 100 : 40

Parameters:
  • pi32_16MfXtalIecLoadpF_x100 – Load capacitance, pF x 100. For example, 6pF becomes 600, 1.2pF becomes 120

  • pi32_16MfXtalPPcbParCappF_x100 – PCB +ve parasitic capacitance, pF x 100. For example, 6pF becomes 600, 1.2pF becomes 120

  • pi32_16MfXtalNPcbParCappF_x100 – PCB -ve parasitic capacitance, pF x 100. For example, 6pF becomes 600, 1.2pF becomes 120

Returns:

none

void POWER_Xtal32khzCapabankTrim(int32_t pi32_32kfXtalIecLoadpF_x100, int32_t pi32_32kfXtalPPcbParCappF_x100, int32_t pi32_32kfXtalNPcbParCappF_x100)

Sets board-specific trim values for 32kHz XTAL.

Note

Following default Values can be used: pi32_32kfXtalIecLoadpF_x100 Load capacitance, pF x 100 : 600 pi32_32kfXtalPPcbParCappF_x100 PCB +ve parasitic capacitance, pF x 100 : 40 pi32_32kfXtalNPcbParCappF_x100 PCB -ve parasitic capacitance, pF x 100 : 40

Parameters:
  • pi32_32kfXtalIecLoadpF_x100 – Load capacitance, pF x 100. For example, 6pF becomes 600, 1.2pF becomes 120

  • pi32_32kfXtalPPcbParCappF_x100 – PCB +ve parasitic capacitance, pF x 100. For example, 6pF becomes 600, 1.2pF becomes 120

  • pi32_32kfXtalNPcbParCappF_x100 – PCB -ve parasitic capacitance, pF x 100. For example, 6pF becomes 600, 1.2pF becomes 120

Returns:

none

void POWER_SetXtal16mhzLdo(void)

Enables and sets LDO for 16MHz XTAL.

Returns:

none

void POWER_SetXtal16mhzTrim(uint32_t amp, uint32_t gm)

Set up 16-MHz XTAL Trimmings.

Parameters:
  • amp – Amplitude

  • gm – Transconductance

Returns:

none

void POWER_GetWakeUpCause(power_device_reset_cause_t *p_reset_cause, power_device_boot_mode_t *p_boot_mode, uint32_t *p_wakeupio_cause)

Return some key information related to the device reset causes / wake-up sources, for all power modes.

Parameters:
  • p_reset_cause – : the device reset cause, according to the definition of power_device_reset_cause_t type.

  • p_boot_mode – : the device boot mode, according to the definition of power_device_boot_mode_t type.

  • p_wakeupio_cause – the wake-up pin sources, according to the definition of register PMC->WAKEIOCAUSE[3:0].

Returns:

Nothing

    !!!  IMPORTANT ERRATA - IMPORTANT ERRATA - IMPORTANT ERRATA     !!!
    !!!   valid ONLY for LPC55S69 (not for LPC55S16 and LPC55S06)   !!!
    !!!   when FALLING EDGE DETECTION is enabled on wake-up pins:   !!!
    - 1. p_wakeupio_cause is NOT ACCURATE
    - 2. Spurious kRESET_CAUSE_DPDRESET_WAKEUPIO* event is reported when
         several wake-up sources are enabled during DEEP-POWER-DOWN
         (like enabling wake-up on RTC and Falling edge wake-up pins)

FSL_POWER_DRIVER_VERSION

power driver version 2.3.2.

LOWPOWER_SRAMRETCTRL_RETEN_RAMX0

SRAM instances retention control during low power modes.

Enable SRAMX_0 retention when entering in Low power modes

LOWPOWER_SRAMRETCTRL_RETEN_RAMX1

Enable SRAMX_1 retention when entering in Low power modes

LOWPOWER_SRAMRETCTRL_RETEN_RAMX2

Enable SRAMX_2 retention when entering in Low power modes

LOWPOWER_SRAMRETCTRL_RETEN_RAMX3

Enable SRAMX_3 retention when entering in Low power modes

LOWPOWER_SRAMRETCTRL_RETEN_RAM00

Enable SRAM0_0 retention when entering in Low power modes

LOWPOWER_SRAMRETCTRL_RETEN_RAM10

Enable SRAM1_0 retention when entering in Low power modes

LOWPOWER_SRAMRETCTRL_RETEN_RAM20

Enable SRAM2_0 retention when entering in Low power modes

LOWPOWER_SRAMRETCTRL_RETEN_RAM3

Enable SRAM3 retention when entering in Low power modes

WAKEUP_SYS

Low Power Modes Wake up sources.

WAKEUP_SDMA0

[SLEEP, DEEP SLEEP ]

WAKEUP_GPIO_GLOBALINT0

[SLEEP, DEEP SLEEP, POWER DOWN ]

WAKEUP_GPIO_GLOBALINT1

[SLEEP, DEEP SLEEP, POWER DOWN ]

WAKEUP_GPIO_INT0_0

[SLEEP, DEEP SLEEP ]

WAKEUP_GPIO_INT0_1

[SLEEP, DEEP SLEEP ]

WAKEUP_GPIO_INT0_2

[SLEEP, DEEP SLEEP ]

WAKEUP_GPIO_INT0_3

[SLEEP, DEEP SLEEP ]

WAKEUP_UTICK

[SLEEP, ]

WAKEUP_MRT

[SLEEP, ]

WAKEUP_CTIMER0

[SLEEP, DEEP SLEEP ]

WAKEUP_CTIMER1

[SLEEP, DEEP SLEEP ]

WAKEUP_SCT

[SLEEP, ]

WAKEUP_CTIMER3

[SLEEP, DEEP SLEEP ]

WAKEUP_FLEXCOMM0

[SLEEP, DEEP SLEEP ]

WAKEUP_FLEXCOMM1

[SLEEP, DEEP SLEEP ]

WAKEUP_FLEXCOMM2

[SLEEP, DEEP SLEEP ]

WAKEUP_FLEXCOMM3

[SLEEP, DEEP SLEEP, POWER DOWN ]

WAKEUP_FLEXCOMM4

[SLEEP, DEEP SLEEP ]

WAKEUP_FLEXCOMM5

[SLEEP, DEEP SLEEP ]

WAKEUP_FLEXCOMM6

[SLEEP, DEEP SLEEP ]

WAKEUP_FLEXCOMM7

[SLEEP, DEEP SLEEP ]

WAKEUP_ADC

[SLEEP, ]

WAKEUP_ACMP

[SLEEP, DEEP SLEEP, POWER DOWN ]

WAKEUP_RTC_LITE_ALARM_WAKEUP

[SLEEP, DEEP SLEEP, POWER DOWN, DEEP POWER DOWN]

WAKEUP_GPIO_INT0_4

[SLEEP, DEEP SLEEP ]

WAKEUP_GPIO_INT0_5

[SLEEP, DEEP SLEEP ]

WAKEUP_GPIO_INT0_6

[SLEEP, DEEP SLEEP ]

WAKEUP_GPIO_INT0_7

[SLEEP, DEEP SLEEP ]

WAKEUP_CTIMER2

[SLEEP, DEEP SLEEP ]

WAKEUP_CTIMER4

[SLEEP, DEEP SLEEP ]

WAKEUP_OS_EVENT_TIMER

[SLEEP, DEEP SLEEP, POWER DOWN, DEEP POWER DOWN]

CAN0_INT0

[SLEEP, ]

CAN1_INT0

[SLEEP, ]

WAKEUP_SEC_HYPERVISOR_CALL

[SLEEP, ]

WAKEUP_SEC_GPIO_INT0_0

[SLEEP, DEEP SLEEP ]

WAKEUP_SEC_GPIO_INT0_1

[SLEEP, DEEP SLEEP ]

WAKEUP_PLU

[SLEEP, DEEP SLEEP ]

WAKEUP_SEC_VIO
WAKEUP_SHA

[SLEEP, ]

WAKEUP_CASPER

[SLEEP, ]

WAKEUP_PUF

[SLEEP, ]

WAKEUP_SDMA1

[SLEEP, DEEP SLEEP ]

WAKEUP_LSPI_HS

[SLEEP, DEEP SLEEP ]

WAKEUP_ALLWAKEUPIOS

[ , DEEP POWER DOWN]

LOWPOWER_HWWAKE_FORCED

Sleep Postpone.

Force peripheral clocking to stay on during deep-sleep mode.

LOWPOWER_HWWAKE_PERIPHERALS

Wake for Flexcomms. Any Flexcomm FIFO reaching the level specified by its own TXLVL will cause \ peripheral clocking to wake up temporarily while the related status is asserted

LOWPOWER_HWWAKE_SDMA0

Wake for DMA0. DMA0 being busy will cause peripheral clocking to remain running until DMA \ completes. Used in conjonction with LOWPOWER_HWWAKE_PERIPHERALS

LOWPOWER_HWWAKE_SDMA1

Wake for DMA1. DMA0 being busy will cause peripheral clocking to remain running until DMA \ completes. Used in conjonction with LOWPOWER_HWWAKE_PERIPHERALS

LOWPOWER_HWWAKE_ENABLE_FRO192M

Need to be set if FRO192M is disable - via PDCTRL0 - in Deep Sleep mode and any of \ LOWPOWER_HWWAKE_PERIPHERALS, LOWPOWER_HWWAKE_SDMA0 or LOWPOWER_HWWAKE_SDMA1 is set

LOWPOWER_CPURETCTRL_ENA_DISABLE

In POWER DOWN mode, CPU Retention is disabled

LOWPOWER_CPURETCTRL_ENA_ENABLE

In POWER DOWN mode, CPU Retention is enabled

LOWPOWER_WAKEUPIOSRC_PIO0_INDEX

Wake up I/O sources.

Pin P1( 1)

LOWPOWER_WAKEUPIOSRC_PIO1_INDEX

Pin P0(28)

LOWPOWER_WAKEUPIOSRC_PIO2_INDEX

Pin P1(18)

LOWPOWER_WAKEUPIOSRC_PIO3_INDEX

Pin P1(30)

LOWPOWER_WAKEUPIOSRC_DISABLE

Wake up is disable

LOWPOWER_WAKEUPIOSRC_RISING

Wake up on rising edge

LOWPOWER_WAKEUPIOSRC_FALLING

Wake up on falling edge

LOWPOWER_WAKEUPIOSRC_RISING_FALLING

Wake up on both rising or falling edges

LOWPOWER_WAKEUPIOSRC_PIO0MODE_INDEX

Pin P1( 1)

LOWPOWER_WAKEUPIOSRC_PIO1MODE_INDEX

Pin P0(28)

LOWPOWER_WAKEUPIOSRC_PIO2MODE_INDEX

Pin P1(18)

LOWPOWER_WAKEUPIOSRC_PIO3MODE_INDEX

Pin P1(30)

LOWPOWER_WAKEUPIOSRC_IO_MODE_PLAIN

Wake up Pad is plain input

LOWPOWER_WAKEUPIOSRC_IO_MODE_PULLDOWN

Wake up Pad is pull-down

LOWPOWER_WAKEUPIOSRC_IO_MODE_PULLUP

Wake up Pad is pull-up

LOWPOWER_WAKEUPIOSRC_IO_MODE_REPEATER

Wake up Pad is in repeater

LOWPOWER_WAKEUPIO_PIO0_PULLUPDOWN_INDEX

Wake-up I/O 0 pull-up/down configuration index

LOWPOWER_WAKEUPIO_PIO1_PULLUPDOWN_INDEX

Wake-up I/O 1 pull-up/down configuration index

LOWPOWER_WAKEUPIO_PIO2_PULLUPDOWN_INDEX

Wake-up I/O 2 pull-up/down configuration index

LOWPOWER_WAKEUPIO_PIO3_PULLUPDOWN_INDEX

Wake-up I/O 3 pull-up/down configuration index

LOWPOWER_WAKEUPIO_PIO0_PULLUPDOWN_MASK

Wake-up I/O 0 pull-up/down mask

LOWPOWER_WAKEUPIO_PIO1_PULLUPDOWN_MASK

Wake-up I/O 1 pull-up/down mask

LOWPOWER_WAKEUPIO_PIO2_PULLUPDOWN_MASK

Wake-up I/O 2 pull-up/down mask

LOWPOWER_WAKEUPIO_PIO3_PULLUPDOWN_MASK

Wake-up I/O 3 pull-up/down mask

LOWPOWER_WAKEUPIO_PULLDOWN

Select pull-down

LOWPOWER_WAKEUPIO_PULLUP

Select pull-up

LOWPOWER_WAKEUPIO_PIO0_DISABLEPULLUPDOWN_INDEX

Wake-up I/O 0 pull-up/down disable/enable control index

LOWPOWER_WAKEUPIO_PIO1_DISABLEPULLUPDOWN_INDEX

Wake-up I/O 1 pull-up/down disable/enable control index

LOWPOWER_WAKEUPIO_PIO2_DISABLEPULLUPDOWN_INDEX

Wake-up I/O 2 pull-up/down disable/enable control index

LOWPOWER_WAKEUPIO_PIO3_DISABLEPULLUPDOWN_INDEX

Wake-up I/O 3 pull-up/down disable/enable control index

LOWPOWER_WAKEUPIO_PIO0_DISABLEPULLUPDOWN_MASK

Wake-up I/O 0 pull-up/down disable/enable mask

LOWPOWER_WAKEUPIO_PIO1_DISABLEPULLUPDOWN_MASK

Wake-up I/O 1 pull-up/down disable/enable mask

LOWPOWER_WAKEUPIO_PIO2_DISABLEPULLUPDOWN_MASK

Wake-up I/O 2 pull-up/down disable/enable mask

LOWPOWER_WAKEUPIO_PIO3_DISABLEPULLUPDOWN_MASK

Wake-up I/O 3 pull-up/down disable/enable mask

LOWPOWER_WAKEUPIO_PIO0_USEEXTERNALPULLUPDOWN_INDEX

Wake-up I/O 0 use external pull-up/down disable/enable control index

LOWPOWER_WAKEUPIO_PIO1_USEEXTERNALPULLUPDOWN_INDEX

Wake-up I/O 1 use external pull-up/down disable/enable control index

LOWPOWER_WAKEUPIO_PIO2_USEEXTERNALPULLUPDOWN_INDEX

Wake-up I/O 2 use external pull-up/down disable/enable control index

LOWPOWER_WAKEUPIO_PIO3_USEEXTERNALPULLUPDOWN_INDEX

Wake-up I/O 3 use external pull-up/down disable/enable control index

LOWPOWER_WAKEUPIO_PIO0_USEEXTERNALPULLUPDOWN_MASK

Wake-up I/O 0 use external pull-up/down \ disable/enable mask, 0: disable, 1: enable

LOWPOWER_WAKEUPIO_PIO1_USEEXTERNALPULLUPDOWN_MASK

Wake-up I/O 1 use external pull-up/down \ disable/enable mask, 0: disable, 1: enable

LOWPOWER_WAKEUPIO_PIO2_USEEXTERNALPULLUPDOWN_MASK

Wake-up I/O 2 use external pull-up/down \ disable/enable mask, 0: disable, 1: enable

LOWPOWER_WAKEUPIO_PIO3_USEEXTERNALPULLUPDOWN_MASK

Wake-up I/O 3 use external pull-up/down \ disable/enable mask, 0: disable, 1: enable

PRINCE: PRINCE bus crypto engine

FSL_PRINCE_DRIVER_VERSION

PRINCE driver version 2.6.0.

Current version: 2.6.0

Change log:

  • Version 2.0.0

    • Initial version.

  • Version 2.1.0

    • Update for the A1 rev. of LPC55Sxx serie.

  • Version 2.2.0

    • Add runtime checking of the A0 and A1 rev. of LPC55Sxx serie to support both silicone revisions.

  • Version 2.3.0

    • Add support for LPC55S1x and LPC55S2x series

  • Version 2.3.0

    • Fix MISRA-2012 issues.

  • Version 2.3.1

    • Add support for LPC55S0x series

  • Version 2.3.2

    • Fix documentation of enumeration. Extend PRINCE example.

  • Version 2.4.0

    • Add support for LPC55S3x series

  • Version 2.5.0

    • Add PRINCE_Config() and PRINCE_Reconfig() features.

  • Version 2.5.1

    • Fix build error due to renamed symbols

  • Version 2.6.0

    • Renamed CSS to ELS

enum _skboot_status

Secure status enumeration.

Values:

enumerator kStatus_SKBOOT_Success

PRINCE Success

enumerator kStatus_SKBOOT_Fail

PRINCE Fail

enumerator kStatus_SKBOOT_InvalidArgument

PRINCE Invalid argument

enumerator kStatus_SKBOOT_KeyStoreMarkerInvalid

PRINCE Invalid marker

enum _secure_bool

Secure boolean enumeration.

Values:

enumerator kSECURE_TRUE

PRINCE true

enumerator kSECURE_FALSE

PRINCE false

enum _prince_region

Prince region.

Values:

enumerator kPRINCE_Region0

PRINCE region 0

enumerator kPRINCE_Region1

PRINCE region 1

enumerator kPRINCE_Region2

PRINCE region 2

enum _prince_lock

Prince lock.

Values:

enumerator kPRINCE_Region0Lock

PRINCE region 0 lock

enumerator kPRINCE_Region1Lock

PRINCE region 1 lock

enumerator kPRINCE_Region2Lock

PRINCE region 2 lock

enumerator kPRINCE_MaskLock

PRINCE mask register lock

enum _prince_flags

Prince flag.

Values:

enumerator kPRINCE_Flag_None

PRINCE Flag None

enumerator kPRINCE_Flag_EraseCheck

PRINCE Flag Erase check

enumerator kPRINCE_Flag_WriteCheck

PRINCE Flag Write check

typedef enum _skboot_status skboot_status_t

Secure status enumeration.

typedef enum _secure_bool secure_bool_t

Secure boolean enumeration.

typedef enum _prince_region prince_region_t

Prince region.

typedef enum _prince_lock prince_lock_t

Prince lock.

typedef enum _prince_flags prince_flags_t

Prince flag.

static inline void PRINCE_EncryptEnable(PRINCE_Type *base)

Enable data encryption.

This function enables PRINCE on-the-fly data encryption.

Parameters:
  • base – PRINCE peripheral address.

static inline void PRINCE_EncryptDisable(PRINCE_Type *base)

Disable data encryption.

This function disables PRINCE on-the-fly data encryption.

Parameters:
  • base – PRINCE peripheral address.

static inline bool PRINCE_IsEncryptEnable(PRINCE_Type *base)

Is Enable data encryption.

This function test if PRINCE on-the-fly data encryption is enabled.

Parameters:
  • base – PRINCE peripheral address.

Returns:

true if enabled, false if not

static inline void PRINCE_SetMask(PRINCE_Type *base, uint64_t mask)

Sets PRINCE data mask.

This function sets the PRINCE mask that is used to mask decrypted data.

Parameters:
  • base – PRINCE peripheral address.

  • mask – 64-bit data mask value.

static inline void PRINCE_SetLock(PRINCE_Type *base, uint32_t lock)

Locks access for specified region registers or data mask register.

This function sets lock on specified region registers or mask register.

Parameters:
  • base – PRINCE peripheral address.

  • lock – registers to lock. This is a logical OR of members of the enumeration prince_lock_t

status_t PRINCE_GenNewIV(prince_region_t region, uint8_t *iv_code, bool store, flash_config_t *flash_context)

Generate new IV code.

This function generates new IV code and stores it into the persistent memory. Ensure about 800 bytes free space on the stack when calling this routine with the store parameter set to true!

Parameters:
  • region – PRINCE region index.

  • iv_code – IV code pointer used for storing the newly generated 52 bytes long IV code.

  • store – flag to allow storing the newly generated IV code into the persistent memory (FFR).

  • flash_context – pointer to the flash driver context structure.

Returns:

kStatus_Success upon success

Returns:

kStatus_Fail otherwise, kStatus_Fail is also returned if the key code for the particular PRINCE region is not present in the keystore (though new IV code has been provided)

status_t PRINCE_LoadIV(prince_region_t region, uint8_t *iv_code)

Load IV code.

This function enables IV code loading into the PRINCE bus encryption engine.

Parameters:
  • region – PRINCE region index.

  • iv_code – IV code pointer used for passing the IV code.

Returns:

kStatus_Success upon success

Returns:

kStatus_Fail otherwise

status_t PRINCE_SetEncryptForAddressRange(prince_region_t region, uint32_t start_address, uint32_t length, flash_config_t *flash_context, bool regenerate_iv)

Allow encryption/decryption for specified address range.

This function sets the encryption/decryption for specified address range. The SR mask value for the selected Prince region is calculated from provided start_address and length parameters. This calculated value is OR’ed with the actual SR mask value and stored into the PRINCE SR_ENABLE register and also into the persistent memory (FFR) to be used after the device reset. It is possible to define several nonadjacent encrypted areas within one Prince region when calling this function repeatedly. If the length parameter is set to 0, the SR mask value is set to 0 and thus the encryption/decryption for the whole selected Prince region is disabled. Ensure about 800 bytes free space on the stack when calling this routine!

Parameters:
  • region – PRINCE region index.

  • start_address – start address of the area to be encrypted/decrypted.

  • length – length of the area to be encrypted/decrypted.

  • flash_context – pointer to the flash driver context structure.

  • regenerate_iv – flag to allow IV code regenerating, storing into the persistent memory (FFR) and loading into the PRINCE engine

Returns:

kStatus_Success upon success

Returns:

kStatus_Fail otherwise

status_t PRINCE_GetRegionSREnable(PRINCE_Type *base, prince_region_t region, uint32_t *sr_enable)

Gets the PRINCE Sub-Region Enable register.

This function gets PRINCE SR_ENABLE register.

Parameters:
  • base – PRINCE peripheral address.

  • region – PRINCE region index.

  • sr_enable – Sub-Region Enable register pointer.

Returns:

kStatus_Success upon success

Returns:

kStatus_InvalidArgument

status_t PRINCE_GetRegionBaseAddress(PRINCE_Type *base, prince_region_t region, uint32_t *region_base_addr)

Gets the PRINCE region base address register.

This function gets PRINCE BASE_ADDR register.

Parameters:
  • base – PRINCE peripheral address.

  • region – PRINCE region index.

  • region_base_addr – Region base address pointer.

Returns:

kStatus_Success upon success

Returns:

kStatus_InvalidArgument

status_t PRINCE_SetRegionIV(PRINCE_Type *base, prince_region_t region, const uint8_t iv[8])

Sets the PRINCE region IV.

This function sets specified AES IV for the given region.

Parameters:
  • base – PRINCE peripheral address.

  • region – Selection of the PRINCE region to be configured.

  • iv – 64-bit AES IV in little-endian byte order.

status_t PRINCE_SetRegionBaseAddress(PRINCE_Type *base, prince_region_t region, uint32_t region_base_addr)

Sets the PRINCE region base address.

This function configures PRINCE region base address.

Parameters:
  • base – PRINCE peripheral address.

  • region – Selection of the PRINCE region to be configured.

  • region_base_addr – Base Address for region.

status_t PRINCE_SetRegionSREnable(PRINCE_Type *base, prince_region_t region, uint32_t sr_enable)

Sets the PRINCE Sub-Region Enable register.

This function configures PRINCE SR_ENABLE register.

Parameters:
  • base – PRINCE peripheral address.

  • region – Selection of the PRINCE region to be configured.

  • sr_enable – Sub-Region Enable register value.

status_t PRINCE_FlashEraseWithChecker(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, uint32_t key)

Erases the flash sectors encompassed by parameters passed into function.

This function erases the appropriate number of flash sectors based on the desired start address and length. It deals with the flash erase function complenentary to the standard erase API of the IAP1 driver. This implementation additionally checks if the whole encrypted PRINCE subregions are erased at once to avoid secrets revealing. The checker implementation is limited to one contiguous PRINCE-controlled memory area.

Parameters:
  • config – The pointer to the flash driver context structure.

  • start – The start address of the desired flash memory to be erased. The start address needs to be prince-sburegion-aligned.

  • lengthInBytes – The length, given in bytes (not words or long-words) to be erased. Must be prince-sburegion-size-aligned.

  • key – The value used to validate all flash erase APIs.

Returns:

kStatus_FLASH_Success API was executed successfully.

Returns:

kStatus_FLASH_InvalidArgument An invalid argument is provided.

Returns:

kStatus_FLASH_AlignmentError The parameter is not aligned with the specified baseline.

Returns:

kStatus_FLASH_AddressError The address is out of range.

Returns:

kStatus_FLASH_EraseKeyError The API erase key is invalid.

Returns:

kStatus_FLASH_CommandFailure Run-time error during the command execution.

Returns:

kStatus_FLASH_CommandNotSupported Flash API is not supported.

Returns:

kStatus_FLASH_EccError A correctable or uncorrectable error during command execution.

Returns:

kStatus_FLASH_EncryptedRegionsEraseNotDoneAtOnce Encrypted flash subregions are not erased at once.

status_t PRINCE_FlashProgramWithChecker(flash_config_t *config, uint32_t start, uint8_t *src, uint32_t lengthInBytes)

Programs flash with data at locations passed in through parameters.

This function programs the flash memory with the desired data for a given flash area as determined by the start address and the length. It deals with the flash program function complenentary to the standard program API of the IAP1 driver. This implementation additionally checks if the whole PRINCE subregions are programmed at once to avoid secrets revealing. The checker implementation is limited to one contiguous PRINCE-controlled memory area.

Parameters:
  • config – The pointer to the flash driver context structure.

  • start – The start address of the desired flash memory to be programmed. Must be prince-sburegion-aligned.

  • src – A pointer to the source buffer of data that is to be programmed into the flash.

  • lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be prince-sburegion-size-aligned.

Returns:

kStatus_FLASH_Success API was executed successfully.

Returns:

kStatus_FLASH_InvalidArgument An invalid argument is provided.

Returns:

kStatus_FLASH_AlignmentError Parameter is not aligned with the specified baseline.

Returns:

kStatus_FLASH_AddressError Address is out of range.

Returns:

kStatus_FLASH_AccessError Invalid instruction codes and out-of bounds addresses.

Returns:

kStatus_FLASH_CommandFailure Run-time error during the command execution.

Returns:

kStatus_FLASH_CommandFailure Run-time error during the command execution.

Returns:

kStatus_FLASH_CommandNotSupported Flash API is not supported.

Returns:

kStatus_FLASH_EccError A correctable or uncorrectable error during command execution.

Returns:

kStatus_FLASH_SizeError Encrypted flash subregions are not programmed at once.

FSL_PRINCE_DRIVER_SUBREGION_SIZE_IN_KB
FSL_PRINCE_DRIVER_MAX_FLASH_ADDR
ALIGN_DOWN(x, a)

PUF: Physical Unclonable Function

FSL_PUF_DRIVER_VERSION

PUF driver version. Version 2.1.6.

Current version: 2.1.6

Change log:

  • 2.0.0

    • Initial version.

  • 2.0.1

    • Fixed puf_wait_usec function optimization issue.

  • 2.0.2

    • Add PUF configuration structure and support for PUF SRAM controller. Remove magic constants.

  • 2.0.3

    • Fix MISRA C-2012 issue.

  • 2.1.0

    • Align driver with PUF SRAM controller registers on LPCXpresso55s16.

    • Update initizalition logic .

  • 2.1.1

    • Fix ARMGCC build warning .

  • 2.1.2

    • Update: Add automatic big to little endian swap for user (pre-shared) keys destinated to secret hardware bus (PUF key index 0).

  • 2.1.3

    • Fix MISRA C-2012 issue.

  • 2.1.4

    • Replace register uint32_t ticksCount with volatile uint32_t ticksCount in puf_wait_usec() to prevent optimization out delay loop.

  • 2.1.5

    • Use common SDK delay in puf_wait_usec()

  • 2.1.6

    • Changed wait time in PUF_Init(), when initialization fails it will try PUF_Powercycle() with shorter time. If this shorter time will also fail, initialization will be tried with worst case time as before.

enum _puf_key_index_register

Values:

enumerator kPUF_KeyIndex_00
enumerator kPUF_KeyIndex_01
enumerator kPUF_KeyIndex_02
enumerator kPUF_KeyIndex_03
enumerator kPUF_KeyIndex_04
enumerator kPUF_KeyIndex_05
enumerator kPUF_KeyIndex_06
enumerator kPUF_KeyIndex_07
enumerator kPUF_KeyIndex_08
enumerator kPUF_KeyIndex_09
enumerator kPUF_KeyIndex_10
enumerator kPUF_KeyIndex_11
enumerator kPUF_KeyIndex_12
enumerator kPUF_KeyIndex_13
enumerator kPUF_KeyIndex_14
enumerator kPUF_KeyIndex_15
enum _puf_min_max

Values:

enumerator kPUF_KeySizeMin
enumerator kPUF_KeySizeMax
enumerator kPUF_KeyIndexMax
enum _puf_key_slot

PUF key slot.

Values:

enumerator kPUF_KeySlot0

PUF key slot 0

enumerator kPUF_KeySlot1

PUF key slot 1

PUF status return codes.

Values:

enumerator kStatus_EnrollNotAllowed
enumerator kStatus_StartNotAllowed
typedef enum _puf_key_index_register puf_key_index_register_t
typedef enum _puf_min_max puf_min_max_t
typedef enum _puf_key_slot puf_key_slot_t

PUF key slot.

PUF_GET_KEY_CODE_SIZE_FOR_KEY_SIZE(x)

Get Key Code size in bytes from key size in bytes at compile time.

PUF_MIN_KEY_CODE_SIZE
PUF_ACTIVATION_CODE_SIZE
KEYSTORE_PUF_DISCHARGE_TIME_FIRST_TRY_MS
KEYSTORE_PUF_DISCHARGE_TIME_MAX_MS
struct puf_config_t
#include <fsl_puf.h>

Reset Driver

enum _SYSCON_RSTn

Enumeration for peripheral reset control bits.

Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers

Values:

enumerator kROM_RST_SHIFT_RSTn

ROM reset control

enumerator kSRAM1_RST_SHIFT_RSTn

SRAM1 reset control

enumerator kSRAM2_RST_SHIFT_RSTn

SRAM2 reset control

enumerator kFLASH_RST_SHIFT_RSTn

Flash controller reset control

enumerator kFMC_RST_SHIFT_RSTn

Flash accelerator reset control

enumerator kMUX0_RST_SHIFT_RSTn

Input mux0 reset control

enumerator kIOCON_RST_SHIFT_RSTn

IOCON reset control

enumerator kGPIO0_RST_SHIFT_RSTn

GPIO0 reset control

enumerator kGPIO1_RST_SHIFT_RSTn

GPIO1 reset control

enumerator kPINT_RST_SHIFT_RSTn

Pin interrupt (PINT) reset control

enumerator kGINT_RST_SHIFT_RSTn

Grouped interrupt (PINT) reset control.

enumerator kDMA0_RST_SHIFT_RSTn

DMA reset control

enumerator kCRC_RST_SHIFT_RSTn

CRC reset control

enumerator kWWDT_RST_SHIFT_RSTn

Watchdog timer reset control

enumerator kRTC_RST_SHIFT_RSTn

RTC reset control

enumerator kMAILBOX_RST_SHIFT_RSTn

Mailbox reset control

enumerator kADC0_RST_SHIFT_RSTn

ADC0 reset control

enumerator kMRT_RST_SHIFT_RSTn

Multi-rate timer (MRT) reset control

enumerator kOSTIMER0_RST_SHIFT_RSTn

OSTimer0 reset control

enumerator kSCT0_RST_SHIFT_RSTn

SCTimer/PWM 0 (SCT0) reset control

enumerator kMCAN_RST_SHIFT_RSTn

MCAN reset control

enumerator kUTICK_RST_SHIFT_RSTn

Micro-tick timer reset control

enumerator kFC0_RST_SHIFT_RSTn

Flexcomm Interface 0 reset control

enumerator kFC1_RST_SHIFT_RSTn

Flexcomm Interface 1 reset control

enumerator kFC2_RST_SHIFT_RSTn

Flexcomm Interface 2 reset control

enumerator kFC3_RST_SHIFT_RSTn

Flexcomm Interface 3 reset control

enumerator kFC4_RST_SHIFT_RSTn

Flexcomm Interface 4 reset control

enumerator kFC5_RST_SHIFT_RSTn

Flexcomm Interface 5 reset control

enumerator kFC6_RST_SHIFT_RSTn

Flexcomm Interface 6 reset control

enumerator kFC7_RST_SHIFT_RSTn

Flexcomm Interface 7 reset control

enumerator kCTIMER2_RST_SHIFT_RSTn

CTimer 2 reset control

enumerator kCTIMER0_RST_SHIFT_RSTn

CTimer 0 reset control

enumerator kCTIMER1_RST_SHIFT_RSTn

CTimer 1 reset control

enumerator kEZHA_RST_SHIFT_RSTn

EZHA reset control

enumerator kEZHB_RST_SHIFT_RSTn

EZHB reset control

enumerator kDMA1_RST_SHIFT_RSTn

DMA1 reset control

enumerator kCMP_RST_SHIFT_RSTn

CMP reset control

enumerator kSRAM3_RST_SHIFT_RSTn

SRAM3 reset control

enumerator kFREQME_RST_SHIFT_RSTn

FREQME reset control

enumerator kCDOG_RST_SHIFT_RSTn

Code Watchdog reset control

enumerator kRNG_RST_SHIFT_RSTn

RNG reset control

enumerator kSYSCTL_RST_SHIFT_RSTn

SYSCTL reset control

enumerator kHASHCRYPT_RST_SHIFT_RSTn

HASHCRYPT reset control

enumerator kPLULUT_RST_SHIFT_RSTn

PLU LUT reset control

enumerator kCTIMER3_RST_SHIFT_RSTn

CTimer 3 reset control

enumerator kCTIMER4_RST_SHIFT_RSTn

CTimer 4 reset control

enumerator kPUF_RST_SHIFT_RSTn

PUF reset control

enumerator kCASPER_RST_SHIFT_RSTn

CASPER reset control

enumerator kANALOGCTL_RST_SHIFT_RSTn

ANALOG_CTL reset control

enumerator kHSLSPI_RST_SHIFT_RSTn

HS LSPI reset control

enumerator kGPIOSEC_RST_SHIFT_RSTn

GPIO Secure reset control

enumerator kGPIOSECINT_RST_SHIFT_RSTn

GPIO Secure int reset control

typedef enum _SYSCON_RSTn SYSCON_RSTn_t

Enumeration for peripheral reset control bits.

Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers

typedef SYSCON_RSTn_t reset_ip_name_t
void RESET_SetPeripheralReset(reset_ip_name_t peripheral)

Assert reset to peripheral.

Asserts reset signal to specified peripheral module.

Parameters:
  • peripheral – Assert reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register.

void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)

Clear reset to peripheral.

Clears reset signal to specified peripheral module, allows it to operate.

Parameters:
  • peripheral – Clear reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register.

void RESET_PeripheralReset(reset_ip_name_t peripheral)

Reset peripheral module.

Reset peripheral module.

Parameters:
  • peripheral – Peripheral to reset. The enum argument contains encoding of reset register and reset bit position in the reset register.

static inline void RESET_ReleasePeripheralReset(reset_ip_name_t peripheral)

Release peripheral module.

Release peripheral module.

Parameters:
  • peripheral – Peripheral to release. The enum argument contains encoding of reset register and reset bit position in the reset register.

FSL_RESET_DRIVER_VERSION

reset driver version 2.4.0

ADC_RSTS

Array initializers with peripheral reset bits

MCAN_RSTS
CRC_RSTS
CTIMER_RSTS
DMA_RSTS_N
FLEXCOMM_RSTS
GINT_RSTS
GPIO_RSTS_N
INPUTMUX_RSTS
IOCON_RSTS
FLASH_RSTS
MRT_RSTS
PINT_RSTS
CDOG_RSTS
RNG_RSTS
SCT_RSTS
UTICK_RSTS
WWDT_RSTS
PLU_RSTS_N
OSTIMER_RSTS
CASPER_RSTS
HASHCRYPT_RSTS
PUF_RSTS

RNG: Random Number Generator

FSL_RNG_DRIVER_VERSION

RNG driver version. Version 2.0.3.

Current version: 2.0.3

Change log:

  • Version 2.0.0

    • Initial version

  • Version 2.0.1

    • Fix MISRA C-2012 issue.

  • Version 2.0.2

    • Add RESET_PeripheralReset function inside RNG_Init and RNG_Deinit functions.

  • Version 2.0.3

    • Modified RNG_Init and RNG_GetRandomData functions, added rng_accumulateEntropy and rng_readEntropy functions.

    • These changes are reflecting recommended usage of RNG according to device UM.

void RNG_Init(RNG_Type *base)

Initializes the RNG.

This function initializes the RNG. When called, the RNG module and ring oscillator is enabled.

Parameters:
  • base – RNG base address

Returns:

If successful, returns the kStatus_RNG_Success. Otherwise, it returns an error.

void RNG_Deinit(RNG_Type *base)

Shuts down the RNG.

This function shuts down the RNG.

Parameters:
  • base – RNG base address.

status_t RNG_GetRandomData(RNG_Type *base, void *data, size_t dataSize)

Gets random data.

This function gets random data from the RNG.

Parameters:
  • base – RNG base address.

  • data – Pointer address used to store random data.

  • dataSize – Size of the buffer pointed by the data parameter.

Returns:

random data

static inline uint32_t RNG_GetRandomWord(RNG_Type *base)

Returns random 32-bit number.

This function gets random number from the RNG.

Parameters:
  • base – RNG base address.

Returns:

random number

RTC: Real Time Clock

void RTC_Init(RTC_Type *base)

Un-gate the RTC clock and enable the RTC oscillator.

Note

This API should be called at the beginning of the application using the RTC driver.

Parameters:
  • base – RTC peripheral base address

static inline void RTC_Deinit(RTC_Type *base)

Stop the timer and gate the RTC clock.

Parameters:
  • base – RTC peripheral base address

status_t RTC_SetDatetime(RTC_Type *base, const rtc_datetime_t *datetime)

Set the RTC date and time according to the given time structure.

The RTC counter must be stopped prior to calling this function as writes to the RTC seconds register will fail if the RTC counter is running.

Parameters:
  • base – RTC peripheral base address

  • datetime – Pointer to structure where the date and time details to set are stored

Returns:

kStatus_Success: Success in setting the time and starting the RTC kStatus_InvalidArgument: Error because the datetime format is incorrect

void RTC_GetDatetime(RTC_Type *base, rtc_datetime_t *datetime)

Get the RTC time and stores it in the given time structure.

Parameters:
  • base – RTC peripheral base address

  • datetime – Pointer to structure where the date and time details are stored.

status_t RTC_SetAlarm(RTC_Type *base, const rtc_datetime_t *alarmTime)

Set the RTC alarm time.

The function checks whether the specified alarm time is greater than the present time. If not, the function does not set the alarm and returns an error.

Parameters:
  • base – RTC peripheral base address

  • alarmTime – Pointer to structure where the alarm time is stored.

Returns:

kStatus_Success: success in setting the RTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed

void RTC_GetAlarm(RTC_Type *base, rtc_datetime_t *datetime)

Return the RTC alarm time.

Parameters:
  • base – RTC peripheral base address

  • datetime – Pointer to structure where the alarm date and time details are stored.

static inline void RTC_EnableWakeupTimer(RTC_Type *base, bool enable)

Enable the RTC wake-up timer (1KHZ).

After calling this function, the RTC driver will use/un-use the RTC wake-up (1KHZ) at the same time.

Parameters:
  • base – RTC peripheral base address

  • enable – Use/Un-use the RTC wake-up timer.

    • true: Use RTC wake-up timer at the same time.

    • false: Un-use RTC wake-up timer, RTC only use the normal seconds timer by default.

static inline uint32_t RTC_GetEnabledWakeupTimer(RTC_Type *base)

Get the enabled status of the RTC wake-up timer (1KHZ).

Parameters:
  • base – RTC peripheral base address

Returns:

The enabled status of RTC wake-up timer (1KHZ).

static inline void RTC_EnableSubsecCounter(RTC_Type *base, bool enable)

Enable the RTC Sub-second counter (32KHZ).

Note

Only enable sub-second counter after RTC_ENA bit has been set to 1.

Parameters:
  • base – RTC peripheral base address

  • enable – Enable/Disable RTC sub-second counter.

    • true: Enable RTC sub-second counter.

    • false: Disable RTC sub-second counter.

static inline uint32_t RTC_GetSubsecValue(const RTC_Type *base)

A read of 32KHZ sub-seconds counter.

Parameters:
  • base – RTC peripheral base address

Returns:

Current value of the SUBSEC register

static inline void RTC_EnableWakeUpTimerInterruptFromDPD(RTC_Type *base, bool enable)

Enable the wake-up timer interrupt from deep power down mode.

Parameters:
  • base – RTC peripheral base address

  • enable – Enable/Disable wake-up timer interrupt from deep power down mode.

    • true: Enable wake-up timer interrupt from deep power down mode.

    • false: Disable wake-up timer interrupt from deep power down mode.

static inline void RTC_EnableAlarmTimerInterruptFromDPD(RTC_Type *base, bool enable)

Enable the alarm timer interrupt from deep power down mode.

Parameters:
  • base – RTC peripheral base address

  • enable – Enable/Disable alarm timer interrupt from deep power down mode.

    • true: Enable alarm timer interrupt from deep power down mode.

    • false: Disable alarm timer interrupt from deep power down mode.

static inline void RTC_EnableInterrupts(RTC_Type *base, uint32_t mask)

Enables the selected RTC interrupts.

Deprecated:

Do not use this function. It has been superceded by RTC_EnableAlarmTimerInterruptFromDPD and RTC_EnableWakeUpTimerInterruptFromDPD

Parameters:
  • base – RTC peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t

static inline void RTC_DisableInterrupts(RTC_Type *base, uint32_t mask)

Disables the selected RTC interrupts.

Deprecated:

Do not use this function. It has been superceded by RTC_EnableAlarmTimerInterruptFromDPD and RTC_EnableWakeUpTimerInterruptFromDPD

Parameters:
  • base – RTC peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t

static inline uint32_t RTC_GetEnabledInterrupts(RTC_Type *base)

Get the enabled RTC interrupts.

Deprecated:

Do not use this function. It will be deleted in next release version.

Parameters:
  • base – RTC peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration rtc_interrupt_enable_t

static inline uint32_t RTC_GetStatusFlags(RTC_Type *base)

Get the RTC status flags.

Parameters:
  • base – RTC peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration rtc_status_flags_t

static inline void RTC_ClearStatusFlags(RTC_Type *base, uint32_t mask)

Clear the RTC status flags.

Parameters:
  • base – RTC peripheral base address

  • mask – The status flags to clear. This is a logical OR of members of the enumeration rtc_status_flags_t

static inline void RTC_EnableTimer(RTC_Type *base, bool enable)

Enable the RTC timer counter.

After calling this function, the RTC inner counter increments once a second when only using the RTC seconds timer (1hz), while the RTC inner wake-up timer countdown once a millisecond when using RTC wake-up timer (1KHZ) at the same time. RTC timer contain two timers, one is the RTC normal seconds timer, the other one is the RTC wake-up timer, the RTC enable bit is the master switch for the whole RTC timer, so user can use the RTC seconds (1HZ) timer independly, but they can’t use the RTC wake-up timer (1KHZ) independently.

Parameters:
  • base – RTC peripheral base address

  • enable – Enable/Disable RTC Timer counter.

    • true: Enable RTC Timer counter.

    • false: Disable RTC Timer counter.

static inline void RTC_StartTimer(RTC_Type *base)

Starts the RTC time counter.

Deprecated:

Do not use this function. It has been superceded by RTC_EnableTimer

After calling this function, the timer counter increments once a second provided SR[TOF] or SR[TIF] are not set.

Parameters:
  • base – RTC peripheral base address

static inline void RTC_StopTimer(RTC_Type *base)

Stops the RTC time counter.

Deprecated:

Do not use this function. It has been superceded by RTC_EnableTimer

RTC’s seconds register can be written to only when the timer is stopped.

Parameters:
  • base – RTC peripheral base address

FSL_RTC_DRIVER_VERSION

Version 2.2.0

enum _rtc_interrupt_enable

List of RTC interrupts.

Values:

enumerator kRTC_AlarmInterruptEnable

Alarm interrupt.

enumerator kRTC_WakeupInterruptEnable

Wake-up interrupt.

enum _rtc_status_flags

List of RTC flags.

Values:

enumerator kRTC_AlarmFlag

Alarm flag

enumerator kRTC_WakeupFlag

1kHz wake-up timer flag

typedef enum _rtc_interrupt_enable rtc_interrupt_enable_t

List of RTC interrupts.

typedef enum _rtc_status_flags rtc_status_flags_t

List of RTC flags.

typedef struct _rtc_datetime rtc_datetime_t

Structure is used to hold the date and time.

static inline void RTC_SetSecondsTimerMatch(RTC_Type *base, uint32_t matchValue)

Set the RTC seconds timer (1HZ) MATCH value.

Parameters:
  • base – RTC peripheral base address

  • matchValue – The value to be set into the RTC MATCH register

static inline uint32_t RTC_GetSecondsTimerMatch(RTC_Type *base)

Read actual RTC seconds timer (1HZ) MATCH value.

Parameters:
  • base – RTC peripheral base address

Returns:

The actual RTC seconds timer (1HZ) MATCH value.

static inline void RTC_SetSecondsTimerCount(RTC_Type *base, uint32_t countValue)

Set the RTC seconds timer (1HZ) COUNT value.

Parameters:
  • base – RTC peripheral base address

  • countValue – The value to be loaded into the RTC COUNT register

static inline uint32_t RTC_GetSecondsTimerCount(RTC_Type *base)

Read the actual RTC seconds timer (1HZ) COUNT value.

Parameters:
  • base – RTC peripheral base address

Returns:

The actual RTC seconds timer (1HZ) COUNT value.

static inline void RTC_SetWakeupCount(RTC_Type *base, uint16_t wakeupValue)

Enable the RTC wake-up timer (1KHZ) and set countdown value to the RTC WAKE register.

Parameters:
  • base – RTC peripheral base address

  • wakeupValue – The value to be loaded into the WAKE register in RTC wake-up timer (1KHZ).

static inline uint16_t RTC_GetWakeupCount(RTC_Type *base)

Read the actual value from the WAKE register value in RTC wake-up timer (1KHZ)

Read the WAKE register twice and compare the result, if the value match,the time can be used.

Parameters:
  • base – RTC peripheral base address

Returns:

The actual value of the WAKE register value in RTC wake-up timer (1KHZ).

static inline void RTC_Reset(RTC_Type *base)

Perform a software reset on the RTC module.

This resets all RTC registers to their reset value. The bit is cleared by software explicitly clearing it.

Parameters:
  • base – RTC peripheral base address

struct _rtc_datetime
#include <fsl_rtc.h>

Structure is used to hold the date and time.

Public Members

uint16_t year

Range from 1970 to 2099.

uint8_t month

Range from 1 to 12.

uint8_t day

Range from 1 to 31 (depending on month).

uint8_t hour

Range from 0 to 23.

uint8_t minute

Range from 0 to 59.

uint8_t second

Range from 0 to 59.

SCTimer: SCTimer/PWM (SCT)

status_t SCTIMER_Init(SCT_Type *base, const sctimer_config_t *config)

Ungates the SCTimer clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the SCTimer driver.

Parameters:
  • base – SCTimer peripheral base address

  • config – Pointer to the user configuration structure.

Returns:

kStatus_Success indicates success; Else indicates failure.

void SCTIMER_Deinit(SCT_Type *base)

Gates the SCTimer clock.

Parameters:
  • base – SCTimer peripheral base address

void SCTIMER_GetDefaultConfig(sctimer_config_t *config)

Fills in the SCTimer configuration structure with the default settings.

The default values are:

config->enableCounterUnify = true;
config->clockMode = kSCTIMER_System_ClockMode;
config->clockSelect = kSCTIMER_Clock_On_Rise_Input_0;
config->enableBidirection_l = false;
config->enableBidirection_h = false;
config->prescale_l = 0U;
config->prescale_h = 0U;
config->outInitState = 0U;
config->inputsync  = 0xFU;

Parameters:
  • config – Pointer to the user configuration structure.

status_t SCTIMER_SetupPwm(SCT_Type *base, const sctimer_pwm_signal_param_t *pwmParams, sctimer_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, uint32_t *event)

Configures the PWM signal parameters.

Call this function to configure the PWM signal period, mode, duty cycle, and edge. This function will create 2 events; one of the events will trigger on match with the pulse value and the other will trigger when the counter matches the PWM period. The PWM period event is also used as a limit event to reset the counter or change direction. Both events are enabled for the same state. The state number can be retrieved by calling the function SCTIMER_GetCurrentStateNumber(). The counter is set to operate as one 32-bit counter (unify bit is set to 1). The counter operates in bi-directional mode when generating a center-aligned PWM.

Note

When setting PWM output from multiple output pins, they all should use the same PWM mode i.e all PWM’s should be either edge-aligned or center-aligned. When using this API, the PWM signal frequency of all the initialized channels must be the same. Otherwise all the initialized channels’ PWM signal frequency is equal to the last call to the API’s pwmFreq_Hz.

Parameters:
  • base – SCTimer peripheral base address

  • pwmParams – PWM parameters to configure the output

  • mode – PWM operation mode, options available in enumeration sctimer_pwm_mode_t

  • pwmFreq_Hz – PWM signal frequency in Hz

  • srcClock_Hz – SCTimer counter clock in Hz

  • event – Pointer to a variable where the PWM period event number is stored

Returns:

kStatus_Success on success kStatus_Fail If we have hit the limit in terms of number of events created or if an incorrect PWM dutycylce is passed in.

void SCTIMER_UpdatePwmDutycycle(SCT_Type *base, sctimer_out_t output, uint8_t dutyCyclePercent, uint32_t event)

Updates the duty cycle of an active PWM signal.

Before calling this function, the counter is set to operate as one 32-bit counter (unify bit is set to 1).

Parameters:
  • base – SCTimer peripheral base address

  • output – The output to configure

  • dutyCyclePercent – New PWM pulse width; the value should be between 1 to 100

  • event – Event number associated with this PWM signal. This was returned to the user by the function SCTIMER_SetupPwm().

static inline void SCTIMER_EnableInterrupts(SCT_Type *base, uint32_t mask)

Enables the selected SCTimer interrupts.

Parameters:
  • base – SCTimer peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline void SCTIMER_DisableInterrupts(SCT_Type *base, uint32_t mask)

Disables the selected SCTimer interrupts.

Parameters:
  • base – SCTimer peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline uint32_t SCTIMER_GetEnabledInterrupts(SCT_Type *base)

Gets the enabled SCTimer interrupts.

Parameters:
  • base – SCTimer peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline uint32_t SCTIMER_GetStatusFlags(SCT_Type *base)

Gets the SCTimer status flags.

Parameters:
  • base – SCTimer peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration sctimer_status_flags_t

static inline void SCTIMER_ClearStatusFlags(SCT_Type *base, uint32_t mask)

Clears the SCTimer status flags.

Parameters:
  • base – SCTimer peripheral base address

  • mask – The status flags to clear. This is a logical OR of members of the enumeration sctimer_status_flags_t

static inline void SCTIMER_StartTimer(SCT_Type *base, uint32_t countertoStart)

Starts the SCTimer counter.

Note

In 16-bit mode, we can enable both Counter_L and Counter_H, In 32-bit mode, we only can select Counter_U.

Parameters:
  • base – SCTimer peripheral base address

  • countertoStart – The SCTimer counters to enable. This is a logical OR of members of the enumeration sctimer_counter_t.

static inline void SCTIMER_StopTimer(SCT_Type *base, uint32_t countertoStop)

Halts the SCTimer counter.

Parameters:
  • base – SCTimer peripheral base address

  • countertoStop – The SCTimer counters to stop. This is a logical OR of members of the enumeration sctimer_counter_t.

status_t SCTIMER_CreateAndScheduleEvent(SCT_Type *base, sctimer_event_t howToMonitor, uint32_t matchValue, uint32_t whichIO, sctimer_counter_t whichCounter, uint32_t *event)

Create an event that is triggered on a match or IO and schedule in current state.

This function will configure an event using the options provided by the user. If the event type uses the counter match, then the function will set the user provided match value into a match register and put this match register number into the event control register. The event is enabled for the current state and the event number is increased by one at the end. The function returns the event number; this event number can be used to configure actions to be done when this event is triggered.

Parameters:
  • base – SCTimer peripheral base address

  • howToMonitor – Event type; options are available in the enumeration sctimer_interrupt_enable_t

  • matchValue – The match value that will be programmed to a match register

  • whichIO – The input or output that will be involved in event triggering. This field is ignored if the event type is “match only”

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • event – Pointer to a variable where the new event number is stored

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of number of events created or if we have reached the limit in terms of number of match registers

void SCTIMER_ScheduleEvent(SCT_Type *base, uint32_t event)

Enable an event in the current state.

This function will allow the event passed in to trigger in the current state. The event must be created earlier by either calling the function SCTIMER_SetupPwm() or function SCTIMER_CreateAndScheduleEvent() .

Parameters:
  • base – SCTimer peripheral base address

  • event – Event number to enable in the current state

status_t SCTIMER_IncreaseState(SCT_Type *base)

Increase the state by 1.

All future events created by calling the function SCTIMER_ScheduleEvent() will be enabled in this new state.

Parameters:
  • base – SCTimer peripheral base address

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of states used

uint32_t SCTIMER_GetCurrentState(SCT_Type *base)

Provides the current state.

User can use this to set the next state by calling the function SCTIMER_SetupNextStateAction().

Parameters:
  • base – SCTimer peripheral base address

Returns:

The current state

static inline void SCTIMER_SetCounterState(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t state)

Set the counter current state.

The function is to set the state variable bit field of STATE register. Writing to the STATE_L, STATE_H, or unified register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • state – The counter current state number (only support range from 0~31).

static inline uint16_t SCTIMER_GetCounterState(SCT_Type *base, sctimer_counter_t whichCounter)

Get the counter current state value.

The function is to get the state variable bit field of STATE register.

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

Returns:

The the counter current state value.

status_t SCTIMER_SetupCaptureAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t *captureRegister, uint32_t event)

Setup capture of the counter value on trigger of a selected event.

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • captureRegister – Pointer to a variable where the capture register number will be returned. User can read the captured value from this register when the specified event is triggered.

  • event – Event number that will trigger the capture

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of number of match/capture registers available

void SCTIMER_SetCallback(SCT_Type *base, sctimer_event_callback_t callback, uint32_t event)

Receive noticification when the event trigger an interrupt.

If the interrupt for the event is enabled by the user, then a callback can be registered which will be invoked when the event is triggered

Parameters:
  • base – SCTimer peripheral base address

  • event – Event number that will trigger the interrupt

  • callback – Function to invoke when the event is triggered

static inline void SCTIMER_SetupStateLdMethodAction(SCT_Type *base, uint32_t event, bool fgLoad)

Change the load method of transition to the specified state.

Change the load method of transition, it will be triggered by the event number that is passed in by the user.

Parameters:
  • base – SCTimer peripheral base address

  • event – Event number that will change the method to trigger the state transition

  • fgLoad – The method to load highest-numbered event occurring for that state to the STATE register.

    • true: Load the STATEV value to STATE when the event occurs to be the next state.

    • false: Add the STATEV value to STATE when the event occurs to be the next state.

static inline void SCTIMER_SetupNextStateActionwithLdMethod(SCT_Type *base, uint32_t nextState, uint32_t event, bool fgLoad)

Transition to the specified state with Load method.

This transition will be triggered by the event number that is passed in by the user, the method decide how to load the highest-numbered event occurring for that state to the STATE register.

Parameters:
  • base – SCTimer peripheral base address

  • nextState – The next state SCTimer will transition to

  • event – Event number that will trigger the state transition

  • fgLoad – The method to load the highest-numbered event occurring for that state to the STATE register.

    • true: Load the STATEV value to STATE when the event occurs to be the next state.

    • false: Add the STATEV value to STATE when the event occurs to be the next state.

static inline void SCTIMER_SetupNextStateAction(SCT_Type *base, uint32_t nextState, uint32_t event)

Transition to the specified state.

Deprecated:

Do not use this function. It has been superceded by SCTIMER_SetupNextStateActionwithLdMethod

This transition will be triggered by the event number that is passed in by the user.

Parameters:
  • base – SCTimer peripheral base address

  • nextState – The next state SCTimer will transition to

  • event – Event number that will trigger the state transition

static inline void SCTIMER_SetupEventActiveDirection(SCT_Type *base, sctimer_event_active_direction_t activeDirection, uint32_t event)

Setup event active direction when the counters are operating in BIDIR mode.

Parameters:
  • base – SCTimer peripheral base address

  • activeDirection – Event generation active direction, see sctimer_event_active_direction_t.

  • event – Event number that need setup the active direction.

static inline void SCTIMER_SetupOutputSetAction(SCT_Type *base, uint32_t whichIO, uint32_t event)

Set the Output.

This output will be set when the event number that is passed in by the user is triggered.

Parameters:
  • base – SCTimer peripheral base address

  • whichIO – The output to set

  • event – Event number that will trigger the output change

static inline void SCTIMER_SetupOutputClearAction(SCT_Type *base, uint32_t whichIO, uint32_t event)

Clear the Output.

This output will be cleared when the event number that is passed in by the user is triggered.

Parameters:
  • base – SCTimer peripheral base address

  • whichIO – The output to clear

  • event – Event number that will trigger the output change

void SCTIMER_SetupOutputToggleAction(SCT_Type *base, uint32_t whichIO, uint32_t event)

Toggle the output level.

This change in the output level is triggered by the event number that is passed in by the user.

Parameters:
  • base – SCTimer peripheral base address

  • whichIO – The output to toggle

  • event – Event number that will trigger the output change

static inline void SCTIMER_SetupCounterLimitAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)

Limit the running counter.

The counter is limited when the event number that is passed in by the user is triggered.

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • event – Event number that will trigger the counter to be limited

static inline void SCTIMER_SetupCounterStopAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)

Stop the running counter.

The counter is stopped when the event number that is passed in by the user is triggered.

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • event – Event number that will trigger the counter to be stopped

static inline void SCTIMER_SetupCounterStartAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)

Re-start the stopped counter.

The counter will re-start when the event number that is passed in by the user is triggered.

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • event – Event number that will trigger the counter to re-start

static inline void SCTIMER_SetupCounterHaltAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)

Halt the running counter.

The counter is disabled (halted) when the event number that is passed in by the user is triggered. When the counter is halted, all further events are disabled. The HALT condition can only be removed by calling the SCTIMER_StartTimer() function.

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • event – Event number that will trigger the counter to be halted

static inline void SCTIMER_SetupDmaTriggerAction(SCT_Type *base, uint32_t dmaNumber, uint32_t event)

Generate a DMA request.

DMA request will be triggered by the event number that is passed in by the user.

Parameters:
  • base – SCTimer peripheral base address

  • dmaNumber – The DMA request to generate

  • event – Event number that will trigger the DMA request

static inline void SCTIMER_SetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t value)

Set the value of counter.

The function is to set the value of Count register, Writing to the COUNT_L, COUNT_H, or unified register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • value – the counter value update to the COUNT register.

static inline uint32_t SCTIMER_GetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter)

Get the value of counter.

The function is to read the value of Count register, software can read the counter registers at any time..

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

Returns:

The value of counter selected.

static inline void SCTIMER_SetEventInState(SCT_Type *base, uint32_t event, uint32_t state)

Set the state mask bit field of EV_STATE register.

Parameters:
  • base – SCTimer peripheral base address

  • event – The EV_STATE register be set.

  • state – The state value in which the event is enabled to occur.

static inline void SCTIMER_ClearEventInState(SCT_Type *base, uint32_t event, uint32_t state)

Clear the state mask bit field of EV_STATE register.

Parameters:
  • base – SCTimer peripheral base address

  • event – The EV_STATE register be clear.

  • state – The state value in which the event is disabled to occur.

static inline bool SCTIMER_GetEventInState(SCT_Type *base, uint32_t event, uint32_t state)

Get the state mask bit field of EV_STATE register.

Note

This function is to check whether the event is enabled in a specific state.

Parameters:
  • base – SCTimer peripheral base address

  • event – The EV_STATE register be read.

  • state – The state value.

Returns:

The the state mask bit field of EV_STATE register.

  • true: The event is enable in state.

  • false: The event is disable in state.

static inline uint32_t SCTIMER_GetCaptureValue(SCT_Type *base, sctimer_counter_t whichCounter, uint8_t capChannel)

Get the value of capture register.

This function returns the captured value upon occurrence of the events selected by the corresponding Capture Control registers occurred.

Parameters:
  • base – SCTimer peripheral base address

  • whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

  • capChannel – SCTimer capture register of capture channel.

Returns:

The SCTimer counter value at which this register was last captured.

void SCTIMER_EventHandleIRQ(SCT_Type *base)

SCTimer interrupt handler.

Parameters:
  • base – SCTimer peripheral base address.

FSL_SCTIMER_DRIVER_VERSION

Version

enum _sctimer_pwm_mode

SCTimer PWM operation modes.

Values:

enumerator kSCTIMER_EdgeAlignedPwm

Edge-aligned PWM

enumerator kSCTIMER_CenterAlignedPwm

Center-aligned PWM

enum _sctimer_counter

SCTimer counters type.

Values:

enumerator kSCTIMER_Counter_L

16-bit Low counter.

enumerator kSCTIMER_Counter_H

16-bit High counter.

enumerator kSCTIMER_Counter_U

32-bit Unified counter.

enum _sctimer_input

List of SCTimer input pins.

Values:

enumerator kSCTIMER_Input_0

SCTIMER input 0

enumerator kSCTIMER_Input_1

SCTIMER input 1

enumerator kSCTIMER_Input_2

SCTIMER input 2

enumerator kSCTIMER_Input_3

SCTIMER input 3

enumerator kSCTIMER_Input_4

SCTIMER input 4

enumerator kSCTIMER_Input_5

SCTIMER input 5

enumerator kSCTIMER_Input_6

SCTIMER input 6

enumerator kSCTIMER_Input_7

SCTIMER input 7

enum _sctimer_out

List of SCTimer output pins.

Values:

enumerator kSCTIMER_Out_0

SCTIMER output 0

enumerator kSCTIMER_Out_1

SCTIMER output 1

enumerator kSCTIMER_Out_2

SCTIMER output 2

enumerator kSCTIMER_Out_3

SCTIMER output 3

enumerator kSCTIMER_Out_4

SCTIMER output 4

enumerator kSCTIMER_Out_5

SCTIMER output 5

enumerator kSCTIMER_Out_6

SCTIMER output 6

enumerator kSCTIMER_Out_7

SCTIMER output 7

enumerator kSCTIMER_Out_8

SCTIMER output 8

enumerator kSCTIMER_Out_9

SCTIMER output 9

enum _sctimer_pwm_level_select

SCTimer PWM output pulse mode: high-true, low-true or no output.

Values:

enumerator kSCTIMER_LowTrue

Low true pulses

enumerator kSCTIMER_HighTrue

High true pulses

enum _sctimer_clock_mode

SCTimer clock mode options.

Values:

enumerator kSCTIMER_System_ClockMode

System Clock Mode

enumerator kSCTIMER_Sampled_ClockMode

Sampled System Clock Mode

enumerator kSCTIMER_Input_ClockMode

SCT Input Clock Mode

enumerator kSCTIMER_Asynchronous_ClockMode

Asynchronous Mode

enum _sctimer_clock_select

SCTimer clock select options.

Values:

enumerator kSCTIMER_Clock_On_Rise_Input_0

Rising edges on input 0

enumerator kSCTIMER_Clock_On_Fall_Input_0

Falling edges on input 0

enumerator kSCTIMER_Clock_On_Rise_Input_1

Rising edges on input 1

enumerator kSCTIMER_Clock_On_Fall_Input_1

Falling edges on input 1

enumerator kSCTIMER_Clock_On_Rise_Input_2

Rising edges on input 2

enumerator kSCTIMER_Clock_On_Fall_Input_2

Falling edges on input 2

enumerator kSCTIMER_Clock_On_Rise_Input_3

Rising edges on input 3

enumerator kSCTIMER_Clock_On_Fall_Input_3

Falling edges on input 3

enumerator kSCTIMER_Clock_On_Rise_Input_4

Rising edges on input 4

enumerator kSCTIMER_Clock_On_Fall_Input_4

Falling edges on input 4

enumerator kSCTIMER_Clock_On_Rise_Input_5

Rising edges on input 5

enumerator kSCTIMER_Clock_On_Fall_Input_5

Falling edges on input 5

enumerator kSCTIMER_Clock_On_Rise_Input_6

Rising edges on input 6

enumerator kSCTIMER_Clock_On_Fall_Input_6

Falling edges on input 6

enumerator kSCTIMER_Clock_On_Rise_Input_7

Rising edges on input 7

enumerator kSCTIMER_Clock_On_Fall_Input_7

Falling edges on input 7

enum _sctimer_conflict_resolution

SCTimer output conflict resolution options.

Specifies what action should be taken if multiple events dictate that a given output should be both set and cleared at the same time

Values:

enumerator kSCTIMER_ResolveNone

No change

enumerator kSCTIMER_ResolveSet

Set output

enumerator kSCTIMER_ResolveClear

Clear output

enumerator kSCTIMER_ResolveToggle

Toggle output

enum _sctimer_event_active_direction

List of SCTimer event generation active direction when the counters are operating in BIDIR mode.

Values:

enumerator kSCTIMER_ActiveIndependent

This event is triggered regardless of the count direction.

enumerator kSCTIMER_ActiveInCountUp

This event is triggered only during up-counting when BIDIR = 1.

enumerator kSCTIMER_ActiveInCountDown

This event is triggered only during down-counting when BIDIR = 1.

enum _sctimer_event

List of SCTimer event types.

Values:

enumerator kSCTIMER_InputLowOrMatchEvent
enumerator kSCTIMER_InputRiseOrMatchEvent
enumerator kSCTIMER_InputFallOrMatchEvent
enumerator kSCTIMER_InputHighOrMatchEvent
enumerator kSCTIMER_MatchEventOnly
enumerator kSCTIMER_InputLowEvent
enumerator kSCTIMER_InputRiseEvent
enumerator kSCTIMER_InputFallEvent
enumerator kSCTIMER_InputHighEvent
enumerator kSCTIMER_InputLowAndMatchEvent
enumerator kSCTIMER_InputRiseAndMatchEvent
enumerator kSCTIMER_InputFallAndMatchEvent
enumerator kSCTIMER_InputHighAndMatchEvent
enumerator kSCTIMER_OutputLowOrMatchEvent
enumerator kSCTIMER_OutputRiseOrMatchEvent
enumerator kSCTIMER_OutputFallOrMatchEvent
enumerator kSCTIMER_OutputHighOrMatchEvent
enumerator kSCTIMER_OutputLowEvent
enumerator kSCTIMER_OutputRiseEvent
enumerator kSCTIMER_OutputFallEvent
enumerator kSCTIMER_OutputHighEvent
enumerator kSCTIMER_OutputLowAndMatchEvent
enumerator kSCTIMER_OutputRiseAndMatchEvent
enumerator kSCTIMER_OutputFallAndMatchEvent
enumerator kSCTIMER_OutputHighAndMatchEvent
enum _sctimer_interrupt_enable

List of SCTimer interrupts.

Values:

enumerator kSCTIMER_Event0InterruptEnable

Event 0 interrupt

enumerator kSCTIMER_Event1InterruptEnable

Event 1 interrupt

enumerator kSCTIMER_Event2InterruptEnable

Event 2 interrupt

enumerator kSCTIMER_Event3InterruptEnable

Event 3 interrupt

enumerator kSCTIMER_Event4InterruptEnable

Event 4 interrupt

enumerator kSCTIMER_Event5InterruptEnable

Event 5 interrupt

enumerator kSCTIMER_Event6InterruptEnable

Event 6 interrupt

enumerator kSCTIMER_Event7InterruptEnable

Event 7 interrupt

enumerator kSCTIMER_Event8InterruptEnable

Event 8 interrupt

enumerator kSCTIMER_Event9InterruptEnable

Event 9 interrupt

enumerator kSCTIMER_Event10InterruptEnable

Event 10 interrupt

enumerator kSCTIMER_Event11InterruptEnable

Event 11 interrupt

enumerator kSCTIMER_Event12InterruptEnable

Event 12 interrupt

enum _sctimer_status_flags

List of SCTimer flags.

Values:

enumerator kSCTIMER_Event0Flag

Event 0 Flag

enumerator kSCTIMER_Event1Flag

Event 1 Flag

enumerator kSCTIMER_Event2Flag

Event 2 Flag

enumerator kSCTIMER_Event3Flag

Event 3 Flag

enumerator kSCTIMER_Event4Flag

Event 4 Flag

enumerator kSCTIMER_Event5Flag

Event 5 Flag

enumerator kSCTIMER_Event6Flag

Event 6 Flag

enumerator kSCTIMER_Event7Flag

Event 7 Flag

enumerator kSCTIMER_Event8Flag

Event 8 Flag

enumerator kSCTIMER_Event9Flag

Event 9 Flag

enumerator kSCTIMER_Event10Flag

Event 10 Flag

enumerator kSCTIMER_Event11Flag

Event 11 Flag

enumerator kSCTIMER_Event12Flag

Event 12 Flag

enumerator kSCTIMER_BusErrorLFlag

Bus error due to write when L counter was not halted

enumerator kSCTIMER_BusErrorHFlag

Bus error due to write when H counter was not halted

typedef enum _sctimer_pwm_mode sctimer_pwm_mode_t

SCTimer PWM operation modes.

typedef enum _sctimer_counter sctimer_counter_t

SCTimer counters type.

typedef enum _sctimer_input sctimer_input_t

List of SCTimer input pins.

typedef enum _sctimer_out sctimer_out_t

List of SCTimer output pins.

typedef enum _sctimer_pwm_level_select sctimer_pwm_level_select_t

SCTimer PWM output pulse mode: high-true, low-true or no output.

typedef struct _sctimer_pwm_signal_param sctimer_pwm_signal_param_t

Options to configure a SCTimer PWM signal.

typedef enum _sctimer_clock_mode sctimer_clock_mode_t

SCTimer clock mode options.

typedef enum _sctimer_clock_select sctimer_clock_select_t

SCTimer clock select options.

typedef enum _sctimer_conflict_resolution sctimer_conflict_resolution_t

SCTimer output conflict resolution options.

Specifies what action should be taken if multiple events dictate that a given output should be both set and cleared at the same time

typedef enum _sctimer_event_active_direction sctimer_event_active_direction_t

List of SCTimer event generation active direction when the counters are operating in BIDIR mode.

typedef enum _sctimer_event sctimer_event_t

List of SCTimer event types.

typedef void (*sctimer_event_callback_t)(void)

SCTimer callback typedef.

typedef enum _sctimer_interrupt_enable sctimer_interrupt_enable_t

List of SCTimer interrupts.

typedef enum _sctimer_status_flags sctimer_status_flags_t

List of SCTimer flags.

typedef struct _sctimer_config sctimer_config_t

SCTimer configuration structure.

This structure holds the configuration settings for the SCTimer peripheral. To initialize this structure to reasonable defaults, call the SCTMR_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

SCT_EV_STATE_STATEMSKn(x)
struct _sctimer_pwm_signal_param
#include <fsl_sctimer.h>

Options to configure a SCTimer PWM signal.

Public Members

sctimer_out_t output

The output pin to use to generate the PWM signal

sctimer_pwm_level_select_t level

PWM output active level select.

uint8_t dutyCyclePercent

PWM pulse width, value should be between 0 to 100 0 = always inactive signal (0% duty cycle) 100 = always active signal (100% duty cycle).

struct _sctimer_config
#include <fsl_sctimer.h>

SCTimer configuration structure.

This structure holds the configuration settings for the SCTimer peripheral. To initialize this structure to reasonable defaults, call the SCTMR_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Public Members

bool enableCounterUnify

true: SCT operates as a unified 32-bit counter; false: SCT operates as two 16-bit counters. User can use the 16-bit low counter and the 16-bit high counters at the same time; for Hardware limit, user can not use unified 32-bit counter and any 16-bit low/high counter at the same time.

sctimer_clock_mode_t clockMode

SCT clock mode value

sctimer_clock_select_t clockSelect

SCT clock select value

bool enableBidirection_l

true: Up-down count mode for the L or unified counter false: Up count mode only for the L or unified counter

bool enableBidirection_h

true: Up-down count mode for the H or unified counter false: Up count mode only for the H or unified counter. This field is used only if the enableCounterUnify is set to false

uint8_t prescale_l

Prescale value to produce the L or unified counter clock

uint8_t prescale_h

Prescale value to produce the H counter clock. This field is used only if the enableCounterUnify is set to false

uint8_t outInitState

Defines the initial output value

uint8_t inputsync

SCT INSYNC value, INSYNC field in the CONFIG register, from bit9 to bit 16. it is used to define synchronization for input N: bit 9 = input 0 bit 10 = input 1 bit 11 = input 2 bit 12 = input 3 All other bits are reserved (bit13 ~bit 16). How User to set the the value for the member inputsync. IE: delay for input0, and input 1, bypasses for input 2 and input 3 MACRO definition in user level. #define INPUTSYNC0 (0U) #define INPUTSYNC1 (1U) #define INPUTSYNC2 (2U) #define INPUTSYNC3 (3U) User Code. sctimerInfo.inputsync = (1 << INPUTSYNC2) | (1 << INPUTSYNC3);

skboot_authenticate

enum _skboot_status

SKBOOT return status.

Values:

enumerator kStatus_SKBOOT_Success

SKBOOT return success status.

enumerator kStatus_SKBOOT_Fail

SKBOOT return fail status.

enumerator kStatus_SKBOOT_InvalidArgument

SKBOOT return invalid argument status.

enumerator kStatus_SKBOOT_KeyStoreMarkerInvalid

SKBOOT return Keystore invalid Marker status.

enumerator kStatus_SKBOOT_HashcryptFinishedWithStatusSuccess

SKBOOT return Hashcrypt finished with the success status.

enumerator kStatus_SKBOOT_HashcryptFinishedWithStatusFail

SKBOOT return Hashcrypt finished with the fail status.

enum _secure_bool

Secure bool flag.

Values:

enumerator kSECURE_TRUE

Secure true flag.

enumerator kSECURE_FALSE

Secure false flag.

enumerator kSECURE_CALLPROTECT_SECURITY_FLAGS

Secure call protect the security flag.

enumerator kSECURE_CALLPROTECT_IS_APP_READY

Secure call protect the app is ready flag.

enumerator kSECURE_TRACKER_VERIFIED

Secure tracker verified flag.

typedef enum _skboot_status skboot_status_t

SKBOOT return status.

typedef enum _secure_bool secure_bool_t

Secure bool flag.

skboot_status_t skboot_authenticate(const uint8_t *imageStartAddr, secure_bool_t *isSignVerified)

Authenticate entry function with ARENA allocator init.

This is called by ROM boot or by ROM API g_skbootAuthenticateInterface

void HASH_IRQHandler(void)

Interface for image authentication API.

SPI: Serial Peripheral Interface Driver

SPI DMA Driver

status_t SPI_MasterTransferCreateHandleDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_dma_callback_t callback, void *userData, dma_handle_t *txHandle, dma_handle_t *rxHandle)

Initialize the SPI master DMA handle.

This function initializes the SPI master DMA handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, user need only call this API once to get the initialized handle.

Parameters:
  • base – SPI peripheral base address.

  • handle – SPI handle pointer.

  • callback – User callback function called at the end of a transfer.

  • userData – User data for callback.

  • txHandle – DMA handle pointer for SPI Tx, the handle shall be static allocated by users.

  • rxHandle – DMA handle pointer for SPI Rx, the handle shall be static allocated by users.

status_t SPI_MasterTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_transfer_t *xfer)

Perform a non-blocking SPI transfer using DMA.

Note

This interface returned immediately after transfer initiates, users should call SPI_GetTransferStatus to poll the transfer status to check whether SPI transfer finished.

Parameters:
  • base – SPI peripheral base address.

  • handle – SPI DMA handle pointer.

  • xfer – Pointer to dma transfer structure.

Return values:
  • kStatus_Success – Successfully start a transfer.

  • kStatus_InvalidArgument – Input argument is invalid.

  • kStatus_SPI_Busy – SPI is not idle, is running another transfer.

status_t SPI_MasterHalfDuplexTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_half_duplex_transfer_t *xfer)

Transfers a block of data using a DMA method.

This function using polling way to do the first half transimission and using DMA way to do the srcond half transimission, the transfer mechanism is half-duplex. When do the second half transimission, code will return right away. When all data is transferred, the callback function is called.

Parameters:
  • base – SPI base pointer

  • handle – A pointer to the spi_master_dma_handle_t structure which stores the transfer state.

  • xfer – A pointer to the spi_half_duplex_transfer_t structure.

Returns:

status of status_t.

static inline status_t SPI_SlaveTransferCreateHandleDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_dma_callback_t callback, void *userData, dma_handle_t *txHandle, dma_handle_t *rxHandle)

Initialize the SPI slave DMA handle.

This function initializes the SPI slave DMA handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, user need only call this API once to get the initialized handle.

Parameters:
  • base – SPI peripheral base address.

  • handle – SPI handle pointer.

  • callback – User callback function called at the end of a transfer.

  • userData – User data for callback.

  • txHandle – DMA handle pointer for SPI Tx, the handle shall be static allocated by users.

  • rxHandle – DMA handle pointer for SPI Rx, the handle shall be static allocated by users.

static inline status_t SPI_SlaveTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_transfer_t *xfer)

Perform a non-blocking SPI transfer using DMA.

Note

This interface returned immediately after transfer initiates, users should call SPI_GetTransferStatus to poll the transfer status to check whether SPI transfer finished.

Parameters:
  • base – SPI peripheral base address.

  • handle – SPI DMA handle pointer.

  • xfer – Pointer to dma transfer structure.

Return values:
  • kStatus_Success – Successfully start a transfer.

  • kStatus_InvalidArgument – Input argument is invalid.

  • kStatus_SPI_Busy – SPI is not idle, is running another transfer.

void SPI_MasterTransferAbortDMA(SPI_Type *base, spi_dma_handle_t *handle)

Abort a SPI transfer using DMA.

Parameters:
  • base – SPI peripheral base address.

  • handle – SPI DMA handle pointer.

status_t SPI_MasterTransferGetCountDMA(SPI_Type *base, spi_dma_handle_t *handle, size_t *count)

Gets the master DMA transfer remaining bytes.

This function gets the master DMA transfer remaining bytes.

Parameters:
  • base – SPI peripheral base address.

  • handle – A pointer to the spi_dma_handle_t structure which stores the transfer state.

  • count – A number of bytes transferred by the non-blocking transaction.

Returns:

status of status_t.

static inline void SPI_SlaveTransferAbortDMA(SPI_Type *base, spi_dma_handle_t *handle)

Abort a SPI transfer using DMA.

Parameters:
  • base – SPI peripheral base address.

  • handle – SPI DMA handle pointer.

static inline status_t SPI_SlaveTransferGetCountDMA(SPI_Type *base, spi_dma_handle_t *handle, size_t *count)

Gets the slave DMA transfer remaining bytes.

This function gets the slave DMA transfer remaining bytes.

Parameters:
  • base – SPI peripheral base address.

  • handle – A pointer to the spi_dma_handle_t structure which stores the transfer state.

  • count – A number of bytes transferred by the non-blocking transaction.

Returns:

status of status_t.

FSL_SPI_DMA_DRIVER_VERSION

SPI DMA driver version 2.1.1.

typedef struct _spi_dma_handle spi_dma_handle_t
typedef void (*spi_dma_callback_t)(SPI_Type *base, spi_dma_handle_t *handle, status_t status, void *userData)

SPI DMA callback called at the end of transfer.

struct _spi_dma_handle
#include <fsl_spi_dma.h>

SPI DMA transfer handle, users should not touch the content of the handle.

Public Members

volatile bool txInProgress

Send transfer finished

volatile bool rxInProgress

Receive transfer finished

uint8_t bytesPerFrame

Bytes in a frame for SPI transfer

uint8_t lastwordBytes

The Bytes of lastword for master

dma_handle_t *txHandle

DMA handler for SPI send

dma_handle_t *rxHandle

DMA handler for SPI receive

spi_dma_callback_t callback

Callback for SPI DMA transfer

void *userData

User Data for SPI DMA callback

uint32_t state

Internal state of SPI DMA transfer

size_t transferSize

Bytes need to be transfer

uint32_t instance

Index of SPI instance

const uint8_t *txNextData

The pointer of next time tx data

const uint8_t *txEndData

The pointer of end of data

uint8_t *rxNextData

The pointer of next time rx data

uint8_t *rxEndData

The pointer of end of rx data

uint32_t dataBytesEveryTime

Bytes in a time for DMA transfer, default is DMA_MAX_TRANSFER_COUNT

SPI Driver

FSL_SPI_DRIVER_VERSION

SPI driver version.

enum _spi_xfer_option

SPI transfer option.

Values:

enumerator kSPI_FrameDelay

A delay may be inserted, defined in the DLY register.

enumerator kSPI_FrameAssert

SSEL will be deasserted at the end of a transfer

enum _spi_shift_direction

SPI data shifter direction options.

Values:

enumerator kSPI_MsbFirst

Data transfers start with most significant bit.

enumerator kSPI_LsbFirst

Data transfers start with least significant bit.

enum _spi_clock_polarity

SPI clock polarity configuration.

Values:

enumerator kSPI_ClockPolarityActiveHigh

Active-high SPI clock (idles low).

enumerator kSPI_ClockPolarityActiveLow

Active-low SPI clock (idles high).

enum _spi_clock_phase

SPI clock phase configuration.

Values:

enumerator kSPI_ClockPhaseFirstEdge

First edge on SCK occurs at the middle of the first cycle of a data transfer.

enumerator kSPI_ClockPhaseSecondEdge

First edge on SCK occurs at the start of the first cycle of a data transfer.

enum _spi_txfifo_watermark

txFIFO watermark values

Values:

enumerator kSPI_TxFifo0

SPI tx watermark is empty

enumerator kSPI_TxFifo1

SPI tx watermark at 1 item

enumerator kSPI_TxFifo2

SPI tx watermark at 2 items

enumerator kSPI_TxFifo3

SPI tx watermark at 3 items

enumerator kSPI_TxFifo4

SPI tx watermark at 4 items

enumerator kSPI_TxFifo5

SPI tx watermark at 5 items

enumerator kSPI_TxFifo6

SPI tx watermark at 6 items

enumerator kSPI_TxFifo7

SPI tx watermark at 7 items

enum _spi_rxfifo_watermark

rxFIFO watermark values

Values:

enumerator kSPI_RxFifo1

SPI rx watermark at 1 item

enumerator kSPI_RxFifo2

SPI rx watermark at 2 items

enumerator kSPI_RxFifo3

SPI rx watermark at 3 items

enumerator kSPI_RxFifo4

SPI rx watermark at 4 items

enumerator kSPI_RxFifo5

SPI rx watermark at 5 items

enumerator kSPI_RxFifo6

SPI rx watermark at 6 items

enumerator kSPI_RxFifo7

SPI rx watermark at 7 items

enumerator kSPI_RxFifo8

SPI rx watermark at 8 items

enum _spi_data_width

Transfer data width.

Values:

enumerator kSPI_Data4Bits

4 bits data width

enumerator kSPI_Data5Bits

5 bits data width

enumerator kSPI_Data6Bits

6 bits data width

enumerator kSPI_Data7Bits

7 bits data width

enumerator kSPI_Data8Bits

8 bits data width

enumerator kSPI_Data9Bits

9 bits data width

enumerator kSPI_Data10Bits

10 bits data width

enumerator kSPI_Data11Bits

11 bits data width

enumerator kSPI_Data12Bits

12 bits data width

enumerator kSPI_Data13Bits

13 bits data width

enumerator kSPI_Data14Bits

14 bits data width

enumerator kSPI_Data15Bits

15 bits data width

enumerator kSPI_Data16Bits

16 bits data width

enum _spi_ssel

Slave select.

Values:

enumerator kSPI_Ssel0

Slave select 0

enumerator kSPI_Ssel1

Slave select 1

enumerator kSPI_Ssel2

Slave select 2

enumerator kSPI_Ssel3

Slave select 3

enum _spi_spol

ssel polarity

Values:

enumerator kSPI_Spol0ActiveHigh
enumerator kSPI_Spol1ActiveHigh
enumerator kSPI_Spol3ActiveHigh
enumerator kSPI_SpolActiveAllHigh
enumerator kSPI_SpolActiveAllLow

SPI transfer status.

Values:

enumerator kStatus_SPI_Busy

SPI bus is busy

enumerator kStatus_SPI_Idle

SPI is idle

enumerator kStatus_SPI_Error

SPI error

enumerator kStatus_SPI_BaudrateNotSupport

Baudrate is not support in current clock source

enumerator kStatus_SPI_Timeout

SPI timeout polling status flags.

enum _spi_interrupt_enable

SPI interrupt sources.

Values:

enumerator kSPI_RxLvlIrq

Rx level interrupt

enumerator kSPI_TxLvlIrq

Tx level interrupt

enum _spi_statusflags

SPI status flags.

Values:

enumerator kSPI_TxEmptyFlag

txFifo is empty

enumerator kSPI_TxNotFullFlag

txFifo is not full

enumerator kSPI_RxNotEmptyFlag

rxFIFO is not empty

enumerator kSPI_RxFullFlag

rxFIFO is full

typedef enum _spi_xfer_option spi_xfer_option_t

SPI transfer option.

typedef enum _spi_shift_direction spi_shift_direction_t

SPI data shifter direction options.

typedef enum _spi_clock_polarity spi_clock_polarity_t

SPI clock polarity configuration.

typedef enum _spi_clock_phase spi_clock_phase_t

SPI clock phase configuration.

typedef enum _spi_txfifo_watermark spi_txfifo_watermark_t

txFIFO watermark values

typedef enum _spi_rxfifo_watermark spi_rxfifo_watermark_t

rxFIFO watermark values

typedef enum _spi_data_width spi_data_width_t

Transfer data width.

typedef enum _spi_ssel spi_ssel_t

Slave select.

typedef enum _spi_spol spi_spol_t

ssel polarity

typedef struct _spi_delay_config spi_delay_config_t

SPI delay time configure structure. Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.

typedef struct _spi_master_config spi_master_config_t

SPI master user configure structure.

typedef struct _spi_slave_config spi_slave_config_t

SPI slave user configure structure.

typedef struct _spi_transfer spi_transfer_t

SPI transfer structure.

typedef struct _spi_half_duplex_transfer spi_half_duplex_transfer_t

SPI half-duplex(master only) transfer structure.

typedef struct _spi_config spi_config_t

Internal configuration structure used in ‘spi’ and ‘spi_dma’ driver.

typedef struct _spi_master_handle spi_master_handle_t

Master handle type.

typedef spi_master_handle_t spi_slave_handle_t

Slave handle type.

typedef void (*spi_master_callback_t)(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData)

SPI master callback for finished transmit.

typedef void (*spi_slave_callback_t)(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData)

SPI slave callback for finished transmit.

typedef void (*flexcomm_spi_master_irq_handler_t)(SPI_Type *base, spi_master_handle_t *handle)

Typedef for master interrupt handler.

typedef void (*flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, spi_slave_handle_t *handle)

Typedef for slave interrupt handler.

volatile uint8_t s_dummyData[]

SPI default SSEL COUNT.

Global variable for dummy data value setting.

SPI_DUMMYDATA

SPI dummy transfer data, the data is sent while txBuff is NULL.

SPI_RETRY_TIMES

Retry times for waiting flag.

SPI_DATA(n)
SPI_CTRLMASK
SPI_ASSERTNUM_SSEL(n)
SPI_DEASSERTNUM_SSEL(n)
SPI_DEASSERT_ALL
SPI_FIFOWR_FLAGS_MASK
SPI_FIFOTRIG_TXLVL_GET(base)
SPI_FIFOTRIG_RXLVL_GET(base)
struct _spi_delay_config
#include <fsl_spi.h>

SPI delay time configure structure. Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.

Public Members

uint8_t preDelay

Delay between SSEL assertion and the beginning of transfer.

uint8_t postDelay

Delay between the end of transfer and SSEL deassertion.

uint8_t frameDelay

Delay between frame to frame.

uint8_t transferDelay

Delay between transfer to transfer.

struct _spi_master_config
#include <fsl_spi.h>

SPI master user configure structure.

Public Members

bool enableLoopback

Enable loopback for test purpose

bool enableMaster

Enable SPI at initialization time

spi_clock_polarity_t polarity

Clock polarity

spi_clock_phase_t phase

Clock phase

spi_shift_direction_t direction

MSB or LSB

uint32_t baudRate_Bps

Baud Rate for SPI in Hz

spi_data_width_t dataWidth

Width of the data

spi_ssel_t sselNum

Slave select number

spi_spol_t sselPol

Configure active CS polarity

uint8_t txWatermark

txFIFO watermark

uint8_t rxWatermark

rxFIFO watermark

spi_delay_config_t delayConfig

Delay configuration.

struct _spi_slave_config
#include <fsl_spi.h>

SPI slave user configure structure.

Public Members

bool enableSlave

Enable SPI at initialization time

spi_clock_polarity_t polarity

Clock polarity

spi_clock_phase_t phase

Clock phase

spi_shift_direction_t direction

MSB or LSB

spi_data_width_t dataWidth

Width of the data

spi_spol_t sselPol

Configure active CS polarity

uint8_t txWatermark

txFIFO watermark

uint8_t rxWatermark

rxFIFO watermark

struct _spi_transfer
#include <fsl_spi.h>

SPI transfer structure.

Public Members

const uint8_t *txData

Send buffer

uint8_t *rxData

Receive buffer

uint32_t configFlags

Additional option to control transfer, spi_xfer_option_t.

size_t dataSize

Transfer bytes

struct _spi_half_duplex_transfer
#include <fsl_spi.h>

SPI half-duplex(master only) transfer structure.

Public Members

const uint8_t *txData

Send buffer

uint8_t *rxData

Receive buffer

size_t txDataSize

Transfer bytes for transmit

size_t rxDataSize

Transfer bytes

uint32_t configFlags

Transfer configuration flags, spi_xfer_option_t.

bool isPcsAssertInTransfer

If PCS pin keep assert between transmit and receive. true for assert and false for deassert.

bool isTransmitFirst

True for transmit first and false for receive first.

struct _spi_config
#include <fsl_spi.h>

Internal configuration structure used in ‘spi’ and ‘spi_dma’ driver.

struct _spi_master_handle
#include <fsl_spi.h>

SPI transfer handle structure.

Public Members

const uint8_t *volatile txData

Transfer buffer

uint8_t *volatile rxData

Receive buffer

volatile size_t txRemainingBytes

Number of data to be transmitted [in bytes]

volatile size_t rxRemainingBytes

Number of data to be received [in bytes]

volatile int8_t toReceiveCount

The number of data expected to receive in data width. Since the received count and sent count should be the same to complete the transfer, if the sent count is x and the received count is y, toReceiveCount is x-y.

size_t totalByteCount

A number of transfer bytes

volatile uint32_t state

SPI internal state

spi_master_callback_t callback

SPI callback

void *userData

Callback parameter

uint8_t dataWidth

Width of the data [Valid values: 1 to 16]

uint8_t sselNum

Slave select number to be asserted when transferring data [Valid values: 0 to 3]

uint32_t configFlags

Additional option to control transfer

uint8_t txWatermark

txFIFO watermark

uint8_t rxWatermark

rxFIFO watermark

SYSCTL: I2S bridging and signal sharing Configuration

void SYSCTL_Init(SYSCTL_Type *base)

SYSCTL initial.

Parameters:
  • base – Base address of the SYSCTL peripheral.

void SYSCTL_Deinit(SYSCTL_Type *base)

SYSCTL deinit.

Parameters:
  • base – Base address of the SYSCTL peripheral.

void SYSCTL_SetFlexcommShareSet(SYSCTL_Type *base, uint32_t flexCommIndex, uint32_t sckSet, uint32_t wsSet, uint32_t dataInSet, uint32_t dataOutSet)

SYSCTL share set configure for flexcomm.

Parameters:
  • base – Base address of the SYSCTL peripheral.

  • flexCommIndex – index of flexcomm, reference _sysctl_share_src

  • sckSet – share set for sck,reference _sysctl_share_set_index

  • wsSet – share set for ws, reference _sysctl_share_set_index

  • dataInSet – share set for data in, reference _sysctl_share_set_index

  • dataOutSet – share set for data out, reference _sysctl_dataout_mask

void SYSCTL_SetShareSet(SYSCTL_Type *base, uint32_t flexCommIndex, sysctl_fcctrlsel_signal_t signal, uint32_t set)

SYSCTL share set configure for separate signal.

Parameters:
  • base – Base address of the SYSCTL peripheral

  • flexCommIndex – index of flexcomm,reference _sysctl_share_src

  • signal – FCCTRLSEL signal shift

  • set – share set for sck, reference _sysctl_share_set_index

void SYSCTL_SetShareSetSrc(SYSCTL_Type *base, uint32_t setIndex, uint32_t sckShareSrc, uint32_t wsShareSrc, uint32_t dataInShareSrc, uint32_t dataOutShareSrc)

SYSCTL share set source configure.

Parameters:
  • base – Base address of the SYSCTL peripheral

  • setIndex – index of share set, reference _sysctl_share_set_index

  • sckShareSrc – sck source for this share set,reference _sysctl_share_src

  • wsShareSrc – ws source for this share set,reference _sysctl_share_src

  • dataInShareSrc – data in source for this share set,reference _sysctl_share_src

  • dataOutShareSrc – data out source for this share set,reference _sysctl_dataout_mask

void SYSCTL_SetShareSignalSrc(SYSCTL_Type *base, uint32_t setIndex, sysctl_sharedctrlset_signal_t signal, uint32_t shareSrc)

SYSCTL sck source configure.

Parameters:
  • base – Base address of the SYSCTL peripheral

  • setIndex – index of share set, reference _sysctl_share_set_index

  • signal – FCCTRLSEL signal shift

  • shareSrc – sck source fro this share set,reference _sysctl_share_src

FSL_SYSCTL_DRIVER_VERSION

Group sysctl driver version for SDK.

Version 2.0.5.

enum _sysctl_share_set_index

SYSCTL share set.

Values:

enumerator kSYSCTL_ShareSet0

share set 0

enumerator kSYSCTL_ShareSet1

share set 1

enum _sysctl_fcctrlsel_signal

SYSCTL flexcomm signal.

Values:

enumerator kSYSCTL_FlexcommSignalSCK

SCK signal

enumerator kSYSCTL_FlexcommSignalWS

WS signal

enumerator kSYSCTL_FlexcommSignalDataIn

Data in signal

enumerator kSYSCTL_FlexcommSignalDataOut

Data out signal

enum _sysctl_share_src

SYSCTL flexcomm index.

Values:

enumerator kSYSCTL_Flexcomm0

share set 0

enumerator kSYSCTL_Flexcomm1

share set 1

enumerator kSYSCTL_Flexcomm2

share set 2

enumerator kSYSCTL_Flexcomm4

share set 4

enumerator kSYSCTL_Flexcomm5

share set 5

enumerator kSYSCTL_Flexcomm6

share set 6

enumerator kSYSCTL_Flexcomm7

share set 7

enum _sysctl_dataout_mask

SYSCTL shared data out mask.

Values:

enumerator kSYSCTL_Flexcomm0DataOut

share set 0

enumerator kSYSCTL_Flexcomm1DataOut

share set 1

enumerator kSYSCTL_Flexcomm2DataOut

share set 2

enumerator kSYSCTL_Flexcomm4DataOut

share set 4

enumerator kSYSCTL_Flexcomm5DataOut

share set 5

enumerator kSYSCTL_Flexcomm6DataOut

share set 6

enumerator kSYSCTL_Flexcomm7DataOut

share set 7

enum _sysctl_sharedctrlset_signal

SYSCTL flexcomm signal.

Values:

enumerator kSYSCTL_SharedCtrlSignalSCK

SCK signal

enumerator kSYSCTL_SharedCtrlSignalWS

WS signal

enumerator kSYSCTL_SharedCtrlSignalDataIn

Data in signal

enumerator kSYSCTL_SharedCtrlSignalDataOut

Data out signal

typedef enum _sysctl_fcctrlsel_signal sysctl_fcctrlsel_signal_t

SYSCTL flexcomm signal.

typedef enum _sysctl_sharedctrlset_signal sysctl_sharedctrlset_signal_t

SYSCTL flexcomm signal.

USART: Universal Synchronous/Asynchronous Receiver/Transmitter Driver

USART DMA Driver

status_t USART_TransferCreateHandleDMA(USART_Type *base, usart_dma_handle_t *handle, usart_dma_transfer_callback_t callback, void *userData, dma_handle_t *txDmaHandle, dma_handle_t *rxDmaHandle)

Initializes the USART handle which is used in transactional functions.

Parameters:
  • base – USART peripheral base address.

  • handle – Pointer to usart_dma_handle_t structure.

  • callback – Callback function.

  • userData – User data.

  • txDmaHandle – User-requested DMA handle for TX DMA transfer.

  • rxDmaHandle – User-requested DMA handle for RX DMA transfer.

status_t USART_TransferSendDMA(USART_Type *base, usart_dma_handle_t *handle, usart_transfer_t *xfer)

Sends data using DMA.

This function sends data using DMA. This is a non-blocking function, which returns right away. When all data is sent, the send callback function is called.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • xfer – USART DMA transfer structure. See usart_transfer_t.

Return values:
  • kStatus_Success – if succeed, others failed.

  • kStatus_USART_TxBusy – Previous transfer on going.

  • kStatus_InvalidArgument – Invalid argument.

status_t USART_TransferReceiveDMA(USART_Type *base, usart_dma_handle_t *handle, usart_transfer_t *xfer)

Receives data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:
  • base – USART peripheral base address.

  • handle – Pointer to usart_dma_handle_t structure.

  • xfer – USART DMA transfer structure. See usart_transfer_t.

Return values:
  • kStatus_Success – if succeed, others failed.

  • kStatus_USART_RxBusy – Previous transfer on going.

  • kStatus_InvalidArgument – Invalid argument.

void USART_TransferAbortSendDMA(USART_Type *base, usart_dma_handle_t *handle)

Aborts the sent data using DMA.

This function aborts send data using DMA.

Parameters:
  • base – USART peripheral base address

  • handle – Pointer to usart_dma_handle_t structure

void USART_TransferAbortReceiveDMA(USART_Type *base, usart_dma_handle_t *handle)

Aborts the received data using DMA.

This function aborts the received data using DMA.

Parameters:
  • base – USART peripheral base address

  • handle – Pointer to usart_dma_handle_t structure

status_t USART_TransferGetReceiveCountDMA(USART_Type *base, usart_dma_handle_t *handle, uint32_t *count)

Get the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • count – Receive bytes count.

Return values:
  • kStatus_NoTransferInProgress – No receive in progress.

  • kStatus_InvalidArgument – Parameter is invalid.

  • kStatus_Success – Get successfully through the parameter count;

status_t USART_TransferGetSendCountDMA(USART_Type *base, usart_dma_handle_t *handle, uint32_t *count)

Get the number of bytes that have been sent.

This function gets the number of bytes that have been sent.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • count – Sent bytes count.

Return values:
  • kStatus_NoTransferInProgress – No receive in progress.

  • kStatus_InvalidArgument – Parameter is invalid.

  • kStatus_Success – Get successfully through the parameter count;

FSL_USART_DMA_DRIVER_VERSION

USART dma driver version.

typedef struct _usart_dma_handle usart_dma_handle_t
typedef void (*usart_dma_transfer_callback_t)(USART_Type *base, usart_dma_handle_t *handle, status_t status, void *userData)

UART transfer callback function.

struct _usart_dma_handle
#include <fsl_usart_dma.h>

UART DMA handle.

Public Members

USART_Type *base

UART peripheral base address.

usart_dma_transfer_callback_t callback

Callback function.

void *userData

UART callback function parameter.

size_t rxDataSizeAll

Size of the data to receive.

size_t txDataSizeAll

Size of the data to send out.

dma_handle_t *txDmaHandle

The DMA TX channel used.

dma_handle_t *rxDmaHandle

The DMA RX channel used.

volatile uint8_t txState

TX transfer state.

volatile uint8_t rxState

RX transfer state

USART Driver

status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)

Initializes a USART instance with user configuration structure and peripheral clock.

This function configures the USART module with the user-defined settings. The user can configure the configuration structure and also get the default configuration by using the USART_GetDefaultConfig() function. Example below shows how to use this API to configure USART.

usart_config_t usartConfig;
usartConfig.baudRate_Bps = 115200U;
usartConfig.parityMode = kUSART_ParityDisabled;
usartConfig.stopBitCount = kUSART_OneStopBit;
USART_Init(USART1, &usartConfig, 20000000U);

Parameters:
  • base – USART peripheral base address.

  • config – Pointer to user-defined configuration structure.

  • srcClock_Hz – USART clock source frequency in HZ.

Return values:
  • kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.

  • kStatus_InvalidArgument – USART base address is not valid

  • kStatus_Success – Status USART initialize succeed

void USART_Deinit(USART_Type *base)

Deinitializes a USART instance.

This function waits for TX complete, disables TX and RX, and disables the USART clock.

Parameters:
  • base – USART peripheral base address.

void USART_GetDefaultConfig(usart_config_t *config)

Gets the default configuration structure.

This function initializes the USART configuration structure to a default value. The default values are: usartConfig->baudRate_Bps = 115200U; usartConfig->parityMode = kUSART_ParityDisabled; usartConfig->stopBitCount = kUSART_OneStopBit; usartConfig->bitCountPerChar = kUSART_8BitsPerChar; usartConfig->loopback = false; usartConfig->enableTx = false; usartConfig->enableRx = false;

Parameters:
  • config – Pointer to configuration structure.

status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz)

Sets the USART instance baud rate.

This function configures the USART module baud rate. This function is used to update the USART module baud rate after the USART module is initialized by the USART_Init.

USART_SetBaudRate(USART1, 115200U, 20000000U);

Parameters:
  • base – USART peripheral base address.

  • baudrate_Bps – USART baudrate to be set.

  • srcClock_Hz – USART clock source frequency in HZ.

Return values:
  • kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.

  • kStatus_Success – Set baudrate succeed.

  • kStatus_InvalidArgument – One or more arguments are invalid.

status_t USART_Enable32kMode(USART_Type *base, uint32_t baudRate_Bps, bool enableMode32k, uint32_t srcClock_Hz)

Enable 32 kHz mode which USART uses clock from the RTC oscillator as the clock source.

Please note that in order to use a 32 kHz clock to operate USART properly, the RTC oscillator and its 32 kHz output must be manully enabled by user, by calling RTC_Init and setting SYSCON_RTCOSCCTRL_EN bit to 1. And in 32kHz clocking mode the USART can only work at 9600 baudrate or at the baudrate that 9600 can evenly divide, eg: 4800, 3200.

Parameters:
  • base – USART peripheral base address.

  • baudRate_Bps – USART baudrate to be set..

  • enableMode32k – true is 32k mode, false is normal mode.

  • srcClock_Hz – USART clock source frequency in HZ.

Return values:
  • kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.

  • kStatus_Success – Set baudrate succeed.

  • kStatus_InvalidArgument – One or more arguments are invalid.

void USART_Enable9bitMode(USART_Type *base, bool enable)

Enable 9-bit data mode for USART.

This function set the 9-bit mode for USART module. The 9th bit is not used for parity thus can be modified by user.

Parameters:
  • base – USART peripheral base address.

  • enable – true to enable, false to disable.

static inline void USART_SetMatchAddress(USART_Type *base, uint8_t address)

Set the USART slave address.

This function configures the address for USART module that works as slave in 9-bit data mode. When the address detection is enabled, the frame it receices with MSB being 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches slave’s own addresses, this slave is addressed. This address frame and its following data frames are stored in the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with unmatched address.

Note

Any USART instance joined in the multi-slave system can work as slave. The position of the address mark is the same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.

Parameters:
  • base – USART peripheral base address.

  • address – USART slave address.

static inline void USART_EnableMatchAddress(USART_Type *base, bool match)

Enable the USART match address feature.

Parameters:
  • base – USART peripheral base address.

  • match – true to enable match address, false to disable.

static inline uint32_t USART_GetStatusFlags(USART_Type *base)

Get USART status flags.

This function get all USART status flags, the flags are returned as the logical OR value of the enumerators _usart_flags. To check a specific status, compare the return value with enumerators in _usart_flags. For example, to check whether the TX is empty:

if (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(USART1))
{
    ...
}

Parameters:
  • base – USART peripheral base address.

Returns:

USART status flags which are ORed by the enumerators in the _usart_flags.

static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)

Clear USART status flags.

This function clear supported USART status flags. The mask is a logical OR of enumeration members. See kUSART_AllClearFlags. For example:

USART_ClearStatusFlags(USART1, kUSART_TxError | kUSART_RxError)

Parameters:
  • base – USART peripheral base address.

  • mask – status flags to be cleared.

static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)

Enables USART interrupts according to the provided mask.

This function enables the USART interrupts according to the provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. For example, to enable TX empty interrupt and RX full interrupt:

USART_EnableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);

Parameters:
  • base – USART peripheral base address.

  • mask – The interrupts to enable. Logical OR of _usart_interrupt_enable.

static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)

Disables USART interrupts according to a provided mask.

This function disables the USART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. This example shows how to disable the TX empty interrupt and RX full interrupt:

USART_DisableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);

Parameters:
  • base – USART peripheral base address.

  • mask – The interrupts to disable. Logical OR of _usart_interrupt_enable.

static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base)

Returns enabled USART interrupts.

This function returns the enabled USART interrupts.

Parameters:
  • base – USART peripheral base address.

static inline void USART_EnableTxDMA(USART_Type *base, bool enable)

Enable DMA for Tx.

static inline void USART_EnableRxDMA(USART_Type *base, bool enable)

Enable DMA for Rx.

static inline void USART_EnableCTS(USART_Type *base, bool enable)

Enable CTS. This function will determine whether CTS is used for flow control.

Parameters:
  • base – USART peripheral base address.

  • enable – Enable CTS or not, true for enable and false for disable.

static inline void USART_EnableContinuousSCLK(USART_Type *base, bool enable)

Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode. Enable this funciton, SCLK will run continuously in synchronous mode, allowing characters to be received on Un_RxD independently from transmission on Un_TXD).

Parameters:
  • base – USART peripheral base address.

  • enable – Enable Continuous Clock generation mode or not, true for enable and false for disable.

static inline void USART_EnableAutoClearSCLK(USART_Type *base, bool enable)

Enable Continuous Clock generation bit auto clear. While enable this cuntion, the Continuous Clock bit is automatically cleared when a complete character has been received. This bit is cleared at the same time.

Parameters:
  • base – USART peripheral base address.

  • enable – Enable auto clear or not, true for enable and false for disable.

static inline void USART_SetRxFifoWatermark(USART_Type *base, uint8_t water)

Sets the rx FIFO watermark.

Parameters:
  • base – USART peripheral base address.

  • water – Rx FIFO watermark.

static inline void USART_SetTxFifoWatermark(USART_Type *base, uint8_t water)

Sets the tx FIFO watermark.

Parameters:
  • base – USART peripheral base address.

  • water – Tx FIFO watermark.

static inline void USART_WriteByte(USART_Type *base, uint8_t data)

Writes to the FIFOWR register.

This function writes data to the txFIFO directly. The upper layer must ensure that txFIFO has space for data to write before calling this function.

Parameters:
  • base – USART peripheral base address.

  • data – The byte to write.

static inline uint8_t USART_ReadByte(USART_Type *base)

Reads the FIFORD register directly.

This function reads data from the rxFIFO directly. The upper layer must ensure that the rxFIFO is not empty before calling this function.

Parameters:
  • base – USART peripheral base address.

Returns:

The byte read from USART data register.

static inline uint8_t USART_GetRxFifoCount(USART_Type *base)

Gets the rx FIFO data count.

Parameters:
  • base – USART peripheral base address.

Returns:

rx FIFO data count.

static inline uint8_t USART_GetTxFifoCount(USART_Type *base)

Gets the tx FIFO data count.

Parameters:
  • base – USART peripheral base address.

Returns:

tx FIFO data count.

void USART_SendAddress(USART_Type *base, uint8_t address)

Transmit an address frame in 9-bit data mode.

Parameters:
  • base – USART peripheral base address.

  • address – USART slave address.

status_t USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length)

Writes to the TX register using a blocking method.

This function polls the TX register, waits for the TX register to be empty or for the TX FIFO to have room and writes data to the TX buffer.

Parameters:
  • base – USART peripheral base address.

  • data – Start address of the data to write.

  • length – Size of the data to write.

Return values:
  • kStatus_USART_Timeout – Transmission timed out and was aborted.

  • kStatus_InvalidArgument – Invalid argument.

  • kStatus_Success – Successfully wrote all data.

status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length)

Read RX data register using a blocking method.

This function polls the RX register, waits for the RX register to be full or for RX FIFO to have data and read data from the TX register.

Parameters:
  • base – USART peripheral base address.

  • data – Start address of the buffer to store the received data.

  • length – Size of the buffer.

Return values:
  • kStatus_USART_FramingError – Receiver overrun happened while receiving data.

  • kStatus_USART_ParityError – Noise error happened while receiving data.

  • kStatus_USART_NoiseError – Framing error happened while receiving data.

  • kStatus_USART_RxError – Overflow or underflow rxFIFO happened.

  • kStatus_USART_Timeout – Transmission timed out and was aborted.

  • kStatus_Success – Successfully received all data.

status_t USART_TransferCreateHandle(USART_Type *base, usart_handle_t *handle, usart_transfer_callback_t callback, void *userData)

Initializes the USART handle.

This function initializes the USART handle which can be used for other USART transactional APIs. Usually, for a specified USART instance, call this API once to get the initialized handle.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • callback – The callback function.

  • userData – The parameter of the callback function.

status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in the IRQ handler, the USART driver calls the callback function and passes the kStatus_USART_TxIdle as status parameter.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • xfer – USART transfer structure. See usart_transfer_t.

Return values:
  • kStatus_Success – Successfully start the data transmission.

  • kStatus_USART_TxBusy – Previous transmission still not finished, data not all written to TX register yet.

  • kStatus_InvalidArgument – Invalid argument.

void USART_TransferStartRingBuffer(USART_Type *base, usart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific USART handle.

When the RX ring buffer is used, data received are stored into the ring buffer even when the user doesn’t call the USART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly.

Note

When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, then only 31 bytes are used for saving data.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • ringBuffer – Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer.

  • ringBufferSize – size of the ring buffer.

void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle)

Get the length of received data in RX ring buffer.

Parameters:
  • handle – USART handle pointer.

Returns:

Length of received data in RX ring buffer.

void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out how many bytes are still not sent out.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)

Get the number of bytes that have been sent out to bus.

This function gets the number of bytes that have been sent out to bus by interrupt method.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • count – Send bytes count.

Return values:
  • kStatus_NoTransferInProgress – No send in progress.

  • kStatus_InvalidArgument – Parameter is invalid.

  • kStatus_Success – Get successfully through the parameter count;

status_t USART_TransferReceiveNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using an interrupt method.

This function receives data using an interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in the ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in the ring buffer is not enough to read, the receive request is saved by the USART driver. When the new data arrives, the receive request is serviced first. When all data is received, the USART driver notifies the upper layer through a callback function and passes the status parameter kStatus_USART_RxIdle. For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer. The 5 bytes are copied to the xfer->data and this function returns with the parameter receivedBytes set to 5. For the left 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to the xfer->data. When all data is received, the upper layer is notified.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • xfer – USART transfer structure, see usart_transfer_t.

  • receivedBytes – Bytes received from the ring buffer directly.

Return values:
  • kStatus_Success – Successfully queue the transfer into transmit queue.

  • kStatus_USART_RxBusy – Previous receive request is not finished.

  • kStatus_InvalidArgument – Invalid argument.

void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle)

Aborts the interrupt-driven data receiving.

This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out how many bytes not received yet.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)

Get the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

  • count – Receive bytes count.

Return values:
  • kStatus_NoTransferInProgress – No receive in progress.

  • kStatus_InvalidArgument – Parameter is invalid.

  • kStatus_Success – Get successfully through the parameter count;

void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)

USART IRQ handle function.

This function handles the USART transmit and receive IRQ request.

Parameters:
  • base – USART peripheral base address.

  • handle – USART handle pointer.

FSL_USART_DRIVER_VERSION

USART driver version.

Error codes for the USART driver.

Values:

enumerator kStatus_USART_TxBusy

Transmitter is busy.

enumerator kStatus_USART_RxBusy

Receiver is busy.

enumerator kStatus_USART_TxIdle

USART transmitter is idle.

enumerator kStatus_USART_RxIdle

USART receiver is idle.

enumerator kStatus_USART_TxError

Error happens on txFIFO.

enumerator kStatus_USART_RxError

Error happens on rxFIFO.

enumerator kStatus_USART_RxRingBufferOverrun

Error happens on rx ring buffer

enumerator kStatus_USART_NoiseError

USART noise error.

enumerator kStatus_USART_FramingError

USART framing error.

enumerator kStatus_USART_ParityError

USART parity error.

enumerator kStatus_USART_BaudrateNotSupport

Baudrate is not support in current clock source

enum _usart_sync_mode

USART synchronous mode.

Values:

enumerator kUSART_SyncModeDisabled

Asynchronous mode.

enumerator kUSART_SyncModeSlave

Synchronous slave mode.

enumerator kUSART_SyncModeMaster

Synchronous master mode.

enum _usart_parity_mode

USART parity mode.

Values:

enumerator kUSART_ParityDisabled

Parity disabled

enumerator kUSART_ParityEven

Parity enabled, type even, bit setting: PE|PT = 10

enumerator kUSART_ParityOdd

Parity enabled, type odd, bit setting: PE|PT = 11

enum _usart_stop_bit_count

USART stop bit count.

Values:

enumerator kUSART_OneStopBit

One stop bit

enumerator kUSART_TwoStopBit

Two stop bits

enum _usart_data_len

USART data size.

Values:

enumerator kUSART_7BitsPerChar

Seven bit mode

enumerator kUSART_8BitsPerChar

Eight bit mode

enum _usart_clock_polarity

USART clock polarity configuration, used in sync mode.

Values:

enumerator kUSART_RxSampleOnFallingEdge

Un_RXD is sampled on the falling edge of SCLK.

enumerator kUSART_RxSampleOnRisingEdge

Un_RXD is sampled on the rising edge of SCLK.

enum _usart_txfifo_watermark

txFIFO watermark values

Values:

enumerator kUSART_TxFifo0

USART tx watermark is empty

enumerator kUSART_TxFifo1

USART tx watermark at 1 item

enumerator kUSART_TxFifo2

USART tx watermark at 2 items

enumerator kUSART_TxFifo3

USART tx watermark at 3 items

enumerator kUSART_TxFifo4

USART tx watermark at 4 items

enumerator kUSART_TxFifo5

USART tx watermark at 5 items

enumerator kUSART_TxFifo6

USART tx watermark at 6 items

enumerator kUSART_TxFifo7

USART tx watermark at 7 items

enum _usart_rxfifo_watermark

rxFIFO watermark values

Values:

enumerator kUSART_RxFifo1

USART rx watermark at 1 item

enumerator kUSART_RxFifo2

USART rx watermark at 2 items

enumerator kUSART_RxFifo3

USART rx watermark at 3 items

enumerator kUSART_RxFifo4

USART rx watermark at 4 items

enumerator kUSART_RxFifo5

USART rx watermark at 5 items

enumerator kUSART_RxFifo6

USART rx watermark at 6 items

enumerator kUSART_RxFifo7

USART rx watermark at 7 items

enumerator kUSART_RxFifo8

USART rx watermark at 8 items

enum _usart_interrupt_enable

USART interrupt configuration structure, default settings all disabled.

Values:

enumerator kUSART_TxErrorInterruptEnable
enumerator kUSART_RxErrorInterruptEnable
enumerator kUSART_TxLevelInterruptEnable
enumerator kUSART_RxLevelInterruptEnable
enumerator kUSART_TxIdleInterruptEnable

Transmitter idle.

enumerator kUSART_CtsChangeInterruptEnable

Change in the state of the CTS input.

enumerator kUSART_RxBreakChangeInterruptEnable

Break condition asserted or deasserted.

enumerator kUSART_RxStartInterruptEnable

Rx start bit detected.

enumerator kUSART_FramingErrorInterruptEnable

Framing error detected.

enumerator kUSART_ParityErrorInterruptEnable

Parity error detected.

enumerator kUSART_NoiseErrorInterruptEnable

Noise error detected.

enumerator kUSART_AutoBaudErrorInterruptEnable

Auto baudrate error detected.

enumerator kUSART_AllInterruptEnables
enum _usart_flags

USART status flags.

This provides constants for the USART status flags for use in the USART functions.

Values:

enumerator kUSART_TxError

TXERR bit, sets if TX buffer is error

enumerator kUSART_RxError

RXERR bit, sets if RX buffer is error

enumerator kUSART_TxFifoEmptyFlag

TXEMPTY bit, sets if TX buffer is empty

enumerator kUSART_TxFifoNotFullFlag

TXNOTFULL bit, sets if TX buffer is not full

enumerator kUSART_RxFifoNotEmptyFlag

RXNOEMPTY bit, sets if RX buffer is not empty

enumerator kUSART_RxFifoFullFlag

RXFULL bit, sets if RX buffer is full

enumerator kUSART_RxIdleFlag

Receiver idle.

enumerator kUSART_TxIdleFlag

Transmitter idle.

enumerator kUSART_CtsAssertFlag

CTS signal high.

enumerator kUSART_CtsChangeFlag

CTS signal changed interrupt status.

enumerator kUSART_BreakDetectFlag

Break detected. Self cleared when rx pin goes high again.

enumerator kUSART_BreakDetectChangeFlag

Break detect change interrupt flag. A change in the state of receiver break detection.

enumerator kUSART_RxStartFlag

Rx start bit detected interrupt flag.

enumerator kUSART_FramingErrorFlag

Framing error interrupt flag.

enumerator kUSART_ParityErrorFlag

parity error interrupt flag.

enumerator kUSART_NoiseErrorFlag

Noise error interrupt flag.

enumerator kUSART_AutobaudErrorFlag

Auto baudrate error interrupt flag, caused by the baudrate counter timeout before the end of start bit.

enumerator kUSART_AllClearFlags
typedef enum _usart_sync_mode usart_sync_mode_t

USART synchronous mode.

typedef enum _usart_parity_mode usart_parity_mode_t

USART parity mode.

typedef enum _usart_stop_bit_count usart_stop_bit_count_t

USART stop bit count.

typedef enum _usart_data_len usart_data_len_t

USART data size.

typedef enum _usart_clock_polarity usart_clock_polarity_t

USART clock polarity configuration, used in sync mode.

typedef enum _usart_txfifo_watermark usart_txfifo_watermark_t

txFIFO watermark values

typedef enum _usart_rxfifo_watermark usart_rxfifo_watermark_t

rxFIFO watermark values

typedef struct _usart_config usart_config_t

USART configuration structure.

typedef struct _usart_transfer usart_transfer_t

USART transfer structure.

typedef struct _usart_handle usart_handle_t
typedef void (*usart_transfer_callback_t)(USART_Type *base, usart_handle_t *handle, status_t status, void *userData)

USART transfer callback function.

typedef void (*flexcomm_usart_irq_handler_t)(USART_Type *base, usart_handle_t *handle)

Typedef for usart interrupt handler.

uint32_t USART_GetInstance(USART_Type *base)

Returns instance number for USART peripheral base address.

USART_FIFOTRIG_TXLVL_GET(base)
USART_FIFOTRIG_RXLVL_GET(base)
UART_RETRY_TIMES

Retry times for waiting flag.

Defining to zero means to keep waiting for the flag until it is assert/deassert in blocking transfer, otherwise the program will wait until the UART_RETRY_TIMES counts down to 0, if the flag still remains unchanged then program will return kStatus_USART_Timeout. It is not advised to use this macro in formal application to prevent any hardware error because the actual wait period is affected by the compiler and optimization.

struct _usart_config
#include <fsl_usart.h>

USART configuration structure.

Public Members

uint32_t baudRate_Bps

USART baud rate

usart_parity_mode_t parityMode

Parity mode, disabled (default), even, odd

usart_stop_bit_count_t stopBitCount

Number of stop bits, 1 stop bit (default) or 2 stop bits

usart_data_len_t bitCountPerChar

Data length - 7 bit, 8 bit

bool loopback

Enable peripheral loopback

bool enableRx

Enable RX

bool enableTx

Enable TX

bool enableContinuousSCLK

USART continuous Clock generation enable in synchronous master mode.

bool enableMode32k

USART uses 32 kHz clock from the RTC oscillator as the clock source.

bool enableHardwareFlowControl

Enable hardware control RTS/CTS

usart_txfifo_watermark_t txWatermark

txFIFO watermark

usart_rxfifo_watermark_t rxWatermark

rxFIFO watermark

usart_sync_mode_t syncMode

Transfer mode select - asynchronous, synchronous master, synchronous slave.

usart_clock_polarity_t clockPolarity

Selects the clock polarity and sampling edge in synchronous mode.

struct _usart_transfer
#include <fsl_usart.h>

USART transfer structure.

Public Members

size_t dataSize

The byte count to be transfer.

struct _usart_handle
#include <fsl_usart.h>

USART handle structure.

Public Members

const uint8_t *volatile txData

Address of remaining data to send.

volatile size_t txDataSize

Size of the remaining data to send.

size_t txDataSizeAll

Size of the data to send out.

uint8_t *volatile rxData

Address of remaining data to receive.

volatile size_t rxDataSize

Size of the remaining data to receive.

size_t rxDataSizeAll

Size of the data to receive.

uint8_t *rxRingBuffer

Start address of the receiver ring buffer.

size_t rxRingBufferSize

Size of the ring buffer.

volatile uint16_t rxRingBufferHead

Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail

Index for the user to get data from the ring buffer.

usart_transfer_callback_t callback

Callback function.

void *userData

USART callback function parameter.

volatile uint8_t txState

TX transfer state.

volatile uint8_t rxState

RX transfer state

uint8_t txWatermark

txFIFO watermark

uint8_t rxWatermark

rxFIFO watermark

union __unnamed32__

Public Members

uint8_t *data

The buffer of data to be transfer.

uint8_t *rxData

The buffer to receive data.

const uint8_t *txData

The buffer of data to be sent.

UTICK: MictoTick Timer Driver

void UTICK_Init(UTICK_Type *base)

Initializes an UTICK by turning its bus clock on.

void UTICK_Deinit(UTICK_Type *base)

Deinitializes a UTICK instance.

This function shuts down Utick bus clock

Parameters:
  • base – UTICK peripheral base address.

uint32_t UTICK_GetStatusFlags(UTICK_Type *base)

Get Status Flags.

This returns the status flag

Parameters:
  • base – UTICK peripheral base address.

Returns:

status register value

void UTICK_ClearStatusFlags(UTICK_Type *base)

Clear Status Interrupt Flags.

This clears intr status flag

Parameters:
  • base – UTICK peripheral base address.

Returns:

none

void UTICK_SetTick(UTICK_Type *base, utick_mode_t mode, uint32_t count, utick_callback_t cb)

Starts UTICK.

This function starts a repeat/onetime countdown with an optional callback

Parameters:
  • base – UTICK peripheral base address.

  • mode – UTICK timer mode (ie kUTICK_onetime or kUTICK_repeat)

  • count – UTICK timer mode (ie kUTICK_onetime or kUTICK_repeat)

  • cb – UTICK callback (can be left as NULL if none, otherwise should be a void func(void))

Returns:

none

void UTICK_HandleIRQ(UTICK_Type *base, utick_callback_t cb)

UTICK Interrupt Service Handler.

This function handles the interrupt and refers to the callback array in the driver to callback user (as per request in UTICK_SetTick()). if no user callback is scheduled, the interrupt will simply be cleared.

Parameters:
  • base – UTICK peripheral base address.

  • cb – callback scheduled for this instance of UTICK

Returns:

none

FSL_UTICK_DRIVER_VERSION

UTICK driver version 2.0.5.

enum _utick_mode

UTICK timer operational mode.

Values:

enumerator kUTICK_Onetime

Trigger once

enumerator kUTICK_Repeat

Trigger repeatedly

typedef enum _utick_mode utick_mode_t

UTICK timer operational mode.

typedef void (*utick_callback_t)(void)

UTICK callback function.

WWDT: Windowed Watchdog Timer Driver

void WWDT_GetDefaultConfig(wwdt_config_t *config)

Initializes WWDT configure structure.

This function initializes the WWDT configure structure to default value. The default value are:

config->enableWwdt = true;
config->enableWatchdogReset = false;
config->enableWatchdogProtect = false;
config->enableLockOscillator = false;
config->windowValue = 0xFFFFFFU;
config->timeoutValue = 0xFFFFFFU;
config->warningValue = 0;

See also

wwdt_config_t

Parameters:
  • config – Pointer to WWDT config structure.

void WWDT_Init(WWDT_Type *base, const wwdt_config_t *config)

Initializes the WWDT.

This function initializes the WWDT. When called, the WWDT runs according to the configuration.

Example:

wwdt_config_t config;
WWDT_GetDefaultConfig(&config);
config.timeoutValue = 0x7ffU;
WWDT_Init(wwdt_base,&config);

Parameters:
  • base – WWDT peripheral base address

  • config – The configuration of WWDT

void WWDT_Deinit(WWDT_Type *base)

Shuts down the WWDT.

This function shuts down the WWDT.

Parameters:
  • base – WWDT peripheral base address

static inline void WWDT_Enable(WWDT_Type *base)

Enables the WWDT module.

This function write value into WWDT_MOD register to enable the WWDT, it is a write-once bit; once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.

Parameters:
  • base – WWDT peripheral base address

static inline void WWDT_Disable(WWDT_Type *base)

Disables the WWDT module.

Deprecated:

Do not use this function. It will be deleted in next release version, for once the bit field of WDEN written with a 1, it can not be re-written with a 0.

This function write value into WWDT_MOD register to disable the WWDT.

Parameters:
  • base – WWDT peripheral base address

static inline uint32_t WWDT_GetStatusFlags(WWDT_Type *base)

Gets all WWDT status flags.

This function gets all status flags.

Example for getting Timeout Flag:

uint32_t status;
status = WWDT_GetStatusFlags(wwdt_base) & kWWDT_TimeoutFlag;

Parameters:
  • base – WWDT peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration _wwdt_status_flags_t

void WWDT_ClearStatusFlags(WWDT_Type *base, uint32_t mask)

Clear WWDT flag.

This function clears WWDT status flag.

Example for clearing warning flag:

WWDT_ClearStatusFlags(wwdt_base, kWWDT_WarningFlag);

Parameters:
  • base – WWDT peripheral base address

  • mask – The status flags to clear. This is a logical OR of members of the enumeration _wwdt_status_flags_t

static inline void WWDT_SetWarningValue(WWDT_Type *base, uint32_t warningValue)

Set the WWDT warning value.

The WDWARNINT register determines the watchdog timer counter value that will generate a watchdog interrupt. When the watchdog timer counter is no longer greater than the value defined by WARNINT, an interrupt will be generated after the subsequent WDCLK.

Parameters:
  • base – WWDT peripheral base address

  • warningValue – WWDT warning value.

static inline void WWDT_SetTimeoutValue(WWDT_Type *base, uint32_t timeoutCount)

Set the WWDT timeout value.

This function sets the timeout value. Every time a feed sequence occurs the value in the TC register is loaded into the Watchdog timer. Writing a value below 0xFF will cause 0xFF to be loaded into the TC register. Thus the minimum time-out interval is TWDCLK*256*4. If enableWatchdogProtect flag is true in wwdt_config_t config structure, any attempt to change the timeout value before the watchdog counter is below the warning and window values will cause a watchdog reset and set the WDTOF flag.

Parameters:
  • base – WWDT peripheral base address

  • timeoutCount – WWDT timeout value, count of WWDT clock tick.

static inline void WWDT_SetWindowValue(WWDT_Type *base, uint32_t windowValue)

Sets the WWDT window value.

The WINDOW register determines the highest TV value allowed when a watchdog feed is performed. If a feed sequence occurs when timer value is greater than the value in WINDOW, a watchdog event will occur. To disable windowing, set windowValue to 0xFFFFFF (maximum possible timer value) so windowing is not in effect.

Parameters:
  • base – WWDT peripheral base address

  • windowValue – WWDT window value.

void WWDT_Refresh(WWDT_Type *base)

Refreshes the WWDT timer.

This function feeds the WWDT. This function should be called before WWDT timer is in timeout. Otherwise, a reset is asserted.

Parameters:
  • base – WWDT peripheral base address

FSL_WWDT_DRIVER_VERSION

Defines WWDT driver version.

WWDT_FIRST_WORD_OF_REFRESH

First word of refresh sequence

WWDT_SECOND_WORD_OF_REFRESH

Second word of refresh sequence

enum _wwdt_status_flags_t

WWDT status flags.

This structure contains the WWDT status flags for use in the WWDT functions.

Values:

enumerator kWWDT_TimeoutFlag

Time-out flag, set when the timer times out

enumerator kWWDT_WarningFlag

Warning interrupt flag, set when timer is below the value WDWARNINT

typedef struct _wwdt_config wwdt_config_t

Describes WWDT configuration structure.

struct _wwdt_config
#include <fsl_wwdt.h>

Describes WWDT configuration structure.

Public Members

bool enableWwdt

Enables or disables WWDT

bool enableWatchdogReset

true: Watchdog timeout will cause a chip reset false: Watchdog timeout will not cause a chip reset

bool enableWatchdogProtect

true: Enable watchdog protect i.e timeout value can only be changed after counter is below warning & window values false: Disable watchdog protect; timeout value can be changed at any time

uint32_t windowValue

Window value, set this to 0xFFFFFF if windowing is not in effect

uint32_t timeoutValue

Timeout value

uint32_t warningValue

Watchdog time counter value that will generate a warning interrupt. Set this to 0 for no warning

uint32_t clockFreq_Hz

Watchdog clock source frequency.