ccm_clockout#
Overview#
The ccm_clockout driver example shows how to output the internal clock signal. In this driver example, users can choose the clock signal to be outputted, and the divider of the output clock signal. By probing the output pin, users can observe the selected internal clock signal. Please note that different targets may have different default clock configurations, so the frequency of the same clock root may be different in different targets even though the dividers are set as the same value.
Supported Boards#
EVKB-IMXRT1050
Hardware requirements
Mini/micro USB cable
EVK_BIMXRT1050 board
Personal Computer
Board settings
Connect pin: No special settings are required.
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP27; To measure the output signal of CLKO2, please use the oscilloscope to probe TP28. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- USB1 PLL Clock(Divided by 2).
2 -- SYS PLL Clock(Divided by 2).
3 -- VIDEO PLL Clock(Divided by 2).
4 -- Semc Clock Root.
5 -- Lcdif Pix Clock Root.
6 -- AHB Clock Root.
7 -- IPG Clock Root.
8 -- Perclk Root.
9 -- Ckil Sync Clock Root.
10 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
1
Theoretically, the output frequency of CLKO1 is 240000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- Usdhc1 Clock Root.
2 -- LPI2C Clock Root.
3 -- CSI Clock Root.
4 -- OSC Clock.
5 -- Usdhc2 Clock Root.
6 -- SAI1 Clock Root.
7 -- SAI2 Clock Root.
8 -- SAI3 Clock Root(Shared with ADC1 and ADC2 alt_clk root).
9 -- Can Clock Root(FlexCAN, shared with CANFD).
10 -- Flexspi Clock Root.
11 -- UART Clock Root.
12 -- Spdif0 Clock Root.
3
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO2 is 6000000 Hz.
Please press any key to continue.
MIMXRT1060-EVKB
Hardware requirements
Mini/micro USB cable
EVK_MIMXRT1060 board
Personal Computer
Board settings
Connect pin: No special settings are required.
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP15; To measure the output signal of CLKO2, please use the oscilloscope to probe TP12. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please press any key to continue.
Please Choose one clock to be outputted on CLKO1.
1 -- USB1 PLL Clock(Divided by 2).
2 -- SYS PLL Clock(Divided by 2).
3 -- VIDEO PLL Clock(Divided by 2).
4 -- Semc Clock Root.
5 -- Lcdif Pix Clock Root.
6 -- AHB Clock Root.
7 -- IPG Clock Root.
8 -- Perclk Root.
9 -- Ckil Sync Clock Root.
10 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO1 is 120000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- Usdhc1 Clock Root.
2 -- LPI2C Clock Root.
3 -- CSI Clock Root.
4 -- OSC Clock.
5 -- Usdhc2 Clock Root.
6 -- SAI1 Clock Root.
7 -- SAI2 Clock Root.
8 -- SAI3 Clock Root(Shared with ADC1 and ADC2 alt_clk root).
9 -- Can Clock Root(FlexCAN, shared with CANFD).
10 -- Flexspi Clock Root.
11 -- UART Clock Root.
12 -- Spdif0 Clock Root.
11
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO2 is 40000000 Hz.
Please press any key to continue.
MIMXRT1060-EVKC
Hardware requirements
Mini/micro USB cable
EVK_MIMXRT1060 board
Personal Computer
Board settings
Connect pin: No special settings are required.
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP15; To measure the output signal of CLKO2, please use the oscilloscope to probe TP12. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please press any key to continue.
Please Choose one clock to be outputted on CLKO1.
1 -- USB1 PLL Clock(Divided by 2).
2 -- SYS PLL Clock(Divided by 2).
3 -- VIDEO PLL Clock(Divided by 2).
4 -- Semc Clock Root.
5 -- Lcdif Pix Clock Root.
6 -- AHB Clock Root.
7 -- IPG Clock Root.
8 -- Perclk Root.
9 -- Ckil Sync Clock Root.
10 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO1 is 120000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- Usdhc1 Clock Root.
2 -- LPI2C Clock Root.
3 -- CSI Clock Root.
4 -- OSC Clock.
5 -- Usdhc2 Clock Root.
6 -- SAI1 Clock Root.
7 -- SAI2 Clock Root.
8 -- SAI3 Clock Root(Shared with ADC1 and ADC2 alt_clk root).
9 -- Can Clock Root(FlexCAN, shared with CANFD).
10 -- Flexspi Clock Root.
11 -- UART Clock Root.
12 -- Spdif0 Clock Root.
11
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO2 is 40000000 Hz.
Please press any key to continue.
FRDM-IMXRT1152
Hardware requirements
Type-C USB cable
FRDM-IMXRT1152 board
Personal Computer
Board settings
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP42; To measure the output signal of CLKO2, please use the oscilloscope to probe TP40. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- OSC_RC_48M_DIV2.
2 -- OSC_24M.
3 -- OSC_RC_400M.
4 -- OSC_RC_16M.
5 -- SYS_PLL2_PFD2.
6 -- SYS_PLL2_CLK.
7 -- SYS_PLL3_PFD1.
8 -- SYS_PLL1_DIV5.
5
Please set the clock divider, range from 1 to 256.
5
Theoretically, the output frequency of CLKO1 is 105600000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- OSC_RC_48M_DIV2.
2 -- OSC_24M.
3 -- OSC_RC_400M.
4 -- OSC_RC_16M.
5 -- SYS_PLL2_PFD3.
6 -- OSC_RC_48M.
7 -- SYS_PLL3_PFD1.
8 -- AUDIO_PLL_CLK.
5
Please set the clock divider, range from 1 to 256.
5
Theoretically, the output frequency of CLKO2 is 9600000 Hz.
Please press any key to continue.
EVK-MIMXRT1010
Hardware requirements
Mini/micro USB cable
EVK-MIMXRT1010 board
Personal Computer
Board settings
No special settings are required.
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP34; To measure the output signal of CLKO2, please use the oscilloscope to probe TP31. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- PLL3 SW Clock(Divided by 2).
2 -- PLL2 Clock(Divided by 2).
3 -- ENET PLL Clock(Divided by 2).
4 -- Core Clock Root.
5 -- IPG Clock Root.
6 -- Perclk Root.
7 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO1 is 120000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- LPI2C Clock Root.
2 -- OSC Clock.
3 -- LPSPI Clock Root.
4 -- SAI1 Clock Root.
5 -- SAI3 Clock Root.
6 -- Trace Clock Root.
7 -- Flexspi Clock Root.
8 -- UART Clock Root.
9 -- Spdif0 Clock Root.
6
Please set the clock divider, range from 1 to 8.
6
Theoretically, the output frequency of CLKO2 is 22000000 Hz.
Please press any key to continue.
EVK-MIMXRT1015
Hardware requirements
Mini/micro USB cable
EVK-MIMXRT1015 board
Personal Computer
Board settings
No special settings are required.
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe D27; To measure the output signal of CLKO2, please use the oscilloscope to probe TP31. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- PLL3 SW Clock.
2 -- PLL2(divided by 2).
3 -- ENET PLL(divided by 2).
4 -- AHB Clock Root.
5 -- IPG Clock Root.
6 -- Perclk Root.
7 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
1
Theoretically, the output frequency of CLKO1 is 240000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- IPI2C Clock Root.
2 -- OSC Clock.
3 -- LPSPI Clock Root.
4 -- SAI1 Clock Root.
5 -- SAI2 Clock Root.
6 -- SAI3 Clock Root.
7 -- Trace Clock Root.
8 -- Flexspi Clock Root.
9 -- UART Clock Root.
10 -- Spdif0 Clock Root.
3
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO2 is 52800000 Hz.
Please press any key to continue.
EVK-MIMXRT1020
Hardware requirements
Mini/micro USB cable
EVK_MIMXRT1020 board
Personal Computer
Board settings
Connect pin: No special settings are required.
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP11; To measure the output signal of CLKO2, please use the oscilloscope to probe TP12. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- PLL3 SW Clock.
2 -- PLL2(divided by 2).
3 -- ENET PLL(divided by 2).
4 -- Semc Clock Root.
5 -- AHB Clock Root.
6 -- IPG Clock Root.
7 -- Perclk Root.
8 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO1 is 120000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- USDHC1 Clock Root.
2 -- LPI2C Clock Root.
3 -- OSC Clock.
4 -- LPSPI Clock Root.
5 -- USDHC2 Clock Root.
6 -- SAI1 Clock Root.
7 -- SAI2 Clock Root.
8 -- SAI3 Clock Root.
9 -- Trace Clock Root.
10 -- Can Clock Root.
11 -- Flexspi Clock Root.
12 -- UART Clock Root.
13 -- Spdif0 Clock Root.
4
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO2 is 52800000 Hz.
Please press any key to continue.
MIMXRT1024-EVK
Hardware requirements
Mini/micro USB cable
MIMXRT1024-EVK board
Personal Computer
Board settings
No special settings are required.
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe J19_20; To measure the output signal of CLKO2, please use the oscilloscope to probe J19_18. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- PLL3 SW Clock.
2 -- PLL2(divided by 2).
3 -- ENET PLL(divided by 2).
4 -- Semc Clock Root.
5 -- AHB Clock Root.
6 -- IPG Clock Root.
7 -- Perclk Root.
8 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
3
Theoretically, the output frequency of CLKO1 is 80000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- Usdhc1 Clock Root.
2 -- IPI2C Clock Root.
3 -- OSC Clock.
4 -- LPSPI Clock Root.
5 -- Usdhc2 Clock Root.
6 -- SAI1 Clock Root.
7 -- SAI2 Clock Root.
8 -- SAI3 Clock Root.
9 -- Trace Clock Root.
10 -- Can Clock Root.
11 -- Flexspi Clock Root.
12 -- UART Clock Root.
13 -- Spdif0 Clock Root.
13
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO2 is 750000 Hz.
Please press any key to continue.
MIMXRT1040-EVK
Hardware requirements
Mini/micro USB cable
EVK_MIMXRT1040 board
Personal Computer
Board settings
Connect pin: No special settings are required.
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP15; To measure the output signal of CLKO2, please use the oscilloscope to probe TP12. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please press any key to continue.
Please Choose one clock to be outputted on CLKO1.
1 -- USB1 PLL Clock(Divided by 2).
2 -- SYS PLL Clock(Divided by 2).
3 -- VIDEO PLL Clock(Divided by 2).
4 -- Semc Clock Root.
5 -- Lcdif Pix Clock Root.
6 -- AHB Clock Root.
7 -- IPG Clock Root.
8 -- Perclk Root.
9 -- Ckil Sync Clock Root.
10 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO1 is 120000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- Usdhc1 Clock Root.
2 -- LPI2C Clock Root.
3 -- CSI Clock Root.
4 -- OSC Clock.
5 -- Usdhc2 Clock Root.
6 -- SAI1 Clock Root.
7 -- SAI2 Clock Root.
8 -- SAI3 Clock Root(Shared with ADC1 and ADC2 alt_clk root).
9 -- Can Clock Root(FlexCAN, shared with CANFD).
10 -- Flexspi Clock Root.
11 -- UART Clock Root.
12 -- Spdif0 Clock Root.
11
Please set the clock divider, range from 1 to 8.
2
Theoretically, the output frequency of CLKO2 is 40000000 Hz.
Please press any key to continue.
EVK-MIMXRT1064
Hardware requirements
Mini/micro USB cable
EVK-MIMXRT1064 board
Personal Computer
Board settings
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP27; To measure the output signal of CLKO2, please use the oscilloscope to probe TP28. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- USB1 PLL Clock(Divided by 2).
2 -- SYS PLL Clock(Divided by 2).
3 -- VIDEO PLL Clock(Divided by 2).
4 -- Semc Clock Root.
5 -- Lcdif Pix Clock Root.
6 -- AHB Clock Root.
7 -- IPG Clock Root.
8 -- Perclk Root.
9 -- Ckil Sync Clock Root.
10 -- PLL4 Main Clock.
1
Please set the clock divider, range from 1 to 8.
5
Theoretically, the output frequency of CLKO1 is 48000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- Usdhc1 Clock Root.
2 -- LPI2C Clock Root.
3 -- CSI Clock Root.
4 -- OSC Clock.
5 -- Usdhc2 Clock Root.
6 -- SAI1 Clock Root.
7 -- SAI2 Clock Root.
8 -- SAI3 Clock Root(Shared with ADC1 and ADC2 alt_clk root).
9 -- Can Clock Root(FlexCAN, shared with CANFD).
10 -- Flexspi Clock Root.
11 -- UART Clock Root.
12 -- Spdif0 Clock Root.
MIMXRT1160-EVK
Hardware requirements
Mini/micro USB cable
MIMXRT1160-EVK board
Personal Computer
Board settings
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP1002; To measure the output signal of CLKO2, please use the oscilloscope to probe TP1003. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- OSC_RC_48M_DIV2.
2 -- OSC_24M.
3 -- OSC_RC_400M.
4 -- OSC_RC_16M.
5 -- SYS_PLL2_PFD2.
6 -- SYS_PLL2_CLK.
7 -- SYS_PLL3_PFD1.
8 -- SYS_PLL1_DIV5.
5
Please set the clock divider, range from 1 to 256.
5
Theoretically, the output frequency of CLKO1 is 105600000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- OSC_RC_48M_DIV2.
2 -- OSC_24M.
3 -- OSC_RC_400M.
4 -- OSC_RC_16M.
5 -- SYS_PLL2_PFD3.
6 -- OSC_RC_48M.
7 -- SYS_PLL3_PFD1.
8 -- AUDIO_PLL_CLK.
5
Please set the clock divider, range from 1 to 256.
5
Theoretically, the output frequency of CLKO2 is 9600000 Hz.
Please press any key to continue.
MIMXRT1170-EVKB
Hardware requirements
Mini/micro USB cable
MIMXRT1170-EVKB board
Personal Computer
Board settings
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP1002; To measure the output signal of CLKO2, please use the oscilloscope to probe TP1003. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- OSC_RC_48M_DIV2.
2 -- OSC_24M.
3 -- OSC_RC_400M.
4 -- OSC_RC_16M.
5 -- SYS_PLL2_PFD2.
6 -- SYS_PLL2_CLK.
7 -- SYS_PLL3_PFD1.
8 -- SYS_PLL1_DIV5.
5
Please set the clock divider, range from 1 to 256.
5
Theoretically, the output frequency of CLKO1 is 105600000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- OSC_RC_48M_DIV2.
2 -- OSC_24M.
3 -- OSC_RC_400M.
4 -- OSC_RC_16M.
5 -- SYS_PLL2_PFD3.
6 -- OSC_RC_48M.
7 -- SYS_PLL3_PFD1.
8 -- AUDIO_PLL_CLK.
5
Please set the clock divider, range from 1 to 256.
5
Theoretically, the output frequency of CLKO2 is 9600000 Hz.
Please press any key to continue.
MIMXRT1180-EVK
Hardware requirements
Mini/micro USB cable
MIMXRT1180-EVK board
Personal Computer
Board settings
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP94; To measure the output signal of CLKO2, please use the oscilloscope to probe TP95. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- OSC_RC_24M.
2 -- OSC_RC_400M.
3 -- PLL_480_DIV2.
4 -- PLL_1G_DIV2.
1
Please set the clock divider, range from 1 to 256.
12
Theoretically, the output frequency of CLKO1 is 33333333 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- OSC_RC_24M.
2 -- OSC_RC_400M.
3 -- PLL_1G_DIV5.
4 -- PLL_ARM.
4
Please set the clock divider, range from 1 to 256.
10
Theoretically, the output frequency of CLKO2 is 2400000 Hz.
Please press any key to continue.
FRDM-IMXRT1186
Hardware requirements
Type-C USB cable
FRDM-IMXRT1186 board
Personal Computer
Board settings
Prepare the Demo
Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
Open a serial terminal with the following settings:
115200 baud rate
8 data bits
No parity
One stop bit
No flow control
Download the program to the target board.
Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
Running the demo
To measure the output signal of CLKO1, please use the oscilloscope to probe TP57; To measure the output signal of CLKO2, please use the oscilloscope to probe TP58. These instructions are displayed/shown on the terminal window:
Clock Output Driver Example.
Please Choose one clock to be outputted on CLKO1.
1 -- OSC_RC_24M.
2 -- OSC_RC_400M.
3 -- PLL_480_DIV2.
4 -- PLL_1G_DIV2.
1
Please set the clock divider, range from 1 to 256.
12
Theoretically, the output frequency of CLKO1 is 2000000 Hz.
Please Choose one clock to be outputted on CLKO2.
1 -- OSC_RC_24M.
2 -- OSC_RC_400M.
3 -- PLL_1G_DIV5.
4 -- PLL_ARM.
4
Please set the clock divider, range from 1 to 256.
10
Theoretically, the output frequency of CLKO2 is 79200000 Hz.
Please press any key to continue.