The fxps7250.h contains the FXPS7250 pressure sensor register definitions, access macros, and its bit mask. More...

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Data Structures
union	FXPS7250_DEVSTAT_t

union	FXPS7250_DEVSTAT1_t

union	FXPS7250_DEVSTAT2_t

union	FXPS7250_DEVSTAT3_t

union	FXPS7250_DEVLOCK_WR_t

union	FXPS7250_UF_REGION_W_t

union	FXPS7250_UF_REGION_R_t

union	FXPS7250_COMMTYPE_t

union	FXPS7250_SOURCEID_0_t

union	FXPS7250_SOURCEID_1_t

union	FXPS7250_TIMING_CFG_t

union	FXPS7250_SPI_CFG_t

union	FXPS7250_DSP_CFG_U1_t

union	FXPS7250_DSP_CFG_U4_t

union	FXPS7250_DSP_CFG_U5_t

union	FXPS7250_INT_CFG_t

union	FXPS7250_DSP_STAT_t

union	FXPS7250_DEVSTAT_COPY_t

Macros
#define	FXPS7250D4_WHOAMI_VALUE (0xC4)

#define	FXPS7250_DEVSTAT_DEVINIT_MASK ((uint8_t) 0x01)

#define	FXPS7250_DEVSTAT_DEVINIT_SHIFT ((uint8_t) 0)

#define	FXPS7250_DEVSTAT_DEVRES_MASK ((uint8_t) 0x02)

#define	FXPS7250_DEVSTAT_DEVRES_SHIFT ((uint8_t) 1)

#define	FXPS7250_DEVSTAT_TESTMODE_MASK ((uint8_t) 0x04)

#define	FXPS7250_DEVSTAT_TESTMODE_SHIFT ((uint8_t) 2)

#define	FXPS7250_DEVSTAT_SUPPLY_ERR_MASK ((uint8_t) 0x08)

#define	FXPS7250_DEVSTAT_SUPPLY_ERR_SHIFT ((uint8_t) 3)

#define	FXPS7250_DEVSTAT_MEMTEMP_ERR_MASK ((uint8_t) 0x10)

#define	FXPS7250_DEVSTAT_MEMTEMP_ERR_SHIFT ((uint8_t) 4)

#define	FXPS7250_DEVSTAT_COMM_ERR_MASK ((uint8_t) 0x20)

#define	FXPS7250_DEVSTAT_COMM_ERR_SHIFT ((uint8_t) 5)

#define	FXPS7250_DEVSTAT_DSP_ERR_MASK ((uint8_t) 0x80)

#define	FXPS7250_DEVSTAT_DSP_ERR_SHIFT ((uint8_t) 7)

#define	FXPS7250_DEVSTAT_DEVINIT_INIT ((uint8_t) 0x01) /* Indicates if the device is initializing. */

#define	FXPS7250_DEVSTAT_DEVINIT_NORMAL ((uint8_t) 0x00) /* Device is operating normally. */

#define	FXPS7250_DEVSTAT_DEVRES_RESET ((uint8_t) 0x02) /* Indicates if the device has reset. */

#define	FXPS7250_DEVSTAT_DEVRES_NOT_RESET ((uint8_t) 0x00) /* Device is operating normally. */

#define	FXPS7250_DEVSTAT_TESTMODE_ISACTIVE ((uint8_t) 0x04) /* Indicates if the device is in test mode. */

#define	FXPS7250_DEVSTAT_TESTMODE_INACTIVE ((uint8_t) 0x00) /* Test mode is not active. */

#define	FXPS7250_DEVSTAT_SUPPLY_ERR ((uint8_t) 0x08) /* Indicates if an error is flagged in DEVSTAT1. */

#define	FXPS7250_DEVSTAT_NOT_SUPPLY_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT1. */

#define	FXPS7250_DEVSTAT_MEMTEMP_ERR ((uint8_t) 0x10) /* Indicates if an error is flagged in DEVSTAT2. */

#define	FXPS7250_DEVSTAT_NOT_MEMTEMP_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT2. */

#define	FXPS7250_DEVSTAT_COMM_ERR ((uint8_t) 0x20) /* Indicates if an error is flagged in DEVSTAT3. */

#define	FXPS7250_DEVSTAT_NOT_COMM_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT3. */

#define	FXPS7250_DEVSTAT_DSP_ERR ((uint8_t) 0x80) /* Indicates if an error is flagged in the pressure DSP. */

#define	FXPS7250_DEVSTAT_NOT_DSP_ERR ((uint8_t) 0x00) /* No error is flagged in the pressure DSP. */

#define	FXPS7250_DEVSTAT1_CONT_ERR_MASK ((uint8_t) 0x01)

#define	FXPS7250_DEVSTAT1_CONT_ERR_SHIFT ((uint8_t) 0)

#define	FXPS7250_DEVSTAT1_INTREGF_ERR_MASK ((uint8_t) 0x02)

#define	FXPS7250_DEVSTAT1_INTREGF_ERR_SHIFT ((uint8_t) 1)

#define	FXPS7250_DEVSTAT1_INTREG_ERR_MASK ((uint8_t) 0x04)

#define	FXPS7250_DEVSTAT1_INTREG_ERR_SHIFT ((uint8_t) 2)

#define	FXPS7250_DEVSTAT1_INTREGA_ERR_MASK ((uint8_t) 0x08)

#define	FXPS7250_DEVSTAT1_INTREGA_ERR_SHIFT ((uint8_t) 3)

#define	FXPS7250_DEVSTAT1_VCCOV_ERR_MASK ((uint8_t) 0x20)

#define	FXPS7250_DEVSTAT1_VCCOV_ERR_SHIFT ((uint8_t) 5)

#define	FXPS7250_DEVSTAT1_VCCUV_ERR_MASK ((uint8_t) 0x80)

#define	FXPS7250_DEVSTAT1_VCCUV_ERR_SHIFT ((uint8_t) 7)

#define	FXPS7250_DEVSTAT1_CONT_ERR ((uint8_t) 0x01) /* Indicates if an error is flagged by the continuity monitor. */

#define	FXPS7250_DEVSTAT1_NO_CONT_ERR ((uint8_t) 0x00) /* No error is flagged by the continuity monitor. */

#define	FXPS7250_DEVSTAT1_INTREGF_ERR ((uint8_t) 0x02) /* Indicates if the OTP regulator voltage is out of range. */

#define	FXPS7250_DEVSTAT1_NO_INTREGF_ERR ((uint8_t) 0x00) /* The OTP regulator voltage is in range. */

#define	FXPS7250_DEVSTAT1_INTREG_ERR ((uint8_t) 0x04) /* Indicates if the digital regulator voltage is out of range. */

#define	FXPS7250_DEVSTAT1_NO_INTREG_ERR ((uint8_t) 0x00) /* The digital regulator voltage is in range. */

#define	FXPS7250_DEVSTAT1_INTREGA_ERR ((uint8_t) 0x08) /* Indicates if the analog regulator voltage is out of range. */

#define	FXPS7250_DEVSTAT1_NO_INTREGA_ERR ((uint8_t) 0x00) /* The analog regulator voltage is out of range. */

#define	FXPS7250_DEVSTAT1_VCCOV_ERR ((uint8_t) 0x20) /* Indicates if the Vcc voltage goes above the recommended maximum level. */

#define	FXPS7250_DEVSTAT1_NO_VCCOV_ERR ((uint8_t) 0x00) /* The Vcc voltage is below the recommended maximum level. */

#define	FXPS7250_DEVSTAT1_VCCUV_ERR ((uint8_t) 0x80) /* Indicates if the Vcc voltage goes below the recommended minimum level. */

#define	FXPS7250_DEVSTAT1_NO_VCCUV_ERR ((uint8_t) 0x00) /* The Vcc voltage is above the recommended minimum level. */

#define	FXPS7250_DEVSTAT2_TEMP0_ERR_MASK ((uint8_t) 0x04)

#define	FXPS7250_DEVSTAT2_TEMP0_ERR_SHIFT ((uint8_t) 2)

#define	FXPS7250_DEVSTAT2_U_W_ACTIVE_MASK ((uint8_t) 0x10)

#define	FXPS7250_DEVSTAT2_U_W_ACTIVE_SHIFT ((uint8_t) 4)

#define	FXPS7250_DEVSTAT2_U_RW_ERR_MASK ((uint8_t) 0x20)

#define	FXPS7250_DEVSTAT2_U_RW_ERR_SHIFT ((uint8_t) 5)

#define	FXPS7250_DEVSTAT2_U_OTP_ERR_MASK ((uint8_t) 0x40)

#define	FXPS7250_DEVSTAT2_U_OTP_ERR_SHIFT ((uint8_t) 6)

#define	FXPS7250_DEVSTAT2_F_OTP_ERR_MASK ((uint8_t) 0x80)

#define	FXPS7250_DEVSTAT2_F_OTP_ERR_SHIFT ((uint8_t) 7)

#define	FXPS7250_DEVSTAT2_TEMP0_ERR ((uint8_t) 0x02) /* Indicates if temperature is outside of the recommended range. */

#define	FXPS7250_DEVSTAT2_TEMP0_OK ((uint8_t) 0x00) /* Indicates if temperature is inside of the recommended range. */

#define	FXPS7250_DEVSTAT2_U_W_ACTIVE ((uint8_t) 0x10) /* Indicates if a user initiated OTP write is in progress. */

#define	FXPS7250_DEVSTAT2_U_W_INACTIVE ((uint8_t) 0x00) /* Indicates if a user initiated OTP write is in progress. */

#define	FXPS7250_DEVSTAT2_U_RW_ERR ((uint8_t) 0x20) /* Indicates if there is an error present in any user writable */

#define	FXPS7250_DEVSTAT2_NO_U_RW_ERR ((uint8_t) 0x00) /* Indicates if there are no errors present in any user writable */

#define	FXPS7250_DEVSTAT2_U_OTP_ERR ((uint8_t) 0x40) /* Indicates if a fault is detected in the user OTP array. */

#define	FXPS7250_DEVSTAT2_NO_U_OTP_ERR ((uint8_t) 0x00) /* Indicates if no faults are detected in the user OTP array. */

#define	FXPS7250_DEVSTAT2_F_OTP_ERR ((uint8_t) 0x80) /* Indicates if a fault is detected in the factory OTP array. */

#define	FXPS7250_DEVSTAT2_NO_F_OTP_ERR ((uint8_t) 0x00) /* Indicates if no faults are detected in the factory OTP array. */

#define	FXPS7250_DEVSTAT3_OSCTRAIN_ERR_MASK ((uint8_t) 0x40)

#define	FXPS7250_DEVSTAT3_OSCTRAIN_ERR_SHIFT ((uint8_t) 6)

#define	FXPS7250_DEVSTAT3_MISO_ERR_MASK ((uint8_t) 0x80)

#define	FXPS7250_DEVSTAT3_MISO_ERR_SHIFT ((uint8_t) 7)

#define	FXPS7250_DEVSTAT3_OSCTRAIN_ERR ((uint8_t) 0x40) /* Indicates if an error is detected in the oscillator settings */

#define	FXPS7250_DEVSTAT3_NO_OSCTRAIN_ERR ((uint8_t) 0x00) /* Indicates if no error is detected in the oscillator settings */

#define	FXPS7250_DEVSTAT3_MISO_ERR ((uint8_t) 0x80) /* Indicates if a data mismatch has occurred in the MISO data set. */

#define	FXPS7250_DEVSTAT3_NO_MISO_ERR ((uint8_t) 0x00) /* Indicates if no data mismatch has occurred in the MISO data set. */

#define	FXPS7250_DEVLOCK_WR_RESET_MASK ((uint8_t) 0x01)

#define	FXPS7250_DEVLOCK_WR_RESET_SHIFT ((uint8_t) 0)

#define	FXPS7250_DEVLOCK_WR_SUP_ERR_MASK ((uint8_t) 0x08)

#define	FXPS7250_DEVLOCK_WR_SUP_ERR_SHIFT ((uint8_t) 3)

#define	FXPS7250_DEVLOCK_WR_ENDINIT_MASK ((uint8_t) 0x80)

#define	FXPS7250_DEVLOCK_WR_ENDINIT_SHIFT ((uint8_t) 7)

#define	FXPS7250_DEVLOCK_WR_RESET00 ((uint8_t) 0x00) /* First element in the reset sequence. */

#define	FXPS7250_DEVLOCK_WR_RESET01 ((uint8_t) 0x01) /* Final element in the reset sequence. */

#define	FXPS7250_DEVLOCK_WR_RESET10 ((uint8_t) 0x02) /* No Effect. */

#define	FXPS7250_DEVLOCK_WR_RESET11 ((uint8_t) 0x03) /* Second element in the reset sequence. */

#define	FXPS7250_DEVLOCK_WR_SUP_BLOCKED ((uint8_t) 0x08) /* Indicates if supply error reporting is blocked by the user. */

#define	FXPS7250_DEVLOCK_WR_SUP_ALLOWED ((uint8_t) 0x00) /* Indicates if supply error reporting is allowed by the user. */

#define	FXPS7250_DEVLOCK_WR_ENDINIT_FINISHED ((uint8_t) 0x80) /* Indicates if the device has finished initializing. */

#define	FXPS7250_DEVLOCK_WR_ENDINIT_RUNNING ((uint8_t) 0x00) /* Indicates if the device is still initializing. */

#define	FXPS7250_UF_REGION_W_REGION_LOAD_MASK ((uint8_t) 0xA0)

#define	FXPS7250_UF_REGION_W_REGION_LOAD_SHIFT ((uint8_t) 4)

#define	FXPS7250_UF_REGION_W_REGION_LOAD_A0_AF ((uint8_t) 0xA0) /* Loads addresses A0 through AF */

#define	FXPS7250_UF_REGION_W_REGION_LOAD_B0_BF ((uint8_t) 0xB0) /* Loads addresses B0 through BF */

#define	FXPS7250_UF_REGION_W_REGION_LOAD_C0_CF ((uint8_t) 0xC0) /* Loads addresses C0 through CF */

#define	FXPS7250_UF_REGION_W_REGION_LOAD_D0_DF ((uint8_t) 0xD0) /* Loads addresses D0 through DF */

#define	FXPS7250_UF_REGION_W_REGION_LOAD_E0_EF ((uint8_t) 0xE0) /* Loads addresses E0 through EF */

#define	FXPS7250_UF_REGION_W_REGION_LOAD_F0_FF ((uint8_t) 0xF0) /* Loads addresses F0 through FF */

#define	FXPS7250_UF_REGION_R_REGION_ACTIVE_MASK ((uint8_t) 0xA0)

#define	FXPS7250_UF_REGION_R_REGION_ACTIVE_SHIFT ((uint8_t) 4)

#define	FXPS7250_UF_REGION_W_REGION_ACTIVE_00 ((uint8_t) 0x00) /* Load of addresses is in progress. */

#define	FXPS7250_UF_REGION_W_REGION_ACTIVE_A0_AF ((uint8_t) 0xA0) /* Reads addresses A0 through AF. Must be loaded first. */

#define	FXPS7250_UF_REGION_W_REGION_ACTIVE_B0_BF ((uint8_t) 0xB0) /* Reads addresses B0 through BF. Must be loaded first. */

#define	FXPS7250_UF_REGION_W_REGION_ACTIVE_C0_CF ((uint8_t) 0xC0) /* Reads addresses C0 through CF. Must be loaded first. */

#define	FXPS7250_UF_REGION_W_REGION_ACTIVE_D0_DF ((uint8_t) 0xD0) /* Reads addresses D0 through DF. Must be loaded first. */

#define	FXPS7250_UF_REGION_W_REGION_ACTIVE_E0_EF ((uint8_t) 0xE0) /* Reads addresses E0 through EF. Must be loaded first. */

#define	FXPS7250_UF_REGION_W_REGION_ACTIVE_F0_FF ((uint8_t) 0xF0) /* Reads addresses F0 through FF. Must be loaded first. */

#define	FXPS7250_COMMTYPE_COMMTYPE_MASK ((uint8_t) 0x00)

#define	FXPS7250_COMMTYPE_COMMTYPE_SHIFT ((uint8_t) 0)

#define	FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG0 ((uint8_t) 0x00) /* 32-bit SPI communication protocol with no internal test, in debug mode */

#define	FXPS7250_COMMTYPE_32BIT_SPI_SELFTEST ((uint8_t) 0x01) /* 32-bit SPI communication protocol with internal test on startup */

#define	FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG1 ((uint8_t) 0x02) /* 32-bit SPI communication protocol with no internal test, in debug mode */

#define	FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG2 ((uint8_t) 0x04) /* 32-bit SPI communication protocol with no internal test, in debug mode */

#define	FXPS7250_COMMTYPE_I2C_PIN3_INT0 ((uint8_t) 0x06) /* I2C communication protocol, with PIN 3 working as an interrupt */

#define	FXPS7250_COMMTYPE_I2C_PIN3_INT1 ((uint8_t) 0x07) /* I2C communication protocol, with PIN 3 working as an interrupt */

#define	FXPS7250_SOURCEID_0_SOURCEID_0_MASK ((uint8_t) 0x01)

#define	FXPS7250_SOURCEID_0_SOURCEID_0_SHIFT ((uint8_t) 0)

#define	FXPS7250_SOURCEID_0_SID0_EN_MASK ((uint8_t) 0x80)

#define	FXPS7250_SOURCEID_0_SID0_EN_SHIFT ((uint8_t) 7)

#define	FXPS7250_SOURCEID_0_SOURCEID_0 ((uint8_t) 0x01) /* The stream of data to be sent if sid0_en is true */

#define	FXPS7250_SOURCEID_0_SID0_EN ((uint8_t) 0x80) /* Enables reading of data or an error response for those source-id bits */

#define	FXPS7250_SOURCEID_1_SOURCEID_1_MASK ((uint8_t) 0x01)

#define	FXPS7250_SOURCEID_1_SOURCEID_1_SHIFT ((uint8_t) 0)

#define	FXPS7250_SOURCEID_1_SID1_EN_MASK ((uint8_t) 0x80)

#define	FXPS7250_SOURCEID_1_SID1_EN_SHIFT ((uint8_t) 7)

#define	FXPS7250_SOURCEID_1_SOURCEID_10 ((uint8_t) 0x01) /* Stream of data that is sent if sid1_en is true */

#define	FXPS7250_SOURCEID_1_SID1_EN ((uint8_t) 0x80) /* Enables reading of data or an error response for those source-id bits */

#define	FXPS7250_TIMING_CFG_CK_CAL_EN_MASK ((uint8_t) 0x01)

#define	FXPS7250_TIMING_CFG_CK_CAL_EN_SHIFT ((uint8_t) 0)

#define	FXPS7250_TIMING_CFG_CK_CAL_RST_MASK ((uint8_t) 0x08)

#define	FXPS7250_TIMING_CFG_CK_CAL_RST_SHIFT ((uint8_t) 3)

#define	FXPS7250_TIMING_CFG_OSCTRAIN_SEL_MASK ((uint8_t) 0x10)

#define	FXPS7250_TIMING_CFG_OSCTRAIN_SEL_SHIFT ((uint8_t) 4)

#define	FXPS7250_TIMING_CFG_CK_CAL_EN ((uint8_t) 0x01) /* Enables clock oscillator training over SPI or I2C */

#define	FXPS7250_TIMING_CFG_CK_CAL_EN_DIS ((uint8_t) 0x00) /* Clock oscillator training is disabled */

#define	FXPS7250_TIMING_CFG_CK_CAL_RST ((uint8_t) 0x08) /* Resets the oscillator training to default */

#define	FXPS7250_TIMING_CFG_CK_CAL_KEEP ((uint8_t) 0x00) /* Training value is maintained at last trained value */

#define	FXPS7250_TIMING_CFG_OSCTRAIN_SEL ((uint8_t) 0x10) /* Sets the protocol to SPI if FXPS7250_COMMTYPE_COMMTYPE=0x00 or */

#define	FXPS7250_TIMING_CFG_OSCTRAIN_DISABLE ((uint8_t) 0x00) /* Disables oscillator training. */

#define	FXPS7250_SPI_CFG_SPICRCSEED_MASK ((uint8_t) 0x01)

#define	FXPS7250_SPI_CFG_SPICRCSEED_SHIFT ((uint8_t) 0)

#define	FXPS7250_SPI_CFG_SPI_CRC_LEN_MASK ((uint8_t) 0x10)

#define	FXPS7250_SPI_CFG_SPI_CRC_LEN_SHIFT ((uint8_t) 4)

#define	FXPS7250_SPI_CFG_DATASIZE_MASK ((uint8_t) 0x40)

#define	FXPS7250_SPI_CFG_DATASIZE_SHIFT ((uint8_t) 6)

#define	FXPS7250_SPI_CFG_SPICRCSEED ((uint8_t) 0x01) /* CRCSeed is non-zero. For use with CRC_LEN. */

#define	FXPS7250_SPI_CFG_SPICRCSEED_ZERO ((uint8_t) 0x00) /* CRCSeed is zero. For use with CRC_LEN. */

#define	FXPS7250_SPI_CFG_SPI_CRC_LEN_00 ((uint8_t) 0x00) /* Sets the length of the CRC Seed to 8, 4, or 3 bits */

#define	FXPS7250_SPI_CFG_SPI_CRC_LEN_01 ((uint8_t) 0x10) /* Sets the length of the CRC Seed to 8, 4, or 3 bits */

#define	FXPS7250_SPI_CFG_SPI_CRC_LEN_10 ((uint8_t) 0x20) /* Sets the length of the CRC Seed to 8, 4, or 3 bits */

#define	FXPS7250_SPI_CFG_SPI_CRC_LEN_11 ((uint8_t) 0x30) /* Sets the length of the CRC Seed to 8, 4, or 3 bits */

#define	FXPS7250_SPI_CFG_DATASIZE_16 ((uint8_t) 0x40) /* Sets SPI datafield size to 16 bits. */

#define	FXPS7250_SPI_CFG_DATASIZE_12 ((uint8_t) 0x00) /* Sets SPI datafield size to 12 bits. */

#define	FXPS7250_WHO_AM_I_MASK ((uint8_t) 0x01)

#define	FXPS7250_WHO_AM_I_SHIFT ((uint8_t) 0)

#define	FXPS7250_WHO_AM_I_1 ((uint8_t) 0x01) /* Non-zero value in the register returns the value in the register. */

#define	FXPS7250_WHO_AM_I_DEFAULT ((uint8_t) 0x00) /* A zero value WHO_AM_I register returns the default value: C4h. */

#define	FXPS7250_DSP_CFG_U1_USER_RANGE_MASK ((uint8_t) 0x00)

#define	FXPS7250_DSP_CFG_U1_USER_RANGE_SHIFT ((uint8_t) 0)

#define	FXPS7250_DSP_CFG_U1_LPF_MASK ((uint8_t) 0x10)

#define	FXPS7250_DSP_CFG_U1_LPF_SHIFT ((uint8_t) 5)

#define	FXPS7250_DSP_CFG_U1_LPF_370HZ_2POLE ((uint8_t) 0x00) /* Default Low Pass Filter at 370hz and 2-pole. */

#define	FXPS7250_DSP_CFG_U1_LPF_400HZ_3POLE ((uint8_t) 0x10) /* Alternate Low Pass Filter at 400hz and 3-pole. */

#define	FXPS7250_DSP_CFG_U1_LPF_800HZ_4POLE ((uint8_t) 0x20) /* Alternate Low Pass Filter at 800hz and 4-pole. */

#define	FXPS7250_DSP_CFG_U1_LPF_1000HZ_4POLE ((uint8_t) 0x40) /* Alternate Low Pass Filter at 1000hz and 4-pole. */

#define	FXPS7250_DSP_CFG_U4_INT_OUT_MASK ((uint8_t) 0x04)

#define	FXPS7250_DSP_CFG_U4_INT_OUT_SHIFT ((uint8_t) 2)

#define	FXPS7250_DSP_CFG_U4_INT_OUT_ACTIVE_HIGH_PULL_DOWN ((uint8_t) 0x00) /* Open Drain, Active High with Pull-down Current. */

#define	FXPS7250_DSP_CFG_U4_INT_OUT_ACTIVE_LOW_PULL_UP ((uint8_t) 0x04) /* Open Drain, Active Low with Pull-up Current. */

#define	FXPS7250_DSP_CFG_U5_ST_CTRL_MASK ((uint8_t) 0x10)

#define	FXPS7250_DSP_CFG_U5_ST_CTRL_SHIFT ((uint8_t) 4)

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_NORMAL_SIGNAL ((uint8_t) 0x00) /* SNS_DATAx_X Contains: 16-bit Absolute Pressure. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_P_CELL_MODE_VERIFICATION ((uint8_t) 0x10) /* SNS_DATAx_X Contains: 16-bit Absolute Pressure. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE0 ((uint8_t) 0x40) /* SNS_DATAx_X Contains: 0x0000. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE1 ((uint8_t) 0x50) /* SNS_DATAx_X Contains: 0xAAAA. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE2 ((uint8_t) 0x60) /* SNS_DATAx_X Contains: 0x5555. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE3 ((uint8_t) 0x70) /* SNS_DATAx_X Contains: 0xFFFF. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST0 ((uint8_t) 0xC0) /* SNS_DATAx_X Contains: Digital Self Test Output. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST1 ((uint8_t) 0xD0) /* SNS_DATAx_X Contains: Digital Self Test Output. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST2 ((uint8_t) 0xE0) /* SNS_DATAx_X Contains: Digital Self Test Output. */

#define	FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST3 ((uint8_t) 0xF0) /* SNS_DATAx_X Contains: Digital Self Test Output. */

#define	FXPS7250_INT_CFG_INT_POLARITY_MASK ((uint8_t) 0x08)

#define	FXPS7250_INT_CFG_INT_POLARITY_SHIFT ((uint8_t) 3)

#define	FXPS7250_INT_CFG_INT_PS_MASK ((uint8_t) 0x10)

#define	FXPS7250_INT_CFG_INT_PS_SHIFT ((uint8_t) 4)

#define	FXPS7250_INT_CFG_INT_POLARITY_OUTSIDE_RANGE ((uint8_t) 0x00) /* Interrupt activates if values are outside of the range. */

#define	FXPS7250_INT_CFG_INT_POLARITY_INSIDE_RANGE ((uint8_t) 0x08) /* Interrupt activates if values are inside of the range. */

#define	FXPS7250_INT_CFG_INT_PS_00 ((uint8_t) 0x00) /* Pulse Stretch of 0ms. */

#define	FXPS7250_INT_CFG_INT_PS_01 ((uint8_t) 0x10) /* Pulse Stretch of 16,000ms - 16,512ms. */

#define	FXPS7250_INT_CFG_INT_PS_10 ((uint8_t) 0x20) /* Pulse Stretch of 64,000ms - 60,512ms. */

#define	FXPS7250_INT_CFG_INT_PS_11 ((uint8_t) 0x30) /* Pulse Stretch of 256,000ms - 256,512ms. */

#define	FXPS7250_DSP_STAT_ST_ERROR_MASK ((uint8_t) 0x01)

#define	FXPS7250_DSP_STAT_ST_ERROR_SHIFT ((uint8_t) 0)

#define	FXPS7250_DSP_STAT_CM_ERROR_MASK ((uint8_t) 0x02)

#define	FXPS7250_DSP_STAT_CM_ERROR_SHIFT ((uint8_t) 1)

#define	FXPS7250_DSP_STAT_ST_ACTIVE_MASK ((uint8_t) 0x04)

#define	FXPS7250_DSP_STAT_ST_ACTIVE_SHIFT ((uint8_t) 2)

#define	FXPS7250_DSP_STAT_ST_INCMPLT_MASK ((uint8_t) 0x08)

#define	FXPS7250_DSP_STAT_ST_INCMPLT_SHIFT ((uint8_t) 3)

#define	FXPS7250_DSP_STAT_PABS_LOW_MASK ((uint8_t) 0x20)

#define	FXPS7250_DSP_STAT_PABS_LOW_SHIFT ((uint8_t) 5)

#define	FXPS7250_DSP_STAT_PABS_HIGH_MASK ((uint8_t) 0x40)

#define	FXPS7250_DSP_STAT_PABS_HIGH_SHIFT ((uint8_t) 6)

#define	FXPS7250_DSP_STAT_ST_ERROR_CLR ((uint8_t) 0x00) /* No Self-Test Error has been flagged. */

#define	FXPS7250_DSP_STAT_ST_ERROR_FLAGGED ((uint8_t) 0x01) /* A Self-Test Error has been flagged. */

#define	FXPS7250_DSP_STAT_CM_ERROR_CLR ((uint8_t) 0x00) /* No Common Mode Error has been flagged. */

#define	FXPS7250_DSP_STAT_CM_ERROR_FLAGGED ((uint8_t) 0x02) /* A Common Mode Error has been flagged. */

#define	FXPS7250_DSP_STAT_ST_ACTIVE_INACTIVE ((uint8_t) 0x00) /* No Self-Test Mode is currently active. */

#define	FXPS7250_DSP_STAT_ST_ACTIVE_ACTIVE ((uint8_t) 0x04) /* A Self-Test Mode is currently active. */

#define	FXPS7250_DSP_STAT_ST_INCMPLT_FALSE ((uint8_t) 0x00) /* An analog or digital Self-Test has been run since the last reset. */

#define	FXPS7250_DSP_STAT_ST_INCMPLT_TRUE ((uint8_t) 0x08) /* An analog or digital Self-Test has not been run since the last reset. */

#define	FXPS7250_DSP_STAT_PABS_LOW_IN_RANGE ((uint8_t) 0x00) /* Absolute Pressure is below the out-of-range lower limit */

#define	FXPS7250_DSP_STAT_PABS_LOW_NOT_IN_RANGE ((uint8_t) 0x20) /* Absolute Pressure is above the out-of-range lower limit */

#define	FXPS7250_DSP_STAT_PABS_HIGH_IN_RANGE ((uint8_t) 0x00) /* Absolute Pressure is below the out-of-range higher limit */

#define	FXPS7250_DSP_STAT_PABS_HIGH_NOT_IN_RANGE ((uint8_t) 0x40) /* Absolute Pressure is above the out-of-range higher limit */

#define	FXPS7250_DEVSTAT_DEVINIT_MASK ((uint8_t) 0x01)

#define	FXPS7250_DEVSTAT_DEVINIT_SHIFT ((uint8_t) 0)

#define	FXPS7250_DEVSTAT_DEVRES_MASK ((uint8_t) 0x02)

#define	FXPS7250_DEVSTAT_DEVRES_SHIFT ((uint8_t) 1)

#define	FXPS7250_DEVSTAT_TESTMODE_MASK ((uint8_t) 0x04)

#define	FXPS7250_DEVSTAT_TESTMODE_SHIFT ((uint8_t) 2)

#define	FXPS7250_DEVSTAT_SUPPLY_ERR_MASK ((uint8_t) 0x08)

#define	FXPS7250_DEVSTAT_SUPPLY_ERR_SHIFT ((uint8_t) 3)

#define	FXPS7250_DEVSTAT_MEMTEMP_ERR_MASK ((uint8_t) 0x10)

#define	FXPS7250_DEVSTAT_MEMTEMP_ERR_SHIFT ((uint8_t) 4)

#define	FXPS7250_DEVSTAT_COMM_ERR_MASK ((uint8_t) 0x20)

#define	FXPS7250_DEVSTAT_COMM_ERR_SHIFT ((uint8_t) 5)

#define	FXPS7250_DEVSTAT_DSP_ERR_MASK ((uint8_t) 0x80)

#define	FXPS7250_DEVSTAT_DSP_ERR_SHIFT ((uint8_t) 7)

#define	FXPS7250_DEVSTAT_DEVINIT_INIT ((uint8_t) 0x01) /* Indicates if the device is initializing. */

#define	FXPS7250_DEVSTAT_DEVINIT_NOT_INIT ((uint8_t) 0x00) /* Device is operating normally. */

#define	FXPS7250_DEVSTAT_DEVRES_RESET ((uint8_t) 0x02) /* Indicates if the device has reset. */

#define	FXPS7250_DEVSTAT_DEVRES_NOT_RESET ((uint8_t) 0x00) /* Device is operating normally. */

#define	FXPS7250_DEVSTAT_TESTMODE_ISACTIVE ((uint8_t) 0x04) /* Indicates if the device is in test mode. */

#define	FXPS7250_DEVSTAT_TESTMODE_INACTIVE ((uint8_t) 0x00) /* Test mode is not active. */

#define	FXPS7250_DEVSTAT_SUPPLY_ERR ((uint8_t) 0x08) /* Indicates if an error is flagged in DEVSTAT1. */

#define	FXPS7250_DEVSTAT_NOT_SUPPLY_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT1. */

#define	FXPS7250_DEVSTAT_MEMTEMP_ERR ((uint8_t) 0x10) /* Indicates if an error is flagged in DEVSTAT2. */

#define	FXPS7250_DEVSTAT_NOT_MEMTEMP_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT2. */

#define	FXPS7250_DEVSTAT_COMM_ERR ((uint8_t) 0x20) /* Indicates if an error is flagged in DEVSTAT3. */

#define	FXPS7250_DEVSTAT_NOT_COMM_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT3. */

#define	FXPS7250_DEVSTAT_DSP_ERR ((uint8_t) 0x80) /* Indicates if an error is flagged in the pressure DSP. */

#define	FXPS7250_DEVSTAT_NOT_DSP_ERR ((uint8_t) 0x00) /* No error is flagged in the pressure DSP. */

Typedefs
typedef uint8_t	FXPS7250_COUNT_t

typedef uint8_t	FXPS7250_TEMP_t

typedef uint8_t	FXPS7250_WHO_AM_I_t

typedef uint8_t	FXPS7250_I2C_ADDRESS_t

typedef uint8_t	FXPS7250_PIN_INT_HI_L_t

typedef uint8_t	FXPS7250_PIN_INT_HI_M_t

typedef uint8_t	FXPS7250_PIN_INT_LO_L_t

typedef uint8_t	FXPS7250_PIN_INT_LO_H_t

typedef uint8_t	FXPS7250_P_CAL_ZERO_L_t

typedef uint8_t	FXPS7250_P_TGT2_LSB_t

typedef uint8_t	FXPS7250_SNSDATA0_L_t

typedef uint8_t	FXPS7250_SNSDATA0_H_t

typedef uint8_t	FXPS7250_SNSDATA1_L_t

typedef uint8_t	FXPS7250_SNSDATA1_H_t

typedef uint8_t	FXPS7250_SNSDATA_TIME0_t

typedef uint8_t	FXPS7250_SNSDATA_TIME1_t

typedef uint8_t	FXPS7250_SNSDATA_TIME2_t

typedef uint8_t	FXPS7250_SNSDATA_TIME3_t

typedef uint8_t	FXPS7250_SNSDATA_TIME4_t

typedef uint8_t	FXPS7250_SNSDATA_TIME5_t

typedef uint8_t	FXPS7250_P_MAX_L_t

typedef uint8_t	FXPS7250_P_MAX_H_t

typedef uint8_t	FXPS7250_P_MIN_L_t

typedef uint8_t	FXPS7250_P_MIN_H_t

typedef uint8_t	FXPS7250_FRT0_t

typedef uint8_t	FXPS7250_FRT1_t

typedef uint8_t	FXPS7250_FRT2_t

typedef uint8_t	FXPS7250_FRT3_t

typedef uint8_t	FXPS7250_FRT4_t

typedef uint8_t	FXPS7250_FRT5_t

typedef uint8_t	FXPS7250_ICTYPEID_t

typedef uint8_t	FXPS7250_ICREVID_t

typedef uint8_t	FXPS7250_ICMFGID_t

typedef uint8_t	FXPS7250_PN0_t

typedef uint8_t	FXPS7250_PN1_t

typedef uint8_t	FXPS7250_SN0_t

typedef uint8_t	FXPS7250_SN1_t

typedef uint8_t	FXPS7250_SN2_t

typedef uint8_t	FXPS7250_SN3_t

typedef uint8_t	FXPS7250_SN4_t

typedef uint8_t	FXPS7250_ASICWFR_t

typedef uint8_t	FXPS7250_ASICWFR_X_t

typedef uint8_t	FXPS7250_ASICWFR_Y_t

typedef uint8_t	FXPS7250_ASICWLOT_L_t

typedef uint8_t	FXPS7250_ASICWLOT_H_t

typedef uint8_t	FXPS7250_TRNS1WFR_X_t

typedef uint8_t	FXPS7250_TRNS1WFR_Y_t

typedef uint8_t	FXPS7250_TRNS1LOT_L_t

typedef uint8_t	FXPS7250_TRNS1LOT_H_t

Enumerations
enum	{ FXPS7250_COUNT = 0x00, FXPS7250_DEVSTAT = 0x01, FXPS7250_DEVSTAT1 = 0x02, FXPS7250_DEVSTAT2 = 0x03, FXPS7250_DEVSTAT3 = 0x04, FXPS7250_TEMPERATURE = 0x0E, FXPS7250_DEVLOCK_WR = 0x10, FXPS7250_UF_REGION_W = 0x14, FXPS7250_UF_REGION_R = 0x15, FXPS7250_COMMTYPE = 0x16, FXPS7250_SOURCEID_0 = 0x1A, FXPS7250_SOURCEID_1 = 0x1B, FXPS7250_TIMING_CFG = 0x22, FXPS7250_SPI_CFG = 0x3D, FXPS7250_WHO_AM_I = 0x3E, FXPS7250_I2C_ADDRESS = 0x3F, FXPS7250_DSP_CFG_U1 = 0x40, FXPS7250_DSP_CFG_U2 = 0x41, FXPS7250_DSP_CFG_U3 = 0x42, FXPS7250_DSP_CFG_U4 = 0x43, FXPS7250_DSP_CFG_U5 = 0x44, FXPS7250_INT_CFG = 0x45, FXPS7250_P_INT_HI_L = 0x46, FXPS7250_P_INT_HI_H = 0x47, FXPS7250_P_INT_LO_L = 0x48, FXPS7250_P_INT_LO_H = 0x49, FXPS7250_P_CAL_ZERO_L = 0x4C, FXPS7250_P_CAL_ZERO_H = 0x4D, FXPS7250_DSP_STAT = 0x60, FXPS7250_DEVSTAT_COPY = 0x61, FXPS7250_SNSDATA0_L = 0x62, FXPS7250_SNSDATA0_H = 0x63, FXPS7250_SNSDATA1_L = 0x64, FXPS7250_SNSDATA1_H = 0x65, FXPS7250_SNSDATA0_TIME0 = 0x66, FXPS7250_SNSDATA0_TIME1 = 0x67, FXPS7250_SNSDATA0_TIME2 = 0x68, FXPS7250_SNSDATA0_TIME3 = 0x69, FXPS7250_SNSDATA0_TIME4 = 0x6A, FXPS7250_SNSDATA0_TIME5 = 0x6B, FXPS7250_P_MAX_L = 0x6C, FXPS7250_P_MAX_H = 0x6D, FXPS7250_P_MIN_L = 0x6E, FXPS7250_P_MIN_H = 0x6F, FXPS7250_FRT0 = 0x78, FXPS7250_FRT1 = 0x79, FXPS7250_FRT2 = 0x7A, FXPS7250_FRT3 = 0x7B, FXPS7250_FRT4 = 0x7C, FXPS7250_FRT5 = 0x7D, FXPS7250_DSP_CFG_F = 0xA0, FXPS7250_CRC_F_A = 0xAF, FXPS7250_CRC_F_B = 0xBF, FXPS7250_ICTYPEID = 0xC0, FXPS7250_ICREVID = 0xC1, FXPS7250_ICMFGID = 0xC2, FXPS7250_PN0 = 0xC4, FXPS7250_PN1 = 0xC5, FXPS7250_SN0 = 0xC6, FXPS7250_SN1 = 0xC7, FXPS7250_SN2 = 0xC8, FXPS7250_SN3 = 0xC9, FXPS7250_SN4 = 0xCA, FXPS7250_ASICWFR = 0xCB, FXPS7250_ASICWFR_X = 0xCC, FXPS7250_ASICWFR_Y = 0xCD, FXPS7250_CRC_F_C = 0xCF, FXPS7250_ASICWLOT_L = 0xD0, FXPS7250_ASICWLOT_H = 0xD1, FXPS7250_CRC_F_D = 0xDF, FXPS7250_USERDATA_0 = 0xE0, FXPS7250_USERDATA_1 = 0xE1, FXPS7250_USERDATA_2 = 0xE2, FXPS7250_USERDATA_3 = 0xE3, FXPS7250_USERDATA_4 = 0xE4, FXPS7250_USERDATA_5 = 0xE5, FXPS7250_USERDATA_6 = 0xE6, FXPS7250_USERDATA_7 = 0xE7, FXPS7250_USERDATA_8 = 0xE8, FXPS7250_USERDATA_9 = 0xE9, FXPS7250_USERDATA_A = 0xEA, FXPS7250_USERDATA_B = 0xEB, FXPS7250_USERDATA_C = 0xEC, FXPS7250_USERDATA_D = 0xED, FXPS7250_USERDATA_E = 0xEE, FXPS7250_CRC_UF0 = 0xEF, FXPS7250_USERDATA_10 = 0xF0, FXPS7250_USERDATA_11 = 0xF1, FXPS7250_USERDATA_12 = 0xF2, FXPS7250_USERDATA_13 = 0xF3, FXPS7250_USERDATA_14 = 0xF4, FXPS7250_USERDATA_15 = 0xF5, FXPS7250_USERDATA_16 = 0xF6, FXPS7250_USERDATA_17 = 0xF7, FXPS7250_USERDATA_18 = 0xF8, FXPS7250_USERDATA_19 = 0xF9, FXPS7250_USERDATA_1A = 0xFA, FXPS7250_USERDATA_1B = 0xFB, FXPS7250_USERDATA_1C = 0xFC, FXPS7250_USERDATA_1D = 0xFD, FXPS7250_USERDATA_1E = 0xFE, FXPS7250_CRC_UF1 = 0xFF }

Detailed Description

The fxps7250.h contains the FXPS7250 pressure sensor register definitions, access macros, and its bit mask.

Definition in file dbap.h.

Macro Definition Documentation

◆ FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG0

#define FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG0 ((uint8_t) 0x00) /* 32-bit SPI communication protocol with no internal test, in debug mode */

Definition at line 512 of file dbap.h.

◆ FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG1

#define FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG1 ((uint8_t) 0x02) /* 32-bit SPI communication protocol with no internal test, in debug mode */

Definition at line 514 of file dbap.h.

◆ FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG2

#define FXPS7250_COMMTYPE_32BIT_SPI_NO_SELFTEST_DEBUG2 ((uint8_t) 0x04) /* 32-bit SPI communication protocol with no internal test, in debug mode */

Definition at line 515 of file dbap.h.

◆ FXPS7250_COMMTYPE_32BIT_SPI_SELFTEST

#define FXPS7250_COMMTYPE_32BIT_SPI_SELFTEST ((uint8_t) 0x01) /* 32-bit SPI communication protocol with internal test on startup */

Definition at line 513 of file dbap.h.

◆ FXPS7250_COMMTYPE_COMMTYPE_MASK

#define FXPS7250_COMMTYPE_COMMTYPE_MASK ((uint8_t) 0x00)

Definition at line 505 of file dbap.h.

◆ FXPS7250_COMMTYPE_COMMTYPE_SHIFT

#define FXPS7250_COMMTYPE_COMMTYPE_SHIFT ((uint8_t) 0)

Definition at line 506 of file dbap.h.

◆ FXPS7250_COMMTYPE_I2C_PIN3_INT0

#define FXPS7250_COMMTYPE_I2C_PIN3_INT0 ((uint8_t) 0x06) /* I2C communication protocol, with PIN 3 working as an interrupt */

Definition at line 516 of file dbap.h.

◆ FXPS7250_COMMTYPE_I2C_PIN3_INT1

#define FXPS7250_COMMTYPE_I2C_PIN3_INT1 ((uint8_t) 0x07) /* I2C communication protocol, with PIN 3 working as an interrupt */

Definition at line 517 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_ENDINIT_FINISHED

#define FXPS7250_DEVLOCK_WR_ENDINIT_FINISHED ((uint8_t) 0x80) /* Indicates if the device has finished initializing. */

Definition at line 418 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_ENDINIT_MASK

#define FXPS7250_DEVLOCK_WR_ENDINIT_MASK ((uint8_t) 0x80)

Definition at line 405 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_ENDINIT_RUNNING

#define FXPS7250_DEVLOCK_WR_ENDINIT_RUNNING ((uint8_t) 0x00) /* Indicates if the device is still initializing. */

Definition at line 419 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_ENDINIT_SHIFT

#define FXPS7250_DEVLOCK_WR_ENDINIT_SHIFT ((uint8_t) 7)

Definition at line 406 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_RESET00

#define FXPS7250_DEVLOCK_WR_RESET00 ((uint8_t) 0x00) /* First element in the reset sequence. */

Definition at line 412 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_RESET01

#define FXPS7250_DEVLOCK_WR_RESET01 ((uint8_t) 0x01) /* Final element in the reset sequence. */

Definition at line 413 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_RESET10

#define FXPS7250_DEVLOCK_WR_RESET10 ((uint8_t) 0x02) /* No Effect. */

Definition at line 414 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_RESET11

#define FXPS7250_DEVLOCK_WR_RESET11 ((uint8_t) 0x03) /* Second element in the reset sequence. */

Definition at line 415 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_RESET_MASK

#define FXPS7250_DEVLOCK_WR_RESET_MASK ((uint8_t) 0x01)

Definition at line 399 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_RESET_SHIFT

#define FXPS7250_DEVLOCK_WR_RESET_SHIFT ((uint8_t) 0)

Definition at line 400 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_SUP_ALLOWED

#define FXPS7250_DEVLOCK_WR_SUP_ALLOWED ((uint8_t) 0x00) /* Indicates if supply error reporting is allowed by the user. */

Definition at line 417 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_SUP_BLOCKED

#define FXPS7250_DEVLOCK_WR_SUP_BLOCKED ((uint8_t) 0x08) /* Indicates if supply error reporting is blocked by the user. */

Definition at line 416 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_SUP_ERR_MASK

#define FXPS7250_DEVLOCK_WR_SUP_ERR_MASK ((uint8_t) 0x08)

Definition at line 402 of file dbap.h.

◆ FXPS7250_DEVLOCK_WR_SUP_ERR_SHIFT

#define FXPS7250_DEVLOCK_WR_SUP_ERR_SHIFT ((uint8_t) 3)

Definition at line 403 of file dbap.h.

◆ FXPS7250_DEVSTAT1_CONT_ERR

#define FXPS7250_DEVSTAT1_CONT_ERR ((uint8_t) 0x01) /* Indicates if an error is flagged by the continuity monitor. */

Definition at line 259 of file dbap.h.

◆ FXPS7250_DEVSTAT1_CONT_ERR_MASK

#define FXPS7250_DEVSTAT1_CONT_ERR_MASK ((uint8_t) 0x01)

Definition at line 237 of file dbap.h.

◆ FXPS7250_DEVSTAT1_CONT_ERR_SHIFT

#define FXPS7250_DEVSTAT1_CONT_ERR_SHIFT ((uint8_t) 0)

Definition at line 238 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREG_ERR

#define FXPS7250_DEVSTAT1_INTREG_ERR ((uint8_t) 0x04) /* Indicates if the digital regulator voltage is out of range. */

Definition at line 263 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREG_ERR_MASK

#define FXPS7250_DEVSTAT1_INTREG_ERR_MASK ((uint8_t) 0x04)

Definition at line 243 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREG_ERR_SHIFT

#define FXPS7250_DEVSTAT1_INTREG_ERR_SHIFT ((uint8_t) 2)

Definition at line 244 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREGA_ERR

#define FXPS7250_DEVSTAT1_INTREGA_ERR ((uint8_t) 0x08) /* Indicates if the analog regulator voltage is out of range. */

Definition at line 265 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREGA_ERR_MASK

#define FXPS7250_DEVSTAT1_INTREGA_ERR_MASK ((uint8_t) 0x08)

Definition at line 246 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREGA_ERR_SHIFT

#define FXPS7250_DEVSTAT1_INTREGA_ERR_SHIFT ((uint8_t) 3)

Definition at line 247 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREGF_ERR

#define FXPS7250_DEVSTAT1_INTREGF_ERR ((uint8_t) 0x02) /* Indicates if the OTP regulator voltage is out of range. */

Definition at line 261 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREGF_ERR_MASK

#define FXPS7250_DEVSTAT1_INTREGF_ERR_MASK ((uint8_t) 0x02)

Definition at line 240 of file dbap.h.

◆ FXPS7250_DEVSTAT1_INTREGF_ERR_SHIFT

#define FXPS7250_DEVSTAT1_INTREGF_ERR_SHIFT ((uint8_t) 1)

Definition at line 241 of file dbap.h.

◆ FXPS7250_DEVSTAT1_NO_CONT_ERR

#define FXPS7250_DEVSTAT1_NO_CONT_ERR ((uint8_t) 0x00) /* No error is flagged by the continuity monitor. */

Definition at line 260 of file dbap.h.

◆ FXPS7250_DEVSTAT1_NO_INTREG_ERR

#define FXPS7250_DEVSTAT1_NO_INTREG_ERR ((uint8_t) 0x00) /* The digital regulator voltage is in range. */

Definition at line 264 of file dbap.h.

◆ FXPS7250_DEVSTAT1_NO_INTREGA_ERR

#define FXPS7250_DEVSTAT1_NO_INTREGA_ERR ((uint8_t) 0x00) /* The analog regulator voltage is out of range. */

Definition at line 266 of file dbap.h.

◆ FXPS7250_DEVSTAT1_NO_INTREGF_ERR

#define FXPS7250_DEVSTAT1_NO_INTREGF_ERR ((uint8_t) 0x00) /* The OTP regulator voltage is in range. */

Definition at line 262 of file dbap.h.

◆ FXPS7250_DEVSTAT1_NO_VCCOV_ERR

#define FXPS7250_DEVSTAT1_NO_VCCOV_ERR ((uint8_t) 0x00) /* The Vcc voltage is below the recommended maximum level. */

Definition at line 268 of file dbap.h.

◆ FXPS7250_DEVSTAT1_NO_VCCUV_ERR

#define FXPS7250_DEVSTAT1_NO_VCCUV_ERR ((uint8_t) 0x00) /* The Vcc voltage is above the recommended minimum level. */

Definition at line 270 of file dbap.h.

◆ FXPS7250_DEVSTAT1_VCCOV_ERR

#define FXPS7250_DEVSTAT1_VCCOV_ERR ((uint8_t) 0x20) /* Indicates if the Vcc voltage goes above the recommended maximum level. */

Definition at line 267 of file dbap.h.

◆ FXPS7250_DEVSTAT1_VCCOV_ERR_MASK

#define FXPS7250_DEVSTAT1_VCCOV_ERR_MASK ((uint8_t) 0x20)

Definition at line 249 of file dbap.h.

◆ FXPS7250_DEVSTAT1_VCCOV_ERR_SHIFT

#define FXPS7250_DEVSTAT1_VCCOV_ERR_SHIFT ((uint8_t) 5)

Definition at line 250 of file dbap.h.

◆ FXPS7250_DEVSTAT1_VCCUV_ERR

#define FXPS7250_DEVSTAT1_VCCUV_ERR ((uint8_t) 0x80) /* Indicates if the Vcc voltage goes below the recommended minimum level. */

Definition at line 269 of file dbap.h.

◆ FXPS7250_DEVSTAT1_VCCUV_ERR_MASK

#define FXPS7250_DEVSTAT1_VCCUV_ERR_MASK ((uint8_t) 0x80)

Definition at line 252 of file dbap.h.

◆ FXPS7250_DEVSTAT1_VCCUV_ERR_SHIFT

#define FXPS7250_DEVSTAT1_VCCUV_ERR_SHIFT ((uint8_t) 7)

Definition at line 253 of file dbap.h.

◆ FXPS7250_DEVSTAT2_F_OTP_ERR

#define FXPS7250_DEVSTAT2_F_OTP_ERR ((uint8_t) 0x80) /* Indicates if a fault is detected in the factory OTP array. */

Definition at line 325 of file dbap.h.

◆ FXPS7250_DEVSTAT2_F_OTP_ERR_MASK

#define FXPS7250_DEVSTAT2_F_OTP_ERR_MASK ((uint8_t) 0x80)

Definition at line 308 of file dbap.h.

◆ FXPS7250_DEVSTAT2_F_OTP_ERR_SHIFT

#define FXPS7250_DEVSTAT2_F_OTP_ERR_SHIFT ((uint8_t) 7)

Definition at line 309 of file dbap.h.

◆ FXPS7250_DEVSTAT2_NO_F_OTP_ERR

#define FXPS7250_DEVSTAT2_NO_F_OTP_ERR ((uint8_t) 0x00) /* Indicates if no faults are detected in the factory OTP array. */

Definition at line 326 of file dbap.h.

◆ FXPS7250_DEVSTAT2_NO_U_OTP_ERR

#define FXPS7250_DEVSTAT2_NO_U_OTP_ERR ((uint8_t) 0x00) /* Indicates if no faults are detected in the user OTP array. */

Definition at line 324 of file dbap.h.

◆ FXPS7250_DEVSTAT2_NO_U_RW_ERR

#define FXPS7250_DEVSTAT2_NO_U_RW_ERR ((uint8_t) 0x00) /* Indicates if there are no errors present in any user writable */

Definition at line 321 of file dbap.h.

◆ FXPS7250_DEVSTAT2_TEMP0_ERR

#define FXPS7250_DEVSTAT2_TEMP0_ERR ((uint8_t) 0x02) /* Indicates if temperature is outside of the recommended range. */

Definition at line 315 of file dbap.h.

◆ FXPS7250_DEVSTAT2_TEMP0_ERR_MASK

#define FXPS7250_DEVSTAT2_TEMP0_ERR_MASK ((uint8_t) 0x04)

Definition at line 296 of file dbap.h.

◆ FXPS7250_DEVSTAT2_TEMP0_ERR_SHIFT

#define FXPS7250_DEVSTAT2_TEMP0_ERR_SHIFT ((uint8_t) 2)

Definition at line 297 of file dbap.h.

◆ FXPS7250_DEVSTAT2_TEMP0_OK

#define FXPS7250_DEVSTAT2_TEMP0_OK ((uint8_t) 0x00) /* Indicates if temperature is inside of the recommended range. */

Definition at line 316 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_OTP_ERR

#define FXPS7250_DEVSTAT2_U_OTP_ERR ((uint8_t) 0x40) /* Indicates if a fault is detected in the user OTP array. */

Definition at line 323 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_OTP_ERR_MASK

#define FXPS7250_DEVSTAT2_U_OTP_ERR_MASK ((uint8_t) 0x40)

Definition at line 305 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_OTP_ERR_SHIFT

#define FXPS7250_DEVSTAT2_U_OTP_ERR_SHIFT ((uint8_t) 6)

Definition at line 306 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_RW_ERR

#define FXPS7250_DEVSTAT2_U_RW_ERR ((uint8_t) 0x20) /* Indicates if there is an error present in any user writable */

Definition at line 319 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_RW_ERR_MASK

#define FXPS7250_DEVSTAT2_U_RW_ERR_MASK ((uint8_t) 0x20)

Definition at line 302 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_RW_ERR_SHIFT

#define FXPS7250_DEVSTAT2_U_RW_ERR_SHIFT ((uint8_t) 5)

Definition at line 303 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_W_ACTIVE

#define FXPS7250_DEVSTAT2_U_W_ACTIVE ((uint8_t) 0x10) /* Indicates if a user initiated OTP write is in progress. */

Definition at line 317 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_W_ACTIVE_MASK

#define FXPS7250_DEVSTAT2_U_W_ACTIVE_MASK ((uint8_t) 0x10)

Definition at line 299 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_W_ACTIVE_SHIFT

#define FXPS7250_DEVSTAT2_U_W_ACTIVE_SHIFT ((uint8_t) 4)

Definition at line 300 of file dbap.h.

◆ FXPS7250_DEVSTAT2_U_W_INACTIVE

#define FXPS7250_DEVSTAT2_U_W_INACTIVE ((uint8_t) 0x00) /* Indicates if a user initiated OTP write is in progress. */

Definition at line 318 of file dbap.h.

◆ FXPS7250_DEVSTAT3_MISO_ERR

#define FXPS7250_DEVSTAT3_MISO_ERR ((uint8_t) 0x80) /* Indicates if a data mismatch has occurred in the MISO data set. */

Definition at line 364 of file dbap.h.

◆ FXPS7250_DEVSTAT3_MISO_ERR_MASK

#define FXPS7250_DEVSTAT3_MISO_ERR_MASK ((uint8_t) 0x80)

Definition at line 352 of file dbap.h.

◆ FXPS7250_DEVSTAT3_MISO_ERR_SHIFT

#define FXPS7250_DEVSTAT3_MISO_ERR_SHIFT ((uint8_t) 7)

Definition at line 353 of file dbap.h.

◆ FXPS7250_DEVSTAT3_NO_MISO_ERR

#define FXPS7250_DEVSTAT3_NO_MISO_ERR ((uint8_t) 0x00) /* Indicates if no data mismatch has occurred in the MISO data set. */

Definition at line 365 of file dbap.h.

◆ FXPS7250_DEVSTAT3_NO_OSCTRAIN_ERR

#define FXPS7250_DEVSTAT3_NO_OSCTRAIN_ERR ((uint8_t) 0x00) /* Indicates if no error is detected in the oscillator settings */

Definition at line 362 of file dbap.h.

◆ FXPS7250_DEVSTAT3_OSCTRAIN_ERR

#define FXPS7250_DEVSTAT3_OSCTRAIN_ERR ((uint8_t) 0x40) /* Indicates if an error is detected in the oscillator settings */

Definition at line 360 of file dbap.h.

◆ FXPS7250_DEVSTAT3_OSCTRAIN_ERR_MASK

#define FXPS7250_DEVSTAT3_OSCTRAIN_ERR_MASK ((uint8_t) 0x40)

Definition at line 349 of file dbap.h.

◆ FXPS7250_DEVSTAT3_OSCTRAIN_ERR_SHIFT

#define FXPS7250_DEVSTAT3_OSCTRAIN_ERR_SHIFT ((uint8_t) 6)

Definition at line 350 of file dbap.h.

◆ FXPS7250_DEVSTAT_COMM_ERR [1/2]

#define FXPS7250_DEVSTAT_COMM_ERR ((uint8_t) 0x20) /* Indicates if an error is flagged in DEVSTAT3. */

Definition at line 1021 of file dbap.h.

◆ FXPS7250_DEVSTAT_COMM_ERR [2/2]

#define FXPS7250_DEVSTAT_COMM_ERR ((uint8_t) 0x20) /* Indicates if an error is flagged in DEVSTAT3. */

Definition at line 1021 of file dbap.h.

◆ FXPS7250_DEVSTAT_COMM_ERR_MASK [1/2]

#define FXPS7250_DEVSTAT_COMM_ERR_MASK ((uint8_t) 0x20)

Definition at line 1001 of file dbap.h.

◆ FXPS7250_DEVSTAT_COMM_ERR_MASK [2/2]

#define FXPS7250_DEVSTAT_COMM_ERR_MASK ((uint8_t) 0x20)

Definition at line 1001 of file dbap.h.

◆ FXPS7250_DEVSTAT_COMM_ERR_SHIFT [1/2]

#define FXPS7250_DEVSTAT_COMM_ERR_SHIFT ((uint8_t) 5)

Definition at line 1002 of file dbap.h.

◆ FXPS7250_DEVSTAT_COMM_ERR_SHIFT [2/2]

#define FXPS7250_DEVSTAT_COMM_ERR_SHIFT ((uint8_t) 5)

Definition at line 1002 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVINIT_INIT [1/2]

#define FXPS7250_DEVSTAT_DEVINIT_INIT ((uint8_t) 0x01) /* Indicates if the device is initializing. */

Definition at line 1011 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVINIT_INIT [2/2]

#define FXPS7250_DEVSTAT_DEVINIT_INIT ((uint8_t) 0x01) /* Indicates if the device is initializing. */

Definition at line 1011 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVINIT_MASK [1/2]

#define FXPS7250_DEVSTAT_DEVINIT_MASK ((uint8_t) 0x01)

Definition at line 986 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVINIT_MASK [2/2]

#define FXPS7250_DEVSTAT_DEVINIT_MASK ((uint8_t) 0x01)

Definition at line 986 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVINIT_NORMAL

#define FXPS7250_DEVSTAT_DEVINIT_NORMAL ((uint8_t) 0x00) /* Device is operating normally. */

Definition at line 198 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVINIT_NOT_INIT

#define FXPS7250_DEVSTAT_DEVINIT_NOT_INIT ((uint8_t) 0x00) /* Device is operating normally. */

Definition at line 1012 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVINIT_SHIFT [1/2]

#define FXPS7250_DEVSTAT_DEVINIT_SHIFT ((uint8_t) 0)

Definition at line 987 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVINIT_SHIFT [2/2]

#define FXPS7250_DEVSTAT_DEVINIT_SHIFT ((uint8_t) 0)

Definition at line 987 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVRES_MASK [1/2]

#define FXPS7250_DEVSTAT_DEVRES_MASK ((uint8_t) 0x02)

Definition at line 989 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVRES_MASK [2/2]

#define FXPS7250_DEVSTAT_DEVRES_MASK ((uint8_t) 0x02)

Definition at line 989 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVRES_NOT_RESET [1/2]

#define FXPS7250_DEVSTAT_DEVRES_NOT_RESET ((uint8_t) 0x00) /* Device is operating normally. */

Definition at line 1014 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVRES_NOT_RESET [2/2]

#define FXPS7250_DEVSTAT_DEVRES_NOT_RESET ((uint8_t) 0x00) /* Device is operating normally. */

Definition at line 1014 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVRES_RESET [1/2]

#define FXPS7250_DEVSTAT_DEVRES_RESET ((uint8_t) 0x02) /* Indicates if the device has reset. */

Definition at line 1013 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVRES_RESET [2/2]

#define FXPS7250_DEVSTAT_DEVRES_RESET ((uint8_t) 0x02) /* Indicates if the device has reset. */

Definition at line 1013 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVRES_SHIFT [1/2]

#define FXPS7250_DEVSTAT_DEVRES_SHIFT ((uint8_t) 1)

Definition at line 990 of file dbap.h.

◆ FXPS7250_DEVSTAT_DEVRES_SHIFT [2/2]

#define FXPS7250_DEVSTAT_DEVRES_SHIFT ((uint8_t) 1)

Definition at line 990 of file dbap.h.

◆ FXPS7250_DEVSTAT_DSP_ERR [1/2]

#define FXPS7250_DEVSTAT_DSP_ERR ((uint8_t) 0x80) /* Indicates if an error is flagged in the pressure DSP. */

Definition at line 1023 of file dbap.h.

◆ FXPS7250_DEVSTAT_DSP_ERR [2/2]

#define FXPS7250_DEVSTAT_DSP_ERR ((uint8_t) 0x80) /* Indicates if an error is flagged in the pressure DSP. */

Definition at line 1023 of file dbap.h.

◆ FXPS7250_DEVSTAT_DSP_ERR_MASK [1/2]

#define FXPS7250_DEVSTAT_DSP_ERR_MASK ((uint8_t) 0x80)

Definition at line 1004 of file dbap.h.

◆ FXPS7250_DEVSTAT_DSP_ERR_MASK [2/2]

#define FXPS7250_DEVSTAT_DSP_ERR_MASK ((uint8_t) 0x80)

Definition at line 1004 of file dbap.h.

◆ FXPS7250_DEVSTAT_DSP_ERR_SHIFT [1/2]

#define FXPS7250_DEVSTAT_DSP_ERR_SHIFT ((uint8_t) 7)

Definition at line 1005 of file dbap.h.

◆ FXPS7250_DEVSTAT_DSP_ERR_SHIFT [2/2]

#define FXPS7250_DEVSTAT_DSP_ERR_SHIFT ((uint8_t) 7)

Definition at line 1005 of file dbap.h.

◆ FXPS7250_DEVSTAT_MEMTEMP_ERR [1/2]

#define FXPS7250_DEVSTAT_MEMTEMP_ERR ((uint8_t) 0x10) /* Indicates if an error is flagged in DEVSTAT2. */

Definition at line 1019 of file dbap.h.

◆ FXPS7250_DEVSTAT_MEMTEMP_ERR [2/2]

#define FXPS7250_DEVSTAT_MEMTEMP_ERR ((uint8_t) 0x10) /* Indicates if an error is flagged in DEVSTAT2. */

Definition at line 1019 of file dbap.h.

◆ FXPS7250_DEVSTAT_MEMTEMP_ERR_MASK [1/2]

#define FXPS7250_DEVSTAT_MEMTEMP_ERR_MASK ((uint8_t) 0x10)

Definition at line 998 of file dbap.h.

◆ FXPS7250_DEVSTAT_MEMTEMP_ERR_MASK [2/2]

#define FXPS7250_DEVSTAT_MEMTEMP_ERR_MASK ((uint8_t) 0x10)

Definition at line 998 of file dbap.h.

◆ FXPS7250_DEVSTAT_MEMTEMP_ERR_SHIFT [1/2]

#define FXPS7250_DEVSTAT_MEMTEMP_ERR_SHIFT ((uint8_t) 4)

Definition at line 999 of file dbap.h.

◆ FXPS7250_DEVSTAT_MEMTEMP_ERR_SHIFT [2/2]

#define FXPS7250_DEVSTAT_MEMTEMP_ERR_SHIFT ((uint8_t) 4)

Definition at line 999 of file dbap.h.

◆ FXPS7250_DEVSTAT_NOT_COMM_ERR [1/2]

#define FXPS7250_DEVSTAT_NOT_COMM_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT3. */

Definition at line 1022 of file dbap.h.

◆ FXPS7250_DEVSTAT_NOT_COMM_ERR [2/2]

#define FXPS7250_DEVSTAT_NOT_COMM_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT3. */

Definition at line 1022 of file dbap.h.

◆ FXPS7250_DEVSTAT_NOT_DSP_ERR [1/2]

#define FXPS7250_DEVSTAT_NOT_DSP_ERR ((uint8_t) 0x00) /* No error is flagged in the pressure DSP. */

Definition at line 1024 of file dbap.h.

◆ FXPS7250_DEVSTAT_NOT_DSP_ERR [2/2]

#define FXPS7250_DEVSTAT_NOT_DSP_ERR ((uint8_t) 0x00) /* No error is flagged in the pressure DSP. */

Definition at line 1024 of file dbap.h.

◆ FXPS7250_DEVSTAT_NOT_MEMTEMP_ERR [1/2]

#define FXPS7250_DEVSTAT_NOT_MEMTEMP_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT2. */

Definition at line 1020 of file dbap.h.

◆ FXPS7250_DEVSTAT_NOT_MEMTEMP_ERR [2/2]

#define FXPS7250_DEVSTAT_NOT_MEMTEMP_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT2. */

Definition at line 1020 of file dbap.h.

◆ FXPS7250_DEVSTAT_NOT_SUPPLY_ERR [1/2]

#define FXPS7250_DEVSTAT_NOT_SUPPLY_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT1. */

Definition at line 1018 of file dbap.h.

◆ FXPS7250_DEVSTAT_NOT_SUPPLY_ERR [2/2]

#define FXPS7250_DEVSTAT_NOT_SUPPLY_ERR ((uint8_t) 0x00) /* No error is flagged in DEVSTAT1. */

Definition at line 1018 of file dbap.h.

◆ FXPS7250_DEVSTAT_SUPPLY_ERR [1/2]

#define FXPS7250_DEVSTAT_SUPPLY_ERR ((uint8_t) 0x08) /* Indicates if an error is flagged in DEVSTAT1. */

Definition at line 1017 of file dbap.h.

◆ FXPS7250_DEVSTAT_SUPPLY_ERR [2/2]

#define FXPS7250_DEVSTAT_SUPPLY_ERR ((uint8_t) 0x08) /* Indicates if an error is flagged in DEVSTAT1. */

Definition at line 1017 of file dbap.h.

◆ FXPS7250_DEVSTAT_SUPPLY_ERR_MASK [1/2]

#define FXPS7250_DEVSTAT_SUPPLY_ERR_MASK ((uint8_t) 0x08)

Definition at line 995 of file dbap.h.

◆ FXPS7250_DEVSTAT_SUPPLY_ERR_MASK [2/2]

#define FXPS7250_DEVSTAT_SUPPLY_ERR_MASK ((uint8_t) 0x08)

Definition at line 995 of file dbap.h.

◆ FXPS7250_DEVSTAT_SUPPLY_ERR_SHIFT [1/2]

#define FXPS7250_DEVSTAT_SUPPLY_ERR_SHIFT ((uint8_t) 3)

Definition at line 996 of file dbap.h.

◆ FXPS7250_DEVSTAT_SUPPLY_ERR_SHIFT [2/2]

#define FXPS7250_DEVSTAT_SUPPLY_ERR_SHIFT ((uint8_t) 3)

Definition at line 996 of file dbap.h.

◆ FXPS7250_DEVSTAT_TESTMODE_INACTIVE [1/2]

#define FXPS7250_DEVSTAT_TESTMODE_INACTIVE ((uint8_t) 0x00) /* Test mode is not active. */

Definition at line 1016 of file dbap.h.

◆ FXPS7250_DEVSTAT_TESTMODE_INACTIVE [2/2]

#define FXPS7250_DEVSTAT_TESTMODE_INACTIVE ((uint8_t) 0x00) /* Test mode is not active. */

Definition at line 1016 of file dbap.h.

◆ FXPS7250_DEVSTAT_TESTMODE_ISACTIVE [1/2]

#define FXPS7250_DEVSTAT_TESTMODE_ISACTIVE ((uint8_t) 0x04) /* Indicates if the device is in test mode. */

Definition at line 1015 of file dbap.h.

◆ FXPS7250_DEVSTAT_TESTMODE_ISACTIVE [2/2]

#define FXPS7250_DEVSTAT_TESTMODE_ISACTIVE ((uint8_t) 0x04) /* Indicates if the device is in test mode. */

Definition at line 1015 of file dbap.h.

◆ FXPS7250_DEVSTAT_TESTMODE_MASK [1/2]

#define FXPS7250_DEVSTAT_TESTMODE_MASK ((uint8_t) 0x04)

Definition at line 992 of file dbap.h.

◆ FXPS7250_DEVSTAT_TESTMODE_MASK [2/2]

#define FXPS7250_DEVSTAT_TESTMODE_MASK ((uint8_t) 0x04)

Definition at line 992 of file dbap.h.

◆ FXPS7250_DEVSTAT_TESTMODE_SHIFT [1/2]

#define FXPS7250_DEVSTAT_TESTMODE_SHIFT ((uint8_t) 2)

Definition at line 993 of file dbap.h.

◆ FXPS7250_DEVSTAT_TESTMODE_SHIFT [2/2]

#define FXPS7250_DEVSTAT_TESTMODE_SHIFT ((uint8_t) 2)

Definition at line 993 of file dbap.h.

◆ FXPS7250_DSP_CFG_U1_LPF_1000HZ_4POLE

#define FXPS7250_DSP_CFG_U1_LPF_1000HZ_4POLE ((uint8_t) 0x40) /* Alternate Low Pass Filter at 1000hz and 4-pole. */

Definition at line 744 of file dbap.h.

◆ FXPS7250_DSP_CFG_U1_LPF_370HZ_2POLE

#define FXPS7250_DSP_CFG_U1_LPF_370HZ_2POLE ((uint8_t) 0x00) /* Default Low Pass Filter at 370hz and 2-pole. */

Definition at line 741 of file dbap.h.

◆ FXPS7250_DSP_CFG_U1_LPF_400HZ_3POLE

#define FXPS7250_DSP_CFG_U1_LPF_400HZ_3POLE ((uint8_t) 0x10) /* Alternate Low Pass Filter at 400hz and 3-pole. */

Definition at line 742 of file dbap.h.

◆ FXPS7250_DSP_CFG_U1_LPF_800HZ_4POLE

#define FXPS7250_DSP_CFG_U1_LPF_800HZ_4POLE ((uint8_t) 0x20) /* Alternate Low Pass Filter at 800hz and 4-pole. */

Definition at line 743 of file dbap.h.

◆ FXPS7250_DSP_CFG_U1_LPF_MASK

#define FXPS7250_DSP_CFG_U1_LPF_MASK ((uint8_t) 0x10)

Definition at line 735 of file dbap.h.

◆ FXPS7250_DSP_CFG_U1_LPF_SHIFT

#define FXPS7250_DSP_CFG_U1_LPF_SHIFT ((uint8_t) 5)

Definition at line 736 of file dbap.h.

◆ FXPS7250_DSP_CFG_U1_USER_RANGE_MASK

#define FXPS7250_DSP_CFG_U1_USER_RANGE_MASK ((uint8_t) 0x00)

Definition at line 732 of file dbap.h.

◆ FXPS7250_DSP_CFG_U1_USER_RANGE_SHIFT

#define FXPS7250_DSP_CFG_U1_USER_RANGE_SHIFT ((uint8_t) 0)

Definition at line 733 of file dbap.h.

◆ FXPS7250_DSP_CFG_U4_INT_OUT_ACTIVE_HIGH_PULL_DOWN

#define FXPS7250_DSP_CFG_U4_INT_OUT_ACTIVE_HIGH_PULL_DOWN ((uint8_t) 0x00) /* Open Drain, Active High with Pull-down Current. */

Definition at line 772 of file dbap.h.

◆ FXPS7250_DSP_CFG_U4_INT_OUT_ACTIVE_LOW_PULL_UP

#define FXPS7250_DSP_CFG_U4_INT_OUT_ACTIVE_LOW_PULL_UP ((uint8_t) 0x04) /* Open Drain, Active Low with Pull-up Current. */

Definition at line 773 of file dbap.h.

◆ FXPS7250_DSP_CFG_U4_INT_OUT_MASK

#define FXPS7250_DSP_CFG_U4_INT_OUT_MASK ((uint8_t) 0x04)

Definition at line 766 of file dbap.h.

◆ FXPS7250_DSP_CFG_U4_INT_OUT_SHIFT

#define FXPS7250_DSP_CFG_U4_INT_OUT_SHIFT ((uint8_t) 2)

Definition at line 767 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_ST_CTRL_MASK

#define FXPS7250_DSP_CFG_U5_ST_CTRL_MASK ((uint8_t) 0x10)

Definition at line 794 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_ST_CTRL_SHIFT

#define FXPS7250_DSP_CFG_U5_ST_CTRL_SHIFT ((uint8_t) 4)

Definition at line 795 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST0

#define FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST0 ((uint8_t) 0xC0) /* SNS_DATAx_X Contains: Digital Self Test Output. */

Definition at line 806 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST1

#define FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST1 ((uint8_t) 0xD0) /* SNS_DATAx_X Contains: Digital Self Test Output. */

Definition at line 807 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST2

#define FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST2 ((uint8_t) 0xE0) /* SNS_DATAx_X Contains: Digital Self Test Output. */

Definition at line 808 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST3

#define FXPS7250_DSP_CFG_U5_STL_CTRL_DIGITAL_SELF_TEST3 ((uint8_t) 0xF0) /* SNS_DATAx_X Contains: Digital Self Test Output. */

Definition at line 809 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE0

#define FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE0 ((uint8_t) 0x40) /* SNS_DATAx_X Contains: 0x0000. */

Definition at line 802 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE1

#define FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE1 ((uint8_t) 0x50) /* SNS_DATAx_X Contains: 0xAAAA. */

Definition at line 803 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE2

#define FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE2 ((uint8_t) 0x60) /* SNS_DATAx_X Contains: 0x5555. */

Definition at line 804 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE3

#define FXPS7250_DSP_CFG_U5_STL_CTRL_INHIBIT_SNS_DATA_X_WRITE3 ((uint8_t) 0x70) /* SNS_DATAx_X Contains: 0xFFFF. */

Definition at line 805 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_NORMAL_SIGNAL

#define FXPS7250_DSP_CFG_U5_STL_CTRL_NORMAL_SIGNAL ((uint8_t) 0x00) /* SNS_DATAx_X Contains: 16-bit Absolute Pressure. */

Definition at line 800 of file dbap.h.

◆ FXPS7250_DSP_CFG_U5_STL_CTRL_P_CELL_MODE_VERIFICATION

#define FXPS7250_DSP_CFG_U5_STL_CTRL_P_CELL_MODE_VERIFICATION ((uint8_t) 0x10) /* SNS_DATAx_X Contains: 16-bit Absolute Pressure. */

Definition at line 801 of file dbap.h.

◆ FXPS7250_DSP_STAT_CM_ERROR_CLR

#define FXPS7250_DSP_STAT_CM_ERROR_CLR ((uint8_t) 0x00) /* No Common Mode Error has been flagged. */

Definition at line 950 of file dbap.h.

◆ FXPS7250_DSP_STAT_CM_ERROR_FLAGGED

#define FXPS7250_DSP_STAT_CM_ERROR_FLAGGED ((uint8_t) 0x02) /* A Common Mode Error has been flagged. */

Definition at line 951 of file dbap.h.

◆ FXPS7250_DSP_STAT_CM_ERROR_MASK

#define FXPS7250_DSP_STAT_CM_ERROR_MASK ((uint8_t) 0x02)

Definition at line 930 of file dbap.h.

◆ FXPS7250_DSP_STAT_CM_ERROR_SHIFT

#define FXPS7250_DSP_STAT_CM_ERROR_SHIFT ((uint8_t) 1)

Definition at line 931 of file dbap.h.

◆ FXPS7250_DSP_STAT_PABS_HIGH_IN_RANGE

#define FXPS7250_DSP_STAT_PABS_HIGH_IN_RANGE ((uint8_t) 0x00) /* Absolute Pressure is below the out-of-range higher limit */

Definition at line 958 of file dbap.h.

◆ FXPS7250_DSP_STAT_PABS_HIGH_MASK

#define FXPS7250_DSP_STAT_PABS_HIGH_MASK ((uint8_t) 0x40)

Definition at line 942 of file dbap.h.

◆ FXPS7250_DSP_STAT_PABS_HIGH_NOT_IN_RANGE

#define FXPS7250_DSP_STAT_PABS_HIGH_NOT_IN_RANGE ((uint8_t) 0x40) /* Absolute Pressure is above the out-of-range higher limit */

Definition at line 959 of file dbap.h.

◆ FXPS7250_DSP_STAT_PABS_HIGH_SHIFT

#define FXPS7250_DSP_STAT_PABS_HIGH_SHIFT ((uint8_t) 6)

Definition at line 943 of file dbap.h.

◆ FXPS7250_DSP_STAT_PABS_LOW_IN_RANGE

#define FXPS7250_DSP_STAT_PABS_LOW_IN_RANGE ((uint8_t) 0x00) /* Absolute Pressure is below the out-of-range lower limit */

Definition at line 956 of file dbap.h.

◆ FXPS7250_DSP_STAT_PABS_LOW_MASK

#define FXPS7250_DSP_STAT_PABS_LOW_MASK ((uint8_t) 0x20)

Definition at line 939 of file dbap.h.

◆ FXPS7250_DSP_STAT_PABS_LOW_NOT_IN_RANGE

#define FXPS7250_DSP_STAT_PABS_LOW_NOT_IN_RANGE ((uint8_t) 0x20) /* Absolute Pressure is above the out-of-range lower limit */

Definition at line 957 of file dbap.h.

◆ FXPS7250_DSP_STAT_PABS_LOW_SHIFT

#define FXPS7250_DSP_STAT_PABS_LOW_SHIFT ((uint8_t) 5)

Definition at line 940 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_ACTIVE_ACTIVE

#define FXPS7250_DSP_STAT_ST_ACTIVE_ACTIVE ((uint8_t) 0x04) /* A Self-Test Mode is currently active. */

Definition at line 953 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_ACTIVE_INACTIVE

#define FXPS7250_DSP_STAT_ST_ACTIVE_INACTIVE ((uint8_t) 0x00) /* No Self-Test Mode is currently active. */

Definition at line 952 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_ACTIVE_MASK

#define FXPS7250_DSP_STAT_ST_ACTIVE_MASK ((uint8_t) 0x04)

Definition at line 933 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_ACTIVE_SHIFT

#define FXPS7250_DSP_STAT_ST_ACTIVE_SHIFT ((uint8_t) 2)

Definition at line 934 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_ERROR_CLR

#define FXPS7250_DSP_STAT_ST_ERROR_CLR ((uint8_t) 0x00) /* No Self-Test Error has been flagged. */

Definition at line 948 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_ERROR_FLAGGED

#define FXPS7250_DSP_STAT_ST_ERROR_FLAGGED ((uint8_t) 0x01) /* A Self-Test Error has been flagged. */

Definition at line 949 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_ERROR_MASK

#define FXPS7250_DSP_STAT_ST_ERROR_MASK ((uint8_t) 0x01)

Definition at line 927 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_ERROR_SHIFT

#define FXPS7250_DSP_STAT_ST_ERROR_SHIFT ((uint8_t) 0)

Definition at line 928 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_INCMPLT_FALSE

#define FXPS7250_DSP_STAT_ST_INCMPLT_FALSE ((uint8_t) 0x00) /* An analog or digital Self-Test has been run since the last reset. */

Definition at line 954 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_INCMPLT_MASK

#define FXPS7250_DSP_STAT_ST_INCMPLT_MASK ((uint8_t) 0x08)

Definition at line 936 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_INCMPLT_SHIFT

#define FXPS7250_DSP_STAT_ST_INCMPLT_SHIFT ((uint8_t) 3)

Definition at line 937 of file dbap.h.

◆ FXPS7250_DSP_STAT_ST_INCMPLT_TRUE

#define FXPS7250_DSP_STAT_ST_INCMPLT_TRUE ((uint8_t) 0x08) /* An analog or digital Self-Test has not been run since the last reset. */

Definition at line 955 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_POLARITY_INSIDE_RANGE

#define FXPS7250_INT_CFG_INT_POLARITY_INSIDE_RANGE ((uint8_t) 0x08) /* Interrupt activates if values are inside of the range. */

Definition at line 842 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_POLARITY_MASK

#define FXPS7250_INT_CFG_INT_POLARITY_MASK ((uint8_t) 0x08)

Definition at line 832 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_POLARITY_OUTSIDE_RANGE

#define FXPS7250_INT_CFG_INT_POLARITY_OUTSIDE_RANGE ((uint8_t) 0x00) /* Interrupt activates if values are outside of the range. */

Definition at line 841 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_POLARITY_SHIFT

#define FXPS7250_INT_CFG_INT_POLARITY_SHIFT ((uint8_t) 3)

Definition at line 833 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_PS_00

#define FXPS7250_INT_CFG_INT_PS_00 ((uint8_t) 0x00) /* Pulse Stretch of 0ms. */

Definition at line 843 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_PS_01

#define FXPS7250_INT_CFG_INT_PS_01 ((uint8_t) 0x10) /* Pulse Stretch of 16,000ms - 16,512ms. */

Definition at line 844 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_PS_10

#define FXPS7250_INT_CFG_INT_PS_10 ((uint8_t) 0x20) /* Pulse Stretch of 64,000ms - 60,512ms. */

Definition at line 845 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_PS_11

#define FXPS7250_INT_CFG_INT_PS_11 ((uint8_t) 0x30) /* Pulse Stretch of 256,000ms - 256,512ms. */

Definition at line 846 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_PS_MASK

#define FXPS7250_INT_CFG_INT_PS_MASK ((uint8_t) 0x10)

Definition at line 835 of file dbap.h.

◆ FXPS7250_INT_CFG_INT_PS_SHIFT

#define FXPS7250_INT_CFG_INT_PS_SHIFT ((uint8_t) 4)

Definition at line 836 of file dbap.h.

◆ FXPS7250_SOURCEID_0_SID0_EN

#define FXPS7250_SOURCEID_0_SID0_EN ((uint8_t) 0x80) /* Enables reading of data or an error response for those source-id bits */

Definition at line 549 of file dbap.h.

◆ FXPS7250_SOURCEID_0_SID0_EN_MASK

#define FXPS7250_SOURCEID_0_SID0_EN_MASK ((uint8_t) 0x80)

Definition at line 541 of file dbap.h.

◆ FXPS7250_SOURCEID_0_SID0_EN_SHIFT

#define FXPS7250_SOURCEID_0_SID0_EN_SHIFT ((uint8_t) 7)

Definition at line 542 of file dbap.h.

◆ FXPS7250_SOURCEID_0_SOURCEID_0

#define FXPS7250_SOURCEID_0_SOURCEID_0 ((uint8_t) 0x01) /* The stream of data to be sent if sid0_en is true */

Definition at line 548 of file dbap.h.

◆ FXPS7250_SOURCEID_0_SOURCEID_0_MASK

#define FXPS7250_SOURCEID_0_SOURCEID_0_MASK ((uint8_t) 0x01)

Definition at line 538 of file dbap.h.

◆ FXPS7250_SOURCEID_0_SOURCEID_0_SHIFT

#define FXPS7250_SOURCEID_0_SOURCEID_0_SHIFT ((uint8_t) 0)

Definition at line 539 of file dbap.h.

◆ FXPS7250_SOURCEID_1_SID1_EN

#define FXPS7250_SOURCEID_1_SID1_EN ((uint8_t) 0x80) /* Enables reading of data or an error response for those source-id bits */

Definition at line 581 of file dbap.h.

◆ FXPS7250_SOURCEID_1_SID1_EN_MASK

#define FXPS7250_SOURCEID_1_SID1_EN_MASK ((uint8_t) 0x80)

Definition at line 573 of file dbap.h.

◆ FXPS7250_SOURCEID_1_SID1_EN_SHIFT

#define FXPS7250_SOURCEID_1_SID1_EN_SHIFT ((uint8_t) 7)

Definition at line 574 of file dbap.h.

◆ FXPS7250_SOURCEID_1_SOURCEID_10

#define FXPS7250_SOURCEID_1_SOURCEID_10 ((uint8_t) 0x01) /* Stream of data that is sent if sid1_en is true */

Definition at line 580 of file dbap.h.

◆ FXPS7250_SOURCEID_1_SOURCEID_1_MASK

#define FXPS7250_SOURCEID_1_SOURCEID_1_MASK ((uint8_t) 0x01)

Definition at line 570 of file dbap.h.

◆ FXPS7250_SOURCEID_1_SOURCEID_1_SHIFT

#define FXPS7250_SOURCEID_1_SOURCEID_1_SHIFT ((uint8_t) 0)

Definition at line 571 of file dbap.h.

◆ FXPS7250_SPI_CFG_DATASIZE_12

#define FXPS7250_SPI_CFG_DATASIZE_12 ((uint8_t) 0x00) /* Sets SPI datafield size to 12 bits. */

Definition at line 672 of file dbap.h.

◆ FXPS7250_SPI_CFG_DATASIZE_16

#define FXPS7250_SPI_CFG_DATASIZE_16 ((uint8_t) 0x40) /* Sets SPI datafield size to 16 bits. */

Definition at line 671 of file dbap.h.

◆ FXPS7250_SPI_CFG_DATASIZE_MASK

#define FXPS7250_SPI_CFG_DATASIZE_MASK ((uint8_t) 0x40)

Definition at line 654 of file dbap.h.

◆ FXPS7250_SPI_CFG_DATASIZE_SHIFT

#define FXPS7250_SPI_CFG_DATASIZE_SHIFT ((uint8_t) 6)

Definition at line 655 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPI_CRC_LEN_00

#define FXPS7250_SPI_CFG_SPI_CRC_LEN_00 ((uint8_t) 0x00) /* Sets the length of the CRC Seed to 8, 4, or 3 bits */

Definition at line 663 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPI_CRC_LEN_01

#define FXPS7250_SPI_CFG_SPI_CRC_LEN_01 ((uint8_t) 0x10) /* Sets the length of the CRC Seed to 8, 4, or 3 bits */

Definition at line 665 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPI_CRC_LEN_10

#define FXPS7250_SPI_CFG_SPI_CRC_LEN_10 ((uint8_t) 0x20) /* Sets the length of the CRC Seed to 8, 4, or 3 bits */

Definition at line 667 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPI_CRC_LEN_11

#define FXPS7250_SPI_CFG_SPI_CRC_LEN_11 ((uint8_t) 0x30) /* Sets the length of the CRC Seed to 8, 4, or 3 bits */

Definition at line 669 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPI_CRC_LEN_MASK

#define FXPS7250_SPI_CFG_SPI_CRC_LEN_MASK ((uint8_t) 0x10)

Definition at line 651 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPI_CRC_LEN_SHIFT

#define FXPS7250_SPI_CFG_SPI_CRC_LEN_SHIFT ((uint8_t) 4)

Definition at line 652 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPICRCSEED

#define FXPS7250_SPI_CFG_SPICRCSEED ((uint8_t) 0x01) /* CRCSeed is non-zero. For use with CRC_LEN. */

Definition at line 661 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPICRCSEED_MASK

#define FXPS7250_SPI_CFG_SPICRCSEED_MASK ((uint8_t) 0x01)

Definition at line 648 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPICRCSEED_SHIFT

#define FXPS7250_SPI_CFG_SPICRCSEED_SHIFT ((uint8_t) 0)

Definition at line 649 of file dbap.h.

◆ FXPS7250_SPI_CFG_SPICRCSEED_ZERO

#define FXPS7250_SPI_CFG_SPICRCSEED_ZERO ((uint8_t) 0x00) /* CRCSeed is zero. For use with CRC_LEN. */

Definition at line 662 of file dbap.h.

◆ FXPS7250_TIMING_CFG_CK_CAL_EN

#define FXPS7250_TIMING_CFG_CK_CAL_EN ((uint8_t) 0x01) /* Enables clock oscillator training over SPI or I2C */

Definition at line 617 of file dbap.h.

◆ FXPS7250_TIMING_CFG_CK_CAL_EN_DIS

#define FXPS7250_TIMING_CFG_CK_CAL_EN_DIS ((uint8_t) 0x00) /* Clock oscillator training is disabled */

Definition at line 618 of file dbap.h.

◆ FXPS7250_TIMING_CFG_CK_CAL_EN_MASK

#define FXPS7250_TIMING_CFG_CK_CAL_EN_MASK ((uint8_t) 0x01)

Definition at line 605 of file dbap.h.

◆ FXPS7250_TIMING_CFG_CK_CAL_EN_SHIFT

#define FXPS7250_TIMING_CFG_CK_CAL_EN_SHIFT ((uint8_t) 0)

Definition at line 606 of file dbap.h.

◆ FXPS7250_TIMING_CFG_CK_CAL_KEEP

#define FXPS7250_TIMING_CFG_CK_CAL_KEEP ((uint8_t) 0x00) /* Training value is maintained at last trained value */

Definition at line 620 of file dbap.h.

◆ FXPS7250_TIMING_CFG_CK_CAL_RST

#define FXPS7250_TIMING_CFG_CK_CAL_RST ((uint8_t) 0x08) /* Resets the oscillator training to default */

Definition at line 619 of file dbap.h.

◆ FXPS7250_TIMING_CFG_CK_CAL_RST_MASK

#define FXPS7250_TIMING_CFG_CK_CAL_RST_MASK ((uint8_t) 0x08)

Definition at line 608 of file dbap.h.

◆ FXPS7250_TIMING_CFG_CK_CAL_RST_SHIFT

#define FXPS7250_TIMING_CFG_CK_CAL_RST_SHIFT ((uint8_t) 3)

Definition at line 609 of file dbap.h.

◆ FXPS7250_TIMING_CFG_OSCTRAIN_DISABLE

#define FXPS7250_TIMING_CFG_OSCTRAIN_DISABLE ((uint8_t) 0x00) /* Disables oscillator training. */

Definition at line 623 of file dbap.h.

◆ FXPS7250_TIMING_CFG_OSCTRAIN_SEL

#define FXPS7250_TIMING_CFG_OSCTRAIN_SEL ((uint8_t) 0x10) /* Sets the protocol to SPI if FXPS7250_COMMTYPE_COMMTYPE=0x00 or */

Definition at line 621 of file dbap.h.

◆ FXPS7250_TIMING_CFG_OSCTRAIN_SEL_MASK

#define FXPS7250_TIMING_CFG_OSCTRAIN_SEL_MASK ((uint8_t) 0x10)

Definition at line 611 of file dbap.h.

◆ FXPS7250_TIMING_CFG_OSCTRAIN_SEL_SHIFT

#define FXPS7250_TIMING_CFG_OSCTRAIN_SEL_SHIFT ((uint8_t) 4)

Definition at line 612 of file dbap.h.

◆ FXPS7250_UF_REGION_R_REGION_ACTIVE_MASK

#define FXPS7250_UF_REGION_R_REGION_ACTIVE_MASK ((uint8_t) 0xA0)

Definition at line 471 of file dbap.h.

◆ FXPS7250_UF_REGION_R_REGION_ACTIVE_SHIFT

#define FXPS7250_UF_REGION_R_REGION_ACTIVE_SHIFT ((uint8_t) 4)

Definition at line 472 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_ACTIVE_00

#define FXPS7250_UF_REGION_W_REGION_ACTIVE_00 ((uint8_t) 0x00) /* Load of addresses is in progress. */

Definition at line 478 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_ACTIVE_A0_AF

#define FXPS7250_UF_REGION_W_REGION_ACTIVE_A0_AF ((uint8_t) 0xA0) /* Reads addresses A0 through AF. Must be loaded first. */

Definition at line 479 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_ACTIVE_B0_BF

#define FXPS7250_UF_REGION_W_REGION_ACTIVE_B0_BF ((uint8_t) 0xB0) /* Reads addresses B0 through BF. Must be loaded first. */

Definition at line 480 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_ACTIVE_C0_CF

#define FXPS7250_UF_REGION_W_REGION_ACTIVE_C0_CF ((uint8_t) 0xC0) /* Reads addresses C0 through CF. Must be loaded first. */

Definition at line 481 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_ACTIVE_D0_DF

#define FXPS7250_UF_REGION_W_REGION_ACTIVE_D0_DF ((uint8_t) 0xD0) /* Reads addresses D0 through DF. Must be loaded first. */

Definition at line 482 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_ACTIVE_E0_EF

#define FXPS7250_UF_REGION_W_REGION_ACTIVE_E0_EF ((uint8_t) 0xE0) /* Reads addresses E0 through EF. Must be loaded first. */

Definition at line 483 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_ACTIVE_F0_FF

#define FXPS7250_UF_REGION_W_REGION_ACTIVE_F0_FF ((uint8_t) 0xF0) /* Reads addresses F0 through FF. Must be loaded first. */

Definition at line 484 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_LOAD_A0_AF

#define FXPS7250_UF_REGION_W_REGION_LOAD_A0_AF ((uint8_t) 0xA0) /* Loads addresses A0 through AF */

Definition at line 445 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_LOAD_B0_BF

#define FXPS7250_UF_REGION_W_REGION_LOAD_B0_BF ((uint8_t) 0xB0) /* Loads addresses B0 through BF */

Definition at line 446 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_LOAD_C0_CF

#define FXPS7250_UF_REGION_W_REGION_LOAD_C0_CF ((uint8_t) 0xC0) /* Loads addresses C0 through CF */

Definition at line 447 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_LOAD_D0_DF

#define FXPS7250_UF_REGION_W_REGION_LOAD_D0_DF ((uint8_t) 0xD0) /* Loads addresses D0 through DF */

Definition at line 448 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_LOAD_E0_EF

#define FXPS7250_UF_REGION_W_REGION_LOAD_E0_EF ((uint8_t) 0xE0) /* Loads addresses E0 through EF */

Definition at line 449 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_LOAD_F0_FF

#define FXPS7250_UF_REGION_W_REGION_LOAD_F0_FF ((uint8_t) 0xF0) /* Loads addresses F0 through FF */

Definition at line 450 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_LOAD_MASK

#define FXPS7250_UF_REGION_W_REGION_LOAD_MASK ((uint8_t) 0xA0)

Definition at line 439 of file dbap.h.

◆ FXPS7250_UF_REGION_W_REGION_LOAD_SHIFT

#define FXPS7250_UF_REGION_W_REGION_LOAD_SHIFT ((uint8_t) 4)

Definition at line 440 of file dbap.h.

◆ FXPS7250_WHO_AM_I_1

#define FXPS7250_WHO_AM_I_1 ((uint8_t) 0x01) /* Non-zero value in the register returns the value in the register. */

Definition at line 700 of file dbap.h.

◆ FXPS7250_WHO_AM_I_DEFAULT

#define FXPS7250_WHO_AM_I_DEFAULT ((uint8_t) 0x00) /* A zero value WHO_AM_I register returns the default value: C4h. */

Definition at line 701 of file dbap.h.

◆ FXPS7250_WHO_AM_I_MASK

#define FXPS7250_WHO_AM_I_MASK ((uint8_t) 0x01)

Definition at line 693 of file dbap.h.

◆ FXPS7250_WHO_AM_I_SHIFT

#define FXPS7250_WHO_AM_I_SHIFT ((uint8_t) 0)

Definition at line 694 of file dbap.h.

◆ FXPS7250D4_WHOAMI_VALUE

#define FXPS7250D4_WHOAMI_VALUE (0xC4)

Definition at line 15 of file dbap.h.

Referenced by main().

Typedef Documentation

◆ FXPS7250_ASICWFR_t

typedef uint8_t FXPS7250_ASICWFR_t

Definition at line 1274 of file dbap.h.

◆ FXPS7250_ASICWFR_X_t

typedef uint8_t FXPS7250_ASICWFR_X_t

Definition at line 1282 of file dbap.h.

◆ FXPS7250_ASICWFR_Y_t

typedef uint8_t FXPS7250_ASICWFR_Y_t

Definition at line 1290 of file dbap.h.

◆ FXPS7250_ASICWLOT_H_t

typedef uint8_t FXPS7250_ASICWLOT_H_t

Definition at line 1306 of file dbap.h.

◆ FXPS7250_ASICWLOT_L_t

typedef uint8_t FXPS7250_ASICWLOT_L_t

Definition at line 1298 of file dbap.h.

◆ FXPS7250_COUNT_t

typedef uint8_t FXPS7250_COUNT_t

Definition at line 147 of file dbap.h.

◆ FXPS7250_FRT0_t

typedef uint8_t FXPS7250_FRT0_t

Definition at line 1146 of file dbap.h.

◆ FXPS7250_FRT1_t

typedef uint8_t FXPS7250_FRT1_t

Definition at line 1154 of file dbap.h.

◆ FXPS7250_FRT2_t

typedef uint8_t FXPS7250_FRT2_t

Definition at line 1162 of file dbap.h.

◆ FXPS7250_FRT3_t

typedef uint8_t FXPS7250_FRT3_t

Definition at line 1170 of file dbap.h.

◆ FXPS7250_FRT4_t

typedef uint8_t FXPS7250_FRT4_t

Definition at line 1178 of file dbap.h.

◆ FXPS7250_FRT5_t

typedef uint8_t FXPS7250_FRT5_t

Definition at line 1186 of file dbap.h.

◆ FXPS7250_I2C_ADDRESS_t

typedef uint8_t FXPS7250_I2C_ADDRESS_t

Definition at line 710 of file dbap.h.

◆ FXPS7250_ICMFGID_t

typedef uint8_t FXPS7250_ICMFGID_t

Definition at line 1210 of file dbap.h.

◆ FXPS7250_ICREVID_t

typedef uint8_t FXPS7250_ICREVID_t

Definition at line 1202 of file dbap.h.

◆ FXPS7250_ICTYPEID_t

typedef uint8_t FXPS7250_ICTYPEID_t

Definition at line 1194 of file dbap.h.

◆ FXPS7250_P_CAL_ZERO_L_t

typedef uint8_t FXPS7250_P_CAL_ZERO_L_t

Definition at line 891 of file dbap.h.

◆ FXPS7250_P_MAX_H_t

typedef uint8_t FXPS7250_P_MAX_H_t

Definition at line 1122 of file dbap.h.

◆ FXPS7250_P_MAX_L_t

typedef uint8_t FXPS7250_P_MAX_L_t

Definition at line 1114 of file dbap.h.

◆ FXPS7250_P_MIN_H_t

typedef uint8_t FXPS7250_P_MIN_H_t

Definition at line 1138 of file dbap.h.

◆ FXPS7250_P_MIN_L_t

typedef uint8_t FXPS7250_P_MIN_L_t

Definition at line 1130 of file dbap.h.

◆ FXPS7250_P_TGT2_LSB_t

typedef uint8_t FXPS7250_P_TGT2_LSB_t

Definition at line 900 of file dbap.h.

◆ FXPS7250_PIN_INT_HI_L_t

typedef uint8_t FXPS7250_PIN_INT_HI_L_t

Definition at line 855 of file dbap.h.

◆ FXPS7250_PIN_INT_HI_M_t

typedef uint8_t FXPS7250_PIN_INT_HI_M_t

Definition at line 864 of file dbap.h.

◆ FXPS7250_PIN_INT_LO_H_t

typedef uint8_t FXPS7250_PIN_INT_LO_H_t

Definition at line 882 of file dbap.h.

◆ FXPS7250_PIN_INT_LO_L_t

typedef uint8_t FXPS7250_PIN_INT_LO_L_t

Definition at line 873 of file dbap.h.

◆ FXPS7250_PN0_t

typedef uint8_t FXPS7250_PN0_t

Definition at line 1218 of file dbap.h.

◆ FXPS7250_PN1_t

typedef uint8_t FXPS7250_PN1_t

Definition at line 1226 of file dbap.h.

◆ FXPS7250_SN0_t

typedef uint8_t FXPS7250_SN0_t

Definition at line 1234 of file dbap.h.

◆ FXPS7250_SN1_t

typedef uint8_t FXPS7250_SN1_t

Definition at line 1242 of file dbap.h.

◆ FXPS7250_SN2_t

typedef uint8_t FXPS7250_SN2_t

Definition at line 1250 of file dbap.h.

◆ FXPS7250_SN3_t

typedef uint8_t FXPS7250_SN3_t

Definition at line 1258 of file dbap.h.

◆ FXPS7250_SN4_t

typedef uint8_t FXPS7250_SN4_t

Definition at line 1266 of file dbap.h.

◆ FXPS7250_SNSDATA0_H_t

typedef uint8_t FXPS7250_SNSDATA0_H_t

Definition at line 1041 of file dbap.h.

◆ FXPS7250_SNSDATA0_L_t

typedef uint8_t FXPS7250_SNSDATA0_L_t

Definition at line 1032 of file dbap.h.

◆ FXPS7250_SNSDATA1_H_t

typedef uint8_t FXPS7250_SNSDATA1_H_t

Definition at line 1058 of file dbap.h.

◆ FXPS7250_SNSDATA1_L_t

typedef uint8_t FXPS7250_SNSDATA1_L_t

Definition at line 1049 of file dbap.h.

◆ FXPS7250_SNSDATA_TIME0_t

typedef uint8_t FXPS7250_SNSDATA_TIME0_t

Definition at line 1066 of file dbap.h.

◆ FXPS7250_SNSDATA_TIME1_t

typedef uint8_t FXPS7250_SNSDATA_TIME1_t

Definition at line 1074 of file dbap.h.

◆ FXPS7250_SNSDATA_TIME2_t

typedef uint8_t FXPS7250_SNSDATA_TIME2_t

Definition at line 1082 of file dbap.h.

◆ FXPS7250_SNSDATA_TIME3_t

typedef uint8_t FXPS7250_SNSDATA_TIME3_t

Definition at line 1090 of file dbap.h.

◆ FXPS7250_SNSDATA_TIME4_t

typedef uint8_t FXPS7250_SNSDATA_TIME4_t

Definition at line 1098 of file dbap.h.

◆ FXPS7250_SNSDATA_TIME5_t

typedef uint8_t FXPS7250_SNSDATA_TIME5_t

Definition at line 1106 of file dbap.h.

◆ FXPS7250_TEMP_t

typedef uint8_t FXPS7250_TEMP_t

Definition at line 373 of file dbap.h.

◆ FXPS7250_TRNS1LOT_H_t

typedef uint8_t FXPS7250_TRNS1LOT_H_t

Definition at line 1338 of file dbap.h.

◆ FXPS7250_TRNS1LOT_L_t

typedef uint8_t FXPS7250_TRNS1LOT_L_t

Definition at line 1330 of file dbap.h.

◆ FXPS7250_TRNS1WFR_X_t

typedef uint8_t FXPS7250_TRNS1WFR_X_t

Definition at line 1314 of file dbap.h.

◆ FXPS7250_TRNS1WFR_Y_t

typedef uint8_t FXPS7250_TRNS1WFR_Y_t

Definition at line 1322 of file dbap.h.

◆ FXPS7250_WHO_AM_I_t

typedef uint8_t FXPS7250_WHO_AM_I_t

Definition at line 687 of file dbap.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

FXPS7250 Sensor Internal Registers

Enumerator
FXPS7250_COUNT
FXPS7250_DEVSTAT
FXPS7250_DEVSTAT1
FXPS7250_DEVSTAT2
FXPS7250_DEVSTAT3
FXPS7250_TEMPERATURE
FXPS7250_DEVLOCK_WR
FXPS7250_UF_REGION_W
FXPS7250_UF_REGION_R
FXPS7250_COMMTYPE
FXPS7250_SOURCEID_0
FXPS7250_SOURCEID_1
FXPS7250_TIMING_CFG
FXPS7250_SPI_CFG
FXPS7250_WHO_AM_I
FXPS7250_I2C_ADDRESS
FXPS7250_DSP_CFG_U1
FXPS7250_DSP_CFG_U2
FXPS7250_DSP_CFG_U3
FXPS7250_DSP_CFG_U4
FXPS7250_DSP_CFG_U5
FXPS7250_INT_CFG
FXPS7250_P_INT_HI_L
FXPS7250_P_INT_HI_H
FXPS7250_P_INT_LO_L
FXPS7250_P_INT_LO_H
FXPS7250_P_CAL_ZERO_L
FXPS7250_P_CAL_ZERO_H
FXPS7250_DSP_STAT
FXPS7250_DEVSTAT_COPY
FXPS7250_SNSDATA0_L
FXPS7250_SNSDATA0_H
FXPS7250_SNSDATA1_L
FXPS7250_SNSDATA1_H
FXPS7250_SNSDATA0_TIME0
FXPS7250_SNSDATA0_TIME1
FXPS7250_SNSDATA0_TIME2
FXPS7250_SNSDATA0_TIME3
FXPS7250_SNSDATA0_TIME4
FXPS7250_SNSDATA0_TIME5
FXPS7250_P_MAX_L
FXPS7250_P_MAX_H
FXPS7250_P_MIN_L
FXPS7250_P_MIN_H
FXPS7250_FRT0
FXPS7250_FRT1
FXPS7250_FRT2
FXPS7250_FRT3
FXPS7250_FRT4
FXPS7250_FRT5
FXPS7250_DSP_CFG_F
FXPS7250_CRC_F_A
FXPS7250_CRC_F_B
FXPS7250_ICTYPEID
FXPS7250_ICREVID
FXPS7250_ICMFGID
FXPS7250_PN0
FXPS7250_PN1
FXPS7250_SN0
FXPS7250_SN1
FXPS7250_SN2
FXPS7250_SN3
FXPS7250_SN4
FXPS7250_ASICWFR
FXPS7250_ASICWFR_X
FXPS7250_ASICWFR_Y
FXPS7250_CRC_F_C
FXPS7250_ASICWLOT_L
FXPS7250_ASICWLOT_H
FXPS7250_CRC_F_D
FXPS7250_USERDATA_0
FXPS7250_USERDATA_1
FXPS7250_USERDATA_2
FXPS7250_USERDATA_3
FXPS7250_USERDATA_4
FXPS7250_USERDATA_5
FXPS7250_USERDATA_6
FXPS7250_USERDATA_7
FXPS7250_USERDATA_8
FXPS7250_USERDATA_9
FXPS7250_USERDATA_A
FXPS7250_USERDATA_B
FXPS7250_USERDATA_C
FXPS7250_USERDATA_D
FXPS7250_USERDATA_E
FXPS7250_CRC_UF0
FXPS7250_USERDATA_10
FXPS7250_USERDATA_11
FXPS7250_USERDATA_12
FXPS7250_USERDATA_13
FXPS7250_USERDATA_14
FXPS7250_USERDATA_15
FXPS7250_USERDATA_16
FXPS7250_USERDATA_17
FXPS7250_USERDATA_18
FXPS7250_USERDATA_19
FXPS7250_USERDATA_1A
FXPS7250_USERDATA_1B
FXPS7250_USERDATA_1C
FXPS7250_USERDATA_1D
FXPS7250_USERDATA_1E
FXPS7250_CRC_UF1

Definition at line 21 of file dbap.h.

Data Structures

Macros

Typedefs

Enumerations