MCUXpresso SDK Changelog

AIPSTZ

[2.0.1]

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 10.3, 10.4, and 14.4.

[2.0.0]

• Initial version.

---

eASRC

[2.0.6]

• Improvements

  • Updated use of definitions in the function ASRC_SetSlotConfig and ASRC_EnableContextSlot.

[2.0.5]

• Improvements

  • Fixed the typo and multichannel configuration issues in asrc driver.

  • Updated the asrc firmware table for better THD performance.

[2.0.4]

• Improvements

  • Corrected the data width support by IEC60958,

  • Updated the default stage1 result to float to avoid convert result distortion.

[2.0.3]

• Bug Fixes

  • Corrected the btis shift index used in function ASRC_TransferBlocking.

  • Ensured the resampler and prefilter are not in bypass mode when the convertion require the function.

[2.0.2]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.1, 10.3, 10.4, 14.3, 14.4, 16.3, 16.1, 16.8, 17.7.

[2.0.1]

• Bug Fixes

  • Fixed the context id hard code issue in the function ASRC_TransferInCreateHandleSDMA/ASRC_TransferOutCreateHandleSDMA.

• Improvements

  • Added support for the data size bigger than 64K in sdma driver.

[2.0.0]

• Initial version.

---

ASRC_SDMA

[2.0.3]

• Refer asrc driver change log 2.0.0 to 2.0.3

---

CACHE ARMv7-M7

[2.0.4]

• Bug Fixes

  • Fixed doxygen issue.

[2.0.3]

• Improvements

  • Deleted redundancy code about calculating cache clean/invalidate size and address aligns.

[2.0.2]

• Bug Fixes

  • Fixed violation of MISRA C-2012 Rule 10.1, 10.3 and 10.4.

[2.0.1]

• Bug Fixes

  • Fixed cache size issue in L2CACHE_GetDefaultConfig API.

[2.0.0]

• Initial version.

---

COMMON

[2.5.0]

• New Features

  • Added new APIs InitCriticalSectionMeasurementContext, DisableGlobalIRQEx and EnableGlobalIRQEx so that user can measure the execution time of the protected sections.

[2.4.3]

• Improvements

  • Enable irqs that mount under irqsteer interrupt extender.

[2.4.2]

• Improvements

  • Add the macros to convert peripheral address to secure address or non-secure address.

[2.4.1]

• Improvements

  • Improve for the macro redefinition error when integrated with zephyr.

[2.4.0]

• New Features

  • Added EnableIRQWithPriority, IRQ_SetPriority, and IRQ_ClearPendingIRQ for ARM.

  • Added MSDK_EnableCpuCycleCounter, MSDK_GetCpuCycleCount for ARM.

[2.3.3]

• New Features

  • Added NETC into status group.

[2.3.2]

• Improvements

  • Make driver aarch64 compatible

[2.3.1]

• Bug Fixes

  • Fixed MAKE_VERSION overflow on 16-bit platforms.

[2.3.0]

• Improvements

  • Split the driver to common part and CPU architecture related part.

[2.2.10]

• Bug Fixes

  • Fixed the ATOMIC macros build error in cpp files.

[2.2.9]

• Bug Fixes

  • Fixed MISRA C-2012 issue, 5.6, 5.8, 8.4, 8.5, 8.6, 10.1, 10.4, 17.7, 21.3.

  • Fixed SDK_Malloc issue that not allocate memory with required size.

[2.2.8]

• Improvements

  • Included stddef.h header file for MDK tool chain.

• New Features:

  • Added atomic modification macros.

[2.2.7]

• Other Change

  • Added MECC status group definition.

[2.2.6]

• Other Change

  • Added more status group definition.

• Bug Fixes

  • Undef __VECTOR_TABLE to avoid duplicate definition in cmsis_clang.h

[2.2.5]

• Bug Fixes

  • Fixed MISRA C-2012 rule-15.5.

[2.2.4]

• Bug Fixes

  • Fixed MISRA C-2012 rule-10.4.

[2.2.3]

• New Features

  • Provided better accuracy of SDK_DelayAtLeastUs with DWT, use macro SDK_DELAY_USE_DWT to enable this feature.

  • Modified the Cortex-M7 delay count divisor based on latest tests on RT series boards, this setting lets result be closer to actual delay time.

[2.2.2]

• New Features

  • Added include RTE_Components.h for CMSIS pack RTE.

[2.2.1]

• Bug Fixes

  • Fixed violation of MISRA C-2012 Rule 3.1, 10.1, 10.3, 10.4, 11.6, 11.9.

[2.2.0]

• New Features

  • Moved SDK_DelayAtLeastUs function from clock driver to common driver.

[2.1.4]

• New Features

  • Added OTFAD into status group.

[2.1.3]

• Bug Fixes

  • MISRA C-2012 issue fixed.

    • Fixed the rule: rule-10.3.

[2.1.2]

• Improvements

  • Add SUPPRESS_FALL_THROUGH_WARNING() macro for the usage of suppressing fallthrough warning.

[2.1.1]

• Bug Fixes

  • Deleted and optimized repeated macro.

[2.1.0]

• New Features

  • Added IRQ operation for XCC toolchain.

  • Added group IDs for newly supported drivers.

[2.0.2]

• Bug Fixes

  • MISRA C-2012 issue fixed.

    • Fixed the rule: rule-10.4.

[2.0.1]

• Improvements

  • Removed the implementation of LPC8XX Enable/DisableDeepSleepIRQ() function.

  • Added new feature macro switch “FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION” for specific SoCs which have no noncacheable sections, that helps avoid an unnecessary complex in link file and the startup file.

  • Updated the align(x) to attribute(aligned(x)) to support MDK v6 armclang compiler.

[2.0.0]

• Initial version.

---

ECSPI

[2.3.3]

• Bug Fixes

  • Fixed the txData from void * to const void * in transmit API

[2.3.2]

• Improvements

  • Changed ECSPI_DUMMYDATA to 0x00.

[2.3.1]

• Bug Fixes

  • Fixed ECSPI_GetInstance potential issue that return wrong instance number.

[2.3.0]

• Bug Fixes

  • Fixed burst length issue,the burst length range shall range from 1-4096 bits, so the width shall be uint8_t rather than uint16_t.

[2.2.0]

• Bug Fixes

  • Removed the useless channel configuration of waveform, since the waveform can not be configured when not using the exchange bit(ECSPIx_CONREG[XCH]) for the transfer.

  • Fixed violations of MISRA C-2012 rules: 10.1, 11.9, 8.4.

[2.1.1]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rules: 10.1, 10.3, 10.4, 11.9, 14.4, 15.7, 17.7.

[2.1.0]

• Improvements

  • Added timeout mechanism when waiting certain states in transfer driver.

[2.0.2]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rules: 10.1, 10.3, 10.4

[2.0.1]

• Bug Fixes

  • Memset local variable SDMA transfer configuration structure to make sure unused members in structure are cleared.

  • Fixed sign-compare warning in ECSPI_SendTransfer.

[2.0.0]

• Initial version.

---

EDMA (DMA3)

[2.3.2]

• Improvements

  • Conditionally compile interrupt handling code to solve the problem of using this driver on CPU cores that do not support interrupts.

[2.3.1]

• Bug Fixes

  • Added clear TCD_CITER_ELINKNO and TCD_BITER_ELINKNO registers in EDMA_AbortTransfer to make sure the TCD registers in a correct state for next calling of EDMA_SubmitTransfer.

[2.3.0]

• Improvements

  • Added feature FSL_FEATURE_EDMA_HAS_NO_SBR_ATTR_BIT to separate DMA without ATTR bitfield.

[2.2.7]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 10.8, 5.6.

[2.2.6]

• Bug Fixes

  • Fixed the TCD overwrite issue when submit transfer request in the callback if there is a active TCD in hardware.

[2.2.5]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 10.1, 10.4.

[2.2.4]

• Bug Fixes

  • Fix the issue that EDMA_AbortTransfer not reset edma handle(tcdUsed, tail, header) and fix EDMA_InstallTCDMemory(handle->header = 1)

[2.2.3]

• Improvements

  • Added feature FSL_FEATURE_EDMA_MODULE_CHANNEL_IRQ_ENTRY_SUPPORT_PARAMETER to support driver IRQ handler with parameters.

  • Added feature FSL_FEATURE_EDMA_HAS_COMMON_CLOCK_GATE to improve clock gate control in dma driver.

[2.2.2]

• Bug Fixes

  • Fixed the issue of EDMA_SubmitTransfer return busy when calling EDMA_EnableChannelInterrupts before submit transfer.

  • Fixed violations of MISRA C-2012 rule 10.4, 10.1, 9.2, 10.4, 10.6, 14.4, 10.7, 14.3, 11.6.

[2.2.1]

• Improvements

  • Removed channel MUX reset from EDMA_ResetChannel, since channel mux should be constant while channel is alive.

[2.2.0]

• Improvements

  • Added new API EDMA_SetChannelMux to support channel mux feature.

  • Added new API EDMA_PrepareTransferConfig to expose paramters source offset and destination offset.

  • Exposed EDMA_InstallTCD function to application.

  • Added source/destination address alignment check.

[2.1.1]

• Improvements

  • Added 8bytes transfer width feature support in driver.

[2.1.0]

• Bug Fixes

  • Added const type for parameter configuration in EDMA_SubmitTransfer and EDMA_HandleTransferConfig API.

  • Added configurations for srcAddr and destAddr in EDMA_PrepareTransfer API.

[2.0.2]

• Improvements

  • Updated eDMA driver to support MP_CR bit GMRC.

  • Updated eDMA instance name for i.MX 8QM.

  • Used instance number as factor to calculate channel number for different instance instead of hard code.

[2.0.1]

• New Features

  • Added control macro to enable/disable the CLOCK code in current driver.

  • Added s_EDMAEnabledChannel to record enabled channel to merge all the channel IRQ handler into driver IRQ handler.

  • Added feature macro for bits EMI and EBW in MP_CSR.

• Improvements

  • Removed all the separated channel IRQ handler in DMA driver.

[2.0.0]

• Initial version.

---

ENET

[2.9.2]

• Bug Fixes

  • RGMII mode is (temporarily) disabled before selecting between 10/100-Mbit/s and 1000-Mbit/s modes of operation. The bit RGMII_EN of RCR register must not be set while changing ECR register’s speed bit, otherwise there is a possibility of ENET IP ending in an incorrect state.

[2.9.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 8.4, 10.4.

[2.9.0]

• Bug Fixes

  • Enabled collection of transfer statistics, so the function ENET_GetStatistics does not always return zeroes.

• New Features

  • Added new function ENET_EnableStatistics to enable/disable collection of transfer statistics.

  • Added new function ENET_ResetStatistics to reset transfer statistics.

• Improvements

  • Renamed the function ENET_ResetHareware to ENET_ResetHardware.

[2.8.0]

• New Features

  • Added the function to reset hardware on certain devices.

[2.7.1]

• Bug Fixes

  • Fixed the issue that free wrong buffer address when one frame stores in multiple buffers and memory pool is not enough to allocate these buffers to receive one complete frame.

[2.7.0]

• Improvements

  • Deleted deprecated zero copy Tx/Rx functions and set callback function which can be configured in ENET_Init.

  • Moved the Rx zero copy buffer allocation to Rx BD initialization function to reduce unnecessary looping code.

• Bug Fixes

  • Fixed the issue that predefined Rx buffers which should not be used when enabling Rx zero copy are still be handled by cache operation, it causes hardfault on some platforms.

  • Fixed the issue that zero-copy Rx function doesn’t check Rx length of 0 in the BD with EMPTY bit is 0, it may occur in the corner case reported by customer. Not sure how it turns out, consider it as an ENET IP issue and drop this abnormal BD.

[2.6.3]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 11.6.

[2.6.2]

• Improvements

  • Changed ENET1_MAC0_Rx_Tx_Done0_DriverIRQHandler/ENET1_MAC0_Rx_Tx_Done1_DriverIRQHandler to ENET1_MAC0_Rx_Tx_Done1_DriverIRQHandler/ENET1_MAC0_Rx_Tx_Done2_DriverIRQHandler which represent ring 1 and ring 2.

[2.6.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 10.7, 11.6, 11.8.

[2.6.0]

• Improvements

  • Added MDIO access wrapper APIs for ease of use.

  • Fixed the build warning introduced by 64-bit compatibility patch.

[2.5.4]

• Improvements

  • Made the driver compatible with 64-bit platforms.

[2.5.3]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 11.6.

[2.5.2]

• Improvements

  • Updated the TXIC/RXIC register handling code according to the new header file.

[2.5.1]

• Bug Fixes

  • Fixed document typo.

[2.5.0]

• Bug Fixes

  • Fixed the SendFrame/SendFrameZeroCopy functions issue with scattered buffers.

  • Updated the formula of MDC calculation.

  • Used a feature macro to distinguish the old IP design from the new design, because old IP design always reads a value zero from ATCR->CAPTURE bit. For old IP, driver caculates and wait the necessary delay cycles after setting ATCR->CAPTURE then gets the timestamp value.

• New Features

  • Added new zero copy Tx/Rx function.

  • New zero copy Tx function combines scattered and contiguous Tx buffer in one API, it also supports more Tx featrues which buffer descriptor supports but previous Tx function doesn’t support.

  • New zero copy Rx function use dynamic buffer mechanism and simpler interface.

• Improvements

  • Corrected the interrupt handler for PTP timestamp IRQ and PTP1588 event IRQ since platform difference.

  • Added missing IRQ handlers for PTP1588 events on some platforms.

  • Corrected the max Tx frame length verification, it will not depend on a fixed macro. The ENET_FRAME_MAX_FRAMELEN is only an default value for driver, application can configure it. Driver caculates the limitation with the max frame length in register which may takes extended 4 or 8 bytes VLAN tag if VLAN/SVLAN enables.

  • Deleted deprecated Clause 45 read/write legacy APIs.

[2.4.3]

• Improvements

  • Aligned the IRQ handler name with header file.

[2.4.2]

• Bug Fixes

  • Fixed the MISRA issue of speculative out-of-bounds access.

[2.4.1]

• Bug Fixes

  • Fixed the PTP time capture issue.

[2.4.0]

• Improvements

  • Exposed API ENET_ReclaimTxDescriptor for user application to relaim tx descriptors in their application.

  • Added counter to record multicast hash conflict in struct _enet_handle, improved the situation that one multicast group could be left by other conflict multicast address left operation.

  • Improved concurrent usage of relaim and send frame operation.

[2.3.4]

• Bug Fixes

  • Fixed the issue that interrupt handler only checks the interrupt event flag but not checks interrupt mask flag.

[2.3.3]

• Bug Fixes

  • Fixed the issue that some compilers may choose the memcpy with 4-bit aligned address limitation due to the type of address pointer is ‘unsigned int *’, the data address doesn’t have to be 4-bit aligned.

[2.3.2]

• New Features

  • Added the feature that ENET driver can be used in the platform which integrates both 10/100M and 1G ENET IP.

  • Deleted duplicated code about ARM errata 838869 in first/second level IRQ handler.

[2.3.1]

• Improvements

  • Added function pointer checking in IRQ handler to make sure code can be used even it runs into the interrupt when the second level interupt handler is NULL.

[2.3.0]

• Bug Fixes

  • Fixed the issue that clause 45 MDIO read/write API doesn’t check the transmission over status between two transmissions.

  • Fixed violations of the MISRA C-2012 rules 2.2,10.3,10.4,10.7,11.6,11.8,13.5,14.4,15.7,17.7.

• New Features

  • Added APIs to support send/receive frame with Zero-Copy.

• Improvements

  • Separated the clock configuration from module configuration when init and deinit.

  • Added functions to set second level interrupt handler.

  • Provided new function to get 1588 timer count without disabling interrupt.

  • Improved timestamp controlling, deleted all old timestamp management APIs and data structures.

  • Merged the single/multiple ring(s) APIs, now these APIs can handle both.

  • Used base and index to control buffer descriptor, aligned with qos and lpc enet driver.

[2.2.6]

• Bug Fixes

  • Updated MII speed formula referring to the manual.

[2.2.5]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.1, 10.3, 10.4, 10.6, 10.7, 11.6, 11.9, 13.5, 14.4, 16.4, 17.7, 21.15, 3.1, 8.4.

  • Changed to use ARRAY_SIZE(s_enetBases) as the array size for s_ENETHandle, fixed the hardfault issue for using some ENET instance when ARRAY_SIZE(s_enetBases) is not same as FSL_FEATURE_SOC_ENET_COUNT.

[2.2.4]

• Improvements

  • Added call to Data Synchronization Barrier instruction before activating Tx/Rx buffer descriptor to ensure previous data update is completed.

  • Improved ENET_TransmitIRQHandler to store timestamps for multiple transmit buffer descriptors.

  • Bug Fixes

  • Fixed the issue that ENET_Ptp1588GetTimer did not handle the timer wrap situation.

[2.2.3]

• Improvements

  • Improved data buffer cache maintenance in the ENET driver.

[2.2.2]

• New Features

  • Added APIs for extended multi-ring support.

  • Added the AVB configure API for extended AVB feature support.

[2.2.1]

• Improvements

  • Changed the input data pointer attribute to const in ENET_SendFrame().

[2.1.1]

• New Features

  • Added the extended MDIO IEEE802.3 Clause 45 MDIO format SMI command APIs.

  • Added the extended interrupt coalescing feature.

• Improvements

  • Combined all storage operations in the ENET_Init to ENET_SetHandler API.

[2.0.1]

• Bug Fixes

  • Used direct transmit busy check when doing data transmit.

• Miscellaneous Changes

  • Updated IRQ handler work flow.

  • Changed the TX/RX interrupt macro from kENET_RxByteInterrupt to kENET_RxBufferInterrupt, from kENET_TxByteInterrupt to kENET_TxBufferInterrupt.

  • Deleted unnecessary parameters in ENET handler.

[2.0.0]

• Initial version.

---

ENET_QOS

[2.6.5]

• Bug Fixes

  • Fixed ENET_QOS_GetMacAddr address byte order not matching ENET_QOS_SetMacAddr.

[2.6.4]

• Improvements

  • ENET_QOS_SetMII returns success or failure status now (related to i.MX RT1170 errata ERR050539 - ENET_QOS doesn’t support RMII 10Mbps mode).

• Bug Fixes

  • Fixed the MISRA C-2012 issue rule 14.3.

[2.6.3]

• Bug Fixes

  • Fixed the issue that ENET_QOS_GetRxFrame, ENET_QOS_ReadFrame and ENET_QOS_DropFrame did not properly restart the receiving once it stopped.

[2.6.2]

• Bug Fixes

  • Fixed the issue that free wrong buffer address when one frame stores in multiple buffers and memory pool is not enough to allocate these buffers to receive one complete frame.

[2.6.1]

• Bug Fixes

  • Fixed the issue that ENET_QOS_ReadFrame doesn’t check timestamp available bit before check the context BD bit, it makes software update extra BD. If DMA receives new frame to this BD before software update, software will lose this frame.

[2.6.0]

• New features

  • Added hardware checksum acceleration support.

[2.5.3]

• Bug Fixes

  • Fixed the MISRA issue rule 14.3, 5.3.

[2.5.2]

• Bug Fixes

  • Fixed the issue that ENET_QOS_Init reset the MDIO setting of ENET_QOS_SetSMI.

[2.5.1]

• Improvements

  • Supported RMII mode.

[2.5.0]

• Improvements

  • Added MDIO access wrapper APIs for ease of use.

[2.4.1]

• Improvements

  • Supported cache control.

  • Supported BD address convertion to system address.

  • Make driver aarch64 compatible

• Bug Fixes

  • Fixed the issue that driver internal interface ENET_QOS_DropFrame drops all frames in whole BD ring rather than one frame as design. Impact case: 1. Rx drop occurs in zero copy Rx API ENET_QOS_GetRxFrame. 2. Call ENET_QOS_ReadFrame with data pointer is NULL, driver will drop all Rx frames.

[2.4.0]

• New features

  • Added MDIO IEEE802.3 Clause 45 access support.

  • Added get statistics API to get some statistical data in transfer.

  • Added new APIs to support zero copy Rx.

  • Fixed the MISRA issue rule 8.4, 8.6.

[2.3.0]

• Improvements

  • Added counter to record multicast hash conflict in struct _enet_handle, improved the situation that one multicast group could be left by other conflict multicast address left operation.

• Bug Fixes

  • Updated txDirtyRing maintenance in reclaim and send frame process, allow txDirtyRing to be overwritten.

  • Disabled carrier sensing in full duplex mode configuration in ethernet initialization

  • Fixed 1588 sub-second calculate issue.

[2.2.2]

• Bug Fixes

  • Fixed the issue that ENET_QOS_SetupTxDescriptor didn’t handle the DMA access address mapping for SoCs have feature FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET.

  • Fixed MISRA 2012 violations detected in examples build.

[2.2.1]

• Bug Fixes

  • Fixed MISRA 2012 violations, fixed doxygen warning.

  • Fixed the issue that cache invalidate to invalid converted memory address in ENET_QOS_ReadFrame for SoCs have feature FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET.

[2.2.0]

• Removed the ptp time data ring management, below structures and APIs are removed:

  • structure enet_qos_ptp_time_data_t

  • structure enet_qos_ptp_time_data_ring_t

  • API ENET_QOS_GetRxFrameTime

  • API ENET_QOS_GetTxFrameTime

• Added API for GCL list read and AVB configuration

  • ENET_QOS_EstReadGcl

  • ENET_QOS_AVBConfigure

• Improved driver for PTP system time configuration, timestamp read.

• Added IRQ lock and memory barrier instruction for descriptor operation.

• Fixed MISRA 2012 violations

[2.1.1]

• Bug Fixes

  • Fixed the bug that data pointer is not converted to local memory address in the call to ENET_QOS_Ptp1588ParseFrame.

[2.1.0]

• New feature

  • Update driver to support feature FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET which convert buffer address to visible address for DMA.

  • Require user to provide implementation for ENET_QOS_SetSYSControl API, which set the PHY interface and enable clock generation for IP.

[2.0.0]

• Initial version.

---

FLEXCAN

[2.13.1]

• Improvements

  • Conditionally compile interrupt handling code to solve the problem of using this driver on CPU cores that do not support interrupts.

[2.13.0]

• Improvements

  • Support payload endianness selection feature.

[2.12.0]

• Improvements

  • Support automatic Remote Response feature.

  • Add API FLEXCAN_SetRemoteResponseMbConfig() to configure automatic Remote Response mailbox.

[2.11.8]

• Improvements

  • Synchronize flexcan driver update on s32z platform.

[2.11.7]

• Bug Fixes

  • Fixed FLEXCAN_TransferReceiveEnhancedFifoEDMA() compatibility with edma5.

[2.11.6]

• Bug Fixes

  • Fixed ERRATA_9595 FLEXCAN_EnterFreezeMode() may result to bus fault on some platform.

[2.11.5]

• Bug Fixes

  • Fixed flexcan_memset() crash under high optimization compilation.

[2.11.4]

• Improvements

  • Update CANFD max bitrate to 10Mbps on MCXNx3x and MCXNx4x.

  • Release peripheral from reset if necessary in init function.

[2.11.3]

• Bug Fixes

  • Fixed FLEXCAN_TransferReceiveEnhancedFifoEDMA() compile error with DMA3.

[2.11.2]

• Bug Fixes

  • Fixed bug that timestamp in flexcan_handle_t not updated when RX overflow happens.

[2.11.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.1.

[2.11.0]

• Bug Fixes

  • Fixed wrong base address argument in FLEXCAN2 IRQ Handler.

• Improvements

  • Add API to determine if the instance supports CAN FD mode at run time.

[2.10.1]

• Bug Fixes

  • Fixed HIS CCM issue.

  • Fixed RTOS issue by adding protection to read-modify-write operations on interrupt enable/disable API.

[2.10.0]

• Improvements

  • Update driver to make it able to support devices which has more than 64 8bytes MBs.

  • Update CAN FD transfer APIs to make them set/get edl bit according to frame content, which can make them compatible with classic CAN.

[2.9.2]

• Bug Fixes

  • Fixed the issue that FLEXCAN_CheckUnhandleInterruptEvents() can’t detecting the exist enhanced RX FIFO interrupt status.

  • Fixed the issue that FLEXCAN_ReadPNWakeUpMB() does not return fail even no existing valid wake-up frame.

  • Fixed the issue that FLEXCAN_ReadEnhancedRxFifo() may clear bits other than the data available bit.

  • Fixed violations of the MISRA C-2012 rules 10.4, 10.8.

• Improvements

  • Return kStatus_FLEXCAN_RxFifoDisabled instead of kStatus_Fail when read FIFO fail during IRQ handler.

  • Remove unreachable code from timing calculates APIs.

  • Update Enhanced Rx FIFO handler to make it deal with underflow/overflow status first.

[2.9.1]

• Bug Fixes

  • Fixed the issue that FLEXCAN_TransferReceiveEnhancedFifoBlocking() API clearing Fifo data available flag more than once.

  • Fixed the issue that entering FLEXCAN_SubHandlerForEhancedRxFifo() even if Enhanced Rx fifo interrupts are not enabled.

  • Fixed the issue that FLEXCAN_TransferReceiveEnhancedFifoEDMA() update handle even if previous Rx FIFO receive not finished.

  • Fixed the issue that FLEXCAN_SetEnhancedRxFifoConfig() not configure the ERFCR[NFE] bits to the correct value.

  • Fixed the issue that FLEXCAN_ReceiveFifoEDMACallback() can’t differentiate between Rx fifo and enhanced rx fifo.

  • Fixed the issue that FLEXCAN_TransferHandleIRQ() can’t report Legacy Rx FIFO warning status.

[2.9.0]

• Improvements

• Add public set bit rate API to make driver easier to use.

• Update Legacy Rx FIFO transfer APIs to make it support received multiple frames during one API call.

• Optimized FLEXCAN_SubHandlerForDataTransfered() API in interrupt handling to reduce the probability of packet loss.

[2.8.7]

• Improvements

• Initialized the EDMA configuration structure in the FLEXCAN EDMA driver.

[2.8.6]

• Bug Fixes

• Fix Coverity overrun issues in fsl_flexcan_edma driver.

[2.8.5]

• Improvements

  • Make driver aarch64 compatible.

[2.8.4]

• Bug Fixes

  • Fixed FlexCan_Errata_6032 to disable all interrupts.

[2.8.3]

• Bug Fixes

  • Fixed an issue with the FLEXCAN_EnableInterrupts and FLEXCAN_DisableInterrupts interrupt enable bits in the CTRL1 register.

[2.8.2]

• Bug Fixes

  • Fixed errors in timing calculations and simplify the calculation process.

  • Fixed issue of CBT and FDCBT register may write failure.

[2.8.1]

• Bug Fixes

  • Fixed the issue of CAN FD three sampling points.

  • Added macro to support the devices that no MCR[SUPV] bit.

  • Remove unnecessary clear WMB operations.

[2.8.0]

• Improvements

  • Update config configuration.

    • Added enableSupervisorMode member to support enable/disable Supervisor mode.

  • Simplified the algorithm in CAN FD improved timing APIs.

[2.7.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.3, 10.7.

[2.7.0]

• Improvements

  • Update config configuration.

    • Added enablePretendedeNetworking member to support enable/disable Pretended Networking feature.

    • Added enableTransceiverDelayMeasure member to support enable/disable Transceiver Delay MeasurementPretended feature.

    • Added bitRate/bitRateFD member to work as baudRate/baudRateFD member union.

  • Rename all “baud” in code or comments to “bit” to align with the CAN spec.

  • Added Pretended Networking mode related APIs.

    • FLEXCAN_SetPNConfig

    • FLEXCAN_GetPNMatchCount

    • FLEXCAN_ReadPNWakeUpMB

  • Added support for Enhanced Rx FIFO.

  • Removed independent memory error interrupt/status APIs and put all interrupt/status control operation into FLEXCAN_EnableInterrupts/FLEXCAN_DisableInterrupts and FLEXCAN_GetStatusFlags/FLEXCAN_ClearStatusFlags APIs.

  • Update improved timing APIs to make it calculate improved timing according to CiA doc recommended.

    • FLEXCAN_CalculateImprovedTimingValues.

    • FLEXCAN_FDCalculateImprovedTimingValues.

  • Update FLEXCAN_SetBitRate/FLEXCAN_SetFDBitRate to added the use of enhanced timing registers.

[2.6.2]

• Improvements

  • Add CANFD frame data length enumeration.

[2.6.1]

• Bug Fixes

  • Fixed the issue of not fully initializing memory in FLEXCAN_Reset() API.

[2.6.0]

• Improvements

  • Enable CANFD ISO mode in FLEXCAN_FDInit API.

  • Enable the transceiver delay compensation feature when enable FD operation and set bitrate switch.

  • Implementation memory error control in FLEXCAN_Init API.

  • Improve FLEXCAN_FDCalculateImprovedTimingValues API to get same value for FPRESDIV and PRESDIV.

  • Added memory error configuration for user.

    • enableMemoryErrorControl

    • enableNonCorrectableErrorEnterFreeze

  • Added memory error related APIs.

    • FLEXCAN_GetMemoryErrorReportStatus

    • FLEXCAN_GetMemoryErrorStatusFlags

    • FLEXCAN_ClearMemoryErrorStatusFlags

    • FLEXCAN_EnableMemoryErrorInterrupts

    • FLEXCAN_DisableMemoryErrorInterrupts

• Bug Fixes

  • Fixed the issue of sent duff CAN frame after call FLEXCAN_FDInit() API.

[2.5.2]

• Bug Fixes

  • Fixed the code error issue and simplified the algorithm in improved timing APIs.

    • The bit field in CTRL1 register couldn’t calculate higher ideal SP, we set it as the lowest one(75%)

      • FLEXCAN_CalculateImprovedTimingValues

      • FLEXCAN_FDCalculateImprovedTimingValues

  • Fixed MISRA-C 2012 Rule 17.7 and 14.4.

• Improvements

  • Pass EsrStatus to callback function when kStatus_FLEXCAN_ErrorStatus is comming.

[2.5.1]

• Bug Fixes

  • Fixed the non-divisible case in improved timing APIs.

    • FLEXCAN_CalculateImprovedTimingValues

    • FLEXCAN_FDCalculateImprovedTimingValues

[2.5.0]

• Bug Fixes

  • MISRA C-2012 issue check.

    • Fixed rules, containing: rule-10.1, rule-10.3, rule-10.4, rule-10.7, rule-10.8, rule-11.8, rule-12.2, rule-13.4, rule-14.4, rule-15.5, rule-15.6, rule-15.7, rule-16.4, rule-17.3, rule-5.8, rule-8.3, rule-8.5.

  • Fixed the issue that API FLEXCAN_SetFDRxMbConfig lacks inactive message buff.

  • Fixed the issue of Pa082 warning.

  • Fixed the issue of dead lock in the function of interruption handler.

  • Fixed the issue of Legacy Rx Fifo EDMA transfer data fail in evkmimxrt1060 and evkmimxrt1064.

  • Fixed the issue of setting CANFD Bit Rate Switch.

  • Fixed the issue of operating unknown pointer risk.

    • when used the pointer “handle->mbFrameBuf[mbIdx]” to update the timestamp in a short-live TX frame, the frame pointer became as unknown, the action of operating it would result in program stack destroyed.

  • Added assert to check current CAN clock source affected by other clock gates in current device.

    • In some chips, CAN clock sources could be selected by CCM. But for some clock sources affected by other clock gates, if user insisted on using that clock source, they had to open these gates at the same time. However, they should take into consideration the power consumption issue at system level. In RT10xx chips, CAN clock source 2 was affected by the clock gate of lpuart1. ERRATA ID: (ERR050235 in CCM).

• Improvements

  • Implementation for new FLEXCAN with ECC feature able to exit Freeze mode.

  • Optimized the function of interruption handler.

  • Added two APIs for FLEXCAN EDMA driver.

    • FLEXCAN_PrepareTransfConfiguration

    • FLEXCAN_StartTransferDatafromRxFIFO

  • Added new API for FLEXCAN driver.

    • FLEXCAN_GetTimeStamp

      • For TX non-blocking API, we wrote the frame into mailbox only, so no need to register TX frame address to the pointer, and the timestamp could be updated into the new global variable handle->timestamp[mbIdx], the FLEXCAN driver provided a new API for user to get it by handle and index number after TX DONE Success.

    • FLEXCAN_EnterFreezeMode

    • FLEXCAN_ExitFreezeMode

  • Added new configuration for user.

    • disableSelfReception

    • enableListenOnlyMode

  • Renamed the two clock source enum macros based on CLKSRC bit field value directly.

    • The CLKSRC bit value had no property about Oscillator or Peripheral type in lots of devices, it acted as two different clock input source only, but the legacy enum macros name contained such property, that misled user to select incorrect CAN clock source.

  • Created two new enum macros for the FLEXCAN driver.

    • kFLEXCAN_ClkSrc0

    • kFLEXCAN_ClkSrc1

  • Deprecated two legacy enum macros for the FLEXCAN driver.

    • kFLEXCAN_ClkSrcOsc

    • kFLEXCAN_ClkSrcPeri

  • Changed the process flow for Remote request frame response..

    • Created a new enum macro for the FLEXCAN driver.

      • kStatus_FLEXCAN_RxRemote

  • Changed the process flow for kFLEXCAN_StateRxRemote state in the interrupt handler.

    • Should the TX frame not register to the pointer of frame handle, interrupt handler would not be able to read the remote response frame from the mail box to ram, so user should read the frame by manual from mail box after a complete remote frame transfer.

[2.4.0]

• Bug Fixes

  • MISRA C-2012 issue check.

    • Fixed rules, containing: rule-12.1, rule-17.7, rule-16.4, rule-11.9, rule-8.4, rule-14.4, rule-10.8, rule-10.4, rule-10.3, rule-10.7, rule-10.1, rule-11.6, rule-13.5, rule-11.3, rule-8.3, rule-12.2 and rule-16.1.

  • Fixed the issue that CANFD transfer data fail when bus baudrate is 30Khz.

  • Fixed the issue that ERR009595 does not folllow the ERRATA document.

  • Fixed code error for ERR006032 work around solution.

  • Fixed the Coverity issue of BAD_SHIFT in FLEXCAN.

  • Fixed the Repo build warning issue for variable without initial.

• Improvements

  • Fixed the run fail issue of FlexCAN RemoteRequest UT Case.

  • Implementation all TX and RX transfering Timestamp used in FlexCAN demos.

  • Fixed the issue of UT Test Fail for CANFD payload size changed from 64BperMB to 8PerMB.

  • Implementation for improved timing API by baud rate.

[2.3.2]

• Improvements

  • Implementation for ERR005959.

  • Implementation for ERR005829.

  • Implementation for ERR006032.

[2.3.1]

• Bug Fixes

  • Added correct handle when kStatus_FLEXCAN_TxSwitchToRx is comming.

[2.3.0]

• Improvements

  • Added self-wakeup support for STOP mode in the interrupt handling.

[2.2.3]

• Bug Fixes

  • Fixed the issue of CANFD data phase’s bit rate not set as expected.

[2.2.2]

• Improvements

  • Added a time stamp feature and enable it in the interrupt_transfer example.

[2.2.1]

• Improvements

  • Separated CANFD initialization API.

  • In the interrupt handling, fix the issue that the user cannot use the normal CAN API when with an FD.

[2.2.0]

• Improvements

  • Added FSL_FEATURE_FLEXCAN_HAS_SUPPORT_ENGINE_CLK_SEL_REMOVE feature to support SoCs without CAN Engine Clock selection in FlexCAN module.

  • Added FlexCAN Serial Clock Operation to support i.MX SoCs.

[2.1.0]

• Bug Fixes

  • Corrected the spelling error in the function name FLEXCAN_XXX().

  • Moved Freeze Enable/Disable setting from FLEXCAN_Enter/ExitFreezeMode() to FLEXCAN_Init().

  • Corrected wrong helper macro values.

• Improvements

  • Hid FLEXCAN_Reset() from user.

  • Used NDEBUG macro to wrap FLEXCAN_IsMbOccupied() function instead of DEBUG macro.

[2.0.0]

• Initial version.

---

GPC

[2.2.0]

• Improvements

  • Optimized the exited APIs to support extended IRQs and slots.

• Bug Fixes

  • Fixed the violations of MISRA C-2012 rules.

[2.1.0]

• Improvements

  • Unified the register or bit fields’ name which contains specific cortex M core information.

• Bug Fixes

  • Fixed Coverity Out-of-bounds issue.

[2.0.1]

• Improvements

  • Added parameters to enable/disable the WFI and DSM mask.

[2.0.0]

• Initial version.

---

GPIO

[2.0.6]

• Bug Fixes

  • Fixed compile warning: ‘GPIO_GetInstance’ defined but not used when macro FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL is defined.

[2.0.5]

• Bug Fixes

  • Fixed MISRA C-2012 issue: rule-17.7.

[2.0.4]

• Improvements

  • Updated the GPIO_PinWrite to use atomic operation if possible.

• Bug Fixes

  • Fixed GPIO_PortToggle bug with platforms don’t have register DR_TOGGLE.

[2.0.3]

• Bug Fixes

  • MISRA C-2012 issue fixed.

    • Fixed rules, containing: rule-10.3, rule-14.4, and rule-15.5.

[2.0.2]

• Bug Fixes

  • Fixed the bug of enabling wrong GPIO clock gate in initial API. Since some GPIO instances may not have a clock gate enabled, it checks the clock gate number and makes sure the clock gate is valid.

[2.0.1]

• Improvements

  • API interface changes:

    • Refined naming of the API while keeping all original APIs, marking them as deprecated. Original APIs will be removed in next release. The main change is to update the API with prefix of _PinXXX() and _PortXXX().

[2.0.0]

• Initial version.

---

GPT

[2.0.5]

• Improvements

  • Support workaround for ERR003777. This workaround helps switching the clock sources.

[2.0.4]

• Bug Fixes

  • Fixed compiler warning when built with FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL flag enabled.

[2.0.3]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 5.3 by customizing function parameter.

[2.0.2]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 17.7.

[2.0.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.1, 10.3, 10.4, 10.6, 10.8, 17.7.

[2.0.0]

• Initial version.

---

I2C

[2.0.7]

• Bug Fixes

  • Fixed MISRA issues.

    • Fixed rules 8.4, 8.5.

[2.0.6]

• Bug Fixes

  • Fixed the bug that, in I2C_MasterStop after the stop command is issued, the IBB flag should be cleared rather than set.

  • Fixed the bug that to clear kI2C_ArbitrationLostFlag and kI2C_IntPendingFlag, their bits should be written ‘0’ rather than ‘1’.

[2.0.5]

• Bug Fixes

  • Fixed Coverity issue of unchecked return value in I2C_RTOS_Transfer.

  • Fixed MISRA issues.

    • Fixed rules 10.1, 10.3, 10.4, 11.9, 14.4, 15.7, 16.4, 17.7.

• Improvements

  • Updated the I2C_WAIT_TIMEOUT macro to unified name I2C_RETRY_TIMES.

[2.0.4]

• Bug Fixes

  • Fixed the issue that I2C Master transfer APIs(blocking/non-blocking) did not support the situation that master transfer with subaddress and transfer data size being zero, which means no data followed by the subaddress.

[2.0.3]

• Improvements

  • Improved code readability, added new static API I2C_WaitForStatusReady for the status flag wait, and changed to call I2C_WaitForStatusReady instead of polling flags with reading register.

[2.0.2]

• Improvements

  • Added I2C_WATI_TIMEOUT macro to allow users to specify the timeout times for waiting flags in functional API and blocking transfer API.

[2.0.1]

• Bug Fixes

  • Added a proper handle for transfer config flag kI2C_TransferNoStartFlag to support transmit with kI2C_TransferNoStartFlag flag. Only supports write only or write+read with no start flag; does not support read only with no start flag.

[2.0.0]

• Initial version.

---

MU

[2.2.0]

• New Features

  • Added API MU_GetRxStatusFlags.

[2.1.3]

• Improvements

  • Release peripheral from reset if necessary in init function.

[2.1.2]

• Bug Fixes

  • Fixed issue that MU_GetInstance() is defined but never used.

[2.1.1]

• Bug Fixes

  • Fixed general interrupt comment typo.

[2.1.0]

• Improvements

  • Added new enum mu_msg_reg_index_t.

[2.0.7]

• Bug Fixes

  • Fixed MU_GetInterruptsPending bug that can not get general interrupt status.

[2.0.6]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 17.7.

[2.0.5]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 14.4, 15.5.

[2.0.4]

• Improvements

  • Improved for the platforms which don’t support reset assert interrupt and get the other core power mode.

[2.0.3]

• Bug fixes

  • MISRA C-2012 issue fixed.

    • Fixed rules, containing: rule-10.3, rule-14.4, rule-15.5.

[2.0.2]

• Improvements

  • Added support for MIMX8MQx.

[2.0.1]

• Improvements

  • Added support for MCIMX7Ux_M4.

[2.0.0]

• Initial version.

---

PDM

[2.9.1]

• Bug Fixes

  • Fixed the issue that the driver still enters the interrupt after disabling clock.

[2.9.0]

• Improvements

• Added feature FSL_FEATURE_PDM_HAS_DECIMATION_FILTER_BYPASS to config CTRL_2[DEC_BYPASS] field.

• Modify code to make the OSR value is not limited to 16.

[2.8.1]

• Improvements

• Added feature FSL_FEATURE_PDM_HAS_NO_DOZEN to handle nonexistent CTRL_1[DOZEN] field.

[2.8.0]

• Improvements

• Added feature FSL_FEATURE_PDM_HAS_NO_HWVAD to remove the support of hadware voice activity detector.

• Added feature FSL_FEATURE_PDM_HAS_NO_FILTER_BUFFER to remove the support of FIR_RDY bitfield in STAT register.

[2.7.4]

• Bug Fixes

  • Fixed driver can not determine the specific float number of clock divider.

  • Fixed PDM_ValidateSrcClockRate calculates PDM channel in wrong method issue.

[2.7.3]

• Improvements

• Added feature FSL_FEATURE_PDM_HAS_NO_VADEF to remove the support of VADEF bitfield in VAD0_STAT register.

[2.7.2]

• Improvements

• Added feature FSL_FEATURE_PDM_HAS_NO_MINIMUM_CLKDIV to decide whether the minimum clock frequency division is required.

[2.7.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 8.4, 10.3, 10.1, 10.4, 14.4

[2.7.0]

• Improvements

  • Added api PDM_EnableHwvadInterruptCallback to support handle hwvad IRQ in PDM driver.

  • Corrected the sample rate configuration for non high quality mode.

  • Added api PDM_SetChannelGain to support adjust the channel gain.

[2.6.0]

• Improvements

  • Added new features FSL_FEATURE_PDM_HAS_STATUS_LOW_FREQ/FSL_FEATURE_PDM_HAS_DC_OUT_CTRL/FSL_FEATURE_PDM_DC_CTRL_VALUE_FIXED.

[2.5.0]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 8.4, 16.5, 10.4, 10.3, 10.1, 11.9, 17.7, 10.6, 14.4, 11.8, 11.6.

[2.4.1]

• Bug Fixes

  • Fixed MDK 66-D warning in pdm driver.

[2.4.0]

• Improvements

  • Added api PDM_TransferSetChannelConfig/PDM_ReadFifo to support read different width data.

  • Added feature FSL_FEATURE_PDM_HAS_RANGE_CTRL and api PDM_ClearRangeStatus/PDM_GetRangeStatus for range register.

• Bug Fixes

  • Fixed violation of MISRA C-2012 Rule 14.4, 10.3, 10.4.

[2.3.0]

• Improvements

  • Enabled envelope/energy voice detect mode by adding apis PDM_SetHwvadInEnvelopeBasedMode/PDM_SetHwvadInEnergyBasedMode.

  • Added feature FSL_FEATURE_PDM_CHANNEL_NUM for different SOC.

[2.2.1]

• Bug Fixes

  • Fixed violation of MISRA C-2012 Rule 10.1, 10.3, 10.4, 10.6, 10.7, 11.3, 11.8, 14.4, 17.7, 18.4.

  • Added medium quality mode support in function PDM_SetSampleRateConfig.

[2.2.0]

• Improvements

  • Added api PDM_SetSampleRateConfig to improve user experience and marked api PDM_SetSampleRate as deprecated.

[2.1.1]

• Improvements

• Used new SDMA API SDMA_SetDoneConfig instead of SDMA_EnableSwDone for PDM SDMA driver.

[2.1.0]

• Improvements

  • Added software buffer queue for transactional API.

[2.0.1]

• Improvements

  • Improved HWVAD feature.

[2.0.0]

• Initial version.

---

PDM_EDMA

[2.6.3]

• Improvements

  • Add EDMA ext API to accommodate more types of EDMA.

[2.6.2]

• Improvements

  • Add macro MCUX_SDK_PDM_EDMA_PDM_ENABLE_INTERNAL to let the user decide whether to enable it when calling PDM_TransferReceiveEDMA.

[2.6.1]

• Bug Fixes

  • Fixed violation of MISRA C-2012 Rule 10.3, 10.4.

[2.6.0]

• Improvements

  • Updated api PDM_TransferReceiveEDMA to support channel block interleave transfer.

  • Added new api PDM_TransferSetMultiChannelInterleaveType to support channel interleave type configurations.

[2.5.0]

• Refer PDM driver change log 2.1.0 to 2.5.0

---

PDM_SDMA

[2.7.0]

• Improvements

  • Added new api PDM_TransferTerminateReceiveSDMA to reset all PDM SDMA internal state machine.

[2.6.0]

• Bug Fixes

  • Fixed burst length overflow issue when using multi fifo.

  • Added alignment check between transfer size and the fifo width.

[2.5.0]

• Refer PDM driver change log 2.1.0 to 2.3.1

---

PWM

[2.0.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 17.7.

[2.0.0]

• Initial version.

---

RDC

[2.2.0]

• New Features

  • Added APIs to get memory region or peripheral access policy for specific domain.

[2.1.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.6.

[2.1.0]

• Improvements

  • Enhanced to support memory region larger than 32-bit address.

[2.0.2]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 11.3, 11.8, 17.7.

[2.0.1]

• Bug Fixes:

  • Added __DSB after new configuration is set to ensure the new configuration takes effect.

[2.0.0]

• Initial version.

---

RDC_SEMA42

[2.0.4]

• Improvements

  • Changed to implement RDC_SEMAPHORE_Lock base on RDC_SEMAPHORE_TryLock.

[2.0.3]

• Improvements:

  • Supported the RDC_SEMAPHORE_Type structure whose gate registers are defined as an array.

[2.0.2]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 10.8, 14.3, 14.4, 18.1.

[2.0.1]

• Improvements:

  • Added support for the platforms that don’t have dedicated RDC_SEMA42 clock gate.

[2.0.0]

• Initial version.

---

SAI

[2.4.4]

• Bug Fixes

  • Fixed enumeration sai_fifo_combine_t - add RX configuration.

[2.4.3]

• Bug Fixes

  • Fixed enumeration sai_fifo_combine_t value configuration issue.

[2.4.2]

• Improvements

  • Release peripheral from reset if necessary in init function.

[2.4.1]

• Bug Fixes

  • Fixed bitWidth incorrectly assigned issue.

[2.4.0]

• Improvements

  • Removed deprecated APIs.

[2.3.8]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 10.4.

[2.3.7]

• Improvements

  • Change feature “FSL_FEATURE_SAI_FIFO_COUNT” to “FSL_FEATURE_SAI_HAS_FIFO”.

  • Added feature “FSL_FEATURE_SAI_FIFO_COUNTn(x)” to align SAI fifo count function with IP in function

[2.3.6]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 5.6.

[2.3.5]

• Improvements

  • Make driver to be aarch64 compatible.

[2.3.4]

• Bug Fixes

  • Corrected the fifo combine feature macro used in driver.

[2.3.3]

• Bug Fixes

  • Added bit clock polarity configuration when sai act as slave.

  • Fixed out of bound access coverity issue.

  • Fixed violations of MISRA C-2012 rule 10.3, 10.4.

[2.3.2]

• Bug Fixes

  • Corrected the frame sync configuration when sai act as slave.

[2.3.1]

• Bug Fixes

  • Corrected the peripheral name in function SAI0_DriverIRQHandler.

  • Fixed violations of MISRA C-2012 rule 17.7.

[2.3.0]

• Bug Fixes

  • Fixed the build error caused by the SOC has no fifo feature.

[2.2.3]

• Bug Fixes

  • Corrected the peripheral name in function SAI0_DriverIRQHandler.

[2.2.2]

• Bug Fixes

  • Fixed the issue of MISRA 2004 rule 9.3.

  • Fixed sign-compare warning.

  • Fixed the PA082 build warning.

  • Fixed sign-compare warning.

  • Fixed violations of MISRA C-2012 rule 10.3,17.7,10.4,8.4,10.7,10.8,14.4,17.7,11.6,10.1,10.6,8.4,14.3,16.4,18.4.

  • Allow to reset Rx or Tx FIFO pointers only when Rx or Tx is disabled.

• Improvements

  • Added 24bit raw audio data width support in sai sdma driver.

  • Disabled the interrupt/DMA request in the SAI_Init to avoid generates unexpected sai FIFO requests.

[2.2.1]

• Improvements

  • Added mclk post divider support in function SAI_SetMasterClockDivider.

  • Removed useless configuration code in SAI_RxSetSerialDataConfig.

• Bug Fixes

  • Fixed the SAI SDMA driver build issue caused by the wrong structure member name used in the function SAI_TransferRxSetConfigSDMA/SAI_TransferTxSetConfigSDMA.

  • Fixed BAD BIT SHIFT OPERATION issue caused by the FSL_FEATURE_SAI_CHANNEL_COUNTn.

  • Applied ERR05144: not set FCONT = 1 when TMR > 0, otherwise the TX may not work.

[2.2.0]

• Improvements

  • Added new APIs for parameters collection and simplified user interfaces:

    • SAI_Init

    • SAI_SetMasterClockConfig

    • SAI_TxSetBitClockRate

    • SAI_TxSetSerialDataConfig

    • SAI_TxSetFrameSyncConfig

    • SAI_TxSetFifoConfig

    • SAI_TxSetBitclockConfig

    • SAI_TxSetConfig

    • SAI_TxSetTransferConfig

    • SAI_RxSetBitClockRate

    • SAI_RxSetSerialDataConfig

    • SAI_RxSetFrameSyncConfig

    • SAI_RxSetFifoConfig

    • SAI_RxSetBitclockConfig

    • SAI_RXSetConfig

    • SAI_RxSetTransferConfig

    • SAI_GetClassicI2SConfig

    • SAI_GetLeftJustifiedConfig

    • SAI_GetRightJustifiedConfig

    • SAI_GetTDMConfig

[2.1.9]

• Improvements

  • Improved SAI driver comment for clock polarity.

  • Added enumeration for SAI for sample inputs on different edges.

  • Changed FSL_FEATURE_SAI_CHANNEL_COUNT to FSL_FEATURE_SAI_CHANNEL_COUNTn(base) for the difference between the different SAI instances.

• Added new APIs:

  • SAI_TxSetBitClockDirection

  • SAI_RxSetBitClockDirection

  • SAI_RxSetFrameSyncDirection

  • SAI_TxSetFrameSyncDirection

[2.1.8]

• Improvements

  • Added feature macro test for the sync mode2 and mode 3.

  • Added feature macro test for masterClockHz in sai_transfer_format_t.

[2.1.7]

• Improvements

  • Added feature macro test for the mclkSource member in sai_config_t.

  • Changed “FSL_FEATURE_SAI5_SAI6_SHARE_IRQ” to “FSL_FEATURE_SAI_SAI5_SAI6_SHARE_IRQ”.

  • Added #ifndef #endif check for SAI_XFER_QUEUE_SIZE to allow redefinition.

• Bug Fixes

  • Fixed build error caused by feature macro test for mclkSource.

[2.1.6]

• Improvements

  • Added feature macro test for mclkSourceClockHz check.

  • Added bit clock source name for general devices.

• Bug Fixes

  • Fixed incorrect channel numbers setting while calling RX/TX set format together.

[2.1.5]

• Bug Fixes

  • Corrected SAI3 driver IRQ handler name.

  • Added I2S4/5/6 IRQ handler.

  • Added base in handler structure to support different instances sharing one IRQ number.

• New Features

  • Updated SAI driver for MCR bit MICS.

  • Added 192 KHZ/384 KHZ in the sample rate enumeration.

  • Added multi FIFO interrupt/SDMA transfer support for TX/RX.

  • Added an API to read/write multi FIFO data in a blocking method.

  • Added bclk bypass support when bclk is same with mclk.

[2.1.4]

• New Features

  • Added an API to enable/disable auto FIFO error recovery in platforms that support this feature.

  • Added an API to set data packing feature in platforms which support this feature.

[2.1.3]

• New Features

  • Added feature to make I2S frame sync length configurable according to bitWidth.

[2.1.2]

• Bug Fixes

  • Added 24-bit support for SAI eDMA transfer. All data shall be 32 bits for send/receive, as eDMA cannot directly handle 3-Byte transfer.

[2.1.1]

• Improvements

  • Reduced code size while not using transactional API.

[2.1.0]

• Improvements

  • API name changes:

    • SAI_GetSendRemainingBytes -> SAI_GetSentCount.

    • SAI_GetReceiveRemainingBytes -> SAI_GetReceivedCount.

    • All names of transactional APIs were added with “Transfer” prefix.

    • All transactional APIs use base and handle as input parameter.

    • Unified the parameter names.

• Bug Fixes

  • Fixed WLC bug while reading TCSR/RCSR registers.

  • Fixed MOE enable flow issue. Moved MOE enable after MICS settings in SAI_TxInit/SAI_RxInit.

[2.0.0]

• Initial version.

---

SAI_EDMA

[2.7.1]

• Improvements

  • Add EDMA ext API to accommodate more types of EDMA.

[2.7.0]

• Improvements

  • Updated api SAI_TransferReceiveEDMA to support voice channel block interleave transfer.

  • Updated api SAI_TransferSendEDMA to support voice channel block interleave transfer.

  • Added new api SAI_TransferSetInterleaveType to support channel interleave type configurations.

[2.6.0]

• Improvements

  • Removed deprecated APIs.

[2.5.1]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 20.7.

[2.5.0]

• Improvements

  • Added new api SAI_TransferSendLoopEDMA/SAI_TransferReceiveLoopEDMA to support loop transfer.

  • Added multi sai channel transfer support.

[2.4.0]

• Improvements

  • Added new api SAI_TransferGetValidTransferSlotsEDMA which can be used to get valid transfer slot count in the sai edma transfer queue.

  • Deprecated the api SAI_TransferRxSetFormatEDMA and SAI_TransferTxSetFormatEDMA.

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 10.3,10.4.

[2.3.2]

• Refer SAI driver change log 2.1.0 to 2.3.2

---

SAI_SDMA

[2.6.0]

• Improvements

  • Removed deprecated API (SAI_TransferTxSetFormatSDMA,SAI_TransferRxSetFormatSDMA) and replaced them with new API (SAI_TransferRxSetConfigSDMA,SAI_TransferRxSetConfigSDMA)

[2.5.3]

• Bug Fixes

  • Fixed the internal state of bd pool can not be reset in SAI_TransferTerminateSendSDMA.

[2.5.2]

• Improvements

  • Change feature “FSL_FEATURE_SAI_FIFO_COUNT” to “FSL_FEATURE_SAI_HAS_FIFO”.

  • Added feature “FSL_FEATURE_SAI_FIFO_COUNTn(x)” to align SAI fifo count function with IP in function

[2.5.1]

• Bug Fixes

  • Fixed the incorrect internal queue state after abort the transfer in callback.

[2.5.0]

• Bug Fixes

  • Fixed the incorrect driver queue state after calling abort function.

• Improvements

  • Added new api SAI_TransferTerminateSendSDMA/SAI_TransferTerminateReceiveSDMA.

[2.4.1]

• Bug Fixes

  • Fixed the handler array s_sdmaPrivateHandle overflow issue.

[2.4.0]

• Bug Fixes

  • Fixed burst length overflow issue when using multi fifo.

  • Added alignment check between transfer size and the fifo width.

  • Fixed violations of MISRA C-2012 rule 10.6.

[2.3.1]

• Refer SAI driver change log 2.1.0 to 2.3.1

---

SDMA

[2.4.2]

• Bug Fixes

  • Add global variable s_ramScriptLoaded to fix compatibility issues.

[2.4.1]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 10.4, 11.8.

[2.4.0]

• Improvements

  • Added load ram script automatically according to the peripheral type.

  • Updated sdma ram script to version I.MX7D_4_6.

  • Added api SDMA_GetRamScriptVersion to support to SDMA ram script version.

• Bug Fixes

  • Removed the SDMA_StartChannelEvents from SDMA_StartTransfer as sdma scheduler will handle it automatically

[2.3.6]

• Bug Fixes

  • Cleared the SDMAARM_CONFIG_CSM initial value before write value 0 using OR.

[2.3.5]

• Bug Fixes

  • Added transfer size validation to aovid overflow.

[2.3.4]

• Bug Fixes

  • Fixed the violation of MISRA C-2012 rule 10.4.

[2.3.3]

• Improvements

  • Improved sdma driver comments and parameters validation.

[2.3.2]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 10.6.

[2.3.1]

• Improvements

  • Removed clear all channel interrupt status in SDMA_HandleIRQ to avoid the possibility of lossing interrupt.

[2.3.0]

• Improvements

  • Added peripheral-to-peripheral support in SDMA driver.

  • Added 24bit data width support in sdma driver.

• Bug Fixes

  • Fixed Coverity issue: left shift may overflow issue.

  • Fixed MISRA2004 issue: the operand of underlying type ‘unsigned char’ or ‘unsigned short’ caused the result cast to the underlying type.

  • Fixed violations of MISRA C-2012 rule 10.3, 11.9, 10.4, 17.7, 20.7, 14.4, 11.6, 12.2, 16.4.

[2.2.1]

• Bug Fixes

  • Fixed MISRA 2004 issue in sdma driver.

[2.2.0]

• Improvements

  • Added fsl_sdma_script.h to define the sdma script address and firmware.

  • Updated the format of generic register R7 to align with newest firmware.

[2.1.1]

• Improvements

  • Added SDMA_SetDoneConfig to support hardware/software done configuration.

  • Marked SDMC_EnableSwDone as deprecated.

• Bug Fixes

  • Fixed logical dead code issue in function SDMA_SetDoneConfig.

[2.1.0]

• Improvements

  • Added SDMA_SetMultiFifoConfig API to support multi fifo feature.

  • Added SDMA_EnableSwDone API to support software done feature.

  • Added SDMA_LoadScript API to support load script to SDMA program memory.

  • Added SDMA_DumpScript API to support dump script from SDMA program memory.

  • Added SDMA3 IRQ handler.

[2.0.0]

• Initial version.

---

SEMA4

[2.0.3]

• Improvements

  • Changed to implement SEMA4_Lock base on SEMA4_TryLock.

[2.0.2]

• Improvements:

  • Supported the SEMA4_Type structure whose gate registers are defined as an array.

[2.0.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 15.5, 18.1, 18.4.

[2.0.0]

• Initial version.

---

TMU

[2.0.0]

• Initial version.

• This module was first developed on i.MX 8MP to support multi-site temperature monitor.

---

UART

[2.3.2]

• Improvements

  • Make driver aarch64 compatible

[2.3.1]

• Improvements

  • Use separate data for TX and RX in uart_transfer_t.

• Bug Fixes

  • Fixed bug that when ring buffer is used, if some data is received in ring buffer first before calling UART_TransferReceiveNonBlocking, the received data count returned by UART_TransferGetReceiveCount is wrong.

[2.3.0]

• Bug Fixes

  • Fixed DMA transfer blocking issue by enabling tx idle interrupt after DMA transmission finishes.

[2.2.1]

• Bug Fixes

  • Fixed MISRA 2012 rule 10.4 violation.

[2.2.0]

• New Features

  • Modified uart_config_t, UART_Init and UART_GetDefaultConfig APIs so that the RTS and CTS used for hardware flow control can be enabled during module initialization.

  • Added API UART_SetRxRTSWatermark so that the water mark level of RTS deassertion can be configured.

[2.1.1]

• Bug Fixes

  • Fixed MISRA 8.5 violation.

[2.1.0]

• Improvements

  • Added timeout mechanism when waiting for certain states in transfer driver.

[2.0.2]

• Improvements

  • Added check for transmission complete in UART_WriteBlocking, UART_TransferHandleIRQ and UART_SendSDMACallback to ensure all the data would be sent out to bus.

  • Modified UART_ReadBlocking so that if more than one receiver errors occur, all status flags will be cleared and the most severe error status will be returned.

• Bug Fixes

  • Fixed MISRA issues.

    • Fixed rules 10.1, 10.3, 10.4, 10.6, 10.7, 10.8, 11.9, 14.4.

[2.0.1]

• Bug Fixes

  • Memset local variable SDMA transfer configuration structure to make sure unused members in structure are cleared.

[2.0.0]

• Initial version.

---

UART_SDMA

[2.3.0]

• Refer UART driver change log 2.0.0 to 2.1.1, 2.3.0.

---

USDHC

[2.8.4]

• Improvements

  • Add feature macro FSL_FEATURE_USDHC_HAS_NO_VS18.

[2.8.3]

• Improvements

  • Improved api USDHC_EnableAutoTuningForCmdAndData to adapt to new bit field name for USDHC_VEND_SPEC2 register.

[2.8.2]

• Improvements

  • Added feature macro FSL_FEATURE_USDHC_HAS_NO_VOLTAGE_SELECT.

[2.8.1]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 11.9.

[2.8.0]

• Improvements

  • Fixed the mmc boot transfer failed issue which is caused by the Dma complete interrupt not enabled.

  • Marked api USDHC_AdjustDelayForManualTuning as deprecated and added new api USDHC_SetTuingDelay/USDHC_GetTuningDelayStatus.

  • Improved the manual tuning flow accroding to specification.

  • Added memory address conversion to support buffers which could only be accessed using alias address by non-core masters.

  • Fixed violations of MISRA C-2012 rule 10.4.

[2.7.0]

• Improvements

  • Added api USDHC_TransferScatterGatherADMANonBlocking to support scatter gather transfer.

  • Added feature FSL_FEATURE_USDHC_REGISTER_HOST_CTRL_CAP_HAS_NO_RETUNING_TIME_COUNTER for re-tuning time counter field in HOST_CTRL_CAP register.

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 11.9, 10.1, 10.3, 10.4, 8.4.

[2.6.0]

• Improvements

  • Added api USDHC_SetStandardTuningCounter to support adjust tuning counter of Standard tuning.

[2.5.1]

• Improvements

  • Used different status code for command and data interrupt callback.

  • Added cache line invalidate for receive buffer in driver IRQ handler to fix CM7 speculative access issue.

[2.5.0]

• Improvements

  • Added new api USDHC_SetStrobeDllOverride for HS400 strobe dll override mode delay taps configurations.

  • Corrected the STROBE DLL configurations sequence.

[2.4.0]

• Improvements

  • Added feature macro for read/write burst length.

    • Disabled redundant interrupt per different transfer request.

    • Disabled interrupt and reset command/data pointer in handle when transfer completes.

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 11.9, 15.7, 4.7, 16.4, 10.1, 10.3, 10.4, 11.3, 14.4, 10.6, 17.7, 16.1, 16.3.

  • Fixed PA082 build warning.

  • Fixed logically dead code Coverity issue.

[2.3.0]

• Improvements

  • Added USDHC_SetDataConfig API to support manual tuning.

  • Removed the limitaion that source clock must be bigger than the target in function USDHC_SetSdClock by using source clock frequency as target directly.

  • Added peripheral reset in USDHC_Init function.

  • Added tuning reset support in function USDHC_Reset function.

[2.2.8]

• Bug Fixes

  • Fixed out-of bounds write in function USDHC_ReceiveCommandResponse.

[2.2.7]

• Improvements

  • Added API USDHC_GetEnabledInterruptStatusFlags and used in USDHC_TransferHandleIRQ.

  • Removed useless member interruptFlags in usdhc_handle_t.

[2.2.6]

• Improvements

  • Added address align check for ADMA descriptor table address.

  • Changed USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY to (65536-4096) to make sure the data address is 4KB align for a transfer which need more than one ADMA1 descriptor.

[2.2.5]

• Bug Fixes

  • Fixed MDK 66-D warning.

[2.2.4]

• Bug Fixes

  • Fixed issue that real clock frequency wss mismatched with target clock frequency, which was caused by an incorrect prescaler calculation.

• New Features

  • Added control macro to enable/disable the CLOCK code in current driver.

[2.2.3]

• Bug Fixes

  • Fixed issue where AMDA did not disable with DMAEN clear.

• Improvements

  • Improved set clock function to check the output frequency range.

  • Dynamic set SDCLKFS during DDR enable or disable.

[2.2.2]

• Improvements

  • Improved read transfer cache maintain operation, combined clean, and invalidated them into one function.

[2.2.1]

• Bug Fixes

  • Disabled the invalidate cache operation for tuning.

[2.2.0]

• Improvements

  • Improved USDHC to support MMC boot feature.

[2.1.3]

• Bug Fixes

  • Fixed MISRA issue.

[2.1.2]

• Bug Fixes

  • Fixed Coverity issue.

  • Added base address and userData parameter for all callback functions.

[2.1.1]

• Improvements

  • Added cache maintain operation.

  • Added timeout status check for the DATA transfer which ignore error.

  • Added feature macro for SDR50/SDR104 mode.

  • Removed useless IRQ handler from different platforms.

[2.1.0]

• Improvements

  • Integrated tuning into transfer function.

  • Added strobe DLL feature.

  • Added enableAutoCommand23 in data structure.

  • Removed enable card clock function because the controller would handle the clock on/off.

[2.0.0]

• Initial version.

---

WDOG

[2.2.0]

• Bug Fixes

  • Fixed the wrong behavior of workMode.enableWait, workMode.enableStop, workMode.enableDebug in configuration structure wdog_config_t. When set the items to true, WDOG will continues working in those modes.

[2.1.1]

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 10.1, 10.3, 10.4, 10.6, 10.7 and 11.9.

  • Fixed the issue of the inseparable process interrupted by other interrupt source.

    • WDOG_Init

    • WDOG_Refresh

[2.1.0]

• New Features

  • Added new API “WDOG_TriggerSystemSoftwareReset()” to allow users to reset the system by software.

  • Added new API “WDOG_TriggerSoftwareSignal()” to allow users to trigger a WDOG_B signal by software.

  • Removed the parameter “softwareAssertion” and “softwareResetSignal” out of the wdog_config_t structure.

  • Added new parameter “enableTimeOutAssert” to the wdog_config_t structure. With this parameter enabled, when the WDOG timeout occurs, a WDOG_B signal will be asserted. This signal can be routed to external pin of the chip. Note that WDOG_B signal remains asserted until a power-on reset (POR) occurs.

[2.0.1]

• New Features

  • Added control macro to enable/disable the CLOCK code in current driver.

[2.0.0]

• Initial version.

---